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| 1 | +//! Run-under-qemu parity gate for the aarch64 NEON SIMD tier. |
| 2 | +//! |
| 3 | +//! `selfcheck()` runs each NEON SIMD lane's arithmetic against the scalar |
| 4 | +//! `u32`/`f32`/`i8` reference **in the same process**, returning `0` iff every |
| 5 | +//! lane is bit-identical. `scripts/neon-parity.sh` cross-builds this bin for |
| 6 | +//! `aarch64-unknown-linux-gnu` and runs it under `qemu-aarch64-static`, asserting |
| 7 | +//! exit code `0`; the CI `neon_simd` job runs the script. This is the NEON twin |
| 8 | +//! of `wasm-simd-parity` (the wasm tier's node gate) — it tests the REAL |
| 9 | +//! `ndarray::simd` aarch64 types, so a regression in `simd_neon.rs` fails here |
| 10 | +//! even though the x86 `cargo test` suite never compiles that file. Extend the |
| 11 | +//! per-lane blocks below whenever a new `ndarray::simd` NEON lane lands. |
| 12 | +
|
| 13 | +fn main() { |
| 14 | + #[cfg(target_arch = "aarch64")] |
| 15 | + { |
| 16 | + let rc = checks::selfcheck(); |
| 17 | + if rc != 0 { |
| 18 | + eprintln!("neon-simd-parity FAILED: lane/op code = {rc}"); |
| 19 | + std::process::exit(rc as i32); |
| 20 | + } |
| 21 | + println!("neon-simd-parity OK: U32x16 / F32x16 / I8x16 lanes bit-identical to scalar"); |
| 22 | + } |
| 23 | + #[cfg(not(target_arch = "aarch64"))] |
| 24 | + { |
| 25 | + eprintln!("neon-simd-parity is aarch64-only; nothing to check on this target"); |
| 26 | + } |
| 27 | +} |
| 28 | + |
| 29 | +#[cfg(target_arch = "aarch64")] |
| 30 | +mod checks { |
| 31 | + use ndarray::simd::{F32x16, I8x16, U32x16}; |
| 32 | + |
| 33 | + /// Distinct nonzero return codes make a CI failure point at the exact lane+op. |
| 34 | + pub fn selfcheck() -> u32 { |
| 35 | + if let Err(code) = check_u32x16() { |
| 36 | + return code; |
| 37 | + } |
| 38 | + if let Err(code) = check_f32x16() { |
| 39 | + return code; |
| 40 | + } |
| 41 | + if let Err(code) = check_i8x16() { |
| 42 | + return code; |
| 43 | + } |
| 44 | + 0 |
| 45 | + } |
| 46 | + |
| 47 | + /// `U32x16` ARX triple (Add / BitXor / rotate_left) — the ChaCha20/BLAKE lane |
| 48 | + /// (native `[U32x4; 4]` on aarch64). |
| 49 | + fn check_u32x16() -> Result<(), u32> { |
| 50 | + let a_arr: [u32; 16] = [ |
| 51 | + 0x0000_0000, 0xFFFF_FFFF, 0x0000_0001, 0x8000_0000, 0x1234_5678, 0x9ABC_DEF0, 0xDEAD_BEEF, 0xCAFE_BABE, |
| 52 | + 0x0F0F_0F0F, 0xF0F0_F0F0, 0x5555_5555, 0xAAAA_AAAA, 0x0000_00FF, 0xFF00_0000, 0x0101_0101, 0x8080_8080, |
| 53 | + ]; |
| 54 | + let b_arr: [u32; 16] = [ |
| 55 | + 0x9E37_79B9, 0x1111_1111, 0xDEAD_C0DE, 0x0BAD_F00D, 0x7FFF_FFFF, 0x0000_0000, 0xFFFF_FFFF, 0x1357_9BDF, |
| 56 | + 0x2468_ACE0, 0xFEDC_BA98, 0x0000_0010, 0x0000_001F, 0xABCD_EF01, 0x1020_4080, 0x0F0F_F0F0, 0xC0DE_CAFE, |
| 57 | + ]; |
| 58 | + if U32x16::from_array(a_arr).to_array() != a_arr { |
| 59 | + return Err(10); |
| 60 | + } |
| 61 | + let a = U32x16::from_array(a_arr); |
| 62 | + let b = U32x16::from_array(b_arr); |
| 63 | + let add = (a + b).to_array(); |
| 64 | + let xor = (a ^ b).to_array(); |
| 65 | + for i in 0..16 { |
| 66 | + if add[i] != a_arr[i].wrapping_add(b_arr[i]) { |
| 67 | + return Err(11); |
| 68 | + } |
| 69 | + if xor[i] != a_arr[i] ^ b_arr[i] { |
| 70 | + return Err(12); |
| 71 | + } |
| 72 | + } |
| 73 | + // ARX rotate — ChaCha20 uses 16/12/8/7; edges (0, 1, 24, 31) included. |
| 74 | + for &n in &[0u32, 1, 7, 8, 12, 16, 24, 31] { |
| 75 | + let r = a.rotate_left(n).to_array(); |
| 76 | + for i in 0..16 { |
| 77 | + if r[i] != a_arr[i].rotate_left(n) { |
| 78 | + return Err(13); |
| 79 | + } |
| 80 | + } |
| 81 | + } |
| 82 | + Ok(()) |
| 83 | + } |
| 84 | + |
| 85 | + /// `F32x16` — the float hot-path lane (splat / roundtrip / add / reduce_sum). |
| 86 | + fn check_f32x16() -> Result<(), u32> { |
| 87 | + let data: [f32; 16] = [ |
| 88 | + 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, |
| 89 | + ]; |
| 90 | + if F32x16::from_array(data).to_array() != data { |
| 91 | + return Err(20); |
| 92 | + } |
| 93 | + let a = F32x16::from_array(data); |
| 94 | + let b = F32x16::splat(2.0); |
| 95 | + let sum = (a + b).to_array(); |
| 96 | + for i in 0..16 { |
| 97 | + if sum[i] != data[i] + 2.0 { |
| 98 | + return Err(21); |
| 99 | + } |
| 100 | + } |
| 101 | + // 0+1+…+15 = 120. |
| 102 | + if F32x16::from_array(data).reduce_sum() != 120.0 { |
| 103 | + return Err(22); |
| 104 | + } |
| 105 | + Ok(()) |
| 106 | + } |
| 107 | + |
| 108 | + /// `I8x16` — the byte lane (roundtrip / add). |
| 109 | + fn check_i8x16() -> Result<(), u32> { |
| 110 | + let a_arr: [i8; 16] = [-128, -1, 0, 1, 127, 2, -2, 3, -3, 42, -42, 100, -100, 7, -7, 64]; |
| 111 | + let b_arr: [i8; 16] = [1, 1, 1, 1, 1, -1, -1, -1, 5, -5, 10, -10, 25, -25, 63, -64]; |
| 112 | + if I8x16::from_array(a_arr).to_array() != a_arr { |
| 113 | + return Err(30); |
| 114 | + } |
| 115 | + let sum = I8x16::from_array(a_arr).add(I8x16::from_array(b_arr)).to_array(); |
| 116 | + for i in 0..16 { |
| 117 | + if sum[i] != a_arr[i].wrapping_add(b_arr[i]) { |
| 118 | + return Err(31); |
| 119 | + } |
| 120 | + } |
| 121 | + Ok(()) |
| 122 | + } |
| 123 | +} |
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