diff --git a/acf/hispecatc.acf b/acf/hispecatc.acf
index 4a573e8..c9d762b 100644
--- a/acf/hispecatc.acf
+++ b/acf/hispecatc.acf
@@ -1,336 +1,305 @@
 [CONFIG]
-PARAMETER0="Start=0"
-PARAMETER1="Expose=0"
-PARAMETER2="ExposeWindow=0"
-PARAMETER3="exptime=0"
-PARAMETER4="longexposure=0"
-PARAMETER5="Abort=0"
-PARAMETER6="mode_UTR_RR=0"
-PARAMETER7="mode_UTR_GR=0"
-PARAMETER8="mode_EnhancedRollingReset=0"
-PARAMETER9="mode_VideoRX=1"
-PARAMETER10="mode_VideoRXR=0"
-PARAMETER11="mode_PermanentReset=0"
-PARAMETER12="mode_Guiding=0"
-PARAMETER13="mode_InterleavedGuiding=0"
-PARAMETER14="exp_PulseWhileGlobReset=0"
-PARAMETER15="H2RG_rows=2048"
-PARAMETER16="H2RG_rows_skip=0"
-PARAMETER17="H2RG_columns=64"
-PARAMETER18="H2RG_win_rows=10"
-PARAMETER19="H2RG_win_columns=10"
-PARAMETER20="H2RGMainReset=0"
-PARAMETER21="EnhancedRR_Delta=100"
-PARAMETER22="Hold4Programming=0"
-PARAMETER23="WindowPixelNb=100"
-PARAMETER24="prv_flag_reset=0"
-PARAMETER25="prv_ghostframe=0"
-PARAMETERS=26
-LINE0=Init:
-LINE1="STATE000; CALL InitClocks"
-LINE2="STATE000; CALL wCLKEn"
-LINE3="STATE000; CALL ResetRegistersDefault"
-LINE4="STATE000; if Start GOTO WaitForExpose"
-LINE5="STATE000; GOTO Init"
-LINE6=ResetRegHxRG:
-LINE7="STATE000; CALL ResetRegistersDefault"
-LINE8="STATE000; H2RGMainReset--"
-LINE9="STATE000; RETURN ResetRegHxRG"
-LINE10=WaitForExpose:
-LINE11="STATE000; if Expose CALL SelectMode"
-LINE12="STATE000; if H2RGMainReset CALL ResetRegHxRG"
-LINE13="STATE000; prv_ghostframe++"
-LINE14="STATE000; if mode_VideoRXR CALL VideoRXR_GrabFrame"
-LINE15="STATE000; if mode_VideoRX CALL VideoRX_GrabFrame"
-LINE16="STATE000; prv_ghostframe--"
-LINE17="STATE000; CALL wResetEN"
-LINE18="STATE000; GOTO WaitForExpose"
-LINE19=SelectMode:
-LINE20="STATE000; if mode_UTR_RR CALL UTR_RR_Sequence"
-LINE21="STATE000; if mode_UTR_GR CALL UTR_GR_Sequence"
-LINE22="STATE000; if mode_VideoRX CALL VideoRX_Sequence"
-LINE23="STATE000; if mode_VideoRXR CALL VideoRXR_Sequence"
-LINE24="STATE000; if mode_PermanentReset CALL PGR_Sequence"
-LINE25="STATE000; if mode_EnhancedRollingReset CALL EnhancedRR_Sequence"
-LINE26="STATE000; if exp_PulseWhileGlobReset CALL Persistence_PulseGlobalReset"
-LINE27="STATE000; if mode_Guiding CALL Guiding_Sequence"
-LINE28="STATE000; GOTO WaitForExpose"
-LINE29=UTR_RR_Sequence:
-LINE30="STATE000; prv_flag_reset++"
-LINE31="STATE000; CALL UTR_RR_GrabFrame(Expose)"
-LINE32="STATE000; GOTO WaitForExpose"
-LINE33=UTR_RR_GrabFrame:
-LINE34="STATE000; Expose--"
-LINE35="STATE000; Expose--"
-LINE36="STATE000; if !prv_flag_reset CALL ExposureTimer"
-LINE37="STATE000; CALL wFrame"
-LINE38="STATE000; CALL StartFrame"
-LINE39="STATE000; CALL RR_SkipRow(H2RG_rows_skip)"
-LINE40="STATE000; CALL RR_ReadRow(H2RG_rows)"
-LINE41="STATE000; CALL PulseVCLK"
-LINE42="STATE000; prv_flag_reset--"
-LINE43="STATE000; RETURN UTR_RR_GrabFrame"
-LINE44=RR_ReadRow:
-LINE45="STATE000; CALL wLine"
-LINE46="STATE000; CALL StartRow"
-LINE47="STATE000; CALL wReadEN"
-LINE48="STATE000; if prv_flag_reset CALL ResetPulse"
-LINE49="STATE000; if !prv_flag_reset CALL ResetPulse_Dummy"
-LINE50="STATE000; CALL ReadPixel_Blank(2)"
-LINE51="STATE000; CALL ReadPixel(H2RG_columns)"
-LINE52="STATE000; CALL wbHclk"
-LINE53="STATE000; CALL wbReadEN"
-LINE54="STATE000; RETURN RR_ReadRow"
-LINE55=RR_SkipRow:
-LINE56="STATE000; CALL StartRow"
-LINE57="STATE000; if prv_flag_reset CALL ResetPulse"
-LINE58="STATE000; RETURN RR_SkipRow"
-LINE59=UTR_GR_Sequence:
-LINE60="STATE000; prv_flag_reset++"
-LINE61="STATE000; CALL UTR_GR_GrabFrame(Expose)"
-LINE62="STATE000; GOTO WaitForExpose"
-LINE63=PGR_Sequence:
-LINE64="STATE000; CALL wResetEN"
-LINE65="STATE000; CALL UTR_GR_GrabFrame(Expose)"
-LINE66="STATE000; CALL wbResetEN"
-LINE67="STATE000; GOTO WaitForExpose"
-LINE68=UTR_GR_GrabFrame:
-LINE69="STATE000; Expose--"
-LINE70="STATE000; CALL wFrame"
-LINE71="STATE000; CALL StartFrame"
-LINE72="STATE000; CALL PulseVCLK"
-LINE73="STATE000; CALL GR_ReadRow(2048)"
-LINE74="STATE000; CALL PulseVCLK"
-LINE75="STATE000; prv_flag_reset--"
-LINE76="STATE000; RETURN UTR_GR_GrabFrame"
-LINE77=GR_ReadRow:
-LINE78="STATE000; CALL wLine"
-LINE79="STATE000; CALL StartRow"
-LINE80="STATE000; CALL wReadEN"
-LINE81="STATE000; CALL ReadPixel_Blank(2)"
-LINE82="STATE000; CALL ReadPixel(64)"
-LINE83="STATE000; CALL wbHclk"
-LINE84="STATE000; CALL wbReadEN"
-LINE85="STATE000; RETURN GR_ReadRow"
-LINE86=VideoRX_Sequence:
-LINE87="STATE000; if Expose CALL VideoRX_GrabFrame"
-LINE88="STATE000; if Abort CALL AbortSeq"
-LINE89="STATE000; if !Expose GOTO WaitForExpose"
-LINE90="STATE000; GOTO VideoRX_Sequence"
-LINE91=VideoRX_GrabFrame:
-LINE92="STATE000; if !prv_ghostframe CALL wFrame"
-LINE93="STATE000; CALL StartFrame"
-LINE94="STATE000; CALL RR_SkipRow(H2RG_rows_skip)"
-LINE95="STATE000; CALL RX_ReadRow(H2RG_rows)"
-LINE96="STATE000; CALL PulseVCLK"
-LINE97="STATE000; CALL ExposureTimer"
-LINE98="STATE000; RETURN VideoRX_GrabFrame"
-LINE99=RX_ReadRow:
-LINE100="STATE000; CALL wLine"
-LINE101="STATE000; CALL StartRow"
-LINE102="STATE000; CALL wReadEN"
-LINE103="STATE000; CALL ReadPixel_Blank(2)"
-LINE104="STATE000; CALL ReadPixel(H2RG_columns)"
-LINE105="STATE000; CALL ResetPulse"
-LINE106="STATE000; CALL wbHclk"
-LINE107="STATE000; CALL wbReadEN"
-LINE108="STATE000; RETURN RX_ReadRow"
-LINE109=VideoRXR_Sequence:
-LINE110="STATE000; if Expose CALL VideoRXR_GrabFrame"
-LINE111="STATE000; if Abort GOTO AbortSeq"
-LINE112="STATE000; if !Expose GOTO WaitForExpose"
-LINE113="STATE000; GOTO VideoRXR_Sequence"
-LINE114=VideoRXR_GrabFrame:
-LINE115="STATE000; if !prv_ghostframe CALL wFrame"
-LINE116="STATE000; CALL StartFrame"
-LINE117="STATE000; CALL RR_SkipRow(H2RG_rows_skip)"
-LINE118="STATE000; CALL RXR_ReadRow(H2RG_rows)"
-LINE119="STATE000; CALL PulseVCLK"
-LINE120="STATE000; CALL ExposureTimer"
-LINE121="STATE000; if !prv_ghostframe CALL DecrExposeCpt"
-LINE122="STATE000; RETURN VideoRXR_GrabFrame"
-LINE123=RXR_ReadRow:
-LINE124="STATE000; CALL wLine"
-LINE125="STATE000; CALL StartRow"
-LINE126="STATE000; CALL wReadEN"
-LINE127="STATE000; CALL ReadPixel_Blank(2)"
-LINE128="STATE000; CALL ReadPixel(H2RG_columns)"
-LINE129="STATE000; CALL ResetPulse"
-LINE130="STATE000; CALL LSyncBPulse"
-LINE131="STATE000; CALL ReadPixel_Blank(2)"
-LINE132="STATE000; CALL ReadPixel(H2RG_columns)"
-LINE133="STATE000; CALL wbHclk"
-LINE134="STATE000; CALL wbReadEN"
-LINE135="STATE000; RETURN RXR_ReadRow"
-LINE136=Persistence_PulseGlobalReset:
-LINE137="STATE000; CALL wResetEN"
-LINE138="STATE000; CALL UTR_GR_GrabFrame(10)"
-LINE139="STATE000; CALL wbResetEN"
-LINE140="STATE000; CALL UTR_GR_GrabFrame(100)"
-LINE141="STATE000; RETURN Persistence_PulseGlobalReset"
-LINE142=EnhancedRR_Sequence:
-LINE143="STATE000; CALL ConfigureEnhancedMode"
-LINE144="STATE000; CALL EnhancedRR_GrabFrame(Expose)"
-LINE145="STATE000; GOTO WaitForExpose"
-LINE146=EnhancedRR_GrabFrame:
-LINE147="STATE000; Expose--"
-LINE148="STATE000; CALL wFrame"
-LINE149="STATE000; CALL wbFSyncB"
-LINE150="STATE000; CALL HDCRR_ReadRow(EnhancedRR_Delta)"
-LINE151="STATE000; CALL wFSyncB"
-LINE152="STATE000; CALL HDCRR_ReadRow(1948)"
-LINE153="STATE000; RETURN EnhancedRR_GrabFrame"
-LINE154=HDCRR_ReadRow:
-LINE155="STATE000; CALL wLine"
-LINE156="STATE000; CALL PulseVCLK"
-LINE157="STATE000; CALL wbVReadEdge"
-LINE158="STATE000; CALL LSyncBPulse"
-LINE159="STATE000; CALL wReadEN"
-LINE160="STATE000; CALL ResetPulse"
-LINE161="STATE000; CALL ReadPixel_Blank(1)"
-LINE162="STATE000; CALL ReadPixel(64)"
-LINE163="STATE000; CALL wVReadEdge"
-LINE164="STATE000; CALL LSyncBPulse"
-LINE165="STATE000; CALL ReadPixel_Blank(1)"
-LINE166="STATE000; CALL ReadPixel(64)"
-LINE167="STATE000; CALL wbReadEN"
-LINE168="STATE000; RETURN HDCRR_ReadRow"
-LINE169=Guiding_Sequence:
-LINE170="STATE000; if Expose CALL GrabWindow"
-LINE171="STATE000; if Abort CALL AbortSeq"
-LINE172="STATE000; GOTO Guiding_Sequence"
-LINE173=GrabWindow:
-LINE174="STATE000; Expose--"
-LINE175="STATE000; CALL wFrame"
-LINE176="STATE000; CALL StartFrame"
-LINE177="STATE000; CALL WinRX_ReadRow(H2RG_win_rows)"
-LINE178="STATE000; CALL PulseVCLK"
-LINE179="STATE000; CALL ExposureTimer"
-LINE180="STATE000; RETURN GrabWindow"
-LINE181=WinRX_ReadRow:
-LINE182="STATE000; CALL wLine"
-LINE183="STATE000; CALL StartRow"
-LINE184="STATE000; CALL wReadEN"
-LINE185="STATE000; CALL ReadPixel_Blank(2)"
-LINE186="STATE000; CALL ReadPixel(H2RG_win_columns)"
-LINE187="STATE000; CALL ResetPulse"
-LINE188="STATE000; CALL wbHclk"
-LINE189="STATE000; CALL wbReadEN"
-LINE190="STATE000; RETURN WinRX_ReadRow"
-LINE191=ExposureTimer:
-LINE192="STATE000; if longexposure CALL Sec(exptime)"
-LINE193="STATE000; if !longexposure CALL HectoMicroSec(exptime)"
-LINE194="STATE000; if Abort GOTO AbortSeq"
-LINE195="STATE000; RETURN ExposureTimer"
-LINE196=MilliSec:
-LINE197="STATE000; CALL wDelay1ms"
-LINE198="STATE000; RETURN MilliSec"
-LINE199=HectoMicroSec:
-LINE200="STATE000; CALL wDelay1us(100)"
-LINE201="STATE000; RETURN HectoMicroSec"
-LINE202=Sec:
-LINE203="STATE000; CALL wDelay1ms(1000)"
-LINE204="STATE000; if Abort GOTO AbortSeq"
-LINE205="STATE000; RETURN Sec"
-LINE206=AbortSeq:
-LINE207="STATE000; CALL DecrExposeCpt(1000)"
-LINE208="STATE000; CALL InitResetCpt(100)"
-LINE209="STATE000; mode_VideoRX--"
-LINE210="STATE000; mode_VideoRXR--"
-LINE211="STATE000; mode_Guiding--"
-LINE212="STATE000; Abort--"
-LINE213="STATE000; GOTO WaitForExpose"
-LINE214=DecrExposeCpt:
-LINE215="STATE000; Expose--"
-LINE216="STATE000; RETURN DecrExposeCpt"
-LINE217=InitResetCpt:
-LINE218="STATE000; prv_flag_reset--"
-LINE219="STATE000; RETURN InitResetCpt"
-LINE220=wDelay1us:
-LINE221="STATE000; STATE000(98)"
-LINE222="STATE000; RETURN wDelay1us"
-LINE223=wDelay10us:
-LINE224="STATE000; STATE000(998)"
-LINE225="STATE000; RETURN wDelay10us"
-LINE226=wDelay1ms:
-LINE227="STATE000; STATE000(99998)"
-LINE228="STATE000; RETURN wDelay1ms"
-LINE229=InitClocks:
-LINE230="STATE000; STATE000(99998)"
-LINE231="STATE000; RETURN InitClocks"
-LINE232=wCLKEn:
-LINE233="STATE000; STATE000(999998)"
-LINE234="STATE000; RETURN wCLKEn"
-LINE235=ResetRegistersDefault:
-LINE236="STATE000; STATE000(1099998)"
-LINE237="STATE000; RETURN ResetRegistersDefault"
-LINE238=StartFrame:
-LINE239="STATE000; STATE000(598)"
-LINE240="STATE000; RETURN StartFrame"
-LINE241=StartRow:
-LINE242="STATE000; STATE000(598)"
-LINE243="STATE000; RETURN StartRow"
-LINE244=PulseVCLK:
-LINE245="STATE000; STATE000(878)"
-LINE246="STATE000; RETURN PulseVCLK"
-LINE247=wReadEN:
-LINE248="STATE000; STATE000(158)"
-LINE249="STATE000; RETURN wReadEN"
-LINE250=wbReadEN:
-LINE251="STATE000; STATE000(158)"
-LINE252="STATE000; RETURN wbReadEN"
-LINE253=ReadPixel:
-LINE254="STATE001;"
-LINE255="STATE002; STATE000(597)"
-LINE256="STATE000; RETURN ReadPixel"
-LINE257=ReadPixel_Blank:
-LINE258="STATE000; STATE000(598)"
-LINE259="STATE000; RETURN ReadPixel_Blank"
-LINE260=wbHclk:
-LINE261="STATE000; STATE000(78)"
-LINE262="STATE000; RETURN wbHclk"
-LINE263=ResetPulse:
-LINE264="STATE000; STATE000(1078)"
-LINE265="STATE000; RETURN ResetPulse"
-LINE266=ResetPulse_Dummy:
-LINE267="STATE000; STATE000(1078)"
-LINE268="STATE000; RETURN ResetPulse_Dummy"
-LINE269=wResetEN:
-LINE270="STATE000; STATE000(78)"
-LINE271="STATE000; RETURN wResetEN"
-LINE272=wbResetEN:
-LINE273="STATE000; STATE000(78)"
-LINE274="STATE000; RETURN wbResetEN"
-LINE275=LSyncBPulse:
-LINE276="STATE000; STATE000(158)"
-LINE277="STATE000; RETURN LSyncBPulse"
-LINE278=wVReadEdge:
-LINE279="STATE000; STATE000(78)"
-LINE280="STATE000; RETURN wVReadEdge"
-LINE281=wbVReadEdge:
-LINE282="STATE000; STATE000(78)"
-LINE283="STATE000; RETURN wbVReadEdge"
-LINE284=wFSyncB:
-LINE285="STATE000; STATE000(78)"
-LINE286="STATE000; RETURN wFSyncB"
-LINE287=wbFSyncB:
-LINE288="STATE000; STATE000(78)"
-LINE289="STATE000; RETURN wbFSyncB"
-LINE290=ConfigureEnhancedMode:
-LINE291="STATE000; STATE000(238)"
-LINE292="STATE000; RETURN ConfigureEnhancedMode"
-LINE293=wFrame:
-LINE294="STATE003; RETURN wFrame"
-LINE295=wLine:
-LINE296="STATE004; RETURN wLine"
-LINE297=wPixel:
-LINE298="STATE001;"
-LINE299="STATE002; RETURN wPixel"
-LINES=300
-MOD10\LVLC_V1=2.3
+MOD10DIO_DIR12=1
+MOD10DIO_DIR34=1
+MOD10DIO_DIR56=0
+MOD10DIO_DIR78=0
+MOD10DIO_LABEL1=
+MOD10DIO_LABEL2=
+MOD10DIO_LABEL3=
+MOD10DIO_LABEL4=
+MOD10DIO_LABEL5=
+MOD10DIO_LABEL6=
+MOD10DIO_LABEL7=
+MOD10DIO_LABEL8=
+MOD10DIO_POWER=1
+MOD10DIO_SOURCE1=3
+MOD10DIO_SOURCE2=3
+MOD10DIO_SOURCE3=3
+MOD10DIO_SOURCE4=0
+MOD10DIO_SOURCE5=0
+MOD10DIO_SOURCE6=0
+MOD10DIO_SOURCE7=0
+MOD10DIO_SOURCE8=0
+MOD10LVHC_ENABLE1=1
+MOD10LVHC_ENABLE2=0
+MOD10LVHC_ENABLE3=0
+MOD10LVHC_ENABLE4=0
+MOD10LVHC_ENABLE5=1
+MOD10LVHC_ENABLE6=1
+MOD10LVHC_IL1=10
+MOD10LVHC_IL2=50
+MOD10LVHC_IL3=10
+MOD10LVHC_IL4=100
+MOD10LVHC_IL5=10
+MOD10LVHC_IL6=70
+MOD10LVHC_LABEL1=PullUp
+MOD10LVHC_LABEL2=Misc 1
+MOD10LVHC_LABEL3=Misc 2
+MOD10LVHC_LABEL4=Misc 3
+MOD10LVHC_LABEL5=LED IR
+MOD10LVHC_LABEL6=Light Bulb
+MOD10LVHC_ORDER1=3
+MOD10LVHC_ORDER2=1
+MOD10LVHC_ORDER3=1
+MOD10LVHC_ORDER4=1
+MOD10LVHC_ORDER5=1
+MOD10LVHC_ORDER6=1
+MOD10LVHC_V1=3.2
+MOD10LVHC_V2=0.0
+MOD10LVHC_V3=0.0
+MOD10LVHC_V4=0.0
+MOD10LVHC_V5=0.0
+MOD10LVHC_V6=0.0
+MOD10LVLC_LABEL1=Bias Gate
+MOD10LVLC_LABEL10=
+MOD10LVLC_LABEL11=
+MOD10LVLC_LABEL12=
+MOD10LVLC_LABEL13=
+MOD10LVLC_LABEL14=
+MOD10LVLC_LABEL15=
+MOD10LVLC_LABEL16=
+MOD10LVLC_LABEL17=
+MOD10LVLC_LABEL18=
+MOD10LVLC_LABEL19=
+MOD10LVLC_LABEL2=Bias Power
+MOD10LVLC_LABEL20=
+MOD10LVLC_LABEL21=
+MOD10LVLC_LABEL22=
+MOD10LVLC_LABEL23=
+MOD10LVLC_LABEL24=
+MOD10LVLC_LABEL3=Diode Sub
+MOD10LVLC_LABEL4=Digital Supply
+MOD10LVLC_LABEL5=Diode Reset
+MOD10LVLC_LABEL6=Analog Supply
+MOD10LVLC_LABEL7=Preamp neg ref
+MOD10LVLC_LABEL8=clock enable
+MOD10LVLC_LABEL9=Preamp enable
+MOD10LVLC_ORDER1=2
+MOD10LVLC_ORDER10=1
+MOD10LVLC_ORDER11=1
+MOD10LVLC_ORDER12=1
+MOD10LVLC_ORDER13=1
+MOD10LVLC_ORDER14=1
+MOD10LVLC_ORDER15=1
+MOD10LVLC_ORDER16=1
+MOD10LVLC_ORDER17=1
+MOD10LVLC_ORDER18=1
+MOD10LVLC_ORDER19=1
+MOD10LVLC_ORDER2=2
+MOD10LVLC_ORDER20=1
+MOD10LVLC_ORDER21=1
+MOD10LVLC_ORDER22=1
+MOD10LVLC_ORDER23=1
+MOD10LVLC_ORDER24=1
+MOD10LVLC_ORDER3=2
+MOD10LVLC_ORDER4=1
+MOD10LVLC_ORDER5=2
+MOD10LVLC_ORDER6=1
+MOD10LVLC_ORDER7=1
+MOD10LVLC_ORDER8=2
+MOD10LVLC_ORDER9=2
+MOD10LVLC_V1=1.2
+MOD10LVLC_V10=0.0
+MOD10LVLC_V11=0.0
+MOD10LVLC_V12=0.0
+MOD10LVLC_V13=0.0
+MOD10LVLC_V14=0.0
+MOD10LVLC_V15=0.0
+MOD10LVLC_V16=0.0
+MOD10LVLC_V17=0.0
+MOD10LVLC_V18=0.0
+MOD10LVLC_V19=0.0
+MOD10LVLC_V2=2.5
+MOD10LVLC_V20=0.0
+MOD10LVLC_V21=0.0
+MOD10LVLC_V22=0.0
+MOD10LVLC_V23=0.0
+MOD10LVLC_V24=0.0
+MOD10LVLC_V3=0.55
+MOD10LVLC_V4=3.3
+MOD10LVLC_V5=0.3
+MOD10LVLC_V6=3.3
+MOD10LVLC_V7=2.57
+MOD10LVLC_V8=3.3
+MOD10LVLC_V9=4.5
+MOD10VCPU_INREG0=0
+MOD10VCPU_INREG1=0
+MOD10VCPU_INREG10=0
+MOD10VCPU_INREG11=0
+MOD10VCPU_INREG12=0
+MOD10VCPU_INREG13=0
+MOD10VCPU_INREG14=0
+MOD10VCPU_INREG15=0
+MOD10VCPU_INREG2=0
+MOD10VCPU_INREG3=0
+MOD10VCPU_INREG4=0
+MOD10VCPU_INREG5=0
+MOD10VCPU_INREG6=0
+MOD10VCPU_INREG7=0
+MOD10VCPU_INREG8=0
+MOD10VCPU_INREG9=0
+MOD10VCPU_LINE0="ALIAS r0 TriggerHw                ; reads hardware trigger"
+MOD10VCPU_LINE1="ALIAS r1 TriggerSw                ; reads software trigger"
+MOD10VCPU_LINE10=";"
+MOD10VCPU_LINE100=NOP
+MOD10VCPU_LINE101=NOP
+MOD10VCPU_LINE102=NOP
+MOD10VCPU_LINE103=NOP
+MOD10VCPU_LINE104=NOP
+MOD10VCPU_LINE105=NOP
+MOD10VCPU_LINE106=NOP
+MOD10VCPU_LINE107=NOP
+MOD10VCPU_LINE108=NOP
+MOD10VCPU_LINE109=NOP
+MOD10VCPU_LINE11="DIN_PORT=0x0000                   ; digital input port register"
+MOD10VCPU_LINE110=NOP
+MOD10VCPU_LINE111=NOP
+MOD10VCPU_LINE112=NOP
+MOD10VCPU_LINE113=NOP
+MOD10VCPU_LINE114=NOP
+MOD10VCPU_LINE115=NOP
+MOD10VCPU_LINE116=NOP
+MOD10VCPU_LINE117=
+MOD10VCPU_LINE118="SendSerialLoop:                   ; loop over this for each bit in the data word"
+MOD10VCPU_LINE119="OUTPUT SPI, 0x04                  ; each bit starts with DATA=HI and CLK=LO"
+MOD10VCPU_LINE12="SOFT_TRIG=0x0010                  ; software trigger VCPU_INREG0"
+MOD10VCPU_LINE120="SLA Data                          ; shift the MSB of Data into Carry"
+MOD10VCPU_LINE121="IF NC OUTPUT DataPort, DATAIN_LO  ; if C is clear then bring DATAIN LO"
+MOD10VCPU_LINE122="OUTPUT ClockPort, DATACLK_HI      ; then bring the clock HI"
+MOD10VCPU_LINE123="SUB Counter, 1                    ; decrement bit counter"
+MOD10VCPU_LINE124="IF NZ GOTO SendSerialLoop         ; keep looping over all bits in the data word"
+MOD10VCPU_LINE125="LOAD Once, 0                      ; clear the Once register to stop software triggers"
+MOD10VCPU_LINE126=GOTO Init
+MOD10VCPU_LINE13="DATA_WORD=0x0011                  ; VCPU_INREG1 carries the word to write serially"
+MOD10VCPU_LINE14=
+MOD10VCPU_LINE15="; bitmasks"
+MOD10VCPU_LINE16=";"
+MOD10VCPU_LINE17="DATACLK_HI=1"
+MOD10VCPU_LINE18="DATACLK_LO=0"
+MOD10VCPU_LINE19="CSB_HI=2"
+MOD10VCPU_LINE2="ALIAS r2 Once                     ; allows one-shot software trigger"
+MOD10VCPU_LINE20="CSB_LO=0"
+MOD10VCPU_LINE21="DATAIN_HI=4"
+MOD10VCPU_LINE22="DATAIN_LO=0"
+MOD10VCPU_LINE23="HW_TRIG=0x10                      ; hardware trigger bit = DIO5"
+MOD10VCPU_LINE24=
+MOD10VCPU_LINE25="; Initialize Output Ports"
+MOD10VCPU_LINE26=";"
+MOD10VCPU_LINE27="LOAD ClockPort, 0x0101            ; ClockPort = DIO1"
+MOD10VCPU_LINE28="LOAD DataPort, 0x0104             ; DataPort = DIO3"
+MOD10VCPU_LINE29="LOAD SPI, 0x0107                  ; CLK=DIO1, CSB=DIO2, DATA=DIO3"
+MOD10VCPU_LINE3="ALIAS r3 Counter                  ; general purpose counter"
+MOD10VCPU_LINE30=
+MOD10VCPU_LINE31="LOAD Once, 0                      ; clear the Once flag"
+MOD10VCPU_LINE32="INPUT TriggerSw, SOFT_TRIG        ; read the software trigger once at program start only"
+MOD10VCPU_LINE33="TEST TriggerSw, 1"
+MOD10VCPU_LINE34="IF Z GOTO Init                    ; if clear then leave the Once flag clear"
+MOD10VCPU_LINE35="LOAD Once, HW_TRIG                ; otherwise set the Once flag same as a hardware trigger"
+MOD10VCPU_LINE36=
+MOD10VCPU_LINE37="; Initialize all ports and registers"
+MOD10VCPU_LINE38=";"
+MOD10VCPU_LINE39=Init:
+MOD10VCPU_LINE4="ALIAS r4 Data                     ; this register caries the data"
+MOD10VCPU_LINE40="OUTPUT SPI, 0x06                  ; DATAIN=HI, CSB=HI, CLK=LO (110)"
+MOD10VCPU_LINE41=
+MOD10VCPU_LINE42="; WaitForTrigger"
+MOD10VCPU_LINE43="; Loop here until either a hardware or software trigger is received"
+MOD10VCPU_LINE44=";"
+MOD10VCPU_LINE45=WaitForTriggerLO:
+MOD10VCPU_LINE46=";LOAD Counter, 1                  ; initialize Counter for LO state"
+MOD10VCPU_LINE47=
+MOD10VCPU_LINE48=TestTriggerLO:
+MOD10VCPU_LINE49="INPUT TriggerHw, DIN_PORT         ; read the hardware trigger"
+MOD10VCPU_LINE5="ALIAS r5 ClockPort                ; holds the address for the DATACLK port"
+MOD10VCPU_LINE50="TEST TriggerHw, HW_TRIG           ; Z = NOT(TriggerHw & HW_TRIG)"
+MOD10VCPU_LINE51="IF NZ GOTO WaitForTriggerLO       ; loop waiting until Trigger==0"
+MOD10VCPU_LINE52=";SUB Counter, 1                   ; decrement LO counter"
+MOD10VCPU_LINE53=";IF NZ GOTO TestTriggerLO         ; keep checking Trigger until LO for "Counter" cycles"
+MOD10VCPU_LINE54=
+MOD10VCPU_LINE55=WaitForTriggerHI:
+MOD10VCPU_LINE56=";LOAD Counter, 1                  ; initialize Counter for HI state"
+MOD10VCPU_LINE57=
+MOD10VCPU_LINE58=TestTriggerHI:
+MOD10VCPU_LINE59="INPUT TriggerHw, DIN_PORT         ; read the hardware trigger"
+MOD10VCPU_LINE6="ALIAS r7 DataPort                 ; holds the address for the DATAIN port"
+MOD10VCPU_LINE60="OR TriggerHw, Once                ; OR with Once register: TriggerHw=TriggerHw|Once"
+MOD10VCPU_LINE61="TEST TriggerHw, HW_TRIG           ; Z = NOT(TriggerHw & HW_TRIG)"
+MOD10VCPU_LINE62="IF Z GOTO WaitForTriggerHI        ; loop waiting until Trigger==1"
+MOD10VCPU_LINE63=";SUB Counter, 1                   ; increment HI counter"
+MOD10VCPU_LINE64=";IF NZ GOTO TestTriggerHI         ; keep checking Trigger until HI for "Counter" cycles"
+MOD10VCPU_LINE65=
+MOD10VCPU_LINE66="LOAD Counter, 16                  ; initialize Counter to 16 bit word length"
+MOD10VCPU_LINE67=
+MOD10VCPU_LINE68="; SendSerial"
+MOD10VCPU_LINE69="; jump here when a trigger is received to send the serial data word"
+MOD10VCPU_LINE7="ALIAS r9 SPI                      ; address for CLK/CS/DATA"
+MOD10VCPU_LINE70=";"
+MOD10VCPU_LINE71=SendSerial:
+MOD10VCPU_LINE72="INPUT Data, DATA_WORD             ; copy the requested word from the VCPU_INREG"
+MOD10VCPU_LINE73="OUTPUT SPI, 0x04                  ; enable CSB: DATAIN=HI, CSB=LO, CLK=LO (100)"
+MOD10VCPU_LINE74="NOP ;ton of NOPs to give the MUX time to switch over"
+MOD10VCPU_LINE75=NOP
+MOD10VCPU_LINE76=NOP
+MOD10VCPU_LINE77=NOP
+MOD10VCPU_LINE78=NOP
+MOD10VCPU_LINE79=NOP
+MOD10VCPU_LINE8=
+MOD10VCPU_LINE80=NOP
+MOD10VCPU_LINE81=NOP
+MOD10VCPU_LINE82=NOP
+MOD10VCPU_LINE83=NOP
+MOD10VCPU_LINE84=NOP
+MOD10VCPU_LINE85=NOP
+MOD10VCPU_LINE86=NOP
+MOD10VCPU_LINE87=NOP
+MOD10VCPU_LINE88=NOP
+MOD10VCPU_LINE89=NOP
+MOD10VCPU_LINE9="; Define Constants"
+MOD10VCPU_LINE90=NOP
+MOD10VCPU_LINE91=NOP
+MOD10VCPU_LINE92=NOP
+MOD10VCPU_LINE93=NOP
+MOD10VCPU_LINE94=NOP
+MOD10VCPU_LINE95=NOP
+MOD10VCPU_LINE96=NOP
+MOD10VCPU_LINE97=NOP
+MOD10VCPU_LINE98=NOP
+MOD10VCPU_LINE99=NOP
+MOD10VCPU_LINES=127
+MOD11VCPU_LINE0=
+MOD11VCPU_LINES=1
+BIGBUF=_ARCHON_FRAMEBUFS
+FRAMEMODE=_ARCHON_FRAMEMODE
+LINECOUNT=_TOTAL_ROWS
+PIXELCOUNT=_MAX_XADDR
+RAWENABLE=_RAW_ENABLE
+RAWENDLINE=_RAW_ENDLINE
+RAWSAMPLES=_RAW_SAMPLES
+RAWSEL=_RAW_SELECT
+RAWSTARTLINE=_RAW_STARTLINE
+RAWSTARTPIXEL=_RAW_STARTPIXEL
+SAMPLEMODE=_ARCHON_SAMPLE_MODE
+SHP1=_FIRST_RESET_SAMPLE
+SHP2=_LAST_RESET_SAMPLE
+SHD1=_FIRST_VIDEO_SAMPLE
+SHD2=_LAST_VIDEO_SAMPLE
+TAPLINE0="AM54L,1,0"
+TAPLINE1="AM25R,1,0"
+TAPLINE2="AM29L,1,0"
+TAPLINE3="AM31R,1,0"
+TAPLINE4="AM52L,1,0"
+TAPLINES=5
+TRIGINEDGE=0
+TRIGINENABLE=0
+TRIGININVERT=0
+TRIGOUTFORCE=0
+TRIGOUTINVERT=0
+TRIGOUTLEVEL=0
+TRIGOUTPOWER=1
+MOD10\LVLC_V1=1.2
 MOD10\LVLC_ORDER1=2
 MOD10\LVLC_LABEL1=Bias Gate
-MOD10\LVLC_V2=3.3
+MOD10\LVLC_V2=2.5
 MOD10\LVLC_ORDER2=2
 MOD10\LVLC_LABEL2=Bias Power
 MOD10\LVLC_V3=0.55
@@ -345,13 +314,13 @@ MOD10\LVLC_LABEL5=Diode Reset
 MOD10\LVLC_V6=3.3
 MOD10\LVLC_ORDER6=1
 MOD10\LVLC_LABEL6=Analog Supply
-MOD10\LVLC_V7=2.9
+MOD10\LVLC_V7=2.57
 MOD10\LVLC_ORDER7=1
 MOD10\LVLC_LABEL7=Preamp neg ref
 MOD10\LVLC_V8=3.3
 MOD10\LVLC_ORDER8=2
 MOD10\LVLC_LABEL8=clock enable
-MOD10\LVLC_V9=2.0
+MOD10\LVLC_V9=4.5
 MOD10\LVLC_ORDER9=2
 MOD10\LVLC_LABEL9=Preamp enable
 MOD10\LVLC_V10=0.0
@@ -385,7 +354,7 @@ MOD10\LVLC_ORDER23=1
 MOD10\LVLC_V24=0.0
 MOD10\LVLC_ORDER24=1
 MOD10\LVHC_ENABLE1=1
-MOD10\LVHC_V1=3.3
+MOD10\LVHC_V1=3.2
 MOD10\LVHC_IL1=10
 MOD10\LVHC_ORDER1=3
 MOD10\LVHC_LABEL1=PullUp
@@ -447,3 +416,38 @@ MOD11_ID=0000000000000000
 MOD11_REV=0
 MOD11_VERSION=0.0.0
 MOD11_TYPE=10
+[MODE_DEFAULT]
+ARCH:HORI_AMPS=5
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+FITS:READOUTMODE=UpTheRampRollingReset
+[MODE_FREERUNRX]
+ARCH:HORI_AMPS=5
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+FITS:READOUTMODE=UpTheRampRollingReset
+[MODE_FREERUNRXR]
+ARCH:HORI_AMPS=5
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+FITS:READOUTMODE=UpTheRampRollingReset
+[MODE_GUIDING]
+ARCH:HORI_AMPS=1
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+FITS:READOUTMODE=Guiding
+[MODE_UTR_RR]
+ARCH:HORI_AMPS=5
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+FITS:READOUTMODE=UpTheRampRollingReset
+[MODE_RX]
+ARCH:HORI_AMPS=5
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+FITS:READOUTMODE=RX
+[MODE_RXR]
+ARCH:HORI_AMPS=5
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+FITS:READOUTMODE=UpTheRampRollingReset
diff --git a/src/hispecatc/Makefile b/src/hispecatc/Makefile
new file mode 100644
index 0000000..4b3dc28
--- /dev/null
+++ b/src/hispecatc/Makefile
@@ -0,0 +1,152 @@
+# -----------------------------------------------------------------------------
+# @file     Makefile
+# @brief    Makefile for Software/Config/Archon/Build/
+# @author   David Hale
+# @date     2015-xx-xx
+# @modified 2016-01-14
+# @modified 2016-01-27 added fixrawendline (special case for Peter)
+# @modified 2016-01-28 removed clean. Use @F.h instead of HFILE=archon.h
+# @modified 2016-03-31 change how .mod is parsed
+# @modified 2016-04-04 add INCPARSER and checks for file existence
+# @modified 2016-04-07 add plotting option and check for WAVGEN exit code
+# @modified 2016-04-19 changes to implement INCLUDE_FILE= in *.conf
+# @modified 2016-04-20 read CDS_FILE and MODULE_FILE from .conf
+# @modified 2017-02-08 added modegen
+# @modified 2017-11-09 remove copying of acf files to camera computers
+# @modified 2020-12-21 added insert_hash
+#
+# This Makefile uses the general preprocessor GPP 2.24 for macro processing.
+# It also requires the ini2acf.pl Perl script for creating an Archon acf file.
+#
+# -----------------------------------------------------------------------------
+#
+
+# Copyright (C) <2018> California Institute of Technology
+# Software written by: <Dave Hale and Peter Mao>
+# 
+#     This program is part of the Waveform Definition Language (WDL) developed
+#     for ZTF.  This program is free software: you can redistribute it and/or
+#     modify it under the terms of the GNU General Public License as published
+#     by the Free Software Foundation, either version 3 of the License, or
+#     any later version.
+# 
+#     This program is distributed in the hope that it will be useful,
+#     but WITHOUT ANY WARRANTY; without even the implied warranty of
+#     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#     GNU General Public License for more details.
+# 
+#     Please see the GNU General Public License at:
+#     <http://www.gnu.org/licenses/>.
+# 
+#     Report any bugs or suggested improvements to:
+# 
+#     David Hale <dhale@caltech.edu> or
+#     Stephen Kaye <skaye@caltech.edu>
+
+# -----------------------------------------------------------------------------
+# @file     Makefile
+# @brief    Makefile for Software/wdl/demo
+# @author   David Hale
+# @date     2015-xx-xx
+# @modified 2024-08-02 made generic for demo
+#
+# This Makefile uses the general preprocessor GPP 2.24 for macro processing.
+# It also requires the ini2acf.pl Perl script for creating an Archon acf file.
+#
+# -----------------------------------------------------------------------------
+#
+
+# set to path to gpp
+GPP       = /usr/bin/gpp
+# set to path to wdl code
+WDLPATH   = /home/hsdev/apps/wdlfiles/wdl
+# output for *.acf file
+ACFPATH   = ../acf
+
+PLOT      = False # True   # show waveform plots by default, True | False
+GFLAGS    = +c "/*" "*/" +c "//" "\n" +c "\\\n" ""
+SEQPARSER = $(WDLPATH)/wdl/seqParserDriver.py
+INCPARSER = $(WDLPATH)/wdl/incParserDriver.py
+WDLPARSER = $(WDLPATH)/wdl/wdlParserDriver.py
+MODPARSER = $(WDLPATH)/wdl/modParserDriver.py
+WAVGEN    = $(WDLPATH)/wdl/wavgenDriver.py
+MODEGEN   = $(WDLPATH)/wdl/modegenDriver.py
+I2A       = $(WDLPATH)/wdl/ini2acf.pl
+INCL      = -I$(CURDIR)
+
+# Global variable to store the filename
+FILE_NAME :=
+
+SCAN_CDSFILE = cat $(FILE_NAME).conf | $(GPP) $(GFLAGS) $(INCL) | \
+		awk -F= '{gsub(" |\t","",$$1)} $$1=="CDS_FILE"{print $$2}' | cut -d'"' -f2
+SCAN_MODFILE = cat $(FILE_NAME).conf | $(GPP) $(GFLAGS) $(INCL) | \
+		awk -F= '{gsub(" |\t","",$$1)} $$1=="MODULE_FILE"{print $$2}' | cut -d'"' -f2
+SCAN_MODEFILE = cat $(FILE_NAME).conf | $(GPP) $(GFLAGS) $(INCL) | \
+		awk -F= '{gsub(" |\t","",$$1)} $$1=="MODE_FILE"{print $$2}' | cut -d'"' -f2
+
+F_TMP = $(FILE_NAME)_TMP
+
+DEBUG ?= 0
+
+ifeq ($(DEBUG), 1)
+    debug_message = @echo "Debug: $(1)"
+else
+    debug_message = @true
+endif
+
+# Main rule for building the target
+%:
+	$(eval FILE_NAME := $(@F)) 
+	$(call debug_message, "Current filename: $(FILE_NAME)")
+	@$(MAKE) generate_wdl FILE_NAME=$(@F)
+	@$(MAKE) generate_script_states FILE_NAME=$(@F)
+	@$(MAKE) assemble_acf FILE_NAME=$(@F)
+
+# Rule for generating WDL
+generate_wdl: 
+	$(eval MODFILE := $(shell $(SCAN_MODFILE)))
+	@echo "Looking for MODULE_FILE = $(MODFILE) ..."
+	@test -f $(FILE_NAME).conf || { echo "$(FILE_NAME).conf does not exist"; exit 1; }
+	$(call debug_message, "Found configuration file: $(FILE_NAME).conf")
+
+	@echo "Making $(F_TMP).wdl from $(FILE_NAME).conf ..."
+	@cat $(FILE_NAME).conf | $(SEQPARSER) - | $(GPP) $(GFLAGS) $(INCL) | $(WDLPARSER) - > $(F_TMP).wdl
+	$(call debug_message, "Created WDL file: $(F_TMP).wdl")
+
+	@echo "Making $(F_TMP).script and $(F_TMP).states from $(F_TMP).wdl ..."
+	@test -f $(MODFILE) || { echo "$(MODFILE) does not exist"; exit 1; }
+	$(call debug_message, "Found MODULE_FILE: $(MODFILE)")
+
+	@cat $(MODFILE) | $(GPP) $(GFLAGS) $(INCL) | $(MODPARSER)
+	@test -f .modules && mv .modules $(F_TMP).modules || echo "No .modules file created"
+	@test -f .system && mv .system $(F_TMP).system || echo "No .system file created"
+	$(call debug_message, "Processed MODULE_FILE: $(MODFILE)")
+
+	@$(WAVGEN) $(F_TMP) $(PLOT) || { echo "Waveform generation failed"; exit 1; }
+	$(call debug_message, "Finished waveform generation for $(F_TMP) with plot: $(PLOT)")
+
+# Rule for generating script states
+generate_script_states:
+	@echo "Assembling $(FILE_NAME).acf ..."
+	$(eval CDSFILE := $(shell $(SCAN_CDSFILE)))
+	$(call debug_message, "Looking for CDS_FILE = $(CDSFILE) ...")
+	@test -f $(CDSFILE) || { echo "$(CDSFILE) does not exist"; exit 1; }
+	$(call debug_message, "Preparing to assemble $(FILE_NAME).acf file using:")
+	$(call debug_message, "INCPARSER: $(INCPARSER)")
+	$(call debug_message, "CDSFILE: $(CDSFILE)")
+	$(call debug_message, "GPP Flags: $(GFLAGS)")
+	@echo "Assembling $(FILE_NAME).acf file ..."
+	@cat $(FILE_NAME).conf | $(INCPARSER) - | cat - $(CDSFILE) | $(GPP) $(GFLAGS) $(INCL) | \
+		cat - $(F_TMP).script $(F_TMP).modules $(F_TMP).states $(F_TMP).system | \
+		$(I2A) - > $(FILE_NAME).acf
+
+# Rule for assembling the ACF
+assemble_acf:
+	$(eval MODEFILE := $(shell $(SCAN_MODEFILE)))
+	@$(MODEGEN) $(MODEFILE) $(FILE_NAME).acf
+	@if [ -d ".git" ]; then \
+		echo "Inserting REV keyword ..."; $(WDLPATH)/insert_hash $(FILE_NAME).acf; \
+	else \
+		echo "Not a git archive, skipping REV keyword"; \
+	fi
+	@echo "Done"
diff --git a/src/hispecatc/hispecatc.cds b/src/hispecatc/hispecatc.cds
index 549cb51..7dea387 100644
--- a/src/hispecatc/hispecatc.cds
+++ b/src/hispecatc/hispecatc.cds
@@ -21,40 +21,15 @@ SHP1=_FIRST_RESET_SAMPLE
 SHP2=_LAST_RESET_SAMPLE
 SHD1=_FIRST_VIDEO_SAMPLE
 SHD2=_LAST_VIDEO_SAMPLE
-TAPLINE0="AM26L,1,0"  /* Out0  ->VT16 -> ADCH13 -> ADM26*/  /* H2RG -> Preamp -> SAMTEC -> Archon*/
-TAPLINE1="AM45R,1,0"  /* Out1  ->VB1  -> ADCH20 -> ADM45*/
-TAPLINE2="AM28L,1,0"  /* Out2  ->VB16 -> ADCH12 -> ADM28*/
-TAPLINE3="AM49R,1,0"  /* Out3  ->VB2  -> ADCH18 -> ADM49*/
-TAPLINE4="AM43L,1,0"  /* Out4  ->VT1  -> ADCH21 -> ADM43*/
-TAPLINE5="AM47R,1,0"  /* Out5  ->VT2  -> ADCH19 -> ADM47*/
-TAPLINE6="AM30L,1,0"  /* Out6  ->VT15 -> ADCH11 -> ADM30*/
-TAPLINE7="AM33R,1,0"  /* Out7  ->VT14 -> ADCH1  -> ADM33*/
-TAPLINE8="AM32L,1,0"  /* Out8  ->VB15 -> ADCH10 -> ADM32*/
-TAPLINE9="AM48R,1,0"  /* Out9  ->VT11 -> ADCH27 -> ADM48*/
-TAPLINE10="AM23L,1,0" /* Out10 ->VB13 -> ADCH6  -> ADM23*/
-TAPLINE11="AM40R,1,0" /* Out11 ->VT4  -> ADCH31 -> ADM40*/
-TAPLINE12="AM35L,1,0" /* Out12 ->VB14 -> ADCH0  -> ADM35*/
-TAPLINE13="AM27R,1,0" /* Out13 ->VB5  -> ADCH4  -> ADM27*/
-TAPLINE14="AM44L,1,0" /* Out14 ->VT12 -> ADCH29 -> ADM44*/
-TAPLINE15="AM22R,1,0" /* Out15 ->VT8  -> ADCH15 -> ADM22*/
-TAPLINE16="AM50L,1,0" /* Out16 ->VB11 -> ADCH26 -> ADM50*/
-TAPLINE17="AM31R,1,0" /* Out17 ->VB6  -> ADCH2  -> ADM31*/
-TAPLINE18="AM53L,1,0" /* Out18 ->VB10 -> ADCH16 -> ADM53*/
-TAPLINE19="AM25R,1,0" /* Out19 ->VT5  -> ADCH5  -> ADM25*/
-TAPLINE20="AM41L,1,0" /* Out20 ->VB9  -> ADCH22 -> ADM41*/
-TAPLINE21="AM34R,1,0" /* Out21 ->VT7  -> ADCH9  -> ADM34*/
-TAPLINE22="AM39L,1,0" /* Out22 ->VB9  -> ADCH23 -> ADM39*/
-TAPLINE23="AM21R,1,0" /* Out23 ->VT13 -> ADCH7  -> ADM21*/
-TAPLINE24="AM46L,1,0" /* Out24 ->VB12 -> ADCH28 -> ADM46*/
-TAPLINE25="AM54R,1,0" /* Out25 ->VB3  -> ADCH24 -> ADM54*/
-TAPLINE26="AM36L,1,0" /* Out26 ->VB7  -> ADCH8  -> ADM36*/
-TAPLINE27="AM51R,1,0" /* Out27 ->VT10 -> ADCH17 -> ADM51*/
-TAPLINE28="AM52L,1,0" /* Out28 ->VT3  -> ADCH25 -> ADM52*/
-TAPLINE29="AM29R,1,0" /* Out29 ->VT6  -> ADCH3  -> ADM29*/
-TAPLINE30="AM42L,1,0" /* Out30 ->VB4  -> ADCH30 -> ADM42*/
-TAPLINE31="AM24R,1,0" /* Out31 ->VB8  -> ADCH14 -> ADM24*/
-TAPLINE32="AM37L,1,0" /* Ref Output */
-TAPLINES=33
+TAPLINE0="AM54L,1,0"
+TAPLINE1="AM25R,1,0"
+TAPLINE2="AM29L,1,0"
+TAPLINE3="AM31R,1,0"
+TAPLINE4="AM52L,1,0"
+TAPLINES=5
+TRIGINEDGE=0
+TRIGINENABLE=0
+TRIGININVERT=0
 TRIGOUTFORCE=0
 TRIGOUTINVERT=0
 TRIGOUTLEVEL=0
diff --git a/src/hispecatc/hispecatc.conf b/src/hispecatc/hispecatc.conf
index 51c578d..097db29 100644
--- a/src/hispecatc/hispecatc.conf
+++ b/src/hispecatc/hispecatc.conf
@@ -1,8 +1,8 @@
 /** ---------------------------------------------------------------------------
  * @file     cryoscope.conf 
  * @brief    WDL configuration file for Cryoscope project
- * @author   Timothee Greffe
- * @date     2020-12-21 (created)
+ * @author   Elijah Anakalea-Buckley
+ * @date     2026-04-02 (created)
  * @modified
  *
  * This file needs to identify the following four files:
diff --git a/src/hispecatc/hispecatc.def b/src/hispecatc/hispecatc.def
index 8630a14..672a3e4 100644
--- a/src/hispecatc/hispecatc.def
+++ b/src/hispecatc/hispecatc.def
@@ -11,7 +11,7 @@
 #define _MAX_ROWS  2048   /* Maximum number of rows in H2RG array      */
 #define _MAX_COLS  1024   /* Maximum number of columns in H2RG array   */
 #define _MAX_YADDR 1023   /* Maximum Y Address - zero index            */
-#define _MAX_XADDR 64    /* Maximum X Address - zero index            */
+#define _MAX_XADDR 512    /* Maximum X Address - zero index            */
 
 #define _TOTAL_ROWS #eval _DARK_ROWS + _MAX_ROWS
 
@@ -36,6 +36,6 @@
 #define _RAW_SELECT               0 /* AD channel for raw data capture */
 
 #define _FIRST_RESET_SAMPLE       256
-#define _LAST_RESET_SAMPLE        592
-#define _FIRST_VIDEO_SAMPLE       600
-#define _LAST_VIDEO_SAMPLE        600
+#define _LAST_RESET_SAMPLE        992
+#define _FIRST_VIDEO_SAMPLE       1000
+#define _LAST_VIDEO_SAMPLE        1000
diff --git a/src/hispecatc/hispecatc.mod b/src/hispecatc/hispecatc.mod
index 64a980e..e3a6825 100755
--- a/src/hispecatc/hispecatc.mod
+++ b/src/hispecatc/hispecatc.mod
@@ -7,9 +7,9 @@
 #define V_VDD            3.3  
 #define V_VReset         0.3  
 #define V_VDDA           3.3  
-#define V_VRef           2.9 
+#define V_VRef           2.65
 #define V_CLK_EN         3.3 
-#define V_Preamp_EN      2.0  
+#define V_Preamp_EN      4.5
 #define V_VideoPullUp    3.3  
 #define VSPARE    0.0  /*  */
 
@@ -46,7 +46,7 @@ SLOT 10 lvxbias { /* slot 10 with cryoscope*/
   LVHC  6 [VSPARE,70,1,1] "Light Bulb";   /* Spare                  */
 }
 
-SLOT 11 lvds {/* slot 11 with Cryoscope*/
+SLOT 11 lvds {/* slot 11 with Hispec*/
   DIO 1 [0,0];
   DIO 2 [0,0];
   DIO 3 [0,0];
diff --git a/src/hispecatc/hispecatc.modes b/src/hispecatc/hispecatc.modes
index 8bd27de..f5407e0 100755
--- a/src/hispecatc/hispecatc.modes
+++ b/src/hispecatc/hispecatc.modes
@@ -1,57 +1,89 @@
 [MODE_DEFAULT]
-ARCH:HORI_AMPS=33
-ARCH:VERT_AMPS=1
-ARCH:NUM_DETECT=1
-FITS:READOUTMODE=UpTheRampRollingReset
-ACF:PIXELCOUNT=64
+ACF:FRAMEMODE=1
+ACF:PIXELCOUNT=512
 ACF:LINECOUNT=2048
-ACF:Expose=0
-ACF:mode_UTR_RR=1
-ACF:mode_EnhancedRollingReset=0
-ACF:mode_VideoRX=0
-ACF:mode_VideoRXR=0
-ACF:mode_Guiding=0
-[MODE_UTR_RR]
-ARCH:HORI_AMPS=33
+ACF:RAWENABLE=0
+ACF:TAPLINE0="AM54L,1,0"
+ACF:TAPLINE1="AM25R,1,0"
+ACF:TAPLINE2="AM29L,1,0"
+ACF:TAPLINE3="AM31R,1,0"
+ACF:TAPLINE4="AM52L,1,0"
+ACF:TAPLINES=5
+ARCH:HORI_AMPS=5
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
 FITS:READOUTMODE=UpTheRampRollingReset
-ACF:PIXELCOUNT=64
-ACF:LINECOUNT=2048
-ACF:Expose=0
-ACF:mode_UTR_RR=1
-ACF:mode_EnhancedRollingReset=0
-ACF:mode_VideoRX=0
-ACF:mode_VideoRXR=0
-ACF:mode_Guiding=0
-[MODE_VIDEORX]
-ARCH:HORI_AMPS=33
-FITS:READOUTMODE=VideoRX
-ACF:PIXELCOUNT=64
-ACF:LINECOUNT=2048
-ACF:Expose=0
-ACF:mode_UTR_RR=0
-ACF:mode_EnhancedRollingReset=0
-ACF:mode_VideoRX=1
-ACF:mode_VideoRXR=0
-ACF:mode_Guiding=0
-[MODE_VIDEORXR]
-ARCH:HORI_AMPS=33
-FITS:READOUTMODE=VideoRXR
-ACF:PIXELCOUNT=128
-ACF:LINECOUNT=2048
-ACF:Expose=0
-ACF:mode_UTR_RR=0
-ACF:mode_EnhancedRollingReset=0
-ACF:mode_VideoRX=0
-ACF:mode_VideoRXR=1
-ACF:mode_Guiding=0
 [MODE_GUIDING]
-ARCH:HORI_AMPS=1
+ACF:FRAMEMODE=1
+ACF:TAPLINE0="AM54L,1,0"
+ACF:TAPLINE1="AM52L,1,0"
+ACF:TAPLINE2=""
+ACF:TAPLINE3=""
+ACF:TAPLINE4=""
+ACF:TAPLINES=2
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+ARCH:HORI_AMPS=2
+ACF:PIXELCOUNT=618
+ACF:LINECOUNT=618
 FITS:READOUTMODE=Guiding
-ACF:PIXELCOUNT=64
-ACF:LINECOUNT=2048
-ACF:Expose=0
-ACF:mode_UTR_RR=0
-ACF:mode_EnhancedRollingReset=0
-ACF:mode_VideoRX=0
-ACF:mode_VideoRXR=0
-ACF:mode_Guiding=1
+[MODE_UTR_RR]
+ACF:FRAMEMODE=1
+ACF:PIXELCOUNT=309
+ACF:LINECOUNT=618
+ACF:TAPLINE0="AM25R,1,0"
+ACF:TAPLINE1="AM29L,1,0"
+ACF:TAPLINE2="AM52L,1,0"
+ACF:TAPLINE3=""
+ACF:TAPLINE4=""
+ACF:TAPLINES=3
+ACF:RAWENABLE=0
+ARCH:HORI_AMPS=3
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+FITS:READOUTMODE=UpTheRampRollingReset
+[MODE_UTR_GR]
+ACF:FRAMEMODE=1
+ACF:PIXELCOUNT=309
+ACF:LINECOUNT=618
+ACF:TAPLINE0="AM25R,1,0"
+ACF:TAPLINE1="AM29L,1,0"
+ACF:TAPLINE2="AM52L,1,0"
+ACF:TAPLINE3=""
+ACF:TAPLINE4=""
+ACF:TAPLINES=3
+ACF:RAWENABLE=0
+ARCH:HORI_AMPS=3
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+FITS:READOUTMODE=UpTheRampRollingReset
+[MODE_RX]
+ACF:FRAMEMODE=1
+ACF:PIXELCOUNT=309
+ACF:LINECOUNT=618
+ACF:TAPLINE0="AM25R,1,0"
+ACF:TAPLINE1="AM29L,1,0"
+ACF:TAPLINE2="AM52L,1,0"
+ACF:TAPLINE3=""
+ACF:TAPLINE4=""
+ACF:TAPLINES=3
+ACF:RAWENABLE=0
+ARCH:HORI_AMPS=3
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+FITS:READOUTMODE=RX
+[MODE_RXR]
+ACF:FRAMEMODE=1
+ACF:PIXELCOUNT=618
+ACF:LINECOUNT=618
+ACF:TAPLINE0="AM25R,1,0"
+ACF:TAPLINE1="AM29L,1,0"
+ACF:TAPLINE2="AM52L,1,0"
+ACF:TAPLINE3=""
+ACF:TAPLINE4=""
+ACF:TAPLINES=3
+ACF:RAWENABLE=0
+ARCH:HORI_AMPS=3
+ARCH:NUM_DETECT=1
+ARCH:VERT_AMPS=1
+FITS:READOUTMODE=RXR
\ No newline at end of file
diff --git a/src/hispecatc/hispecatc.seq b/src/hispecatc/hispecatc.seq
index 10d73dc..e0bd17b 100755
--- a/src/hispecatc/hispecatc.seq
+++ b/src/hispecatc/hispecatc.seq
@@ -1,9 +1,9 @@
 /* -*- C -*- */
 /** ---------------------------------------------------------------------------
- * @file     cryoscope.seq
+ * @file     hispecatc.seq
  * @brief    sequence file for HxRG imager
- * @author   Timothee Greffe
- * @date     2021-06-21 Initial creation
+ * @author   Elijah Anakalea-Buckley
+ * @date     2026-04-02 Initial creation
  * @modified 
  *
  */
@@ -12,32 +12,36 @@
  * parameter definitions
  * syntax: param paramname=value
 */
-param Start=0
+param Start=1
 param Expose=0
 param ExposeWindow=0
 param exptime=0
 param longexposure=0 /* s|ms . To have exposure time longer than ~20min */
 param Abort=0
-param mode_UTR_RR=0
+param freerun=0
+param mode_FreerunRX=0
+param mode_FreerunRXR=0
+param mode_UTR_RR=1
 param mode_UTR_GR=0
 param mode_EnhancedRollingReset=0
-param mode_VideoRX=1
-param mode_VideoRXR=0
+param mode_RX=0
+param mode_RXR=0
 param mode_PermanentReset=0
 param mode_Guiding=0
 param mode_InterleavedGuiding=0
 param exp_PulseWhileGlobReset=0
 param H2RG_rows=2048
 param H2RG_rows_skip=0
-param H2RG_columns=64
-param H2RG_win_rows=10
-param H2RG_win_columns=10
+param H2RG_columns=512
+/* param H2RG_win_rows=2048 */
+/* param H2RG_win_columns=512 */
 param H2RGMainReset=0 /*We use this to reset the H2RG internal register to its default values*/
 param EnhancedRR_Delta=100
 param Hold4Programming=0
 param WindowPixelNb=100
 param prv_flag_reset=0 /* We use this to reset only the first frame of an UTR sequence*/
 param prv_ghostframe=0 /* We use this to readout a frame out of the detector without storing pixels to buffer */
+param prv_firstrow=0
 
 /** ---------------------------------------------------------------------------
  * @fn     SetupHxRG
@@ -66,26 +70,61 @@ return;
 SEQUENCE WaitForExpose {
 if Expose        SelectMode();
 if H2RGMainReset ResetRegHxRG();
-prv_ghostframe++;
-if mode_VideoRXR VideoRXR_GrabFrame();
-if mode_VideoRX VideoRX_GrabFrame();
-prv_ghostframe--;
-wResetEN();
   GOTO WaitForExpose();
 }
 
 SEQUENCE SelectMode {
 if mode_UTR_RR     UTR_RR_Sequence();
 if mode_UTR_GR     UTR_GR_Sequence();
-if mode_VideoRX    VideoRX_Sequence();
-if mode_VideoRXR   VideoRXR_Sequence();
+if mode_FreerunRX  FreerunRX_Sequence();
+if mode_FreerunRXR FreerunRXR_Sequence();
+if mode_RX    RX_Sequence();
+if mode_RXR   RXR_Sequence();
 if mode_PermanentReset  PGR_Sequence();
 if mode_EnhancedRollingReset EnhancedRR_Sequence();
 if exp_PulseWhileGlobReset Persistence_PulseGlobalReset();
-if mode_Guiding Guiding_Sequence();
+/* if mode_Guiding Guiding_Sequence(); */
 GOTO WaitForExpose();
 }
 
+/******** Freerun RX and RXR ****************/
+SEQUENCE FreerunRX_Sequence {
+if freerun  FreerunRX_GrabFrame();
+if Abort    AbortSeq();
+GOTO FreerunRX_Sequence();
+}
+
+SEQUENCE FreerunRX_GrabFrame {
+if !prv_ghostframe  wFrame();
+StartFrame();
+StartRow();
+RR_SkipRow(H2RG_rows_skip);
+RX_ReadRow(H2RG_rows);
+PulseVCLK();
+ExposureTimer();
+if !prv_ghostframe  DecrExposeCpt(1000);
+return;
+}
+
+SEQUENCE FreerunRXR_Sequence {
+if freerun  FreerunRXR_GrabFrame();
+if Abort    AbortSeq();
+GOTO FreerunRXR_Sequence();
+}
+
+SEQUENCE FreerunRXR_GrabFrame {
+if !prv_ghostframe  wFrame();
+StartFrame();
+StartRow();
+prv_firstrow++;
+if H2RG_rows_skip   RR_SkipRow(H2RG_rows_skip);
+RXR_ReadRow(H2RG_rows);
+PulseVCLK();
+ExposureTimer();
+if !prv_ghostframe  DecrExposeCpt(1000);
+return;
+}
+
 /******** Up The Ramp ROLLING RESET *********/
 SEQUENCE UTR_RR_Sequence {
 prv_flag_reset++;
@@ -162,23 +201,23 @@ wbReadEN();
 return;
 }
 
-/**** VIDEO RX -- Read then Reeset per row ***/
+/****  RX -- Read then Reeset per row ***/
 
-SEQUENCE VideoRX_Sequence {
-if Expose VideoRX_GrabFrame();
+SEQUENCE RX_Sequence {
+if Expose RX_GrabFrame();
 if Abort  AbortSeq();
-if !Expose GOTO WaitForExpose();
-GOTO VideoRX_Sequence();
+if freerun GOTO RX_Sequence();
+GOTO WaitForExpose();
 }
 
-SEQUENCE VideoRX_GrabFrame {
+SEQUENCE RX_GrabFrame {
 if !prv_ghostframe wFrame(); /* We save the pixels only not during idling */
 StartFrame();
 RR_SkipRow(H2RG_rows_skip);
 RX_ReadRow(H2RG_rows);
 PulseVCLK();
 ExposureTimer();
-/* if !prv_ghostframe DecrExposeCpt();*/
+if !prv_ghostframe DecrExposeCpt();
 return;
 }
 
@@ -195,18 +234,19 @@ return;
 }
 
 
-/**** VIDEO RXR -- Read, Reset then Read again per row ***/
+/****  RXR -- Read, Reset then Read again per row ***/
 
-SEQUENCE VideoRXR_Sequence {
-if Expose VideoRXR_GrabFrame();
+SEQUENCE RXR_Sequence {
+if Expose RXR_GrabFrame();
 if Abort GOTO AbortSeq();
-if !Expose GOTO WaitForExpose();
-GOTO VideoRXR_Sequence();
+GOTO WaitForExpose();
 }
 
-SEQUENCE VideoRXR_GrabFrame {
+SEQUENCE RXR_GrabFrame {
 if !prv_ghostframe wFrame();
 StartFrame();
+StartRow();
+prv_firstrow++;
 RR_SkipRow(H2RG_rows_skip);
 RXR_ReadRow(H2RG_rows);
 PulseVCLK();
@@ -218,12 +258,13 @@ return;
 SEQUENCE RXR_ReadRow {
 wLine();
 StartRow();
+prv_firstrow--;
 wReadEN();
 ReadPixel_Blank(2); /*Needs two extra pixels because of the internl delay.*/
 ReadPixel(H2RG_columns);
 ResetPulse(); /* Reset Pulse after reading out the row */
 LSyncBPulse();
-ReadPixel_Blank(2);
+ReadPixel_Blank(1);
 ReadPixel(H2RG_columns);
 wbHclk();
 wbReadEN();
@@ -282,8 +323,8 @@ return;
 /******** Guiding Only Mode *********/
 
 SEQUENCE Guiding_Sequence {
-if Expose GrabWindow();
-if Abort  AbortSeq();
+if Expose  GrabWindow();
+if Abort    AbortSeq();
 GOTO Guiding_Sequence();
 }
 
@@ -291,7 +332,7 @@ SEQUENCE GrabWindow {
 Expose--;
 wFrame();
 StartFrame();
-WinRX_ReadRow(H2RG_win_rows);
+WinRX_ReadRow(H2RG_rows);
 PulseVCLK();
 ExposureTimer();
 return;
@@ -302,7 +343,7 @@ wLine();
 StartRow();
 wReadEN();
 ReadPixel_Blank(2); /*Needs two extra pixels because of the internl delay.*/
-ReadPixel(H2RG_win_columns);
+ReadPixel(H2RG_columns);
 ResetPulse(); /* Reset Pulse after reading out the row */
 wbHclk();
 wbReadEN();
@@ -315,18 +356,13 @@ return;
 
 SEQUENCE ExposureTimer {
 if longexposure    Sec(exptime);  /*If longexposure, counts in s*/
-if !longexposure   HectoMicroSec(exptime); /*If shortexposure, counts in 100us*/
+if !longexposure   MilliSec(exptime); /*If shortexposure, counts in ms*/
 if Abort GOTO AbortSeq();
 return;
 }
 
 SEQUENCE MilliSec {
   wDelay1ms();
-  return;
-}
-
-SEQUENCE HectoMicroSec {
-wDelay1us(100);
 return;
 }
 
@@ -337,10 +373,11 @@ if Abort GOTO AbortSeq();
 }
 
 SEQUENCE AbortSeq{
+freerun--;
 DecrExposeCpt(1000);
 InitResetCpt(100);
-mode_VideoRX--;
-mode_VideoRXR--;
+mode_RX--;
+mode_RXR--;
 mode_Guiding--;
 Abort--;
 GOTO WaitForExpose();
diff --git a/src/hispecatc/hispecatc.waveform b/src/hispecatc/hispecatc.waveform
index fb8edd1..5488b79 100644
--- a/src/hispecatc/hispecatc.waveform
+++ b/src/hispecatc/hispecatc.waveform
@@ -46,7 +46,7 @@
 #define 10ms            #eval 10 ms
 #define 10us            #eval 10 us
 /* Timing specific to HxRG waveform */
-#define Tpix    #eval 6 us /*2.85 us */
+#define Tpix    #eval 10 us /*2.85 us */
 #define Tpulse  #eval 0.8 us /**/
 #define T1Reset #eval 10 us /* chapter 6.2 says 10us or less is ok but it should be /2048 this value*/ 
 /* Logical state defines */
diff --git a/src/hispecatc/mod10vcpu b/src/hispecatc/mod10vcpu
new file mode 100644
index 0000000..cc312dd
--- /dev/null
+++ b/src/hispecatc/mod10vcpu
@@ -0,0 +1,269 @@
+MOD10\\DIO_DIR12=1
+MOD10\\DIO_DIR34=1
+MOD10\\DIO_DIR56=0
+MOD10\\DIO_DIR78=0
+MOD10\\DIO_LABEL1=
+MOD10\\DIO_LABEL2=
+MOD10\\DIO_LABEL3=
+MOD10\\DIO_LABEL4=
+MOD10\\DIO_LABEL5=
+MOD10\\DIO_LABEL6=
+MOD10\\DIO_LABEL7=
+MOD10\\DIO_LABEL8=
+MOD10\\DIO_POWER=1
+MOD10\\DIO_SOURCE1=3
+MOD10\\DIO_SOURCE2=3
+MOD10\\DIO_SOURCE3=3
+MOD10\\DIO_SOURCE4=0
+MOD10\\DIO_SOURCE5=0
+MOD10\\DIO_SOURCE6=0
+MOD10\\DIO_SOURCE7=0
+MOD10\\DIO_SOURCE8=0
+MOD10\\LVHC_ENABLE1=1
+MOD10\\LVHC_ENABLE2=0
+MOD10\\LVHC_ENABLE3=0
+MOD10\\LVHC_ENABLE4=0
+MOD10\\LVHC_ENABLE5=1
+MOD10\\LVHC_ENABLE6=1
+MOD10\\LVHC_IL1=10
+MOD10\\LVHC_IL2=50
+MOD10\\LVHC_IL3=10
+MOD10\\LVHC_IL4=100
+MOD10\\LVHC_IL5=10
+MOD10\\LVHC_IL6=70
+MOD10\\LVHC_LABEL1=PullUp
+MOD10\\LVHC_LABEL2=Misc 1
+MOD10\\LVHC_LABEL3=Misc 2
+MOD10\\LVHC_LABEL4=Misc 3
+MOD10\\LVHC_LABEL5=LED IR
+MOD10\\LVHC_LABEL6=Light Bulb
+MOD10\\LVHC_ORDER1=3
+MOD10\\LVHC_ORDER2=1
+MOD10\\LVHC_ORDER3=1
+MOD10\\LVHC_ORDER4=1
+MOD10\\LVHC_ORDER5=1
+MOD10\\LVHC_ORDER6=1
+MOD10\\LVHC_V1=3.2
+MOD10\\LVHC_V2=0.0
+MOD10\\LVHC_V3=0.0
+MOD10\\LVHC_V4=0.0
+MOD10\\LVHC_V5=0.0
+MOD10\\LVHC_V6=0.0
+MOD10\\LVLC_LABEL1=Bias Gate
+MOD10\\LVLC_LABEL10=
+MOD10\\LVLC_LABEL11=
+MOD10\\LVLC_LABEL12=
+MOD10\\LVLC_LABEL13=
+MOD10\\LVLC_LABEL14=
+MOD10\\LVLC_LABEL15=
+MOD10\\LVLC_LABEL16=
+MOD10\\LVLC_LABEL17=
+MOD10\\LVLC_LABEL18=
+MOD10\\LVLC_LABEL19=
+MOD10\\LVLC_LABEL2=Bias Power
+MOD10\\LVLC_LABEL20=
+MOD10\\LVLC_LABEL21=
+MOD10\\LVLC_LABEL22=
+MOD10\\LVLC_LABEL23=
+MOD10\\LVLC_LABEL24=
+MOD10\\LVLC_LABEL3=Diode Sub
+MOD10\\LVLC_LABEL4=Digital Supply
+MOD10\\LVLC_LABEL5=Diode Reset
+MOD10\\LVLC_LABEL6=Analog Supply
+MOD10\\LVLC_LABEL7=Preamp neg ref
+MOD10\\LVLC_LABEL8=clock enable
+MOD10\\LVLC_LABEL9=Preamp enable
+MOD10\\LVLC_ORDER1=2
+MOD10\\LVLC_ORDER10=1
+MOD10\\LVLC_ORDER11=1
+MOD10\\LVLC_ORDER12=1
+MOD10\\LVLC_ORDER13=1
+MOD10\\LVLC_ORDER14=1
+MOD10\\LVLC_ORDER15=1
+MOD10\\LVLC_ORDER16=1
+MOD10\\LVLC_ORDER17=1
+MOD10\\LVLC_ORDER18=1
+MOD10\\LVLC_ORDER19=1
+MOD10\\LVLC_ORDER2=2
+MOD10\\LVLC_ORDER20=1
+MOD10\\LVLC_ORDER21=1
+MOD10\\LVLC_ORDER22=1
+MOD10\\LVLC_ORDER23=1
+MOD10\\LVLC_ORDER24=1
+MOD10\\LVLC_ORDER3=2
+MOD10\\LVLC_ORDER4=1
+MOD10\\LVLC_ORDER5=2
+MOD10\\LVLC_ORDER6=1
+MOD10\\LVLC_ORDER7=1
+MOD10\\LVLC_ORDER8=2
+MOD10\\LVLC_ORDER9=2
+MOD10\\LVLC_V1=1.2
+MOD10\\LVLC_V10=0.0
+MOD10\\LVLC_V11=0.0
+MOD10\\LVLC_V12=0.0
+MOD10\\LVLC_V13=0.0
+MOD10\\LVLC_V14=0.0
+MOD10\\LVLC_V15=0.0
+MOD10\\LVLC_V16=0.0
+MOD10\\LVLC_V17=0.0
+MOD10\\LVLC_V18=0.0
+MOD10\\LVLC_V19=0.0
+MOD10\\LVLC_V2=2.5
+MOD10\\LVLC_V20=0.0
+MOD10\\LVLC_V21=0.0
+MOD10\\LVLC_V22=0.0
+MOD10\\LVLC_V23=0.0
+MOD10\\LVLC_V24=0.0
+MOD10\\LVLC_V3=0.55
+MOD10\\LVLC_V4=3.3
+MOD10\\LVLC_V5=0.3
+MOD10\\LVLC_V6=3.3
+MOD10\\LVLC_V7=2.57
+MOD10\\LVLC_V8=3.3
+MOD10\\LVLC_V9=4.5
+MOD10\\VCPU_INREG0=0
+MOD10\\VCPU_INREG1=0
+MOD10\\VCPU_INREG10=0
+MOD10\\VCPU_INREG11=0
+MOD10\\VCPU_INREG12=0
+MOD10\\VCPU_INREG13=0
+MOD10\\VCPU_INREG14=0
+MOD10\\VCPU_INREG15=0
+MOD10\\VCPU_INREG2=0
+MOD10\\VCPU_INREG3=0
+MOD10\\VCPU_INREG4=0
+MOD10\\VCPU_INREG5=0
+MOD10\\VCPU_INREG6=0
+MOD10\\VCPU_INREG7=0
+MOD10\\VCPU_INREG8=0
+MOD10\\VCPU_INREG9=0
+MOD10\\VCPU_LINE0="ALIAS r0 TriggerHw                ; reads hardware trigger"
+MOD10\\VCPU_LINE1="ALIAS r1 TriggerSw                ; reads software trigger"
+MOD10\\VCPU_LINE10=";"
+MOD10\\VCPU_LINE100=NOP
+MOD10\\VCPU_LINE101=NOP
+MOD10\\VCPU_LINE102=NOP
+MOD10\\VCPU_LINE103=NOP
+MOD10\\VCPU_LINE104=NOP
+MOD10\\VCPU_LINE105=NOP
+MOD10\\VCPU_LINE106=NOP
+MOD10\\VCPU_LINE107=NOP
+MOD10\\VCPU_LINE108=NOP
+MOD10\\VCPU_LINE109=NOP
+MOD10\\VCPU_LINE11="DIN_PORT=0x0000                   ; digital input port register"
+MOD10\\VCPU_LINE110=NOP
+MOD10\\VCPU_LINE111=NOP
+MOD10\\VCPU_LINE112=NOP
+MOD10\\VCPU_LINE113=NOP
+MOD10\\VCPU_LINE114=NOP
+MOD10\\VCPU_LINE115=NOP
+MOD10\\VCPU_LINE116=NOP
+MOD10\\VCPU_LINE117=
+MOD10\\VCPU_LINE118="SendSerialLoop:                   ; loop over this for each bit in the data word"
+MOD10\\VCPU_LINE119="OUTPUT SPI, 0x04                  ; each bit starts with DATA=HI and CLK=LO"
+MOD10\\VCPU_LINE12="SOFT_TRIG=0x0010                  ; software trigger VCPU_INREG0"
+MOD10\\VCPU_LINE120="SLA Data                          ; shift the MSB of Data into Carry"
+MOD10\\VCPU_LINE121="IF NC OUTPUT DataPort, DATAIN_LO  ; if C is clear then bring DATAIN LO"
+MOD10\\VCPU_LINE122="OUTPUT ClockPort, DATACLK_HI      ; then bring the clock HI"
+MOD10\\VCPU_LINE123="SUB Counter, 1                    ; decrement bit counter"
+MOD10\\VCPU_LINE124="IF NZ GOTO SendSerialLoop         ; keep looping over all bits in the data word"
+MOD10\\VCPU_LINE125="LOAD Once, 0                      ; clear the Once register to stop software triggers"
+MOD10\\VCPU_LINE126=GOTO Init
+MOD10\\VCPU_LINE13="DATA_WORD=0x0011                  ; VCPU_INREG1 carries the word to write serially"
+MOD10\\VCPU_LINE14=
+MOD10\\VCPU_LINE15="; bitmasks"
+MOD10\\VCPU_LINE16=";"
+MOD10\\VCPU_LINE17="DATACLK_HI=1"
+MOD10\\VCPU_LINE18="DATACLK_LO=0"
+MOD10\\VCPU_LINE19="CSB_HI=2"
+MOD10\\VCPU_LINE2="ALIAS r2 Once                     ; allows one-shot software trigger"
+MOD10\\VCPU_LINE20="CSB_LO=0"
+MOD10\\VCPU_LINE21="DATAIN_HI=4"
+MOD10\\VCPU_LINE22="DATAIN_LO=0"
+MOD10\\VCPU_LINE23="HW_TRIG=0x10                      ; hardware trigger bit = DIO5"
+MOD10\\VCPU_LINE24=
+MOD10\\VCPU_LINE25="; Initialize Output Ports"
+MOD10\\VCPU_LINE26=";"
+MOD10\\VCPU_LINE27="LOAD ClockPort, 0x0101            ; ClockPort = DIO1"
+MOD10\\VCPU_LINE28="LOAD DataPort, 0x0104             ; DataPort = DIO3"
+MOD10\\VCPU_LINE29="LOAD SPI, 0x0107                  ; CLK=DIO1, CSB=DIO2, DATA=DIO3"
+MOD10\\VCPU_LINE3="ALIAS r3 Counter                  ; general purpose counter"
+MOD10\\VCPU_LINE30=
+MOD10\\VCPU_LINE31="LOAD Once, 0                      ; clear the Once flag"
+MOD10\\VCPU_LINE32="INPUT TriggerSw, SOFT_TRIG        ; read the software trigger once at program start only"
+MOD10\\VCPU_LINE33="TEST TriggerSw, 1"
+MOD10\\VCPU_LINE34="IF Z GOTO Init                    ; if clear then leave the Once flag clear"
+MOD10\\VCPU_LINE35="LOAD Once, HW_TRIG                ; otherwise set the Once flag same as a hardware trigger"
+MOD10\\VCPU_LINE36=
+MOD10\\VCPU_LINE37="; Initialize all ports and registers"
+MOD10\\VCPU_LINE38=";"
+MOD10\\VCPU_LINE39=Init:
+MOD10\\VCPU_LINE4="ALIAS r4 Data                     ; this register caries the data"
+MOD10\\VCPU_LINE40="OUTPUT SPI, 0x06                  ; DATAIN=HI, CSB=HI, CLK=LO (110)"
+MOD10\\VCPU_LINE41=
+MOD10\\VCPU_LINE42="; WaitForTrigger"
+MOD10\\VCPU_LINE43="; Loop here until either a hardware or software trigger is received"
+MOD10\\VCPU_LINE44=";"
+MOD10\\VCPU_LINE45=WaitForTriggerLO:
+MOD10\\VCPU_LINE46=";LOAD Counter, 1                  ; initialize Counter for LO state"
+MOD10\\VCPU_LINE47=
+MOD10\\VCPU_LINE48=TestTriggerLO:
+MOD10\\VCPU_LINE49="INPUT TriggerHw, DIN_PORT         ; read the hardware trigger"
+MOD10\\VCPU_LINE5="ALIAS r5 ClockPort                ; holds the address for the DATACLK port"
+MOD10\\VCPU_LINE50="TEST TriggerHw, HW_TRIG           ; Z = NOT(TriggerHw & HW_TRIG)"
+MOD10\\VCPU_LINE51="IF NZ GOTO WaitForTriggerLO       ; loop waiting until Trigger==0"
+MOD10\\VCPU_LINE52=";SUB Counter, 1                   ; decrement LO counter"
+MOD10\\VCPU_LINE53=";IF NZ GOTO TestTriggerLO         ; keep checking Trigger until LO for \\"Counter\\" cycles"
+MOD10\\VCPU_LINE54=
+MOD10\\VCPU_LINE55=WaitForTriggerHI:
+MOD10\\VCPU_LINE56=";LOAD Counter, 1                  ; initialize Counter for HI state"
+MOD10\\VCPU_LINE57=
+MOD10\\VCPU_LINE58=TestTriggerHI:
+MOD10\\VCPU_LINE59="INPUT TriggerHw, DIN_PORT         ; read the hardware trigger"
+MOD10\\VCPU_LINE6="ALIAS r7 DataPort                 ; holds the address for the DATAIN port"
+MOD10\\VCPU_LINE60="OR TriggerHw, Once                ; OR with Once register: TriggerHw=TriggerHw|Once"
+MOD10\\VCPU_LINE61="TEST TriggerHw, HW_TRIG           ; Z = NOT(TriggerHw & HW_TRIG)"
+MOD10\\VCPU_LINE62="IF Z GOTO WaitForTriggerHI        ; loop waiting until Trigger==1"
+MOD10\\VCPU_LINE63=";SUB Counter, 1                   ; increment HI counter"
+MOD10\\VCPU_LINE64=";IF NZ GOTO TestTriggerHI         ; keep checking Trigger until HI for \\"Counter\\" cycles"
+MOD10\\VCPU_LINE65=
+MOD10\\VCPU_LINE66="LOAD Counter, 16                  ; initialize Counter to 16 bit word length"
+MOD10\\VCPU_LINE67=
+MOD10\\VCPU_LINE68="; SendSerial"
+MOD10\\VCPU_LINE69="; jump here when a trigger is received to send the serial data word"
+MOD10\\VCPU_LINE7="ALIAS r9 SPI                      ; address for CLK/CS/DATA"
+MOD10\\VCPU_LINE70=";"
+MOD10\\VCPU_LINE71=SendSerial:
+MOD10\\VCPU_LINE72="INPUT Data, DATA_WORD             ; copy the requested word from the VCPU_INREG"
+MOD10\\VCPU_LINE73="OUTPUT SPI, 0x04                  ; enable CSB: DATAIN=HI, CSB=LO, CLK=LO (100)"
+MOD10\\VCPU_LINE74="NOP ;ton of NOPs to give the MUX time to switch over"
+MOD10\\VCPU_LINE75=NOP
+MOD10\\VCPU_LINE76=NOP
+MOD10\\VCPU_LINE77=NOP
+MOD10\\VCPU_LINE78=NOP
+MOD10\\VCPU_LINE79=NOP
+MOD10\\VCPU_LINE8=
+MOD10\\VCPU_LINE80=NOP
+MOD10\\VCPU_LINE81=NOP
+MOD10\\VCPU_LINE82=NOP
+MOD10\\VCPU_LINE83=NOP
+MOD10\\VCPU_LINE84=NOP
+MOD10\\VCPU_LINE85=NOP
+MOD10\\VCPU_LINE86=NOP
+MOD10\\VCPU_LINE87=NOP
+MOD10\\VCPU_LINE88=NOP
+MOD10\\VCPU_LINE89=NOP
+MOD10\\VCPU_LINE9="; Define Constants"
+MOD10\\VCPU_LINE90=NOP
+MOD10\\VCPU_LINE91=NOP
+MOD10\\VCPU_LINE92=NOP
+MOD10\\VCPU_LINE93=NOP
+MOD10\\VCPU_LINE94=NOP
+MOD10\\VCPU_LINE95=NOP
+MOD10\\VCPU_LINE96=NOP
+MOD10\\VCPU_LINE97=NOP
+MOD10\\VCPU_LINE98=NOP
+MOD10\\VCPU_LINE99=NOP
+MOD10\\VCPU_LINES=127
+MOD11\\VCPU_LINE0=
+MOD11\\VCPU_LINES=1
\ No newline at end of file
diff --git a/src/hispecatc/readme.md b/src/hispecatc/readme.md
new file mode 100644
index 0000000..48653ae
--- /dev/null
+++ b/src/hispecatc/readme.md
@@ -0,0 +1,60 @@
+# WDL File Notes
+
+## Setting the readout speed
+
+### Step 1 — Edit the pixel time in `.waveform`
+
+On line 49, adjust `Tpix`:
+
+```c
+#define Tpix    #eval 6 us /*2.85 us */
+```
+
+`Tpix` can be set between **6 and 10 microseconds**. For example, `10 us` corresponds to a 100 kHz clocking speed (1 / 10 µs).
+
+### Step 2 — Adjust sample windows in `.def`
+
+Edit lines 38–41 to match your chosen `Tpix`. Example for `Tpix = 6 us`:
+
+```c
+#define _FIRST_RESET_SAMPLE       256
+#define _LAST_RESET_SAMPLE        592
+#define _FIRST_VIDEO_SAMPLE       600
+#define _LAST_VIDEO_SAMPLE        600
+```
+
+Each Archon clock step is **10 ns**, so sample indices map directly to nanosecond offsets. In the example above, reset samples span 2560 ns → 5920 ns (a 3.36 µs window). Set `_LAST_RESET_SAMPLE` to 80 ns (8 samples) below `Tpix`.
+
+Reference table for common `Tpix` values:
+
+| Tpix  | `_LAST_RESET_SAMPLE` | `_FIRST_VIDEO_SAMPLE` | `_LAST_VIDEO_SAMPLE` |
+|-------|----------------------|-----------------------|----------------------|
+| 6 µs  | 592                  | 600                   | 600                  |
+| 7 µs  | 692                  | 700                   | 700                  |
+| 8 µs  | 792                  | 800                   | 800                  |
+| 9 µs  | 892                  | 900                   | 900                  |
+| 10 µs | 992                  | 1000                  | 1000                 |
+
+> **Note:** The first and last video samples define the CDS sample window. Because this is a CMOS detector (not true CDS), both values are set equal — matching `Tpix` — so the difference is always 0. Do not change this.
+
+---
+
+## Switching between freerun and Expose modes
+
+Edit line 325 of the `.seq` file:
+```c
+SEQUENCE Guiding_Sequence {
+if Expose  GrabWindow();
+if Abort    AbortSeq();
+GOTO Guiding_Sequence();
+}
+```
+
+Toggle between `Expose` and `freerun` by writing `if freerun` or `if Expose` on the first `if` line.
+
+> **Warning:** Capitalization matters — `Expose` and `expose` are not interchangeable in case.
+
+
+## Tuning Bias Values
+
+Voltage tuning should happen in the archon gui. When done, final parameters can be transferred to the hispecatc.mod file. Only the preamp neg ref needed to be tuned for HISPEC to set the reset to a value less than 65k DN.