From bfff623a55c5254c5b4649e29f366730300965da Mon Sep 17 00:00:00 2001 From: j-bichel <167796398+j-bichel@users.noreply.github.com> Date: Tue, 10 Dec 2024 11:42:16 -0800 Subject: [PATCH 001/194] Adding deimos folder to src --- src/deimos/.gitignore | 1 + 1 file changed, 1 insertion(+) create mode 100644 src/deimos/.gitignore diff --git a/src/deimos/.gitignore b/src/deimos/.gitignore new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/src/deimos/.gitignore @@ -0,0 +1 @@ + From 23e7101823f00d564a5f95e629bf6f272e708de3 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Tue, 10 Dec 2024 13:30:10 -0800 Subject: [PATCH 002/194] first draft of deimos wdl; only includes waveform description; requires configuration --- src/deimos/deimos.def | 102 ++++++++++++++++++++ src/deimos/deimos.seq | 103 ++++++++++++++++++++ src/deimos/deimos.signals | 99 +++++++++++++++++++ src/deimos/deimos.waveform | 190 +++++++++++++++++++++++++++++++++++++ 4 files changed, 494 insertions(+) create mode 100644 src/deimos/deimos.def create mode 100644 src/deimos/deimos.seq create mode 100644 src/deimos/deimos.signals create mode 100644 src/deimos/deimos.waveform diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def new file mode 100644 index 0000000..6ccfb3a --- /dev/null +++ b/src/deimos/deimos.def @@ -0,0 +1,102 @@ +/* -*- C -*- */ +/** --------------------------------------------------------------------------- + * @file deimos.def + * @brief DEIMOS definition file; user macros to be used within Archon files + * i.e. within the .script, .states, .cds, or .modules files + * + * Use #define to define macros; syntax is case sensitive. + * By convention macros will be capitalized and will start with an underscore + * ex. _SW_SLEW_SLOW for setting slow slew rate of the summing well + */ + + /** -------------------------------------------------------------------------- + * Configuration modes + */ + +#define _SCI_SER_CLOCK_DIR SPLIT /* SPLIT | | E_LEFT | F_RIGHT */ + + + /** --------------------------------------------------------------------------- + * Detector Array Parameters + */ + +#define _SECTIONROWS 2052 /* Number of rows in one section +#defien _SECTIONCOLS 2048 /* Number of columns in one section +/* #define _CDS_WIDTH 10 /* width of each CDS integration component in clocks */ +#define _SKIP_LINES 0 +#define _SERIALPRESCAN 50 +#define _SERIALOVERSCAN 100 +#define _PARALLELOVERSCAN 50 +#defeval _IMAGEROWS #eval _SECTIONROWS*2 +#defeval _IMAGECOLS #eval _SECTIONCOLS +#defeval _IDLE_LINES #eval _SKIP_LINES + _IMAGEROWS + +#defeval _LINENUM #eval _IMAGEROWS + _PARALLELOVERSCAN - _SKIP_LINES +/* Number of Pixels depends on if both output +#if _SCI_SER_CLOCK_DIR == SPLIT + #defeval _PIXELNUM #eval _IMAGECOLS/2 + _SERIALPRESCAN + _SERIALOVERSCAN +#elif _SCI_SER_CLOCK_DIR == F_RIGHT || _SCI_SER_CLOCK_DIR == E_LEFT + #defeval _PIXELNUM #eval _IMAGECOLS + _SERIALPRESCAN + _SERIALOVERSCAN +#endif + + + + /** --------------------------------------------------------------------------- + * CDS-Deinterlace options + */ + +#define Pixel_T 100 /* Full pixel time : 10s of ns */ +#define RG_settleT 17 /*32*/ /* Settling Time for the reset gate 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ +#define SW_settleT 16 /*32*/ /* Settling Time for charge dump 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ + +#define _FIRST_RESET_SAMPLE #eval RG_settleT /* Start Reset sample after reset settling time */ +#define _LAST_RESET_SAMPLE #eval Pixel_T/2 - 1 /* Half of the pixel time to reset pedestal */ +#define _FIRST_VIDEO_SAMPLE #eval Pixel_T/2 - 1 + SW_settleT /* Start video sample after reset pedestal and summing well settle */ +#define _LAST_VIDEO_SAMPLE #eval Pixel_T - 2 /* Stop video sample at end of pixel time */ + +/** --------------------------------------------------------------------------- + * Define clock voltage levels here (units are volts) + * All voltages are set relative to front substrate voltage (typ. 0V) + * evaluations relative to FSS should be implemented if variability is required +/*/ + +#define _PAR_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _PAR_CLOCK_LOW 0 /* [-0.50, 0.50] */ + +#define _TG_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _TG_CLOCK_LOW 0 /* [-0.50, 0.50] */ + +#define _SER_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ + +#define _OUTPUT_GATE 3 /* [ 0.50, 4.00] */ + +#define _SW_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _SW_CLOCK_LOW 1 /* [-0.50, 1.50] */ + +#define _RG_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _RG_CLOCK_LOW 0 /* [-0.50, 0.50] */ + +#define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ +#define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ + +/** --------------------------------------------------------------------------- + * Define clock slew rates here + * units are Volts per microsecond, range from 0.001 to 1000 + * For fast readout speeds the slew rate is dependant on the pulse width + * Will be defined in waveform file + */ +/* + #define _PAR_CLOCK_SLEW_FAST 10 + #define _PAR_CLOCK_SLEW_SLOW 1 + #define _SER_CLOCK_SLEW_FAST 500 + #define _SER_CLOCK_SLEW_SLOW 1 + #define _TG_CLOCK_SLEW_FAST 500 + #define _TG_CLOCK_SLEW_SLOW 100 + #define _SW_CLOCK_SLEW_FAST 500 + #define _SW_CLOCK_SLEW_SLOW 100 + */ + + + + diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq new file mode 100644 index 0000000..1bd9960 --- /dev/null +++ b/src/deimos/deimos.seq @@ -0,0 +1,103 @@ +/* -*- C -*- */ +/** --------------------------------------------------------------------------- + * @file deimos.seq + * @brief sequence file for DEIMOS science detectors + * @author Joseph Bichel + * @date 2024-12-02 + * @modified + * + */ + +/** --------------------------------------------------------------------------- + +/** --------------------------------------------------------------------------- + * parameter definitions + * syntax: param paramname=value +*/ + +/** System Control Triggers **/ +param abort=0 +param start=0 + +/** Science Readout Control Triggers **/ +param trigger_ScienceExpose = 0 +param trigger_ScienceRead = 0 + +/** Science Readout Control Parameters **/ + +param param_ScienceLines = _LINENUM +param param_SciencePixels = _PIXELSNUM +param param_ExposeTime = 0 + + +SEQUENCE StartSeq { + BiasLow(); + if start GOTO InitSeq(); + GOTO StartSeq(); +} + +SEQUENCE InitSeq { + BiasInit(); + ACReset(); + /* Initialize Serial and Parallel Lines - What is serial recieving???? */ + /* Do something to parallel lines to prepare for exposure - GUARDS UP*/ + GOTO DetectorSel(); +} + +SEQUENCE DetectorSel { + if trigger_ScienceExpose SelectScienceReadoutMode(); + GOTO DetectorSel(); +} + +SEQUENCE SelectScienceReadoutMode { + if trigger_ScienceRead ScienceReadout(); + GOTO SelectScienceReadoutMode(); +} + +SEQUENCE ScienceReadout { + wCloseShutter(); + /* Prep Image Area */ + wOpenShutter(); + wFrame(); + /* Flush lines? */ + ScienceLineRead(param_ScienceLines); + /* Dump Extra lines? */ + /* Put serial clocks in ready for charge state after readout, via serial recieving?? */ + wCloseShutter(); +} + +SEQUENCE ScienceLineRead{ + SynchedLineTransfer(); + wLine(); + /* Initialize Serial Clocks */ + /* Flush desired number of post pixels */ + + wPixel(param_SciencePixels); + /* Flush desired number of pre serial pixels */ + + /* Serial Recieving?? */ + + wReset(); + Wait1us(); + OS_Clamp(); + AD_Clamp(); + Wait1us(); + OS_Clamp_(); + AD_Clamp_(); + return; + RETURN(); +} + +SEQUENCE BiasInit { + /* Initialize all biases as required in datasheet */ + /* Bias Settling time wait??? */ +} + +SEQUENCE BiasLow { + /* Initialize all biases to low */ +} + +SEQUENCE ACReset { + /* Clamp and unclamp AC clamp */ +} + diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals new file mode 100644 index 0000000..ce58f10 --- /dev/null +++ b/src/deimos/deimos.signals @@ -0,0 +1,99 @@ +/* -*- C -*- */ +/** --------------------------------------------------------------------------- + * @file deimos.signals + * @brief DEIMOS signal names and module/channel assignments + * + * syntax: + * + * #define signallabel slot : channel + * + * where signallabel is any ASCII text string to identify the signal name + * slot is the slot number containing the module, + * channel is the channel number on the module + * + * Combinations of signals can also be made by creating a comma-separated + * list enclosed in square brackets as follows: + * + * #define newlabel [ signallabel, signallabel [, signallabel] ] + * + * where newlabel is any ASCII text string to define a new signal + * signallabel is any signal already defined above + * + * any number can be combined in a comma-separated list between square brackets, + * or a single signal can be defined in square brackets to effectively asign + * a different name to the signal + * + * Update in progress for new Hardware + */ + + +#define SHUTTER 0 : 1 /* INT signal from the backplane */ +#define FRAME 0 : 2 /* FRAME signal from the backplane */ +#define LINE 0 : 3 /* LINE signal from the backplane */ +#define PIXEL 0 : 4 /* PIXEL signal from the backplane */ + +#define FSS x : x /* Front Substrate */ +#define BSS x : x /* Back Substrate */ +#define GD x : x /* Guard Drain */ + +/**** Parallel Phase Signal Definitions ****/ +/* Each detector is made of two 2048x2048 + vertically stacked image areas. The top + detector is addressed by three B phase + signals and the bottom detector is + addresed by three A phase signals. The + focal plane is made of 8 detectors. The + detector signals are ganged together + into two sets of 4. +/* Note: _1 refers to detectors 1-4 */ +/* _2 refers to detectors 5-8 */ + +#define PP_B3_2 1 : 1 +#define PP_A3_2 1 : 2 +#define PP_B2_2 1 : 3 +#define PP_A2_2 1 : 4 +#define PP_B1_2 1 : 5 +#define PP_A1_2 1 : 6 +#define PP_A1_1 1 : 7 +#define PP_B1_1 1 : 8 +#define PP_A2_1 1 : 9 +#define PP_B2_1 1 : 10 +#define PP_A3_1 1 : 11 +#define PP_B3_1 1 : 12 + +/**** Serial Phase Signal Definitions ****/ + +#define TG 2 : 1 +#define SP_EF 2 : 2 +#define SP_E2 2 : 3 +#define SP_E1 2 : 4 +#define SP_F2 2 : 5 +#define SP_F1 2 : 6 + +/**** LVDS Driver Signal definitions ****/ +#define RG_1 12 : 7 +#define RG_2 12 : 8 +#define AC_Clamp 12 : 12 +#define SW_1 12 : 15 +#define SW_2 12 : 16 + + +/**** Bias Voltage Definitions ****/ + +/**** Readout Method ****/ +/* Science Serials */ +#if _SCI_SER_CLOCK_DIR == SPLIT + #define sci_serial1 [SP_E2, SP_F2] + #define sci_serial2 [SP_E1, SP_F1] + #define sci_serial3 SP_EF +#elif _SCI_SER_CLOCK_DIR == F_RIGHT + #define sci_serial1 [SP_E1, SP_F1] + #define sci_serial2 [SP_E2, SP_F2] + #define sci_serial3 SP_EF +#elif _SCI_SER_CLOCK_DIR == E_LEFT + #define sci_serial1 [SP_E2, SP_F1] + #define sci_serial2 [SP_E1, SP_F2] + #define sci_serial3 SP_EF +#endif +/* Reset Gate Combine */ +#define RG [ RG_1, RG_2] \ No newline at end of file diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform new file mode 100644 index 0000000..df136cc --- /dev/null +++ b/src/deimos/deimos.waveform @@ -0,0 +1,190 @@ +/* -*- C -*- */ +/** --------------------------------------------------------------------------- + * @file deimos_science.wavform + * @brief DEIMOS timing file; rules for waveform generation and scripting + * + * syntax (is case sensitive): + * + * WAVEFORM waveformlabel { rules } + * + * where rules (enclosed in curly braces) are as follows: + * + * [time]: [=timelabel] SET signallabel TO level; + * + * time: at least one time label is required, followed by colon + * (if omitted then SET... lines are all at the same time as previous time) + * arithmetic operations are allowed for time + * units are allowed to follow numbers, E.G. ns, us, ms + * ".+" means to add to the previous time + * + * =timelabel is an optional label for this time, which can be used elsewhere + * + * SET signallabel TO level; + * is required and must end with a semi-colon + * signallabel and level can be defined anywhere + * + */ + + +#define clockfreq 100000000 /* 100 MHz master clock frequency in Hz */ +#define sec *(clockfreq) /* clock cycles per second */ +#define ms *(clockfreq/1000) /* clock cycles per millisec */ +#define us *(clockfreq/1000000) /* clock cycles per microsec */ +#define ns *(clockfreq/10000000) /* clock cycles per nanosecond */ +#define clicks *(clockfreq/100000000) /* clock cycles per nanosecond */ + +/* Timing defines */ +/* Generic timing parameters */ +#define TICK #eval 1 clicks /* 10 nsec */ +#define 1ns #eval 1 ns +#define 1us #eval 1 us +#define 2us #eval 2 us +#define 10us #eval 10 us +#define 20us #eval 20 us +#define 25us #eval 25 us +/* #define 1ms #eval 99999 clicks /* 999 usec */ /* WHY */ +#define 10ms #eval 10 ms + + +/* Line transfer timing definitions */ +#define TDRT 20us +#define TOI 20us +#define TDTR 20us + +/* Serial transfer timing definitions */ + +#define TWX 170 ns /* Reset Pulse Width */ +#define TOR 130 ns /* Serial Clock Overlap */ + +/*****************************************/ +/* LOGIC STATES */ +/*****************************************/ +#define OPEN 1 +#define CLOSE 0 +#define HIGH 1 +#define LOW 0 + + + + +WAVEFORM LineTransfer { + /* wLine done in sequence */ + 0: + .+TDRT: SET TG TO _TG_CLOCK_HIGH, SLOW; + .+TOI: SET CD3 TO _PAR_CLOCK_LOW, SLOW; + SET AB2 TO _PAR_CLOCK_LOW, SLOW; + .+TOI: SET CD4 TO _PAR_CLOCK_HIGH, SLOW; + SET AB1 TO _PAR_CLOCK_HIGH, SLOW; + .+TOI: SET CD2 TO _PAR_CLOCK_LOW, SLOW; + SET AB3 TO _PAR_CLOCK_LOW, SLOW; + .+TOI: SET CD3 TO _PAR_CLOCK_HIGH, SLOW; + SET AB2 TO _PAR_CLOCK_HIGH, SLOW; + .+TOI: SET CD1 TO _PAR_CLOCK_LOW, SLOW; + SET AB4 TO _PAR_CLOCK_LOW, SLOW; + SET TG TO _TG_CLOCK_LOW, SLOW; + .+TOI: SET CD2 TO _PAR_CLOCK_HIGH, SLOW; + SET AB3 TO _PAR_CLOCK_HIGH, SLOW; + .+TOI: SET CD4 TO _PAR_CLOCK_LOW, SLOW; + SET AB1 TO _PAR_CLOCK_LOW, SLOW; + .+TOI: SET CD1 TO _PAR_CLOCK_HIGH, SLOW; + SET AB4 TO _PAR_CLOCK_HIGH, SLOW; +} + +WAVEFORM wPixel { + /* Starts at beginning of waveform */ + 0: SET PIXEL TO HIGH; + .+TICK: SET PIXEL TO LOW; + SET FRAME TO LOW; + SET LINE TO LOW; + /* Starts at beginning of waveform */ + 0: SET RG_1 TO HIGH; + TWX: SET RG_2 TO LOW; +/* Do something with summing well (following RG) */ +/* Do something with serial clocks (starting at 0:) */ + 0: SET sci_serial1 TO HIGH + SET sci_serial3 TO LOW + .+TOR: SET sci_serial2 TO HIGH + .+TOR: SET sci_serial1 TO LOW + SET sci_serial3 TO HIGH + .+TOR: RETURN; +} + +/*****************************************/ +/* Basic DEIMOS control signal waveforms */ +/*****************************************/ + +WAVEFORM wReset { + 0: SET RG TO _RG_CLOCK_HIGH; +} + +WAVEFORM wUnsetReset { + 0: SET RG TO _RG_CLOCK_LOW; +} + + +WAVEFORM OS_Clamp { + SET AC_Clamp TO HIGH; +} + +WAVEFORM OS_Clamp_ { + SET AC_Clamp TO LOW; +} + +/*****************************************/ +/* ARCHON control signal waveforms */ +/*****************************************/ + +WAVEFORM wOpenShutter { + 0: SET SHUTTER TO OPEN; +} +WAVEFORM wCloseShutter { + 0: SET SHUTTER TO CLOSE; +} +WAVEFORM wFrame { + 0: SET FRAME TO HIGH; +} +WAVEFORM wLine { + 0: SET LINE TO HIGH; +} +WAVEFORM wPixel { + 0: SET PIXEL TO HIGH; + .+TICK: SET PIXEL TO LOW; + SET FRAME TO LOW; + SET LINE TO LOW; +} + +WAVEFORM AD_Clamp { + 0: SET AD1 TO HIGH; + SET AD2 TO HIGH; + SET AD3 TO HIGH; + SET AD4 TO HIGH; + SET AD5 TO HIGH; + SET AD6 TO HIGH; + SET AD7 TO HIGH; + SET AD8 TO HIGH; + SET AD11 TO HIGH; + SET AD12 TO HIGH; + SET AD13 TO HIGH; + SET AD14 TO HIGH; + SET AD15 TO HIGH; + SET AD16 TO HIGH; + SET AD18 TO HIGH; +} + +WAVEFORM AD_Clamp_ { + 0: SET AD1 TO LOW; + SET AD2 TO LOW; + SET AD3 TO LOW; + SET AD4 TO LOW; + SET AD5 TO LOW; + SET AD6 TO LOW; + SET AD7 TO LOW; + SET AD8 TO LOW; + SET AD11 TO LOW; + SET AD12 TO LOW; + SET AD13 TO LOW; + SET AD14 TO LOW; + SET AD15 TO LOW; + SET AD16 TO LOW; + SET AD18 TO LOW; +} \ No newline at end of file From 931ad30dbf8050821126426307cd76aa8c087bf9 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Tue, 10 Dec 2024 13:47:14 -0800 Subject: [PATCH 003/194] adding other important configuration files --- src/deimos/deimos.cds | 1 + src/deimos/deimos.conf | 22 ++++++++++++++++++++++ src/deimos/deimos.mod | 0 src/deimos/deimos.modes | 0 4 files changed, 23 insertions(+) create mode 100644 src/deimos/deimos.cds create mode 100755 src/deimos/deimos.conf create mode 100644 src/deimos/deimos.mod create mode 100644 src/deimos/deimos.modes diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds new file mode 100644 index 0000000..31354ec --- /dev/null +++ b/src/deimos/deimos.cds @@ -0,0 +1 @@ +_ diff --git a/src/deimos/deimos.conf b/src/deimos/deimos.conf new file mode 100755 index 0000000..d165b19 --- /dev/null +++ b/src/deimos/deimos.conf @@ -0,0 +1,22 @@ +/** --------------------------------------------------------------------------- + * @file deimos.conf + * @brief WDL configuration file for deimos project + * @author Joseph Bichel + * @date 2024-12-10 + * @modified + * + * This file needs to identify the following four files: + * WAVEFORM_FILE = + * SYSTEM_FILE = + * SIGNAL_FILE = + * SEQUENCE_FILE = + * + */ + +INCLUDE_FILE = "deimos.def" /* #defines and usage are self contained */ +CDS_FILE = "deimos.cds" /* uses #defines from .def file */ +SIGNAL_FILE = "deimos.signals" /* #defines and usage are self contained */ +WAVEFORM_FILE = "deimos.waveform" /* uses #defines from .def and .signals */ +SEQUENCE_FILE = "deimos.seq" /* uses #defines from .def and .waveform */ +MODULE_FILE = "deimos.mod" /* #defines and usage are self contained */ +MODE_FILE = "deimos.modes" diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod new file mode 100644 index 0000000..e69de29 diff --git a/src/deimos/deimos.modes b/src/deimos/deimos.modes new file mode 100644 index 0000000..e69de29 From 06a807beed7473dae1a90064923b56d88d2068fa Mon Sep 17 00:00:00 2001 From: j-bichel Date: Tue, 10 Dec 2024 14:44:32 -0800 Subject: [PATCH 004/194] first draft of .cds, .def, and .mod --- src/deimos/deimos.cds | 36 ++++++++++++++++++++++- src/deimos/deimos.def | 15 ++++++++++ src/deimos/deimos.mod | 66 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 116 insertions(+), 1 deletion(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 31354ec..b1993ba 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -1 +1,35 @@ -_ +/* -*- C -*- */ +/** --------------------------------------------------------------------------- + * @file wasp.cds + * @brief CDS/Deinterlace parameters for WaSP instrument + */ + + +BIGBUF = _ARCHON_FRAMEBUFS +FRAMEMODE = _ARCHON_FRAMEMODE +LINECOUNT = _LINENUM +PIXELCOUNT = _PIXELNUM +RAWENABLE = _RAW_ENABLE +RAWENDLINE = _RAW_ENDLINE +RAWSAMPLES = _RAW_SAMPLES +RAWSEL = _RAW_SELECT +RAWSTARTLINE = _RAW_STARTLINE +RAWSTARTPIXEL = _RAW_STARTPIXEL +SAMPLEMODE = _ARCHON_SAMPLE_MODE +SHP1 = _FIRST_RESET_SAMPLE +SHP2 = _LAST_RESET_SAMPLE +SHD1 = _FIRST_VIDEO_SAMPLE +SHD2 = _LAST_VIDEO_SAMPLE +TAPLINE0 ="AD5L,1,1022"/*"AD5L,1,0" */ +TAPLINE1 ="AD6L,1,1369"/*"AD6R,1,0"*/ +TAPLINE2 ="AD7L,1,1404"/*"AD7L,1,0"*/ +TAPLINE3 ="AD8L,1,1094"/*"AD8R,1,0" */ +TAPLINE4 ="" +TAPLINE5 ="" +TAPLINE6 ="" +TAPLINE7 ="" +TAPLINES=16 +TRIGOUTFORCE=0 +TRIGOUTINVERT=1 +TRIGOUTLEVEL=0 +TRIGOUTPOWER=0 diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 6ccfb3a..df3226c 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -16,6 +16,21 @@ #define _SCI_SER_CLOCK_DIR SPLIT /* SPLIT | | E_LEFT | F_RIGHT */ + /** -------------------------------------------------------------------------- + * Archon Configuration Details + */ + +#define _ARCHON_SAMPLE_MODE 1 /* 0=16bit, 1=32bit */ +#define _ARCHON_FRAMEMODE 2 /* 0=top, 1=bottom, 2=split */ +#define _ARCHON_FRAMEBUFS 0 /* 0=3x512MB, 1=2x768MB, I.E. "BIGBUF" */ + +#define _RAW_ENABLE 0 /* 0=no, 1=yes */ +#define _RAW_STARTLINE 0 /* first line of raw data, 0-65535 */ +#define _RAW_ENDLINE 10 /* last line of raw data, 0-65535 */ +#define _RAW_STARTPIXEL 50 +#define _RAW_SAMPLES 2000 +#define _RAW_SELECT 7 /* AD channel for raw data capture, 0-15 */ + /** --------------------------------------------------------------------------- * Detector Array Parameters */ diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index e69de29..50fbc68 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -0,0 +1,66 @@ + +#define temp 1 + +SLOT 1 Driver { + DRV 1 [temp,1,1]; + DRV 2 [temp,1,1]; + DRV 3 [temp,1,1]; + DRV 4 [temp,1,1]; + DRV 5 [temp,1,1]; + DRV 6 [temp,1,1]; + DRV 7 [temp,1,1]; + DRV 8 [temp,1,1]; +} +SLOT 2 Driver{ + DRV 1 [temp,1,1]; + DRV 2 [temp,1,1]; + DRV 3 [temp,1,1]; + DRV 4 [temp,1,1]; + DRV 5 [temp,1,1]; + DRV 6 [temp,1,1]; + DRV 7 [temp,1,1]; + DRV 8 [temp,1,1]; +} +SLOT 3 Driver { + DRV 1 [temp,1,1]; + DRV 2 [temp,1,1]; + DRV 3 [temp,1,1]; + DRV 4 [temp,1,1]; + DRV 5 [temp,1,1]; + DRV 6 [temp,1,1]; + DRV 7 [temp,1,1]; + DRV 8 [temp,1,1]; +} +SLOT 4 XVBias { + DRV 1 [temp,1,1]; + DRV 2 [temp,1,1]; + DRV 3 [temp,1,1]; + DRV 4 [temp,1,1]; + DRV 5 [temp,1,1]; + DRV 6 [temp,1,1]; + DRV 7 [temp,1,1]; + DRV 8 [temp,1,1]; +} +/* review */ +SLOT 7 AD { + CLAMP 1 = 0; + CLAMP 2 = 0; + CLAMP 3 = 1.5; + CLAMP 4 = 1.5; + PREAMPGAIN = low; +} + +SLOT 9 HVBias { + + +} + +Slot 10 LVBias { + + +} + +Slot 12 LVDS { + + +} \ No newline at end of file From bb025774ae2a9d5b3ec606afca4ee99b73ef40a2 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Thu, 12 Dec 2024 15:28:11 -0800 Subject: [PATCH 005/194] DEIMOS files almost ready for compiling; waiting for configuration details --- src/deimos/.modules | 108 +++++++++++++++++++++++++++++ src/deimos/.system | 37 ++++++++++ src/deimos/Makefile | 137 +++++++++++++++++++++++++++++++++++++ src/deimos/deimos.mod | 89 ++++++++++++++---------- src/deimos/deimos.seq | 6 +- src/deimos/deimos.signals | 11 ++- src/deimos/deimos.waveform | 36 +++++++--- 7 files changed, 366 insertions(+), 58 deletions(-) create mode 100644 src/deimos/.modules create mode 100644 src/deimos/.system create mode 100644 src/deimos/Makefile diff --git a/src/deimos/.modules b/src/deimos/.modules new file mode 100644 index 0000000..65685ab --- /dev/null +++ b/src/deimos/.modules @@ -0,0 +1,108 @@ +[CONFIG] +MOD1\ENABLE1=1 +MOD1\FASTSLEWRATE1=1 +MOD1\SLOWSLEWRATE1=1 +MOD1\ENABLE2=1 +MOD1\FASTSLEWRATE2=1 +MOD1\SLOWSLEWRATE2=1 +MOD1\ENABLE3=1 +MOD1\FASTSLEWRATE3=1 +MOD1\SLOWSLEWRATE3=1 +MOD1\ENABLE4=1 +MOD1\FASTSLEWRATE4=1 +MOD1\SLOWSLEWRATE4=1 +MOD1\ENABLE5=1 +MOD1\FASTSLEWRATE5=1 +MOD1\SLOWSLEWRATE5=1 +MOD1\ENABLE6=1 +MOD1\FASTSLEWRATE6=1 +MOD1\SLOWSLEWRATE6=1 +MOD1\ENABLE7=1 +MOD1\FASTSLEWRATE7=1 +MOD1\SLOWSLEWRATE7=1 +MOD1\ENABLE8=1 +MOD1\FASTSLEWRATE8=1 +MOD1\SLOWSLEWRATE8=1 +MOD2\ENABLE1=1 +MOD2\FASTSLEWRATE1=1 +MOD2\SLOWSLEWRATE1=1 +MOD2\ENABLE2=1 +MOD2\FASTSLEWRATE2=1 +MOD2\SLOWSLEWRATE2=1 +MOD2\ENABLE3=1 +MOD2\FASTSLEWRATE3=1 +MOD2\SLOWSLEWRATE3=1 +MOD2\ENABLE4=1 +MOD2\FASTSLEWRATE4=1 +MOD2\SLOWSLEWRATE4=1 +MOD2\ENABLE5=1 +MOD2\FASTSLEWRATE5=1 +MOD2\SLOWSLEWRATE5=1 +MOD2\ENABLE6=1 +MOD2\FASTSLEWRATE6=1 +MOD2\SLOWSLEWRATE6=1 +MOD2\ENABLE7=1 +MOD2\FASTSLEWRATE7=1 +MOD2\SLOWSLEWRATE7=1 +MOD2\ENABLE8=1 +MOD2\FASTSLEWRATE8=1 +MOD2\SLOWSLEWRATE8=1 +MOD3\ENABLE1=1 +MOD3\FASTSLEWRATE1=1 +MOD3\SLOWSLEWRATE1=1 +MOD3\ENABLE2=1 +MOD3\FASTSLEWRATE2=1 +MOD3\SLOWSLEWRATE2=1 +MOD3\ENABLE3=1 +MOD3\FASTSLEWRATE3=1 +MOD3\SLOWSLEWRATE3=1 +MOD3\ENABLE4=1 +MOD3\FASTSLEWRATE4=1 +MOD3\SLOWSLEWRATE4=1 +MOD3\ENABLE5=1 +MOD3\FASTSLEWRATE5=1 +MOD3\SLOWSLEWRATE5=1 +MOD3\ENABLE6=1 +MOD3\FASTSLEWRATE6=1 +MOD3\SLOWSLEWRATE6=1 +MOD3\ENABLE7=1 +MOD3\FASTSLEWRATE7=1 +MOD3\SLOWSLEWRATE7=1 +MOD3\ENABLE8=1 +MOD3\FASTSLEWRATE8=1 +MOD3\SLOWSLEWRATE8=1 +MOD4\ENABLE1=1 +MOD4\FASTSLEWRATE1=1 +MOD4\SLOWSLEWRATE1=1 +MOD4\ENABLE2=1 +MOD4\FASTSLEWRATE2=1 +MOD4\SLOWSLEWRATE2=1 +MOD4\ENABLE3=1 +MOD4\FASTSLEWRATE3=1 +MOD4\SLOWSLEWRATE3=1 +MOD4\ENABLE4=1 +MOD4\FASTSLEWRATE4=1 +MOD4\SLOWSLEWRATE4=1 +MOD4\ENABLE5=1 +MOD4\FASTSLEWRATE5=1 +MOD4\SLOWSLEWRATE5=1 +MOD4\ENABLE6=1 +MOD4\FASTSLEWRATE6=1 +MOD4\SLOWSLEWRATE6=1 +MOD4\ENABLE7=1 +MOD4\FASTSLEWRATE7=1 +MOD4\SLOWSLEWRATE7=1 +MOD4\ENABLE8=1 +MOD4\FASTSLEWRATE8=1 +MOD4\SLOWSLEWRATE8=1 +MOD7\CLAMP1=0.0 +MOD7\CLAMP2=0.0 +MOD7\CLAMP3=1.5 +MOD7\CLAMP4=1.5 +MOD7\PREAMPGAIN=0 +MOD9\HVLC_V1=0 +MOD9\HVLC_ORDER1=0 +MOD10\HVLC_V1=0 +MOD10\HVLC_ORDER1=0 +MOD12\DIO_SOURCE1=0 +MOD12\DIO_DIR1=0 diff --git a/src/deimos/.system b/src/deimos/.system new file mode 100644 index 0000000..67e7230 --- /dev/null +++ b/src/deimos/.system @@ -0,0 +1,37 @@ +[SYSTEM] +BACKPLANE_ID=0000000000000000 +BACKPLANE_REV=0 +BACKPLANE_TYPE=1 +BACKPLANE_VERSION=0.0.0 +MOD1_ID=0000000000000000 +MOD1_REV=0 +MOD1_VERSION=0.0.0 +MOD1_TYPE=1 +MOD2_ID=0000000000000000 +MOD2_REV=0 +MOD2_VERSION=0.0.0 +MOD2_TYPE=1 +MOD3_ID=0000000000000000 +MOD3_REV=0 +MOD3_VERSION=0.0.0 +MOD3_TYPE=1 +MOD4_ID=0000000000000000 +MOD4_REV=0 +MOD4_VERSION=0.0.0 +MOD4_TYPE=12 +MOD7_ID=0000000000000000 +MOD7_REV=0 +MOD7_VERSION=0.0.0 +MOD7_TYPE=2 +MOD9_ID=0000000000000000 +MOD9_REV=0 +MOD9_VERSION=0.0.0 +MOD9_TYPE=4 +MOD10_ID=0000000000000000 +MOD10_REV=0 +MOD10_VERSION=0.0.0 +MOD10_TYPE=3 +MOD12_ID=0000000000000000 +MOD12_REV=0 +MOD12_VERSION=0.0.0 +MOD12_TYPE=10 diff --git a/src/deimos/Makefile b/src/deimos/Makefile new file mode 100644 index 0000000..7b3bfdf --- /dev/null +++ b/src/deimos/Makefile @@ -0,0 +1,137 @@ +# ----------------------------------------------------------------------------- +# @file Makefile +# @brief Makefile for Software/Config/Archon/Build/ +# @author David Hale +# @date 2015-xx-xx +# @modified 2016-01-14 +# @modified 2016-01-27 added fixrawendline (special case for Peter) +# @modified 2016-01-28 removed clean. Use @F.h instead of HFILE=archon.h +# @modified 2016-03-31 change how .mod is parsed +# @modified 2016-04-04 add INCPARSER and checks for file existence +# @modified 2016-04-07 add plotting option and check for WAVGEN exit code +# @modified 2016-04-19 changes to implement INCLUDE_FILE= in *.conf +# @modified 2016-04-20 read CDS_FILE and MODULE_FILE from .conf +# @modified 2017-02-08 added modegen +# @modified 2017-11-09 remove copying of acf files to camera computers +# @modified 2020-12-21 added insert_hash +# +# This Makefile uses the general preprocessor GPP 2.24 for macro processing. +# It also requires the ini2acf.pl Perl script for creating an Archon acf file. +# +# ----------------------------------------------------------------------------- +# + +# Copyright (C) <2018> California Institute of Technology +# Software written by: +# +# This program is part of the Waveform Definition Language (WDL) developed +# for ZTF. This program is free software: you can redistribute it and/or +# modify it under the terms of the GNU General Public License as published +# by the Free Software Foundation, either version 3 of the License, or +# any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# Please see the GNU General Public License at: +# . +# +# Report any bugs or suggested improvements to: +# +# David Hale or +# Stephen Kaye + +# set to path to gpp +GPP = /usr/bin/gpp +# set to path to wdl code +WDLPATH = $(HOME)/Software/wdl/wdl +# output for *.acf file +ACFPATH = $(HOME)/Software/wdlfiles/src/deimos/ + +PLOT = False # True # show waveform plots by default, True | False +GFLAGS = +c "/*" "*/" +c "//" "\n" +c "\\\n" "" +SEQPARSER = $(WDLPATH)/seqParserDriver.py +INCPARSER = $(WDLPATH)/incParserDriver.py +WDLPARSER = $(WDLPATH)/wdlParserDriver.py +MODPARSER = $(WDLPATH)/modParserDriver.py +WAVGEN = $(WDLPATH)/wavgenDriver.py +MODEGEN = $(WDLPATH)/modegenDriver.py +I2A = $(WDLPATH)/ini2acf.pl +INCL = -I$(CURDIR) + +# Global variable to store the filename +FILE_NAME := + +SCAN_CDSFILE = cat $(FILE_NAME).conf | $(GPP) $(GFLAGS) $(INCL) | \ + awk -F= '{gsub(" |\t","",$$1)} $$1=="CDS_FILE"{print $$2}' | cut -d'"' -f2 +SCAN_MODFILE = cat $(FILE_NAME).conf | $(GPP) $(GFLAGS) $(INCL) | \ + awk -F= '{gsub(" |\t","",$$1)} $$1=="MODULE_FILE"{print $$2}' | cut -d'"' -f2 +SCAN_MODEFILE = cat $(FILE_NAME).conf | $(GPP) $(GFLAGS) $(INCL) | \ + awk -F= '{gsub(" |\t","",$$1)} $$1=="MODE_FILE"{print $$2}' | cut -d'"' -f2 + +F_TMP = $(FILE_NAME)_TMP + +DEBUG ?= 0 + +ifeq ($(DEBUG), 1) + debug_message = @echo "Debug: $(1)" +else + debug_message = @true +endif + +# Main rule for building the target +%: + $(eval FILE_NAME := $(@F)) + $(call debug_message, "Current filename: $(FILE_NAME)") + @$(MAKE) generate_wdl FILE_NAME=$(@F) + @$(MAKE) generate_script_states FILE_NAME=$(@F) + @$(MAKE) assemble_acf FILE_NAME=$(@F) + +# Rule for generating WDL +generate_wdl: + $(eval MODFILE := $(shell $(SCAN_MODFILE))) + @echo "Looking for MODULE_FILE = $(MODFILE) ..." + @test -f $(FILE_NAME).conf || { echo "$(FILE_NAME).conf does not exist"; exit 1; } + $(call debug_message, "Found configuration file: $(FILE_NAME).conf") + + @echo "Making $(F_TMP).wdl from $(FILE_NAME).conf ..." + @cat $(FILE_NAME).conf | $(SEQPARSER) - | $(GPP) $(GFLAGS) $(INCL) | $(WDLPARSER) - > $(F_TMP).wdl + $(call debug_message, "Created WDL file: $(F_TMP).wdl") + + @echo "Making $(F_TMP).script and $(F_TMP).states from $(F_TMP).wdl ..." + @test -f $(MODFILE) || { echo "$(MODFILE) does not exist"; exit 1; } + $(call debug_message, "Found MODULE_FILE: $(MODFILE)") + + @cat $(MODFILE) | $(GPP) $(GFLAGS) $(INCL) | $(MODPARSER) - + $(call debug_message, "Processed MODULE_FILE: $(MODFILE)") + + @$(WAVGEN) $(F_TMP) $(PLOT) || { echo "Waveform generation failed"; exit 1; } + $(call debug_message, "Finished waveform generation for $(F_TMP) with plot: $(PLOT)") + +# Rule for generating script states +generate_script_states: + @echo "Assembling $(FILE_NAME).acf ..." + $(eval CDSFILE := $(shell $(SCAN_CDSFILE))) + $(call debug_message, "Looking for CDS_FILE = $(CDSFILE) ...") + @test -f $(CDSFILE) || { echo "$(CDSFILE) does not exist"; exit 1; } + $(call debug_message, "Preparing to assemble $(FILE_NAME).acf file using:") + $(call debug_message, "INCPARSER: $(INCPARSER)") + $(call debug_message, "CDSFILE: $(CDSFILE)") + $(call debug_message, "GPP Flags: $(GFLAGS)") + @echo "Assembling $(FILE_NAME).acf file ..." + @cat $(FILE_NAME).conf | $(INCPARSER) - | cat - $(CDSFILE) | $(GPP) $(GFLAGS) $(INCL) | \ + cat - $(F_TMP).script $(F_TMP).modules $(F_TMP).states $(F_TMP).system | \ + $(I2A) - > $(FILE_NAME).acf + +# Rule for assembling the ACF +assemble_acf: + $(eval MODEFILE := $(shell $(SCAN_MODEFILE))) + @$(MODEGEN) $(MODEFILE) $(FILE_NAME).acf + @if [ -d ".git" ]; then \ + echo "Inserting REV keyword ..."; $(WDLPATH)/insert_hash $(FILE_NAME).acf; \ + else \ + echo "Not a git archive, skipping REV keyword"; \ + fi + @echo "Done" diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 50fbc68..0dac262 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -1,37 +1,49 @@ #define temp 1 -SLOT 1 Driver { - DRV 1 [temp,1,1]; - DRV 2 [temp,1,1]; - DRV 3 [temp,1,1]; - DRV 4 [temp,1,1]; - DRV 5 [temp,1,1]; - DRV 6 [temp,1,1]; - DRV 7 [temp,1,1]; - DRV 8 [temp,1,1]; +SLOT 1 drvr { + DRV 1 [temp,1,1]; + DRV 2 [temp,1,1]; + DRV 3 [temp,1,1]; + DRV 4 [temp,1,1]; + DRV 5 [temp,1,1]; + DRV 6 [temp,1,1]; + DRV 7 [temp,1,1]; + DRV 8 [temp,1,1]; + DRV 9 [temp,1,1]; + DRV 10 [temp,1,1]; + DRV 11 [temp,1,1]; + DRV 12 [temp,1,1]; } -SLOT 2 Driver{ - DRV 1 [temp,1,1]; - DRV 2 [temp,1,1]; - DRV 3 [temp,1,1]; - DRV 4 [temp,1,1]; - DRV 5 [temp,1,1]; - DRV 6 [temp,1,1]; - DRV 7 [temp,1,1]; - DRV 8 [temp,1,1]; +SLOT 2 drvr { + DRV 1 [temp,1,1]; + DRV 2 [temp,1,1]; + DRV 3 [temp,1,1]; + DRV 4 [temp,1,1]; + DRV 5 [temp,1,1]; + DRV 6 [temp,1,1]; + DRV 7 [temp,1,1]; + DRV 8 [temp,1,1]; + DRV 9 [temp,1,1]; + DRV 10 [temp,1,1]; + DRV 11 [temp,1,1]; + DRV 12 [temp,1,1]; } -SLOT 3 Driver { - DRV 1 [temp,1,1]; - DRV 2 [temp,1,1]; - DRV 3 [temp,1,1]; - DRV 4 [temp,1,1]; - DRV 5 [temp,1,1]; - DRV 6 [temp,1,1]; - DRV 7 [temp,1,1]; - DRV 8 [temp,1,1]; +SLOT 3 drvr { + DRV 1 [temp,1,1]; + DRV 2 [temp,1,1]; + DRV 3 [temp,1,1]; + DRV 4 [temp,1,1]; + DRV 5 [temp,1,1]; + DRV 6 [temp,1,1]; + DRV 7 [temp,1,1]; + DRV 8 [temp,1,1]; + DRV 9 [temp,1,1]; + DRV 10 [temp,1,1]; + DRV 11 [temp,1,1]; + DRV 12 [temp,1,1]; } -SLOT 4 XVBias { +SLOT 4 xvbias { DRV 1 [temp,1,1]; DRV 2 [temp,1,1]; DRV 3 [temp,1,1]; @@ -42,7 +54,7 @@ SLOT 4 XVBias { DRV 8 [temp,1,1]; } /* review */ -SLOT 7 AD { +SLOT 7 ad { CLAMP 1 = 0; CLAMP 2 = 0; CLAMP 3 = 1.5; @@ -50,17 +62,20 @@ SLOT 7 AD { PREAMPGAIN = low; } -SLOT 9 HVBias { - - +SLOT 9 hvbias { + HVLC 1 [0,0]; /* Unused */ } -Slot 10 LVBias { +Slot 10 lvbias { + HVLC 1 [0,0]; /* Unused */ } -Slot 12 LVDS { - - -} \ No newline at end of file +Slot 12 lvds { + DIO 7 [0,0]; + DIO 8 [0,0]; + DIO 12 [0,0]; + DIO 15 [0,0]; + DIO 16 [0,0]; +} diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 1bd9960..4f2069c 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -26,7 +26,7 @@ param trigger_ScienceRead = 0 /** Science Readout Control Parameters **/ param param_ScienceLines = _LINENUM -param param_SciencePixels = _PIXELSNUM +param param_SciencePixels = 1000/*_PIXELNUM*/ param param_ExposeTime = 0 @@ -67,7 +67,7 @@ SEQUENCE ScienceReadout { } SEQUENCE ScienceLineRead{ - SynchedLineTransfer(); + LineTransfer(); wLine(); /* Initialize Serial Clocks */ /* Flush desired number of post pixels */ @@ -85,7 +85,6 @@ SEQUENCE ScienceLineRead{ OS_Clamp_(); AD_Clamp_(); return; - RETURN(); } SEQUENCE BiasInit { @@ -101,3 +100,4 @@ SEQUENCE ACReset { /* Clamp and unclamp AC clamp */ } + diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index ce58f10..31d116f 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -27,15 +27,11 @@ */ -#define SHUTTER 0 : 1 /* INT signal from the backplane */ +#define SHUTTER 0 : 1 /* INT signal from the backplane */ #define FRAME 0 : 2 /* FRAME signal from the backplane */ #define LINE 0 : 3 /* LINE signal from the backplane */ #define PIXEL 0 : 4 /* PIXEL signal from the backplane */ -#define FSS x : x /* Front Substrate */ -#define BSS x : x /* Back Substrate */ -#define GD x : x /* Guard Drain */ - /**** Parallel Phase Signal Definitions ****/ /* Each detector is made of two 2048x2048 vertically stacked image areas. The top @@ -76,7 +72,8 @@ #define AC_Clamp 12 : 12 #define SW_1 12 : 15 #define SW_2 12 : 16 - +/* NOP Definition - NEEDS TO BE UNUSED */ +#define NOP 12 : 1 /**** Bias Voltage Definitions ****/ @@ -96,4 +93,4 @@ #define sci_serial3 SP_EF #endif /* Reset Gate Combine */ -#define RG [ RG_1, RG_2] \ No newline at end of file +#define RG [ RG_1, RG_2] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index df136cc..f3c98d9 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -68,7 +68,7 @@ WAVEFORM LineTransfer { - /* wLine done in sequence */ + /* wLine done in sequence 0: .+TDRT: SET TG TO _TG_CLOCK_HIGH, SLOW; .+TOI: SET CD3 TO _PAR_CLOCK_LOW, SLOW; @@ -88,6 +88,7 @@ WAVEFORM LineTransfer { SET AB1 TO _PAR_CLOCK_LOW, SLOW; .+TOI: SET CD1 TO _PAR_CLOCK_HIGH, SLOW; SET AB4 TO _PAR_CLOCK_HIGH, SLOW; + */ } WAVEFORM wPixel { @@ -101,11 +102,11 @@ WAVEFORM wPixel { TWX: SET RG_2 TO LOW; /* Do something with summing well (following RG) */ /* Do something with serial clocks (starting at 0:) */ - 0: SET sci_serial1 TO HIGH - SET sci_serial3 TO LOW - .+TOR: SET sci_serial2 TO HIGH - .+TOR: SET sci_serial1 TO LOW - SET sci_serial3 TO HIGH + 0: SET sci_serial1 TO HIGH; + SET sci_serial3 TO LOW; + .+TOR: SET sci_serial2 TO HIGH; + .+TOR: SET sci_serial1 TO LOW; + SET sci_serial3 TO HIGH; .+TOR: RETURN; } @@ -130,6 +131,19 @@ WAVEFORM OS_Clamp_ { SET AC_Clamp TO LOW; } + +/*****************************************/ +/* ARCHON Timing Control */ +/*****************************************/ + +WAVEFORM Wait1us { + 0: SET NOP TO HIGH; + .+1us: SET NOP TO HIGH; +} + + + + /*****************************************/ /* ARCHON control signal waveforms */ /*****************************************/ @@ -152,9 +166,9 @@ WAVEFORM wPixel { SET FRAME TO LOW; SET LINE TO LOW; } - +/* Where are these defined??*/ WAVEFORM AD_Clamp { - 0: SET AD1 TO HIGH; +/* 0: SET AD1 TO HIGH; SET AD2 TO HIGH; SET AD3 TO HIGH; SET AD4 TO HIGH; @@ -169,10 +183,10 @@ WAVEFORM AD_Clamp { SET AD15 TO HIGH; SET AD16 TO HIGH; SET AD18 TO HIGH; -} +*/} WAVEFORM AD_Clamp_ { - 0: SET AD1 TO LOW; +/* 0: SET AD1 TO LOW; SET AD2 TO LOW; SET AD3 TO LOW; SET AD4 TO LOW; @@ -187,4 +201,4 @@ WAVEFORM AD_Clamp_ { SET AD15 TO LOW; SET AD16 TO LOW; SET AD18 TO LOW; -} \ No newline at end of file +*/} From d0bf90b8f15ac3e64f24c786fe03ef92e73deb32 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Fri, 13 Dec 2024 08:24:57 -0800 Subject: [PATCH 006/194] mod file fixes --- src/deimos/.modules | 43 +++++++++++++++ src/deimos/.system | 6 +-- src/deimos/deimos.mod | 108 +++++++++++++++++++------------------- src/deimos/deimos.signals | 4 +- 4 files changed, 103 insertions(+), 58 deletions(-) diff --git a/src/deimos/.modules b/src/deimos/.modules index 65685ab..c21f0b7 100644 --- a/src/deimos/.modules +++ b/src/deimos/.modules @@ -23,6 +23,18 @@ MOD1\SLOWSLEWRATE7=1 MOD1\ENABLE8=1 MOD1\FASTSLEWRATE8=1 MOD1\SLOWSLEWRATE8=1 +MOD1\ENABLE9=1 +MOD1\FASTSLEWRATE9=1 +MOD1\SLOWSLEWRATE9=1 +MOD1\ENABLE10=1 +MOD1\FASTSLEWRATE10=1 +MOD1\SLOWSLEWRATE10=1 +MOD1\ENABLE11=1 +MOD1\FASTSLEWRATE11=1 +MOD1\SLOWSLEWRATE11=1 +MOD1\ENABLE12=1 +MOD1\FASTSLEWRATE12=1 +MOD1\SLOWSLEWRATE12=1 MOD2\ENABLE1=1 MOD2\FASTSLEWRATE1=1 MOD2\SLOWSLEWRATE1=1 @@ -47,6 +59,18 @@ MOD2\SLOWSLEWRATE7=1 MOD2\ENABLE8=1 MOD2\FASTSLEWRATE8=1 MOD2\SLOWSLEWRATE8=1 +MOD2\ENABLE9=1 +MOD2\FASTSLEWRATE9=1 +MOD2\SLOWSLEWRATE9=1 +MOD2\ENABLE10=1 +MOD2\FASTSLEWRATE10=1 +MOD2\SLOWSLEWRATE10=1 +MOD2\ENABLE11=1 +MOD2\FASTSLEWRATE11=1 +MOD2\SLOWSLEWRATE11=1 +MOD2\ENABLE12=1 +MOD2\FASTSLEWRATE12=1 +MOD2\SLOWSLEWRATE12=1 MOD3\ENABLE1=1 MOD3\FASTSLEWRATE1=1 MOD3\SLOWSLEWRATE1=1 @@ -71,6 +95,18 @@ MOD3\SLOWSLEWRATE7=1 MOD3\ENABLE8=1 MOD3\FASTSLEWRATE8=1 MOD3\SLOWSLEWRATE8=1 +MOD3\ENABLE9=1 +MOD3\FASTSLEWRATE9=1 +MOD3\SLOWSLEWRATE9=1 +MOD3\ENABLE10=1 +MOD3\FASTSLEWRATE10=1 +MOD3\SLOWSLEWRATE10=1 +MOD3\ENABLE11=1 +MOD3\FASTSLEWRATE11=1 +MOD3\SLOWSLEWRATE11=1 +MOD3\ENABLE12=1 +MOD3\FASTSLEWRATE12=1 +MOD3\SLOWSLEWRATE12=1 MOD4\ENABLE1=1 MOD4\FASTSLEWRATE1=1 MOD4\SLOWSLEWRATE1=1 @@ -106,3 +142,10 @@ MOD10\HVLC_V1=0 MOD10\HVLC_ORDER1=0 MOD12\DIO_SOURCE1=0 MOD12\DIO_DIR1=0 +MOD12\DIO_SOURCE2=0 +MOD12\DIO_DIR2=0 +MOD12\DIO_SOURCE3=0 +MOD12\DIO_DIR3=0 +MOD12\DIO_SOURCE4=0 +MOD12\DIO_DIR4=0 +MOD12\DIO_POWER=0 diff --git a/src/deimos/.system b/src/deimos/.system index 67e7230..72baa29 100644 --- a/src/deimos/.system +++ b/src/deimos/.system @@ -6,15 +6,15 @@ BACKPLANE_VERSION=0.0.0 MOD1_ID=0000000000000000 MOD1_REV=0 MOD1_VERSION=0.0.0 -MOD1_TYPE=1 +MOD1_TYPE=16 MOD2_ID=0000000000000000 MOD2_REV=0 MOD2_VERSION=0.0.0 -MOD2_TYPE=1 +MOD2_TYPE=16 MOD3_ID=0000000000000000 MOD3_REV=0 MOD3_VERSION=0.0.0 -MOD3_TYPE=1 +MOD3_TYPE=16 MOD4_ID=0000000000000000 MOD4_REV=0 MOD4_VERSION=0.0.0 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 0dac262..1e4b0ba 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -1,57 +1,57 @@ #define temp 1 -SLOT 1 drvr { - DRV 1 [temp,1,1]; - DRV 2 [temp,1,1]; - DRV 3 [temp,1,1]; - DRV 4 [temp,1,1]; - DRV 5 [temp,1,1]; - DRV 6 [temp,1,1]; - DRV 7 [temp,1,1]; - DRV 8 [temp,1,1]; - DRV 9 [temp,1,1]; - DRV 10 [temp,1,1]; - DRV 11 [temp,1,1]; - DRV 12 [temp,1,1]; +SLOT 1 driverx { + DRVX 1 [temp,1,1]; + DRVX 2 [temp,1,1]; + DRVX 3 [temp,1,1]; + DRVX 4 [temp,1,1]; + DRVX 5 [temp,1,1]; + DRVX 6 [temp,1,1]; + DRVX 7 [temp,1,1]; + DRVX 8 [temp,1,1]; + DRVX 9 [temp,1,1]; + DRVX 10 [temp,1,1]; + DRVX 11 [temp,1,1]; + DRVX 12 [temp,1,1]; } -SLOT 2 drvr { - DRV 1 [temp,1,1]; - DRV 2 [temp,1,1]; - DRV 3 [temp,1,1]; - DRV 4 [temp,1,1]; - DRV 5 [temp,1,1]; - DRV 6 [temp,1,1]; - DRV 7 [temp,1,1]; - DRV 8 [temp,1,1]; - DRV 9 [temp,1,1]; - DRV 10 [temp,1,1]; - DRV 11 [temp,1,1]; - DRV 12 [temp,1,1]; +SLOT 2 driverx { + DRVX 1 [temp,1,1]; + DRVX 2 [temp,1,1]; + DRVX 3 [temp,1,1]; + DRVX 4 [temp,1,1]; + DRVX 5 [temp,1,1]; + DRVX 6 [temp,1,1]; + DRVX 7 [temp,1,1]; + DRVX 8 [temp,1,1]; + DRVX 9 [temp,1,1]; + DRVX 10 [temp,1,1]; + DRVX 11 [temp,1,1]; + DRVX 12 [temp,1,1]; } -SLOT 3 drvr { - DRV 1 [temp,1,1]; - DRV 2 [temp,1,1]; - DRV 3 [temp,1,1]; - DRV 4 [temp,1,1]; - DRV 5 [temp,1,1]; - DRV 6 [temp,1,1]; - DRV 7 [temp,1,1]; - DRV 8 [temp,1,1]; - DRV 9 [temp,1,1]; - DRV 10 [temp,1,1]; - DRV 11 [temp,1,1]; - DRV 12 [temp,1,1]; +SLOT 3 driverx { + DRVX 1 [temp,1,1]; + DRVX 2 [temp,1,1]; + DRVX 3 [temp,1,1]; + DRVX 4 [temp,1,1]; + DRVX 5 [temp,1,1]; + DRVX 6 [temp,1,1]; + DRVX 7 [temp,1,1]; + DRVX 8 [temp,1,1]; + DRVX 9 [temp,1,1]; + DRVX 10 [temp,1,1]; + DRVX 11 [temp,1,1]; + DRVX 12 [temp,1,1]; } SLOT 4 xvbias { - DRV 1 [temp,1,1]; - DRV 2 [temp,1,1]; - DRV 3 [temp,1,1]; - DRV 4 [temp,1,1]; - DRV 5 [temp,1,1]; - DRV 6 [temp,1,1]; - DRV 7 [temp,1,1]; - DRV 8 [temp,1,1]; + DRVX 1 [temp,1,1]; + DRVX 2 [temp,1,1]; + DRVX 3 [temp,1,1]; + DRVX 4 [temp,1,1]; + DRVX 5 [temp,1,1]; + DRVX 6 [temp,1,1]; + DRVX 7 [temp,1,1]; + DRVX 8 [temp,1,1]; } /* review */ SLOT 7 ad { @@ -67,15 +67,15 @@ SLOT 9 hvbias { } -Slot 10 lvbias { +SLOT 10 lvbias { HVLC 1 [0,0]; /* Unused */ } -Slot 12 lvds { - DIO 7 [0,0]; - DIO 8 [0,0]; - DIO 12 [0,0]; - DIO 15 [0,0]; - DIO 16 [0,0]; +SLOT 12 lvds { + DIO 1 [0,0]; + DIO 2 [0,0]; + DIO 3 [0,0]; + DIO 4 [0,0]; + DIOPOWER = 0; } diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 31d116f..4146874 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -67,13 +67,15 @@ #define SP_F1 2 : 6 /**** LVDS Driver Signal definitions ****/ + #define RG_1 12 : 7 #define RG_2 12 : 8 #define AC_Clamp 12 : 12 #define SW_1 12 : 15 #define SW_2 12 : 16 /* NOP Definition - NEEDS TO BE UNUSED */ -#define NOP 12 : 1 +#define NOP 12 : 1 + /**** Bias Voltage Definitions ****/ From 65f818f847909a40ecfd92f42349e46ca6a655b5 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Fri, 13 Dec 2024 08:35:19 -0800 Subject: [PATCH 007/194] Potential fix for xvbias module; added detail to hvbias --- src/deimos/deimos.mod | 40 +++++++++++++++++++++++++++++++--------- 1 file changed, 31 insertions(+), 9 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 1e4b0ba..4ea82b5 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -44,14 +44,7 @@ SLOT 3 driverx { DRVX 12 [temp,1,1]; } SLOT 4 xvbias { - DRVX 1 [temp,1,1]; - DRVX 2 [temp,1,1]; - DRVX 3 [temp,1,1]; - DRVX 4 [temp,1,1]; - DRVX 5 [temp,1,1]; - DRVX 6 [temp,1,1]; - DRVX 7 [temp,1,1]; - DRVX 8 [temp,1,1]; + XVLC 1 [temp,1,1]; } /* review */ SLOT 7 ad { @@ -63,7 +56,36 @@ SLOT 7 ad { } SLOT 9 hvbias { - HVLC 1 [0,0]; /* Unused */ + HVLC 1 [0,0]; /* Unused */ + HVLC 2 [0,0]; /* Guard Drain Science */ + HVLC 3 [3.0,0]; /* Reset Drain E Science */ + HVLC 4 [12.0,0]; /* Reset Drain F Science */ + HVLC 5 [19,0]; /* */ + HVLC 6 [19,0]; /* Reset Drain A 1 FCS */ + HVLC 7 [19,0]; /* Reset Drain B 1 FCS */ + HVLC 8 [29,0]; /* Reset Drain A 2 FCS */ + HVLC 9 [3.5,0]; /* Reset Drain B 2 FCS */ + HVLC 10 [0,0]; /* Overflow Drain FCS */ + HVLC 11 [19,0]; /* */ + HVLC 12 [30,0]; /* */ + HVLC 13 [15,0]; /* */ + HVLC 14 [15,0]; /* */ + HVLC 15 [1,0]; /* */ + HVLC 16 [24,0]; /* */ + HVLC 17 [15,0]; /* */ + HVLC 18 [1,0]; /* */ + HVLC 19 [24,0]; /* */ + HVLC 20 [15,0]; /* */ + HVLC 21 [24,0]; /* */ + HVLC 22 [24,0]; /* */ + HVLC 23 [24,0]; /* */ + HVLC 24 [15,0]; /* */ + HVLC 25 [15,0]; /* Output Drain E SCI */ + HVLC 26 [15,0]; /* Output Drain F SCI */ + HVLC 27 [15,0]; /* Output Drain A 1 FCS */ + HVLC 28 [15,0]; /* Output Drain B 1 FCS */ + HVLC 29 [15,0]; /* Output Drain A 2 FCS */ + HVLC 30 [15,0]; /* Output Drain B 2 FCS */ } From 1cc73e318a86418810c74786cb68cc2d5cf9ab23 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 16 Dec 2024 13:57:41 -0800 Subject: [PATCH 008/194] compiling deimos wdl --- src/deimos/.modules | 97 +++++++++++++++++++++++++++++++---------- src/deimos/Makefile | 6 +-- src/deimos/deimos.mod | 32 +++++++------- src/deimos/deimos.modes | 4 ++ 4 files changed, 96 insertions(+), 43 deletions(-) diff --git a/src/deimos/.modules b/src/deimos/.modules index c21f0b7..3eb83b1 100644 --- a/src/deimos/.modules +++ b/src/deimos/.modules @@ -107,30 +107,6 @@ MOD3\SLOWSLEWRATE11=1 MOD3\ENABLE12=1 MOD3\FASTSLEWRATE12=1 MOD3\SLOWSLEWRATE12=1 -MOD4\ENABLE1=1 -MOD4\FASTSLEWRATE1=1 -MOD4\SLOWSLEWRATE1=1 -MOD4\ENABLE2=1 -MOD4\FASTSLEWRATE2=1 -MOD4\SLOWSLEWRATE2=1 -MOD4\ENABLE3=1 -MOD4\FASTSLEWRATE3=1 -MOD4\SLOWSLEWRATE3=1 -MOD4\ENABLE4=1 -MOD4\FASTSLEWRATE4=1 -MOD4\SLOWSLEWRATE4=1 -MOD4\ENABLE5=1 -MOD4\FASTSLEWRATE5=1 -MOD4\SLOWSLEWRATE5=1 -MOD4\ENABLE6=1 -MOD4\FASTSLEWRATE6=1 -MOD4\SLOWSLEWRATE6=1 -MOD4\ENABLE7=1 -MOD4\FASTSLEWRATE7=1 -MOD4\SLOWSLEWRATE7=1 -MOD4\ENABLE8=1 -MOD4\FASTSLEWRATE8=1 -MOD4\SLOWSLEWRATE8=1 MOD7\CLAMP1=0.0 MOD7\CLAMP2=0.0 MOD7\CLAMP3=1.5 @@ -138,8 +114,78 @@ MOD7\CLAMP4=1.5 MOD7\PREAMPGAIN=0 MOD9\HVLC_V1=0 MOD9\HVLC_ORDER1=0 +MOD9\HVLC_V2=0 +MOD9\HVLC_ORDER2=0 +MOD9\HVLC_V3=3.0 +MOD9\HVLC_ORDER3=0 +MOD9\HVLC_V4=12.0 +MOD9\HVLC_ORDER4=0 +MOD9\HVLC_V5=19 +MOD9\HVLC_ORDER5=0 +MOD9\HVLC_V6=19 +MOD9\HVLC_ORDER6=0 +MOD9\HVLC_V7=19 +MOD9\HVLC_ORDER7=0 +MOD9\HVLC_V8=29 +MOD9\HVLC_ORDER8=0 +MOD9\HVLC_V9=3.5 +MOD9\HVLC_ORDER9=0 +MOD9\HVLC_V10=0 +MOD9\HVLC_ORDER10=0 +MOD9\HVLC_V11=19 +MOD9\HVLC_ORDER11=0 +MOD9\HVLC_V12=30 +MOD9\HVLC_ORDER12=0 +MOD9\HVLC_V13=15 +MOD9\HVLC_ORDER13=0 +MOD9\HVLC_V14=15 +MOD9\HVLC_ORDER14=0 +MOD9\HVLC_V15=1 +MOD9\HVLC_ORDER15=0 +MOD9\HVLC_V16=24 +MOD9\HVLC_ORDER16=0 +MOD9\HVLC_V17=15 +MOD9\HVLC_ORDER17=0 +MOD9\HVLC_V18=1 +MOD9\HVLC_ORDER18=0 +MOD9\HVLC_V19=24 +MOD9\HVLC_ORDER19=0 +MOD9\HVLC_V20=15 +MOD9\HVLC_ORDER20=0 +MOD9\HVLC_V21=24 +MOD9\HVLC_ORDER21=0 +MOD9\HVLC_V22=24 +MOD9\HVLC_ORDER22=0 +MOD9\HVLC_V23=24 +MOD9\HVLC_ORDER23=0 +MOD9\HVLC_V24=15 +MOD9\HVLC_ORDER24=0 MOD10\HVLC_V1=0 MOD10\HVLC_ORDER1=0 +MOD9\HVHC_ENABLE1=1 +MOD9\HVHC_V1=15 +MOD9\HVHC_IL1=0 +MOD9\HVHC_ORDER1=0 +MOD9\HVHC_ENABLE2=1 +MOD9\HVHC_V2=15 +MOD9\HVHC_IL2=0 +MOD9\HVHC_ORDER2=0 +MOD9\HVHC_ENABLE3=1 +MOD9\HVHC_V3=15 +MOD9\HVHC_IL3=0 +MOD9\HVHC_ORDER3=0 +MOD9\HVHC_ENABLE4=1 +MOD9\HVHC_V4=15 +MOD9\HVHC_IL4=0 +MOD9\HVHC_ORDER4=0 +MOD9\HVHC_ENABLE5=1 +MOD9\HVHC_V5=15 +MOD9\HVHC_IL5=0 +MOD9\HVHC_ORDER5=0 +MOD9\HVHC_ENABLE6=1 +MOD9\HVHC_V6=15 +MOD9\HVHC_IL6=0 +MOD9\HVHC_ORDER6=0 MOD12\DIO_SOURCE1=0 MOD12\DIO_DIR1=0 MOD12\DIO_SOURCE2=0 @@ -149,3 +195,6 @@ MOD12\DIO_DIR3=0 MOD12\DIO_SOURCE4=0 MOD12\DIO_DIR4=0 MOD12\DIO_POWER=0 +MOD4\XVN_V1=-100 +MOD4\XVN_ORDER1=0 +MOD4\XVN_ENABLE1=1 diff --git a/src/deimos/Makefile b/src/deimos/Makefile index 7b3bfdf..a1eb030 100644 --- a/src/deimos/Makefile +++ b/src/deimos/Makefile @@ -46,7 +46,7 @@ # set to path to gpp GPP = /usr/bin/gpp # set to path to wdl code -WDLPATH = $(HOME)/Software/wdl/wdl +WDLPATH = $(HOME)/Software/wdl/wdl/ # output for *.acf file ACFPATH = $(HOME)/Software/wdlfiles/src/deimos/ @@ -107,8 +107,8 @@ generate_wdl: @cat $(MODFILE) | $(GPP) $(GFLAGS) $(INCL) | $(MODPARSER) - $(call debug_message, "Processed MODULE_FILE: $(MODFILE)") - @$(WAVGEN) $(F_TMP) $(PLOT) || { echo "Waveform generation failed"; exit 1; } - $(call debug_message, "Finished waveform generation for $(F_TMP) with plot: $(PLOT)") + # @$(WAVGEN) $(F_TMP) $(PLOT) || { echo "Waveform generation failed"; exit 1; } + # $(call debug_message, "Finished waveform generation for $(F_TMP) with plot: $(PLOT)") # Rule for generating script states generate_script_states: diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 4ea82b5..925ed3f 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -44,7 +44,7 @@ SLOT 3 driverx { DRVX 12 [temp,1,1]; } SLOT 4 xvbias { - XVLC 1 [temp,1,1]; + NBIAS 1 [0,-100]; } /* review */ SLOT 7 ad { @@ -56,15 +56,15 @@ SLOT 7 ad { } SLOT 9 hvbias { - HVLC 1 [0,0]; /* Unused */ - HVLC 2 [0,0]; /* Guard Drain Science */ - HVLC 3 [3.0,0]; /* Reset Drain E Science */ - HVLC 4 [12.0,0]; /* Reset Drain F Science */ - HVLC 5 [19,0]; /* */ - HVLC 6 [19,0]; /* Reset Drain A 1 FCS */ - HVLC 7 [19,0]; /* Reset Drain B 1 FCS */ - HVLC 8 [29,0]; /* Reset Drain A 2 FCS */ - HVLC 9 [3.5,0]; /* Reset Drain B 2 FCS */ + HVLC 1 [0,0]; /* Unused */ + HVLC 2 [0,0]; /* Guard Drain SCI */ + HVLC 3 [3.0,0]; /* Reset Drain E SCI */ + HVLC 4 [12.0,0]; /* Reset Drain F SCI */ + HVLC 5 [19,0]; /* */ + HVLC 6 [19,0]; /* Reset Drain A 1 FCS */ + HVLC 7 [19,0]; /* Reset Drain B 1 FCS */ + HVLC 8 [29,0]; /* Reset Drain A 2 FCS */ + HVLC 9 [3.5,0]; /* Reset Drain B 2 FCS */ HVLC 10 [0,0]; /* Overflow Drain FCS */ HVLC 11 [19,0]; /* */ HVLC 12 [30,0]; /* */ @@ -80,12 +80,12 @@ SLOT 9 hvbias { HVLC 22 [24,0]; /* */ HVLC 23 [24,0]; /* */ HVLC 24 [15,0]; /* */ - HVLC 25 [15,0]; /* Output Drain E SCI */ - HVLC 26 [15,0]; /* Output Drain F SCI */ - HVLC 27 [15,0]; /* Output Drain A 1 FCS */ - HVLC 28 [15,0]; /* Output Drain B 1 FCS */ - HVLC 29 [15,0]; /* Output Drain A 2 FCS */ - HVLC 30 [15,0]; /* Output Drain B 2 FCS */ + HVHC 1 [15,0,0,1]; /* Output Drain E SCI */ + HVHC 2 [15,0,0,1]; /* Output Drain F SCI */ + HVHC 3 [15,0,0,1]; /* Output Drain A 1 FCS */ + HVHC 4 [15,0,0,1]; /* Output Drain B 1 FCS */ + HVHC 5 [15,0,0,1]; /* Output Drain A 2 FCS */ + HVHC 6 [15,0,0,1]; /* Output Drain B 2 FCS */ } diff --git a/src/deimos/deimos.modes b/src/deimos/deimos.modes index e69de29..94308f1 100644 --- a/src/deimos/deimos.modes +++ b/src/deimos/deimos.modes @@ -0,0 +1,4 @@ +[MODE_DEFAULT] +ARCH:NUM_CCDS=4 +ARCH:AMPS_PER_CCD_HORI=2 +ARCH:AMPS_PER_CCD_VERT=1 From 7f1e610b3c924eb83183ccff0f5d3987d6097cc2 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Mon, 16 Dec 2024 21:58:50 +0000 Subject: [PATCH 009/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 359 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 359 insertions(+) create mode 100644 acf/deimos.acf diff --git a/acf/deimos.acf b/acf/deimos.acf new file mode 100644 index 0000000..e54a2d1 --- /dev/null +++ b/acf/deimos.acf @@ -0,0 +1,359 @@ +[CONFIG] +BIGBUF = _ARCHON_FRAMEBUFS +FRAMEMODE = _ARCHON_FRAMEMODE +LINECOUNT = _LINENUM +PIXELCOUNT = _PIXELNUM +RAWENABLE = _RAW_ENABLE +RAWENDLINE = _RAW_ENDLINE +RAWSAMPLES = _RAW_SAMPLES +RAWSEL = _RAW_SELECT +RAWSTARTLINE = _RAW_STARTLINE +RAWSTARTPIXEL = _RAW_STARTPIXEL +SAMPLEMODE = _ARCHON_SAMPLE_MODE +SHP1 = _FIRST_RESET_SAMPLE +SHP2 = _LAST_RESET_SAMPLE +SHD1 = _FIRST_VIDEO_SAMPLE +SHD2 = _LAST_VIDEO_SAMPLE +TAPLINE0 ="AD5L,1,1022" +TAPLINE1 ="AD6L,1,1369" +TAPLINE2 ="AD7L,1,1404" +TAPLINE3 ="AD8L,1,1094" +TAPLINE4 ="" +TAPLINE5 ="" +TAPLINE6 ="" +TAPLINE7 ="" +TAPLINES=16 +TRIGOUTFORCE=0 +TRIGOUTINVERT=1 +TRIGOUTLEVEL=0 +TRIGOUTPOWER=0 +PARAMETER0="abort=0" +PARAMETER1="start=0" +PARAMETER2="trigger_ScienceExpose=0" +PARAMETER3="trigger_ScienceRead=0" +PARAMETER4="param_ScienceLines=4154" +PARAMETER5="param_SciencePixels=1000" +PARAMETER6="param_ExposeTime=0" +PARAMETERS=7 +LINE0=StartSeq: +LINE1="STATE000; CALL BiasLow" +LINE2="STATE000; if start GOTO InitSeq" +LINE3="STATE000; GOTO StartSeq" +LINE4=InitSeq: +LINE5="STATE000; CALL BiasInit" +LINE6="STATE000; CALL ACReset" +LINE7="STATE000; GOTO DetectorSel" +LINE8=DetectorSel: +LINE9="STATE000; if trigger_ScienceExpose CALL SelectScienceReadoutMode" +LINE10="STATE000; GOTO DetectorSel" +LINE11=SelectScienceReadoutMode: +LINE12="STATE000; if trigger_ScienceRead CALL ScienceReadout" +LINE13="STATE000; GOTO SelectScienceReadoutMode" +LINE14=ScienceReadout: +LINE15="STATE000; CALL wCloseShutter" +LINE16="STATE000; CALL wOpenShutter" +LINE17="STATE000; CALL wFrame" +LINE18="STATE000; CALL ScienceLineRead(param_ScienceLines)" +LINE19="STATE000; CALL wCloseShutter" +LINE20=ScienceLineRead: +LINE21="STATE000; CALL LineTransfer" +LINE22="STATE000; CALL wLine" +LINE23="STATE000; CALL wPixel(param_SciencePixels)" +LINE24="STATE000; CALL wReset" +LINE25="STATE000; CALL Wait1us" +LINE26="STATE000; CALL OS_Clamp" +LINE27="STATE000; CALL AD_Clamp" +LINE28="STATE000; CALL Wait1us" +LINE29="STATE000; CALL OS_Clamp_" +LINE30="STATE000; CALL AD_Clamp_" +LINE31="STATE000; RETURN ScienceLineRead" +LINE32=BiasInit: +LINE33="STATE000;" +LINE34=BiasLow: +LINE35="STATE000;" +LINE36=ACReset: +LINE37="STATE000;" +LINE38=LineTransfer: +LINE39="STATE000; RETURN LineTransfer" +LINE40=wPixel: +LINE41="STATE001;" +LINE42="STATE002; RETURN wPixel" +LINE43=wReset: +LINE44="STATE000; RETURN wReset" +LINE45=wUnsetReset: +LINE46="STATE000; RETURN wUnsetReset" +LINE47=OS_Clamp: +LINE48="STATE000; RETURN OS_Clamp" +LINE49=OS_Clamp_: +LINE50="STATE000; RETURN OS_Clamp_" +LINE51=Wait1us: +LINE52="STATE000; STATE000(99)" +LINE53="STATE000; RETURN Wait1us" +LINE54=wOpenShutter: +LINE55="STATE003; RETURN wOpenShutter" +LINE56=wCloseShutter: +LINE57="STATE004; RETURN wCloseShutter" +LINE58=wFrame: +LINE59="STATE005; RETURN wFrame" +LINE60=wLine: +LINE61="STATE006; RETURN wLine" +LINE62=AD_Clamp: +LINE63="STATE000; RETURN AD_Clamp" +LINE64=AD_Clamp_: +LINE65="STATE000; RETURN AD_Clamp_" +LINES=66 +MOD1\ENABLE1=1 +MOD1\FASTSLEWRATE1=1 +MOD1\SLOWSLEWRATE1=1 +MOD1\ENABLE2=1 +MOD1\FASTSLEWRATE2=1 +MOD1\SLOWSLEWRATE2=1 +MOD1\ENABLE3=1 +MOD1\FASTSLEWRATE3=1 +MOD1\SLOWSLEWRATE3=1 +MOD1\ENABLE4=1 +MOD1\FASTSLEWRATE4=1 +MOD1\SLOWSLEWRATE4=1 +MOD1\ENABLE5=1 +MOD1\FASTSLEWRATE5=1 +MOD1\SLOWSLEWRATE5=1 +MOD1\ENABLE6=1 +MOD1\FASTSLEWRATE6=1 +MOD1\SLOWSLEWRATE6=1 +MOD1\ENABLE7=1 +MOD1\FASTSLEWRATE7=1 +MOD1\SLOWSLEWRATE7=1 +MOD1\ENABLE8=1 +MOD1\FASTSLEWRATE8=1 +MOD1\SLOWSLEWRATE8=1 +MOD1\ENABLE9=1 +MOD1\FASTSLEWRATE9=1 +MOD1\SLOWSLEWRATE9=1 +MOD1\ENABLE10=1 +MOD1\FASTSLEWRATE10=1 +MOD1\SLOWSLEWRATE10=1 +MOD1\ENABLE11=1 +MOD1\FASTSLEWRATE11=1 +MOD1\SLOWSLEWRATE11=1 +MOD1\ENABLE12=1 +MOD1\FASTSLEWRATE12=1 +MOD1\SLOWSLEWRATE12=1 +MOD2\ENABLE1=1 +MOD2\FASTSLEWRATE1=1 +MOD2\SLOWSLEWRATE1=1 +MOD2\ENABLE2=1 +MOD2\FASTSLEWRATE2=1 +MOD2\SLOWSLEWRATE2=1 +MOD2\ENABLE3=1 +MOD2\FASTSLEWRATE3=1 +MOD2\SLOWSLEWRATE3=1 +MOD2\ENABLE4=1 +MOD2\FASTSLEWRATE4=1 +MOD2\SLOWSLEWRATE4=1 +MOD2\ENABLE5=1 +MOD2\FASTSLEWRATE5=1 +MOD2\SLOWSLEWRATE5=1 +MOD2\ENABLE6=1 +MOD2\FASTSLEWRATE6=1 +MOD2\SLOWSLEWRATE6=1 +MOD2\ENABLE7=1 +MOD2\FASTSLEWRATE7=1 +MOD2\SLOWSLEWRATE7=1 +MOD2\ENABLE8=1 +MOD2\FASTSLEWRATE8=1 +MOD2\SLOWSLEWRATE8=1 +MOD2\ENABLE9=1 +MOD2\FASTSLEWRATE9=1 +MOD2\SLOWSLEWRATE9=1 +MOD2\ENABLE10=1 +MOD2\FASTSLEWRATE10=1 +MOD2\SLOWSLEWRATE10=1 +MOD2\ENABLE11=1 +MOD2\FASTSLEWRATE11=1 +MOD2\SLOWSLEWRATE11=1 +MOD2\ENABLE12=1 +MOD2\FASTSLEWRATE12=1 +MOD2\SLOWSLEWRATE12=1 +MOD3\ENABLE1=1 +MOD3\FASTSLEWRATE1=1 +MOD3\SLOWSLEWRATE1=1 +MOD3\ENABLE2=1 +MOD3\FASTSLEWRATE2=1 +MOD3\SLOWSLEWRATE2=1 +MOD3\ENABLE3=1 +MOD3\FASTSLEWRATE3=1 +MOD3\SLOWSLEWRATE3=1 +MOD3\ENABLE4=1 +MOD3\FASTSLEWRATE4=1 +MOD3\SLOWSLEWRATE4=1 +MOD3\ENABLE5=1 +MOD3\FASTSLEWRATE5=1 +MOD3\SLOWSLEWRATE5=1 +MOD3\ENABLE6=1 +MOD3\FASTSLEWRATE6=1 +MOD3\SLOWSLEWRATE6=1 +MOD3\ENABLE7=1 +MOD3\FASTSLEWRATE7=1 +MOD3\SLOWSLEWRATE7=1 +MOD3\ENABLE8=1 +MOD3\FASTSLEWRATE8=1 +MOD3\SLOWSLEWRATE8=1 +MOD3\ENABLE9=1 +MOD3\FASTSLEWRATE9=1 +MOD3\SLOWSLEWRATE9=1 +MOD3\ENABLE10=1 +MOD3\FASTSLEWRATE10=1 +MOD3\SLOWSLEWRATE10=1 +MOD3\ENABLE11=1 +MOD3\FASTSLEWRATE11=1 +MOD3\SLOWSLEWRATE11=1 +MOD3\ENABLE12=1 +MOD3\FASTSLEWRATE12=1 +MOD3\SLOWSLEWRATE12=1 +MOD7\CLAMP1=0.0 +MOD7\CLAMP2=0.0 +MOD7\CLAMP3=1.5 +MOD7\CLAMP4=1.5 +MOD7\PREAMPGAIN=0 +MOD9\HVLC_V1=0 +MOD9\HVLC_ORDER1=0 +MOD9\HVLC_V2=0 +MOD9\HVLC_ORDER2=0 +MOD9\HVLC_V3=3.0 +MOD9\HVLC_ORDER3=0 +MOD9\HVLC_V4=12.0 +MOD9\HVLC_ORDER4=0 +MOD9\HVLC_V5=19 +MOD9\HVLC_ORDER5=0 +MOD9\HVLC_V6=19 +MOD9\HVLC_ORDER6=0 +MOD9\HVLC_V7=19 +MOD9\HVLC_ORDER7=0 +MOD9\HVLC_V8=29 +MOD9\HVLC_ORDER8=0 +MOD9\HVLC_V9=3.5 +MOD9\HVLC_ORDER9=0 +MOD9\HVLC_V10=0 +MOD9\HVLC_ORDER10=0 +MOD9\HVLC_V11=19 +MOD9\HVLC_ORDER11=0 +MOD9\HVLC_V12=30 +MOD9\HVLC_ORDER12=0 +MOD9\HVLC_V13=15 +MOD9\HVLC_ORDER13=0 +MOD9\HVLC_V14=15 +MOD9\HVLC_ORDER14=0 +MOD9\HVLC_V15=1 +MOD9\HVLC_ORDER15=0 +MOD9\HVLC_V16=24 +MOD9\HVLC_ORDER16=0 +MOD9\HVLC_V17=15 +MOD9\HVLC_ORDER17=0 +MOD9\HVLC_V18=1 +MOD9\HVLC_ORDER18=0 +MOD9\HVLC_V19=24 +MOD9\HVLC_ORDER19=0 +MOD9\HVLC_V20=15 +MOD9\HVLC_ORDER20=0 +MOD9\HVLC_V21=24 +MOD9\HVLC_ORDER21=0 +MOD9\HVLC_V22=24 +MOD9\HVLC_ORDER22=0 +MOD9\HVLC_V23=24 +MOD9\HVLC_ORDER23=0 +MOD9\HVLC_V24=15 +MOD9\HVLC_ORDER24=0 +MOD10\HVLC_V1=0 +MOD10\HVLC_ORDER1=0 +MOD9\HVHC_ENABLE1=1 +MOD9\HVHC_V1=15 +MOD9\HVHC_IL1=0 +MOD9\HVHC_ORDER1=0 +MOD9\HVHC_ENABLE2=1 +MOD9\HVHC_V2=15 +MOD9\HVHC_IL2=0 +MOD9\HVHC_ORDER2=0 +MOD9\HVHC_ENABLE3=1 +MOD9\HVHC_V3=15 +MOD9\HVHC_IL3=0 +MOD9\HVHC_ORDER3=0 +MOD9\HVHC_ENABLE4=1 +MOD9\HVHC_V4=15 +MOD9\HVHC_IL4=0 +MOD9\HVHC_ORDER4=0 +MOD9\HVHC_ENABLE5=1 +MOD9\HVHC_V5=15 +MOD9\HVHC_IL5=0 +MOD9\HVHC_ORDER5=0 +MOD9\HVHC_ENABLE6=1 +MOD9\HVHC_V6=15 +MOD9\HVHC_IL6=0 +MOD9\HVHC_ORDER6=0 +MOD12\DIO_SOURCE1=0 +MOD12\DIO_DIR1=0 +MOD12\DIO_SOURCE2=0 +MOD12\DIO_DIR2=0 +MOD12\DIO_SOURCE3=0 +MOD12\DIO_DIR3=0 +MOD12\DIO_SOURCE4=0 +MOD12\DIO_DIR4=0 +MOD12\DIO_POWER=0 +MOD4\XVN_V1=-100 +MOD4\XVN_ORDER1=0 +MOD4\XVN_ENABLE1=1 +STATE0\NAME=STATE000 +STATE0\CONTROL="0,3F" +STATE1\NAME=STATE001 +STATE1\CONTROL="8,37" +STATE2\NAME=STATE002 +STATE2\CONTROL="0,31" +STATE3\NAME=STATE003 +STATE3\CONTROL="1,3E" +STATE4\NAME=STATE004 +STATE4\CONTROL="0,3E" +STATE5\NAME=STATE005 +STATE5\CONTROL="2,3D" +STATE6\NAME=STATE006 +STATE6\CONTROL="4,3B" +STATES=7 +[SYSTEM] +BACKPLANE_ID=0000000000000000 +BACKPLANE_REV=0 +BACKPLANE_TYPE=1 +BACKPLANE_VERSION=0.0.0 +MOD1_ID=0000000000000000 +MOD1_REV=0 +MOD1_VERSION=0.0.0 +MOD1_TYPE=16 +MOD2_ID=0000000000000000 +MOD2_REV=0 +MOD2_VERSION=0.0.0 +MOD2_TYPE=16 +MOD3_ID=0000000000000000 +MOD3_REV=0 +MOD3_VERSION=0.0.0 +MOD3_TYPE=16 +MOD4_ID=0000000000000000 +MOD4_REV=0 +MOD4_VERSION=0.0.0 +MOD4_TYPE=12 +MOD7_ID=0000000000000000 +MOD7_REV=0 +MOD7_VERSION=0.0.0 +MOD7_TYPE=2 +MOD9_ID=0000000000000000 +MOD9_REV=0 +MOD9_VERSION=0.0.0 +MOD9_TYPE=4 +MOD10_ID=0000000000000000 +MOD10_REV=0 +MOD10_VERSION=0.0.0 +MOD10_TYPE=3 +MOD12_ID=0000000000000000 +MOD12_REV=0 +MOD12_VERSION=0.0.0 +MOD12_TYPE=10 +[MODE_DEFAULT] +ARCH:AMPS_PER_CCD_HORI=2 +ARCH:AMPS_PER_CCD_VERT=1 +ARCH:NUM_CCDS=4 From 94f47051ac38cc11b5b30d8d01a82fa0fdd17407 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 6 Jan 2025 11:02:00 -0800 Subject: [PATCH 010/194] Roger comments in waveform and signal; completed mod file --- src/deimos/deimos.def | 4 +- src/deimos/deimos.mod | 186 +++++++++++++++++++++++-------------- src/deimos/deimos.signals | 5 + src/deimos/deimos.waveform | 100 +++++++------------- 4 files changed, 158 insertions(+), 137 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index df3226c..596448c 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -36,7 +36,7 @@ */ #define _SECTIONROWS 2052 /* Number of rows in one section -#defien _SECTIONCOLS 2048 /* Number of columns in one section +#define _SECTIONCOLS 2048 /* Number of columns in one section /* #define _CDS_WIDTH 10 /* width of each CDS integration component in clocks */ #define _SKIP_LINES 0 #define _SERIALPRESCAN 50 @@ -61,6 +61,8 @@ */ #define Pixel_T 100 /* Full pixel time : 10s of ns */ + +/* TODO CLARIFY VLAYES FOR RG AND SW settling time */ #define RG_settleT 17 /*32*/ /* Settling Time for the reset gate 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ #define SW_settleT 16 /*32*/ /* Settling Time for charge dump 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 925ed3f..490cb16 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -1,50 +1,70 @@ #define temp 1 +/* Fast and Slow slew rates are defined here */ +/* A boolean is set during a SET..TO command */ +/* to select between fast and slow slew rate */ + +#define SCLK_fast 500 /* Evaluate Expression */ +#define SCLK_slow 100 /* Evaluate Expression */ +#define PCLK_fast 10 +#define PCLK_slow 1 +#define SW_fast 500 /* Evaluate Expression */ +#define SW_slow 100 /* Evaluate Expression */ +#define TG_fast 500 /* Evaluate Expression? */ +#define TG_slow 100 /* Evaluate Expression? */ + SLOT 1 driverx { - DRVX 1 [temp,1,1]; - DRVX 2 [temp,1,1]; - DRVX 3 [temp,1,1]; - DRVX 4 [temp,1,1]; - DRVX 5 [temp,1,1]; - DRVX 6 [temp,1,1]; - DRVX 7 [temp,1,1]; - DRVX 8 [temp,1,1]; - DRVX 9 [temp,1,1]; - DRVX 10 [temp,1,1]; - DRVX 11 [temp,1,1]; - DRVX 12 [temp,1,1]; + DRVX 1 [PCLK_fast,PCLK_slow,1]; + DRVX 2 [PCLK_fast,PCLK_slow,1]; + DRVX 3 [PCLK_fast,PCLK_slow,1]; + DRVX 4 [PCLK_fast,PCLK_slow,1]; + DRVX 5 [PCLK_fast,PCLK_slow,1]; + DRVX 6 [PCLK_fast,PCLK_slow,1]; + DRVX 7 [PCLK_fast,PCLK_slow,1]; + DRVX 8 [PCLK_fast,PCLK_slow,1]; + DRVX 9 [PCLK_fast,PCLK_slow,1]; + DRVX 10 [PCLK_fast,PCLK_slow,1]; + DRVX 11 [PCLK_fast,PCLK_slow,1]; + DRVX 12 [PCLK_fast,PCLK_slow,1]; } SLOT 2 driverx { - DRVX 1 [temp,1,1]; - DRVX 2 [temp,1,1]; - DRVX 3 [temp,1,1]; - DRVX 4 [temp,1,1]; - DRVX 5 [temp,1,1]; - DRVX 6 [temp,1,1]; - DRVX 7 [temp,1,1]; - DRVX 8 [temp,1,1]; - DRVX 9 [temp,1,1]; - DRVX 10 [temp,1,1]; - DRVX 11 [temp,1,1]; - DRVX 12 [temp,1,1]; + DRVX 1 [TG_fast,TG_slow,1]; + DRVX 2 [SCLK_fast,SCLK_slow,1]; + DRVX 3 [SCLK_fast,SCLK_slow,1]; + DRVX 4 [SCLK_fast,SCLK_slow,1]; + DRVX 5 [SCLK_fast,SCLK_slow,1]; + DRVX 6 [SCLK_fast,SCLK_slow,1]; + DRVX 7 [1,1,0]; + DRVX 8 [1,1,0]; + DRVX 9 [1,1,0]; + DRVX 10 [1,1,0]; + DRVX 11 [1,1,0]; + DRVX 12 [1,1,0]; } SLOT 3 driverx { - DRVX 1 [temp,1,1]; - DRVX 2 [temp,1,1]; - DRVX 3 [temp,1,1]; - DRVX 4 [temp,1,1]; - DRVX 5 [temp,1,1]; - DRVX 6 [temp,1,1]; - DRVX 7 [temp,1,1]; - DRVX 8 [temp,1,1]; - DRVX 9 [temp,1,1]; - DRVX 10 [temp,1,1]; - DRVX 11 [temp,1,1]; - DRVX 12 [temp,1,1]; + DRVX 1 [1,1,0]; + DRVX 2 [1,1,0]; + DRVX 3 [1,1,0]; + DRVX 4 [1,1,0]; + DRVX 5 [1,1,0]; + DRVX 6 [1,1,0]; + DRVX 7 [1,1,0]; + DRVX 8 [1,1,0]; + DRVX 9 [1,1,0]; + DRVX 10 [1,1,0]; + DRVX 11 [1,1,0]; + DRVX 12 [1,1,0]; } SLOT 4 xvbias { - NBIAS 1 [0,-100]; + PBIAS 1 [0,0]; + PBIAS 2 [0,0]; + PBIAS 3 [0,0]; + PBIAS 4 [0,0]; + NBIAS 1 [0,-100] "SCI Backside "; + NBIAS 2 [0,0]; + NBIAS 3 [0,0]; + NBIAS 4 [0,0]; } /* review */ SLOT 7 ad { @@ -56,42 +76,70 @@ SLOT 7 ad { } SLOT 9 hvbias { - HVLC 1 [0,0]; /* Unused */ - HVLC 2 [0,0]; /* Guard Drain SCI */ - HVLC 3 [3.0,0]; /* Reset Drain E SCI */ - HVLC 4 [12.0,0]; /* Reset Drain F SCI */ - HVLC 5 [19,0]; /* */ - HVLC 6 [19,0]; /* Reset Drain A 1 FCS */ - HVLC 7 [19,0]; /* Reset Drain B 1 FCS */ - HVLC 8 [29,0]; /* Reset Drain A 2 FCS */ - HVLC 9 [3.5,0]; /* Reset Drain B 2 FCS */ - HVLC 10 [0,0]; /* Overflow Drain FCS */ - HVLC 11 [19,0]; /* */ - HVLC 12 [30,0]; /* */ - HVLC 13 [15,0]; /* */ - HVLC 14 [15,0]; /* */ - HVLC 15 [1,0]; /* */ - HVLC 16 [24,0]; /* */ - HVLC 17 [15,0]; /* */ - HVLC 18 [1,0]; /* */ - HVLC 19 [24,0]; /* */ - HVLC 20 [15,0]; /* */ - HVLC 21 [24,0]; /* */ - HVLC 22 [24,0]; /* */ - HVLC 23 [24,0]; /* */ - HVLC 24 [15,0]; /* */ - HVHC 1 [15,0,0,1]; /* Output Drain E SCI */ - HVHC 2 [15,0,0,1]; /* Output Drain F SCI */ - HVHC 3 [15,0,0,1]; /* Output Drain A 1 FCS */ - HVHC 4 [15,0,0,1]; /* Output Drain B 1 FCS */ - HVHC 5 [15,0,0,1]; /* Output Drain A 2 FCS */ - HVHC 6 [15,0,0,1]; /* Output Drain B 2 FCS */ + HVLC 1 [0.00,0]; /* Unused */ + HVLC 2 [20.0,0] "SCI Guard Drain" ; /* Guard Drain SCI */ + HVLC 3 [0.00,0]; /* Unused */ + HVLC 4 [0.00,0]; /* Unused */ + HVLC 5 [17.0,0] "SCI E Reset Drain"; /* Reset Drain E SCI */ + HVLC 6 [17.0,0] "SCI F Reset Drain"; /* Reset Drain F SCI */ + HVLC 7 [0.00,0]; /* Unused */ + HVLC 8 [0.00,0]; /* Reset Drain A 1 FCS */ + HVLC 9 [0.00,0]; /* Reset Drain B 1 FCS */ + HVLC 10 [0.00,0]; /* Reset Drain A 2 FCS */ + HVLC 11 [0.00,0]; /* Reset Drain B 2 FCS */ + HVLC 12 [0.00,0]; /* Overflow Drain FCS */ + HVLC 13 [0.00,0]; /* */ + HVLC 14 [0.00,0]; /* */ + HVLC 15 [0.00,0]; /* */ + HVLC 16 [0.00,0]; /* */ + HVLC 17 [0.00,0]; /* */ + HVLC 18 [0.00,0]; /* */ + HVLC 19 [0.00,0]; /* */ + HVLC 20 [0.00,0]; /* */ + HVLC 21 [0.00,0]; /* */ + HVLC 22 [0.00,0]; /* */ + HVLC 23 [0.00,0]; /* */ + HVLC 24 [0.00,0]; /* */ + HVHC 1 [29.0,0.1,0,1] "SCI E Output Drain "; /* Output Drain E SCI */ + HVHC 2 [29.0,0.1,0,1] "SCI F Output Drain "; /* Output Drain F SCI */ + HVHC 3 [0.00,0.1,0,0]; /* Output Drain A 1 FCS */ + HVHC 4 [0.00,0.1,0,0]; /* Output Drain B 1 FCS */ + HVHC 5 [0.00,0.1,0,0]; /* Output Drain A 2 FCS */ + HVHC 6 [0.00,0.1,0,0]; /* Output Drain B 2 FCS */ } SLOT 10 lvbias { - HVLC 1 [0,0]; /* Unused */ - + LVLC 1 [0.00,0]; /* Unused */ + LVLC 2 [20.0,0]; /* Unused */ + LVLC 3 [3.00,0] "SCI E Output Gate"; /* SCI E Output Gate */ + LVLC 4 [3.00,0] "SCI F Output Gate"; /* SCI F Output Gate */ + LVLC 5 [1.00,0] "SCI Summing Well - Low"; /* SCI Summing Well - Low */ + LVLC 6 [12.0,0] "SCI Summing Well - High"; /* SCI Summing Well - High */ + LVLC 7 [1.00,0] "SCI Reset Gate - Low"; /* SCI Reset Gate - Low */ + LVLC 8 [12.0,0] "SCI Reset Gate - High"; /* SCI Reset Gate - High */ + LVLC 9 [0.00,0]; /* Unused */ + LVLC 10 [0.00,0]; /* FCS A 1 Last Gate */ + LVLC 11 [0.00,0]; /* FCS B 1 Last Gate */ + LVLC 12 [0.00,0]; /* FCS A 2 Last Gate */ + LVLC 13 [0.00,0]; /* FCS B 2 Last Gate */ + LVLC 14 [0.00,0]; /* Unused */ + LVLC 15 [0.00,0]; /* FCS Summing Well - Low */ + LVLC 16 [0.00,0]; /* FCS Summing Well - High */ + LVLC 17 [0.00,0]; /* Unused */ + LVLC 18 [0.00,0]; /* FCS Reset Gate - Low */ + LVLC 19 [0.00,0]; /* FCS Reset Gate - High */ + LVLC 20 [0.00,0]; /* Unused */ + LVLC 21 [0.00,0]; /* Unused */ + LVLC 22 [0.00,0]; /* FCS Video Offset */ + LVLC 23 [0.00,0]; /* SCI Video Offset */ + LVLC 24 [0.00,0]; /* */ + LVHC 1 [0.00,0.0,0,0]; /* */ + LVHC 2 [0.00,0.0,0,0]; /* */ + LVHC 3 [0.00,0.0,0,0]; /* */ + LVHC 4 [0.00,0.0,0,0]; /* */ + LVHC 5 [0.00,0.0,0,0]; /* */ + LVHC 6 [0.00,0.0,0,0]; /* */ } SLOT 12 lvds { diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 4146874..e7f2a5e 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -96,3 +96,8 @@ #endif /* Reset Gate Combine */ #define RG [ RG_1, RG_2] + +/* Science Parallels */ +#define sci_parallel1 [PP_A1_1, PP_A1_2, PP_B1_1, PP_B1_2] +#define sci_parallel2 [PP_A2_1, PP_A2_2, PP_B2_1, PP_B2_2] +#define sci_parallel3 [PP_A3_1, PP_A3_2, PP_B3_1, PP_B3_2] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index f3c98d9..c361104 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -56,6 +56,13 @@ #define TWX 170 ns /* Reset Pulse Width */ #define TOR 130 ns /* Serial Clock Overlap */ +/*****************************************/ +/* Serial Clock Slew Rate */ +/*****************************************/ +/* Usually defined in .def */ +#define _SER_CLOCK_SLEW_SLOW #eval (_SER_CLOCK_HIGH-_SER_CLOCK_LOW)/(T_Pixel/3) + + /*****************************************/ /* LOGIC STATES */ /*****************************************/ @@ -63,32 +70,20 @@ #define CLOSE 0 #define HIGH 1 #define LOW 0 - - - +#define FAST 1 +#define SLOW 0 WAVEFORM LineTransfer { - /* wLine done in sequence 0: - .+TDRT: SET TG TO _TG_CLOCK_HIGH, SLOW; - .+TOI: SET CD3 TO _PAR_CLOCK_LOW, SLOW; - SET AB2 TO _PAR_CLOCK_LOW, SLOW; - .+TOI: SET CD4 TO _PAR_CLOCK_HIGH, SLOW; - SET AB1 TO _PAR_CLOCK_HIGH, SLOW; - .+TOI: SET CD2 TO _PAR_CLOCK_LOW, SLOW; - SET AB3 TO _PAR_CLOCK_LOW, SLOW; - .+TOI: SET CD3 TO _PAR_CLOCK_HIGH, SLOW; - SET AB2 TO _PAR_CLOCK_HIGH, SLOW; - .+TOI: SET CD1 TO _PAR_CLOCK_LOW, SLOW; - SET AB4 TO _PAR_CLOCK_LOW, SLOW; - SET TG TO _TG_CLOCK_LOW, SLOW; - .+TOI: SET CD2 TO _PAR_CLOCK_HIGH, SLOW; - SET AB3 TO _PAR_CLOCK_HIGH, SLOW; - .+TOI: SET CD4 TO _PAR_CLOCK_LOW, SLOW; - SET AB1 TO _PAR_CLOCK_LOW, SLOW; - .+TOI: SET CD1 TO _PAR_CLOCK_HIGH, SLOW; - SET AB4 TO _PAR_CLOCK_HIGH, SLOW; - */ + .+TDRT: SET TG TO _TG_CLOCK_HIGH , SLOW; + SET sci_parallel3 TO _PAR_CLOCK_HIGH, SLOW; + .+TOI: SET sci_parallel2 TO _PAR_CLOCK_LOW , SLOW; + .+TOI: SET sci_parallel1 TO _PAR_CLOCK_HIGH, SLOW; + .+TOI: SET TG TO _TG_CLOCK_LOW , SLOW; + SET sci_parallel3 TO _PAR_CLOCK_LOW , SLOW; + .+TOI: SET sci_parallel2 TO _PAR_CLOCK_HIGH, SLOW; + .+TOI: SET sci_parallel1 TO _PAR_CLOCK_LOW , SLOW; + .+TDRT: RETURN; } WAVEFORM wPixel { @@ -97,17 +92,19 @@ WAVEFORM wPixel { .+TICK: SET PIXEL TO LOW; SET FRAME TO LOW; SET LINE TO LOW; + /* Starts at beginning of waveform */ 0: SET RG_1 TO HIGH; - TWX: SET RG_2 TO LOW; + .+TWX: SET RG_2 TO LOW; /* Do something with summing well (following RG) */ -/* Do something with serial clocks (starting at 0:) */ - 0: SET sci_serial1 TO HIGH; - SET sci_serial3 TO LOW; - .+TOR: SET sci_serial2 TO HIGH; - .+TOR: SET sci_serial1 TO LOW; - SET sci_serial3 TO HIGH; - .+TOR: RETURN; + +/* Starts at beginning of waveform */ + 0: SET sci_serial1 TO HIGH, SLOW; + SET sci_serial3 TO LOW , SLOW; + .+T_Pixel/3: SET sci_serial2 TO HIGH, SLOW; + .+T_Pixel/3: SET sci_serial1 TO LOW , SLOW; + SET sci_serial3 TO HIGH, SLOW; + .+T_Pixel/3: RETURN; } /*****************************************/ @@ -141,9 +138,6 @@ WAVEFORM Wait1us { .+1us: SET NOP TO HIGH; } - - - /*****************************************/ /* ARCHON control signal waveforms */ /*****************************************/ @@ -166,39 +160,11 @@ WAVEFORM wPixel { SET FRAME TO LOW; SET LINE TO LOW; } -/* Where are these defined??*/ + WAVEFORM AD_Clamp { -/* 0: SET AD1 TO HIGH; - SET AD2 TO HIGH; - SET AD3 TO HIGH; - SET AD4 TO HIGH; - SET AD5 TO HIGH; - SET AD6 TO HIGH; - SET AD7 TO HIGH; - SET AD8 TO HIGH; - SET AD11 TO HIGH; - SET AD12 TO HIGH; - SET AD13 TO HIGH; - SET AD14 TO HIGH; - SET AD15 TO HIGH; - SET AD16 TO HIGH; - SET AD18 TO HIGH; -*/} + 0: SET AD7 TO HIGH; +} WAVEFORM AD_Clamp_ { -/* 0: SET AD1 TO LOW; - SET AD2 TO LOW; - SET AD3 TO LOW; - SET AD4 TO LOW; - SET AD5 TO LOW; - SET AD6 TO LOW; - SET AD7 TO LOW; - SET AD8 TO LOW; - SET AD11 TO LOW; - SET AD12 TO LOW; - SET AD13 TO LOW; - SET AD14 TO LOW; - SET AD15 TO LOW; - SET AD16 TO LOW; - SET AD18 TO LOW; -*/} + 0: SET AD7 TO LOW; +} From ae12ca1abe7f17c70ad5c6f755b3989f816c8aa8 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 6 Jan 2025 11:17:36 -0800 Subject: [PATCH 011/194] added NOP to beginning of line transfer; to be fixed --- src/deimos/deimos.waveform | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index c361104..973ea5e 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -74,7 +74,7 @@ #define SLOW 0 WAVEFORM LineTransfer { - 0: + 0: SET NOP TO 0,0; /*Need to define behaviour before transfer gate */ .+TDRT: SET TG TO _TG_CLOCK_HIGH , SLOW; SET sci_parallel3 TO _PAR_CLOCK_HIGH, SLOW; .+TOI: SET sci_parallel2 TO _PAR_CLOCK_LOW , SLOW; From cd76a6af6efb6c4c9dbae54c624693483cce3de3 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 6 Jan 2025 11:19:03 -0800 Subject: [PATCH 012/194] minor fix to set slew to SLOW (does not work if manually set to zero) --- src/deimos/deimos.waveform | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 973ea5e..885b372 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -74,7 +74,7 @@ #define SLOW 0 WAVEFORM LineTransfer { - 0: SET NOP TO 0,0; /*Need to define behaviour before transfer gate */ + 0: SET NOP TO 0,SLOW; /*Need to define behaviour before transfer gate */ .+TDRT: SET TG TO _TG_CLOCK_HIGH , SLOW; SET sci_parallel3 TO _PAR_CLOCK_HIGH, SLOW; .+TOI: SET sci_parallel2 TO _PAR_CLOCK_LOW , SLOW; From 6830c6c9bd8ce6a51f28af94ed5e1369e6d0b9c0 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Tue, 7 Jan 2025 14:44:48 -0800 Subject: [PATCH 013/194] minor edits to debug not compiling; still not compiling --- src/deimos/Makefile | 6 +++--- src/deimos/deimos.def | 8 ++++---- src/deimos/deimos.seq | 4 ++-- src/deimos/deimos.waveform | 24 +++++++++++------------- 4 files changed, 20 insertions(+), 22 deletions(-) diff --git a/src/deimos/Makefile b/src/deimos/Makefile index a1eb030..6d8e5d1 100644 --- a/src/deimos/Makefile +++ b/src/deimos/Makefile @@ -50,7 +50,7 @@ WDLPATH = $(HOME)/Software/wdl/wdl/ # output for *.acf file ACFPATH = $(HOME)/Software/wdlfiles/src/deimos/ -PLOT = False # True # show waveform plots by default, True | False +PLOT = True # True # show waveform plots by default, True | False GFLAGS = +c "/*" "*/" +c "//" "\n" +c "\\\n" "" SEQPARSER = $(WDLPATH)/seqParserDriver.py INCPARSER = $(WDLPATH)/incParserDriver.py @@ -107,8 +107,8 @@ generate_wdl: @cat $(MODFILE) | $(GPP) $(GFLAGS) $(INCL) | $(MODPARSER) - $(call debug_message, "Processed MODULE_FILE: $(MODFILE)") - # @$(WAVGEN) $(F_TMP) $(PLOT) || { echo "Waveform generation failed"; exit 1; } - # $(call debug_message, "Finished waveform generation for $(F_TMP) with plot: $(PLOT)") + @$(WAVGEN) $(F_TMP) $(PLOT) || { echo "Waveform generation failed"; exit 1; } + $(call debug_message, "Finished waveform generation for $(F_TMP) with plot: $(PLOT)") # Rule for generating script states generate_script_states: diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 596448c..914bed8 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -88,11 +88,11 @@ #define _OUTPUT_GATE 3 /* [ 0.50, 4.00] */ -#define _SW_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ -#define _SW_CLOCK_LOW 1 /* [-0.50, 1.50] */ +#define _SW_CLOCK_HIGH 3.3 /* Gate driven see .mod for voltage def */ +#define _SW_CLOCK_LOW 0.0 -#define _RG_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ -#define _RG_CLOCK_LOW 0 /* [-0.50, 0.50] */ +#define _RG_CLOCK_HIGH 3.3 /* Gate driven see .mod for voltage def */ +#define _RG_CLOCK_LOW 0.0 #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 4f2069c..409f31a 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -67,7 +67,7 @@ SEQUENCE ScienceReadout { } SEQUENCE ScienceLineRead{ - LineTransfer(); + /*LineTransfer(); wLine(); /* Initialize Serial Clocks */ /* Flush desired number of post pixels */ @@ -84,7 +84,7 @@ SEQUENCE ScienceLineRead{ Wait1us(); OS_Clamp_(); AD_Clamp_(); - return; + return;*/ } SEQUENCE BiasInit { diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 885b372..eff5111 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -42,7 +42,7 @@ #define 10us #eval 10 us #define 20us #eval 20 us #define 25us #eval 25 us -/* #define 1ms #eval 99999 clicks /* 999 usec */ /* WHY */ +/* #define 1ms #eval 99999 clicks /* 999 usec WHY */ #define 10ms #eval 10 ms @@ -60,7 +60,7 @@ /* Serial Clock Slew Rate */ /*****************************************/ /* Usually defined in .def */ -#define _SER_CLOCK_SLEW_SLOW #eval (_SER_CLOCK_HIGH-_SER_CLOCK_LOW)/(T_Pixel/3) +#define _SER_CLOCK_SLEW_SLOW #eval (_SER_CLOCK_HIGH-_SER_CLOCK_LOW)/(Pixel_T/3) /*****************************************/ @@ -70,8 +70,6 @@ #define CLOSE 0 #define HIGH 1 #define LOW 0 -#define FAST 1 -#define SLOW 0 WAVEFORM LineTransfer { 0: SET NOP TO 0,SLOW; /*Need to define behaviour before transfer gate */ @@ -94,17 +92,17 @@ WAVEFORM wPixel { SET LINE TO LOW; /* Starts at beginning of waveform */ - 0: SET RG_1 TO HIGH; - .+TWX: SET RG_2 TO LOW; + 0: SET RG TO HIGH; + .+TWX: SET RG TO LOW; /* Do something with summing well (following RG) */ /* Starts at beginning of waveform */ 0: SET sci_serial1 TO HIGH, SLOW; SET sci_serial3 TO LOW , SLOW; - .+T_Pixel/3: SET sci_serial2 TO HIGH, SLOW; - .+T_Pixel/3: SET sci_serial1 TO LOW , SLOW; + .+Pixel_T/3: SET sci_serial2 TO HIGH, SLOW; + .+Pixel_T/3: SET sci_serial1 TO LOW , SLOW; SET sci_serial3 TO HIGH, SLOW; - .+T_Pixel/3: RETURN; + .+Pixel_T/3: RETURN; } /*****************************************/ @@ -112,20 +110,20 @@ WAVEFORM wPixel { /*****************************************/ WAVEFORM wReset { - 0: SET RG TO _RG_CLOCK_HIGH; + 0: SET RG TO _RG_CLOCK_HIGH; } WAVEFORM wUnsetReset { - 0: SET RG TO _RG_CLOCK_LOW; + 0: SET RG TO _RG_CLOCK_LOW; } WAVEFORM OS_Clamp { - SET AC_Clamp TO HIGH; + 0: SET AC_Clamp TO HIGH; } WAVEFORM OS_Clamp_ { - SET AC_Clamp TO LOW; + 0: SET AC_Clamp TO LOW; } From 8da86d4904e9e33102bc14ffff2457392b415abc Mon Sep 17 00:00:00 2001 From: j-bichel Date: Tue, 7 Jan 2025 17:21:25 -0800 Subject: [PATCH 014/194] refactored changes since last compilation and now the parser is comiling --- src/deimos/Makefile | 4 +- src/deimos/deimos.mod | 187 +++++++++++++++++++++++-------------- src/deimos/deimos.signals | 7 +- src/deimos/deimos.waveform | 130 +++++++++----------------- 4 files changed, 169 insertions(+), 159 deletions(-) diff --git a/src/deimos/Makefile b/src/deimos/Makefile index a1eb030..79e412e 100644 --- a/src/deimos/Makefile +++ b/src/deimos/Makefile @@ -107,8 +107,8 @@ generate_wdl: @cat $(MODFILE) | $(GPP) $(GFLAGS) $(INCL) | $(MODPARSER) - $(call debug_message, "Processed MODULE_FILE: $(MODFILE)") - # @$(WAVGEN) $(F_TMP) $(PLOT) || { echo "Waveform generation failed"; exit 1; } - # $(call debug_message, "Finished waveform generation for $(F_TMP) with plot: $(PLOT)") + @$(WAVGEN) $(F_TMP) $(PLOT) || { echo "Waveform generation failed"; exit 1; } + $(call debug_message, "Finished waveform generation for $(F_TMP) with plot: $(PLOT)") # Rule for generating script states generate_script_states: diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 925ed3f..412f8d0 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -1,50 +1,69 @@ -#define temp 1 +/* Fast and Slow slew rates are defined here */ +/* A boolean is set during a SET..TO command */ +/* to select between fast and slow slew rate */ + + +/* Expressions to be determined */ +#define SCLK_fast 500 +#define SCLK_slow 100 +#define PCLK_fast 10 +#define PCLK_slow 1 +#define SW_fast 500 +#define SW_slow 100 +#define TG_fast 500 +#define TG_slow 100 SLOT 1 driverx { - DRVX 1 [temp,1,1]; - DRVX 2 [temp,1,1]; - DRVX 3 [temp,1,1]; - DRVX 4 [temp,1,1]; - DRVX 5 [temp,1,1]; - DRVX 6 [temp,1,1]; - DRVX 7 [temp,1,1]; - DRVX 8 [temp,1,1]; - DRVX 9 [temp,1,1]; - DRVX 10 [temp,1,1]; - DRVX 11 [temp,1,1]; - DRVX 12 [temp,1,1]; + DRVX 1 [PCLK_fast,PCLK_slow,1]; + DRVX 2 [PCLK_fast,PCLK_slow,1]; + DRVX 3 [PCLK_fast,PCLK_slow,1]; + DRVX 4 [PCLK_fast,PCLK_slow,1]; + DRVX 5 [PCLK_fast,PCLK_slow,1]; + DRVX 6 [PCLK_fast,PCLK_slow,1]; + DRVX 7 [PCLK_fast,PCLK_slow,1]; + DRVX 8 [PCLK_fast,PCLK_slow,1]; + DRVX 10 [PCLK_fast,PCLK_slow,1]; + DRVX 11 [PCLK_fast,PCLK_slow,1]; + DRVX 12 [PCLK_fast,PCLK_slow,1]; } SLOT 2 driverx { - DRVX 1 [temp,1,1]; - DRVX 2 [temp,1,1]; - DRVX 3 [temp,1,1]; - DRVX 4 [temp,1,1]; - DRVX 5 [temp,1,1]; - DRVX 6 [temp,1,1]; - DRVX 7 [temp,1,1]; - DRVX 8 [temp,1,1]; - DRVX 9 [temp,1,1]; - DRVX 10 [temp,1,1]; - DRVX 11 [temp,1,1]; - DRVX 12 [temp,1,1]; + DRVX 1 [TG_fast,TG_slow,1]; + DRVX 2 [SCLK_fast,SCLK_slow,1]; + DRVX 3 [SCLK_fast,SCLK_slow,1]; + DRVX 4 [SCLK_fast,SCLK_slow,1]; + DRVX 5 [SCLK_fast,SCLK_slow,1]; + DRVX 6 [SCLK_fast,SCLK_slow,1]; + DRVX 7 [1,1,0]; + DRVX 8 [1,1,0]; + DRVX 9 [1,1,0]; + DRVX 10 [1,1,0]; + DRVX 11 [1,1,0]; + DRVX 12 [1,1,0]; } SLOT 3 driverx { - DRVX 1 [temp,1,1]; - DRVX 2 [temp,1,1]; - DRVX 3 [temp,1,1]; - DRVX 4 [temp,1,1]; - DRVX 5 [temp,1,1]; - DRVX 6 [temp,1,1]; - DRVX 7 [temp,1,1]; - DRVX 8 [temp,1,1]; - DRVX 9 [temp,1,1]; - DRVX 10 [temp,1,1]; - DRVX 11 [temp,1,1]; - DRVX 12 [temp,1,1]; + DRVX 1 [1,1,0]; + DRVX 2 [1,1,0]; + DRVX 3 [1,1,0]; + DRVX 4 [1,1,0]; + DRVX 5 [1,1,0]; + DRVX 6 [1,1,0]; + DRVX 7 [1,1,0]; + DRVX 8 [1,1,0]; + DRVX 9 [1,1,0]; + DRVX 10 [1,1,0]; + DRVX 11 [1,1,0]; + DRVX 12 [1,1,0]; } SLOT 4 xvbias { - NBIAS 1 [0,-100]; + PBIAS 1 [0,0]; + PBIAS 2 [0,0]; + PBIAS 3 [0,0]; + PBIAS 4 [0,0]; + NBIAS 1 [0,-100] "SCI Backside"; + NBIAS 2 [0,-0]; + NBIAS 3 [0,-0]; + NBIAS 4 [0,-0]; } /* review */ SLOT 7 ad { @@ -56,42 +75,70 @@ SLOT 7 ad { } SLOT 9 hvbias { - HVLC 1 [0,0]; /* Unused */ - HVLC 2 [0,0]; /* Guard Drain SCI */ - HVLC 3 [3.0,0]; /* Reset Drain E SCI */ - HVLC 4 [12.0,0]; /* Reset Drain F SCI */ - HVLC 5 [19,0]; /* */ - HVLC 6 [19,0]; /* Reset Drain A 1 FCS */ - HVLC 7 [19,0]; /* Reset Drain B 1 FCS */ - HVLC 8 [29,0]; /* Reset Drain A 2 FCS */ - HVLC 9 [3.5,0]; /* Reset Drain B 2 FCS */ - HVLC 10 [0,0]; /* Overflow Drain FCS */ - HVLC 11 [19,0]; /* */ - HVLC 12 [30,0]; /* */ - HVLC 13 [15,0]; /* */ - HVLC 14 [15,0]; /* */ - HVLC 15 [1,0]; /* */ - HVLC 16 [24,0]; /* */ - HVLC 17 [15,0]; /* */ - HVLC 18 [1,0]; /* */ - HVLC 19 [24,0]; /* */ - HVLC 20 [15,0]; /* */ - HVLC 21 [24,0]; /* */ - HVLC 22 [24,0]; /* */ - HVLC 23 [24,0]; /* */ - HVLC 24 [15,0]; /* */ - HVHC 1 [15,0,0,1]; /* Output Drain E SCI */ - HVHC 2 [15,0,0,1]; /* Output Drain F SCI */ - HVHC 3 [15,0,0,1]; /* Output Drain A 1 FCS */ - HVHC 4 [15,0,0,1]; /* Output Drain B 1 FCS */ - HVHC 5 [15,0,0,1]; /* Output Drain A 2 FCS */ - HVHC 6 [15,0,0,1]; /* Output Drain B 2 FCS */ + HVLC 1 [0.00,0]; + HVLC 2 [20.0,0] "SCI Guard Drain"; + HVLC 3 [0.00,0]; + HVLC 4 [0.00,0]; + HVLC 5 [17.0,0] "SCI E Reset Drain"; + HVLC 6 [17.0,0] "SCI F Reset Drain"; + HVLC 7 [0.00,0]; + HVLC 8 [0.00,0]; + HVLC 9 [0.00,0]; + HVLC 10 [0.00,0]; + HVLC 11 [0.00,0]; + HVLC 12 [0.00,0]; + HVLC 13 [0.00,0]; + HVLC 14 [0.00,0]; + HVLC 15 [0.00,0]; + HVLC 16 [0.00,0]; + HVLC 17 [0.00,0]; + HVLC 18 [0.00,0]; + HVLC 19 [0.00,0]; + HVLC 20 [0.00,0]; + HVLC 21 [0.00,0]; + HVLC 22 [0.00,0]; + HVLC 23 [0.00,0]; + HVLC 24 [0.00,0]; + HVHC 1 [29.0,0.1,0,1] "SCI E Output Drain"; + HVHC 2 [29.0,0.1,0,1] "SCI F Output Drain"; + HVHC 3 [29.0,0.0,0,0]; + HVHC 4 [29.0,0.0,0,0]; + HVHC 5 [29.0,0.0,0,0]; + HVHC 6 [29.0,0.0,0,0]; } SLOT 10 lvbias { - HVLC 1 [0,0]; /* Unused */ - + LVLC 1 [00.0,0]; + LVLC 2 [00.0,0]; + LVLC 3 [3.00,0] "SCI E Output Gate"; + LVLC 4 [3.00,0] "SCI F Output Gate"; + LVLC 5 [1.00,0] "SCI Summing Well - Low"; + LVLC 6 [12.0,0] "SCI Summing Well - High"; + LVLC 7 [1.00,0] "SCI Reset Gate - Low"; + LVLC 8 [12.0,0] "SCI Reset Gate - High"; + LVLC 9 [00.0,0]; + LVLC 10 [00.0,0]; + LVLC 11 [00.0,0]; + LVLC 12 [00.0,0]; + LVLC 13 [00.0,0]; + LVLC 14 [00.0,0]; + LVLC 15 [00.0,0]; + LVLC 16 [00.0,0]; + LVLC 17 [00.0,0]; + LVLC 18 [00.0,0]; + LVLC 19 [00.0,0]; + LVLC 20 [00.0,0]; + LVLC 21 [00.0,0]; + LVLC 22 [00.0,0]; + LVLC 23 [00.0,0]; + LVLC 24 [00.0,0]; + LVHC 1 [0.00,0.0,0,0]; + LVHC 2 [0.00,0.0,0,0]; + LVHC 3 [0.00,0.0,0,0]; + LVHC 4 [0.00,0.0,0,0]; + LVHC 5 [0.00,0.0,0,0]; + LVHC 6 [0.00,0.0,0,0]; } SLOT 12 lvds { diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 4146874..d967851 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -95,4 +95,9 @@ #define sci_serial3 SP_EF #endif /* Reset Gate Combine */ -#define RG [ RG_1, RG_2] +#define RG [RG_1, RG_2] + +/* Science Parallels */ +#define sci_parallel1 [PP_A1_1, PP_A1_2, PP_B1_1, PP_B1_2] +#define sci_parallel2 [PP_A2_1, PP_A2_2, PP_B2_1, PP_B2_2] +#define sci_parallel3 [PP_A3_1, PP_A3_2, PP_B3_1, PP_B3_2] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index f3c98d9..36e00b8 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -59,55 +59,42 @@ /*****************************************/ /* LOGIC STATES */ /*****************************************/ -#define OPEN 1 -#define CLOSE 0 -#define HIGH 1 -#define LOW 0 - - - +#define OPEN 1 +#define CLOSE 0 +#define HIGH 1 +#define LOW 0 WAVEFORM LineTransfer { - /* wLine done in sequence - 0: - .+TDRT: SET TG TO _TG_CLOCK_HIGH, SLOW; - .+TOI: SET CD3 TO _PAR_CLOCK_LOW, SLOW; - SET AB2 TO _PAR_CLOCK_LOW, SLOW; - .+TOI: SET CD4 TO _PAR_CLOCK_HIGH, SLOW; - SET AB1 TO _PAR_CLOCK_HIGH, SLOW; - .+TOI: SET CD2 TO _PAR_CLOCK_LOW, SLOW; - SET AB3 TO _PAR_CLOCK_LOW, SLOW; - .+TOI: SET CD3 TO _PAR_CLOCK_HIGH, SLOW; - SET AB2 TO _PAR_CLOCK_HIGH, SLOW; - .+TOI: SET CD1 TO _PAR_CLOCK_LOW, SLOW; - SET AB4 TO _PAR_CLOCK_LOW, SLOW; - SET TG TO _TG_CLOCK_LOW, SLOW; - .+TOI: SET CD2 TO _PAR_CLOCK_HIGH, SLOW; - SET AB3 TO _PAR_CLOCK_HIGH, SLOW; - .+TOI: SET CD4 TO _PAR_CLOCK_LOW, SLOW; - SET AB1 TO _PAR_CLOCK_LOW, SLOW; - .+TOI: SET CD1 TO _PAR_CLOCK_HIGH, SLOW; - SET AB4 TO _PAR_CLOCK_HIGH, SLOW; - */ + /* INITIAL STATE NEEDS TO BE DEFINED + 0: SET NOP TO HIGH; + .+TDRT: SET TG TO _TG_CLOCK_HIGH, SLOW; + SET sci_parallel3 TO _PAR_CLOCK_HIGH, SLOW; + .+TOI: SET sci_parallel2 TO _PAR_CLOCK_LOW, SLOW; + .+TOI: SET sci_parallel1 TO _PAR_CLOCK_LOW, SLOW; + .+TOI: SET TG TO _TG_CLOCK_LOW, SLOW; + .+TOI: SET sci_parallel3 TO _PAR_CLOCK_LOW, SLOW; + .+TOI: SET sci_parallel2 TO _PAR_CLOCK_HIGH, SLOW; + .+TOI: SET sci_parallel1 TO _PAR_CLOCK_LOW, SLOW; + .+TDRT: RETURN; } WAVEFORM wPixel { /* Starts at beginning of waveform */ - 0: SET PIXEL TO HIGH; - .+TICK: SET PIXEL TO LOW; - SET FRAME TO LOW; - SET LINE TO LOW; + 0: SET PIXEL TO HIGH; + .+TICK: SET PIXEL TO LOW; + SET FRAME TO LOW; + SET LINE TO LOW; /* Starts at beginning of waveform */ - 0: SET RG_1 TO HIGH; - TWX: SET RG_2 TO LOW; + 0: SET RG TO HIGH; + .+TWX: SET RG TO LOW; /* Do something with summing well (following RG) */ /* Do something with serial clocks (starting at 0:) */ - 0: SET sci_serial1 TO HIGH; - SET sci_serial3 TO LOW; - .+TOR: SET sci_serial2 TO HIGH; - .+TOR: SET sci_serial1 TO LOW; - SET sci_serial3 TO HIGH; - .+TOR: RETURN; + 0: SET sci_serial1 TO HIGH; + SET sci_serial3 TO LOW; + .+TOR: SET sci_serial2 TO HIGH; + .+TOR: SET sci_serial1 TO LOW; + SET sci_serial3 TO HIGH; + .+TOR: RETURN; } /*****************************************/ @@ -115,20 +102,19 @@ WAVEFORM wPixel { /*****************************************/ WAVEFORM wReset { - 0: SET RG TO _RG_CLOCK_HIGH; + 0: SET RG TO _RG_CLOCK_HIGH; } WAVEFORM wUnsetReset { - 0: SET RG TO _RG_CLOCK_LOW; + 0: SET RG TO _RG_CLOCK_LOW; } - WAVEFORM OS_Clamp { - SET AC_Clamp TO HIGH; + 0: SET AC_Clamp TO HIGH; } WAVEFORM OS_Clamp_ { - SET AC_Clamp TO LOW; + 0: SET AC_Clamp TO LOW; } @@ -149,56 +135,28 @@ WAVEFORM Wait1us { /*****************************************/ WAVEFORM wOpenShutter { - 0: SET SHUTTER TO OPEN; + 0: SET SHUTTER TO OPEN; } WAVEFORM wCloseShutter { - 0: SET SHUTTER TO CLOSE; + 0: SET SHUTTER TO CLOSE; } WAVEFORM wFrame { - 0: SET FRAME TO HIGH; + 0: SET FRAME TO HIGH; } WAVEFORM wLine { - 0: SET LINE TO HIGH; + 0: SET LINE TO HIGH; } WAVEFORM wPixel { - 0: SET PIXEL TO HIGH; - .+TICK: SET PIXEL TO LOW; - SET FRAME TO LOW; - SET LINE TO LOW; + 0: SET PIXEL TO HIGH; + .+TICK: SET PIXEL TO LOW; + SET FRAME TO LOW; + SET LINE TO LOW; } -/* Where are these defined??*/ + WAVEFORM AD_Clamp { -/* 0: SET AD1 TO HIGH; - SET AD2 TO HIGH; - SET AD3 TO HIGH; - SET AD4 TO HIGH; - SET AD5 TO HIGH; - SET AD6 TO HIGH; - SET AD7 TO HIGH; - SET AD8 TO HIGH; - SET AD11 TO HIGH; - SET AD12 TO HIGH; - SET AD13 TO HIGH; - SET AD14 TO HIGH; - SET AD15 TO HIGH; - SET AD16 TO HIGH; - SET AD18 TO HIGH; -*/} + /*0: SET AD7 TO HIGH;*/ +} WAVEFORM AD_Clamp_ { -/* 0: SET AD1 TO LOW; - SET AD2 TO LOW; - SET AD3 TO LOW; - SET AD4 TO LOW; - SET AD5 TO LOW; - SET AD6 TO LOW; - SET AD7 TO LOW; - SET AD8 TO LOW; - SET AD11 TO LOW; - SET AD12 TO LOW; - SET AD13 TO LOW; - SET AD14 TO LOW; - SET AD15 TO LOW; - SET AD16 TO LOW; - SET AD18 TO LOW; -*/} + /*0: SET AD7 TO LOW;*/ +} From 5f790a62ef6307b39ffe8ca8fcc41b4bfff626a5 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Fri, 10 Jan 2025 10:43:54 -0800 Subject: [PATCH 015/194] wdl parsing with changes to mod file --- src/deimos/Makefile | 2 +- src/deimos/deimos.seq | 29 ++++++++--------------------- src/deimos/deimos.waveform | 2 +- 3 files changed, 10 insertions(+), 23 deletions(-) diff --git a/src/deimos/Makefile b/src/deimos/Makefile index 6d8e5d1..79e412e 100644 --- a/src/deimos/Makefile +++ b/src/deimos/Makefile @@ -50,7 +50,7 @@ WDLPATH = $(HOME)/Software/wdl/wdl/ # output for *.acf file ACFPATH = $(HOME)/Software/wdlfiles/src/deimos/ -PLOT = True # True # show waveform plots by default, True | False +PLOT = False # True # show waveform plots by default, True | False GFLAGS = +c "/*" "*/" +c "//" "\n" +c "\\\n" "" SEQPARSER = $(WDLPATH)/seqParserDriver.py INCPARSER = $(WDLPATH)/incParserDriver.py diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 409f31a..56ddb3d 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -31,14 +31,14 @@ param param_ExposeTime = 0 SEQUENCE StartSeq { - BiasLow(); + /*BiasLow();*/ if start GOTO InitSeq(); GOTO StartSeq(); } SEQUENCE InitSeq { - BiasInit(); - ACReset(); + /* BiasInit(); */ + /* ACReset(); */ /* Initialize Serial and Parallel Lines - What is serial recieving???? */ /* Do something to parallel lines to prepare for exposure - GUARDS UP*/ GOTO DetectorSel(); @@ -69,13 +69,14 @@ SEQUENCE ScienceReadout { SEQUENCE ScienceLineRead{ /*LineTransfer(); wLine(); + */ /* Initialize Serial Clocks */ /* Flush desired number of post pixels */ - wPixel(param_SciencePixels); + /*wPixel(param_SciencePixels); */ /* Flush desired number of pre serial pixels */ - /* Serial Recieving?? */ + /* Serial Recieving?? wReset(); Wait1us(); @@ -84,20 +85,6 @@ SEQUENCE ScienceLineRead{ Wait1us(); OS_Clamp_(); AD_Clamp_(); - return;*/ + return; + */ } - -SEQUENCE BiasInit { - /* Initialize all biases as required in datasheet */ - /* Bias Settling time wait??? */ -} - -SEQUENCE BiasLow { - /* Initialize all biases to low */ -} - -SEQUENCE ACReset { - /* Clamp and unclamp AC clamp */ -} - - diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index a4f84f2..1cf8e1b 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -160,7 +160,7 @@ WAVEFORM wPixel { SET LINE TO LOW; } -WAVEFORM AD_Clamp_ { +WAVEFORM AD_Clamp { /*0: SET AD7 TO HIGH;*/ } From b2a4884225adaa281d888439d4f0447404b7c306 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Fri, 10 Jan 2025 18:45:14 +0000 Subject: [PATCH 016/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 384 ++++++++++++++++++++++++++++++------------------- 1 file changed, 235 insertions(+), 149 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index e54a2d1..ee8d6af 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -36,178 +36,161 @@ PARAMETER5="param_SciencePixels=1000" PARAMETER6="param_ExposeTime=0" PARAMETERS=7 LINE0=StartSeq: -LINE1="STATE000; CALL BiasLow" -LINE2="STATE000; if start GOTO InitSeq" -LINE3="STATE000; GOTO StartSeq" -LINE4=InitSeq: -LINE5="STATE000; CALL BiasInit" -LINE6="STATE000; CALL ACReset" +LINE1="STATE000; if start GOTO InitSeq" +LINE2="STATE000; GOTO StartSeq" +LINE3=InitSeq: +LINE4="STATE000; GOTO DetectorSel" +LINE5=DetectorSel: +LINE6="STATE000; if trigger_ScienceExpose CALL SelectScienceReadoutMode" LINE7="STATE000; GOTO DetectorSel" -LINE8=DetectorSel: -LINE9="STATE000; if trigger_ScienceExpose CALL SelectScienceReadoutMode" -LINE10="STATE000; GOTO DetectorSel" -LINE11=SelectScienceReadoutMode: -LINE12="STATE000; if trigger_ScienceRead CALL ScienceReadout" -LINE13="STATE000; GOTO SelectScienceReadoutMode" -LINE14=ScienceReadout: -LINE15="STATE000; CALL wCloseShutter" -LINE16="STATE000; CALL wOpenShutter" -LINE17="STATE000; CALL wFrame" -LINE18="STATE000; CALL ScienceLineRead(param_ScienceLines)" -LINE19="STATE000; CALL wCloseShutter" -LINE20=ScienceLineRead: -LINE21="STATE000; CALL LineTransfer" -LINE22="STATE000; CALL wLine" -LINE23="STATE000; CALL wPixel(param_SciencePixels)" -LINE24="STATE000; CALL wReset" -LINE25="STATE000; CALL Wait1us" -LINE26="STATE000; CALL OS_Clamp" -LINE27="STATE000; CALL AD_Clamp" -LINE28="STATE000; CALL Wait1us" -LINE29="STATE000; CALL OS_Clamp_" -LINE30="STATE000; CALL AD_Clamp_" -LINE31="STATE000; RETURN ScienceLineRead" -LINE32=BiasInit: -LINE33="STATE000;" -LINE34=BiasLow: -LINE35="STATE000;" -LINE36=ACReset: -LINE37="STATE000;" -LINE38=LineTransfer: -LINE39="STATE000; RETURN LineTransfer" -LINE40=wPixel: -LINE41="STATE001;" -LINE42="STATE002; RETURN wPixel" -LINE43=wReset: -LINE44="STATE000; RETURN wReset" -LINE45=wUnsetReset: -LINE46="STATE000; RETURN wUnsetReset" -LINE47=OS_Clamp: -LINE48="STATE000; RETURN OS_Clamp" -LINE49=OS_Clamp_: -LINE50="STATE000; RETURN OS_Clamp_" -LINE51=Wait1us: -LINE52="STATE000; STATE000(99)" -LINE53="STATE000; RETURN Wait1us" -LINE54=wOpenShutter: -LINE55="STATE003; RETURN wOpenShutter" -LINE56=wCloseShutter: -LINE57="STATE004; RETURN wCloseShutter" -LINE58=wFrame: -LINE59="STATE005; RETURN wFrame" -LINE60=wLine: -LINE61="STATE006; RETURN wLine" -LINE62=AD_Clamp: -LINE63="STATE000; RETURN AD_Clamp" -LINE64=AD_Clamp_: -LINE65="STATE000; RETURN AD_Clamp_" -LINES=66 +LINE8=SelectScienceReadoutMode: +LINE9="STATE000; if trigger_ScienceRead CALL ScienceReadout" +LINE10="STATE000; GOTO SelectScienceReadoutMode" +LINE11=ScienceReadout: +LINE12="STATE000; CALL wCloseShutter" +LINE13="STATE000; CALL wOpenShutter" +LINE14="STATE000; CALL wFrame" +LINE15="STATE000; CALL ScienceLineRead(param_ScienceLines)" +LINE16="STATE000; CALL wCloseShutter" +LINE17=ScienceLineRead: +LINE18="STATE000;" +LINE19=LineTransfer: +LINE20="STATE001;" +LINE21="STATE002; STATE000(3897)" +LINE22="STATE000; RETURN LineTransfer" +LINE23=wReset: +LINE24="STATE000; RETURN wReset" +LINE25=wUnsetReset: +LINE26="STATE000; RETURN wUnsetReset" +LINE27=OS_Clamp: +LINE28="STATE000; RETURN OS_Clamp" +LINE29=OS_Clamp_: +LINE30="STATE000; RETURN OS_Clamp_" +LINE31=Wait1us: +LINE32="STATE000; STATE000(99)" +LINE33="STATE000; RETURN Wait1us" +LINE34=wOpenShutter: +LINE35="STATE003; RETURN wOpenShutter" +LINE36=wCloseShutter: +LINE37="STATE004; RETURN wCloseShutter" +LINE38=wFrame: +LINE39="STATE005; RETURN wFrame" +LINE40=wLine: +LINE41="STATE006; RETURN wLine" +LINE42=wPixel: +LINE43="STATE001;" +LINE44="STATE002; RETURN wPixel" +LINE45=AD_Clamp: +LINE46="STATE000; RETURN AD_Clamp" +LINE47=AD_Clamp_: +LINE48="STATE000; RETURN AD_Clamp_" +LINES=49 MOD1\ENABLE1=1 -MOD1\FASTSLEWRATE1=1 +MOD1\FASTSLEWRATE1=10 MOD1\SLOWSLEWRATE1=1 MOD1\ENABLE2=1 -MOD1\FASTSLEWRATE2=1 +MOD1\FASTSLEWRATE2=10 MOD1\SLOWSLEWRATE2=1 MOD1\ENABLE3=1 -MOD1\FASTSLEWRATE3=1 +MOD1\FASTSLEWRATE3=10 MOD1\SLOWSLEWRATE3=1 MOD1\ENABLE4=1 -MOD1\FASTSLEWRATE4=1 +MOD1\FASTSLEWRATE4=10 MOD1\SLOWSLEWRATE4=1 MOD1\ENABLE5=1 -MOD1\FASTSLEWRATE5=1 +MOD1\FASTSLEWRATE5=10 MOD1\SLOWSLEWRATE5=1 MOD1\ENABLE6=1 -MOD1\FASTSLEWRATE6=1 +MOD1\FASTSLEWRATE6=10 MOD1\SLOWSLEWRATE6=1 MOD1\ENABLE7=1 -MOD1\FASTSLEWRATE7=1 +MOD1\FASTSLEWRATE7=10 MOD1\SLOWSLEWRATE7=1 MOD1\ENABLE8=1 -MOD1\FASTSLEWRATE8=1 +MOD1\FASTSLEWRATE8=10 MOD1\SLOWSLEWRATE8=1 MOD1\ENABLE9=1 -MOD1\FASTSLEWRATE9=1 +MOD1\FASTSLEWRATE9=10 MOD1\SLOWSLEWRATE9=1 MOD1\ENABLE10=1 -MOD1\FASTSLEWRATE10=1 +MOD1\FASTSLEWRATE10=10 MOD1\SLOWSLEWRATE10=1 MOD1\ENABLE11=1 -MOD1\FASTSLEWRATE11=1 +MOD1\FASTSLEWRATE11=10 MOD1\SLOWSLEWRATE11=1 MOD1\ENABLE12=1 -MOD1\FASTSLEWRATE12=1 +MOD1\FASTSLEWRATE12=10 MOD1\SLOWSLEWRATE12=1 MOD2\ENABLE1=1 -MOD2\FASTSLEWRATE1=1 -MOD2\SLOWSLEWRATE1=1 +MOD2\FASTSLEWRATE1=500 +MOD2\SLOWSLEWRATE1=100 MOD2\ENABLE2=1 -MOD2\FASTSLEWRATE2=1 -MOD2\SLOWSLEWRATE2=1 +MOD2\FASTSLEWRATE2=500 +MOD2\SLOWSLEWRATE2=100 MOD2\ENABLE3=1 -MOD2\FASTSLEWRATE3=1 -MOD2\SLOWSLEWRATE3=1 +MOD2\FASTSLEWRATE3=500 +MOD2\SLOWSLEWRATE3=100 MOD2\ENABLE4=1 -MOD2\FASTSLEWRATE4=1 -MOD2\SLOWSLEWRATE4=1 +MOD2\FASTSLEWRATE4=500 +MOD2\SLOWSLEWRATE4=100 MOD2\ENABLE5=1 -MOD2\FASTSLEWRATE5=1 -MOD2\SLOWSLEWRATE5=1 +MOD2\FASTSLEWRATE5=500 +MOD2\SLOWSLEWRATE5=100 MOD2\ENABLE6=1 -MOD2\FASTSLEWRATE6=1 -MOD2\SLOWSLEWRATE6=1 -MOD2\ENABLE7=1 +MOD2\FASTSLEWRATE6=500 +MOD2\SLOWSLEWRATE6=100 +MOD2\ENABLE7=0 MOD2\FASTSLEWRATE7=1 MOD2\SLOWSLEWRATE7=1 -MOD2\ENABLE8=1 +MOD2\ENABLE8=0 MOD2\FASTSLEWRATE8=1 MOD2\SLOWSLEWRATE8=1 -MOD2\ENABLE9=1 +MOD2\ENABLE9=0 MOD2\FASTSLEWRATE9=1 MOD2\SLOWSLEWRATE9=1 -MOD2\ENABLE10=1 +MOD2\ENABLE10=0 MOD2\FASTSLEWRATE10=1 MOD2\SLOWSLEWRATE10=1 -MOD2\ENABLE11=1 +MOD2\ENABLE11=0 MOD2\FASTSLEWRATE11=1 MOD2\SLOWSLEWRATE11=1 -MOD2\ENABLE12=1 +MOD2\ENABLE12=0 MOD2\FASTSLEWRATE12=1 MOD2\SLOWSLEWRATE12=1 -MOD3\ENABLE1=1 +MOD3\ENABLE1=0 MOD3\FASTSLEWRATE1=1 MOD3\SLOWSLEWRATE1=1 -MOD3\ENABLE2=1 +MOD3\ENABLE2=0 MOD3\FASTSLEWRATE2=1 MOD3\SLOWSLEWRATE2=1 -MOD3\ENABLE3=1 +MOD3\ENABLE3=0 MOD3\FASTSLEWRATE3=1 MOD3\SLOWSLEWRATE3=1 -MOD3\ENABLE4=1 +MOD3\ENABLE4=0 MOD3\FASTSLEWRATE4=1 MOD3\SLOWSLEWRATE4=1 -MOD3\ENABLE5=1 +MOD3\ENABLE5=0 MOD3\FASTSLEWRATE5=1 MOD3\SLOWSLEWRATE5=1 -MOD3\ENABLE6=1 +MOD3\ENABLE6=0 MOD3\FASTSLEWRATE6=1 MOD3\SLOWSLEWRATE6=1 -MOD3\ENABLE7=1 +MOD3\ENABLE7=0 MOD3\FASTSLEWRATE7=1 MOD3\SLOWSLEWRATE7=1 -MOD3\ENABLE8=1 +MOD3\ENABLE8=0 MOD3\FASTSLEWRATE8=1 MOD3\SLOWSLEWRATE8=1 -MOD3\ENABLE9=1 +MOD3\ENABLE9=0 MOD3\FASTSLEWRATE9=1 MOD3\SLOWSLEWRATE9=1 -MOD3\ENABLE10=1 +MOD3\ENABLE10=0 MOD3\FASTSLEWRATE10=1 MOD3\SLOWSLEWRATE10=1 -MOD3\ENABLE11=1 +MOD3\ENABLE11=0 MOD3\FASTSLEWRATE11=1 MOD3\SLOWSLEWRATE11=1 -MOD3\ENABLE12=1 +MOD3\ENABLE12=0 MOD3\FASTSLEWRATE12=1 MOD3\SLOWSLEWRATE12=1 MOD7\CLAMP1=0.0 @@ -215,80 +198,161 @@ MOD7\CLAMP2=0.0 MOD7\CLAMP3=1.5 MOD7\CLAMP4=1.5 MOD7\PREAMPGAIN=0 -MOD9\HVLC_V1=0 +MOD9\HVLC_V1=0.00 MOD9\HVLC_ORDER1=0 -MOD9\HVLC_V2=0 +MOD9\HVLC_V2=20.0 MOD9\HVLC_ORDER2=0 -MOD9\HVLC_V3=3.0 +MOD9\HVLC_LABEL2=SCI Guard Drain +MOD9\HVLC_V3=0.00 MOD9\HVLC_ORDER3=0 -MOD9\HVLC_V4=12.0 +MOD9\HVLC_V4=0.00 MOD9\HVLC_ORDER4=0 -MOD9\HVLC_V5=19 +MOD9\HVLC_V5=17.0 MOD9\HVLC_ORDER5=0 -MOD9\HVLC_V6=19 +MOD9\HVLC_LABEL5=SCI E Reset Drain +MOD9\HVLC_V6=17.0 MOD9\HVLC_ORDER6=0 -MOD9\HVLC_V7=19 +MOD9\HVLC_LABEL6=SCI F Reset Drain +MOD9\HVLC_V7=0.00 MOD9\HVLC_ORDER7=0 -MOD9\HVLC_V8=29 +MOD9\HVLC_V8=0.00 MOD9\HVLC_ORDER8=0 -MOD9\HVLC_V9=3.5 +MOD9\HVLC_V9=0.00 MOD9\HVLC_ORDER9=0 -MOD9\HVLC_V10=0 +MOD9\HVLC_V10=0.00 MOD9\HVLC_ORDER10=0 -MOD9\HVLC_V11=19 +MOD9\HVLC_V11=0.00 MOD9\HVLC_ORDER11=0 -MOD9\HVLC_V12=30 +MOD9\HVLC_V12=0.00 MOD9\HVLC_ORDER12=0 -MOD9\HVLC_V13=15 +MOD9\HVLC_V13=0.00 MOD9\HVLC_ORDER13=0 -MOD9\HVLC_V14=15 +MOD9\HVLC_V14=0.00 MOD9\HVLC_ORDER14=0 -MOD9\HVLC_V15=1 +MOD9\HVLC_V15=0.00 MOD9\HVLC_ORDER15=0 -MOD9\HVLC_V16=24 +MOD9\HVLC_V16=0.00 MOD9\HVLC_ORDER16=0 -MOD9\HVLC_V17=15 +MOD9\HVLC_V17=0.00 MOD9\HVLC_ORDER17=0 -MOD9\HVLC_V18=1 +MOD9\HVLC_V18=0.00 MOD9\HVLC_ORDER18=0 -MOD9\HVLC_V19=24 +MOD9\HVLC_V19=0.00 MOD9\HVLC_ORDER19=0 -MOD9\HVLC_V20=15 +MOD9\HVLC_V20=0.00 MOD9\HVLC_ORDER20=0 -MOD9\HVLC_V21=24 +MOD9\HVLC_V21=0.00 MOD9\HVLC_ORDER21=0 -MOD9\HVLC_V22=24 +MOD9\HVLC_V22=0.00 MOD9\HVLC_ORDER22=0 -MOD9\HVLC_V23=24 +MOD9\HVLC_V23=0.00 MOD9\HVLC_ORDER23=0 -MOD9\HVLC_V24=15 +MOD9\HVLC_V24=0.00 MOD9\HVLC_ORDER24=0 -MOD10\HVLC_V1=0 -MOD10\HVLC_ORDER1=0 MOD9\HVHC_ENABLE1=1 -MOD9\HVHC_V1=15 -MOD9\HVHC_IL1=0 +MOD9\HVHC_V1=29.0 +MOD9\HVHC_IL1=0.1 MOD9\HVHC_ORDER1=0 +MOD9\HVHC_LABEL1=SCI E Output Drain MOD9\HVHC_ENABLE2=1 -MOD9\HVHC_V2=15 -MOD9\HVHC_IL2=0 +MOD9\HVHC_V2=29.0 +MOD9\HVHC_IL2=0.1 MOD9\HVHC_ORDER2=0 -MOD9\HVHC_ENABLE3=1 -MOD9\HVHC_V3=15 -MOD9\HVHC_IL3=0 +MOD9\HVHC_LABEL2=SCI F Output Drain +MOD9\HVHC_ENABLE3=0 +MOD9\HVHC_V3=29.0 +MOD9\HVHC_IL3=0.0 MOD9\HVHC_ORDER3=0 -MOD9\HVHC_ENABLE4=1 -MOD9\HVHC_V4=15 -MOD9\HVHC_IL4=0 +MOD9\HVHC_ENABLE4=0 +MOD9\HVHC_V4=29.0 +MOD9\HVHC_IL4=0.0 MOD9\HVHC_ORDER4=0 -MOD9\HVHC_ENABLE5=1 -MOD9\HVHC_V5=15 -MOD9\HVHC_IL5=0 +MOD9\HVHC_ENABLE5=0 +MOD9\HVHC_V5=29.0 +MOD9\HVHC_IL5=0.0 MOD9\HVHC_ORDER5=0 -MOD9\HVHC_ENABLE6=1 -MOD9\HVHC_V6=15 -MOD9\HVHC_IL6=0 +MOD9\HVHC_ENABLE6=0 +MOD9\HVHC_V6=29.0 +MOD9\HVHC_IL6=0.0 MOD9\HVHC_ORDER6=0 +MOD10\LVLC_V1=0.0 +MOD10\LVLC_ORDER1=0 +MOD10\LVLC_V2=0.0 +MOD10\LVLC_ORDER2=0 +MOD10\LVLC_V3=3.0 +MOD10\LVLC_ORDER3=0 +MOD10\LVLC_LABEL3=SCI E Output Gate +MOD10\LVLC_V4=3.0 +MOD10\LVLC_ORDER4=0 +MOD10\LVLC_LABEL4=SCI F Output Gate +MOD10\LVLC_V5=1.0 +MOD10\LVLC_ORDER5=0 +MOD10\LVLC_LABEL5=SCI Summing Well - Low +MOD10\LVLC_V6=12.0 +MOD10\LVLC_ORDER6=0 +MOD10\LVLC_LABEL6=SCI Summing Well - High +MOD10\LVLC_V7=1.0 +MOD10\LVLC_ORDER7=0 +MOD10\LVLC_LABEL7=SCI Reset Gate - Low +MOD10\LVLC_V8=12.0 +MOD10\LVLC_ORDER8=0 +MOD10\LVLC_LABEL8=SCI Reset Gate - High +MOD10\LVLC_V9=0.0 +MOD10\LVLC_ORDER9=0 +MOD10\LVLC_V10=0.0 +MOD10\LVLC_ORDER10=0 +MOD10\LVLC_V11=0.0 +MOD10\LVLC_ORDER11=0 +MOD10\LVLC_V12=0.0 +MOD10\LVLC_ORDER12=0 +MOD10\LVLC_V13=0.0 +MOD10\LVLC_ORDER13=0 +MOD10\LVLC_V14=0.0 +MOD10\LVLC_ORDER14=0 +MOD10\LVLC_V15=0.0 +MOD10\LVLC_ORDER15=0 +MOD10\LVLC_V16=0.0 +MOD10\LVLC_ORDER16=0 +MOD10\LVLC_V17=0.0 +MOD10\LVLC_ORDER17=0 +MOD10\LVLC_V18=0.0 +MOD10\LVLC_ORDER18=0 +MOD10\LVLC_V19=0.0 +MOD10\LVLC_ORDER19=0 +MOD10\LVLC_V20=0.0 +MOD10\LVLC_ORDER20=0 +MOD10\LVLC_V21=0.0 +MOD10\LVLC_ORDER21=0 +MOD10\LVLC_V22=0.0 +MOD10\LVLC_ORDER22=0 +MOD10\LVLC_V23=0.0 +MOD10\LVLC_ORDER23=0 +MOD10\LVLC_V24=0.0 +MOD10\LVLC_ORDER24=0 +MOD10\LVHC_ENABLE1=0 +MOD10\LVHC_V1=0.0 +MOD10\LVHC_IL1=0.0 +MOD10\LVHC_ORDER1=0 +MOD10\LVHC_ENABLE2=0 +MOD10\LVHC_V2=0.0 +MOD10\LVHC_IL2=0.0 +MOD10\LVHC_ORDER2=0 +MOD10\LVHC_ENABLE3=0 +MOD10\LVHC_V3=0.0 +MOD10\LVHC_IL3=0.0 +MOD10\LVHC_ORDER3=0 +MOD10\LVHC_ENABLE4=0 +MOD10\LVHC_V4=0.0 +MOD10\LVHC_IL4=0.0 +MOD10\LVHC_ORDER4=0 +MOD10\LVHC_ENABLE5=0 +MOD10\LVHC_V5=0.0 +MOD10\LVHC_IL5=0.0 +MOD10\LVHC_ORDER5=0 +MOD10\LVHC_ENABLE6=0 +MOD10\LVHC_V6=0.0 +MOD10\LVHC_IL6=0.0 +MOD10\LVHC_ORDER6=0 MOD12\DIO_SOURCE1=0 MOD12\DIO_DIR1=0 MOD12\DIO_SOURCE2=0 @@ -298,9 +362,31 @@ MOD12\DIO_DIR3=0 MOD12\DIO_SOURCE4=0 MOD12\DIO_DIR4=0 MOD12\DIO_POWER=0 +MOD4\XVP_V1=0 +MOD4\XVP_ORDER1=0 +MOD4\XVP_ENABLE1=1 +MOD4\XVP_V2=0 +MOD4\XVP_ORDER2=0 +MOD4\XVP_ENABLE2=1 +MOD4\XVP_V3=0 +MOD4\XVP_ORDER3=0 +MOD4\XVP_ENABLE3=1 +MOD4\XVP_V4=0 +MOD4\XVP_ORDER4=0 +MOD4\XVP_ENABLE4=1 MOD4\XVN_V1=-100 MOD4\XVN_ORDER1=0 MOD4\XVN_ENABLE1=1 +MOD4\XVN_LABEL1=SCI Backside +MOD4\XVN_V2=-0 +MOD4\XVN_ORDER2=0 +MOD4\XVN_ENABLE2=1 +MOD4\XVN_V3=-0 +MOD4\XVN_ORDER3=0 +MOD4\XVN_ENABLE3=1 +MOD4\XVN_V4=-0 +MOD4\XVN_ORDER4=0 +MOD4\XVN_ENABLE4=1 STATE0\NAME=STATE000 STATE0\CONTROL="0,3F" STATE1\NAME=STATE001 From d7d8d84b24806c51d9ceeb25ee1ea2a8d32032e5 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Fri, 10 Jan 2025 11:06:23 -0800 Subject: [PATCH 017/194] added serial recieving and renamed clock signals --- src/deimos/deimos.def | 1 + src/deimos/deimos.signals | 58 +++++++++++++++++++------------------- src/deimos/deimos.waveform | 29 +++++++++++-------- 3 files changed, 47 insertions(+), 41 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 914bed8..a7817ab 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -85,6 +85,7 @@ #define _SER_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ #define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ +#define _SER_CLOCK_RCV 13 /* Higher than serial clock high */ #define _OUTPUT_GATE 3 /* [ 0.50, 4.00] */ diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index d967851..b2ba74b 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -44,27 +44,27 @@ /* Note: _1 refers to detectors 1-4 */ /* _2 refers to detectors 5-8 */ -#define PP_B3_2 1 : 1 -#define PP_A3_2 1 : 2 -#define PP_B2_2 1 : 3 -#define PP_A2_2 1 : 4 -#define PP_B1_2 1 : 5 -#define PP_A1_2 1 : 6 -#define PP_A1_1 1 : 7 -#define PP_B1_1 1 : 8 -#define PP_A2_1 1 : 9 -#define PP_B2_1 1 : 10 -#define PP_A3_1 1 : 11 -#define PP_B3_1 1 : 12 +#define PCLK_B3_2 1 : 1 +#define PCLK_A3_2 1 : 2 +#define PCLK_B2_2 1 : 3 +#define PCLK_A2_2 1 : 4 +#define PCLK_B1_2 1 : 5 +#define PCLK_A1_2 1 : 6 +#define PCLK_A1_1 1 : 7 +#define PCLK_B1_1 1 : 8 +#define PCLK_A2_1 1 : 9 +#define PCLK_B2_1 1 : 10 +#define PCLK_A3_1 1 : 11 +#define PCLK_B3_1 1 : 12 /**** Serial Phase Signal Definitions ****/ #define TG 2 : 1 -#define SP_EF 2 : 2 -#define SP_E2 2 : 3 -#define SP_E1 2 : 4 -#define SP_F2 2 : 5 -#define SP_F1 2 : 6 +#define SCLK_EF 2 : 2 +#define SCLK_E2 2 : 3 +#define SCLK_E1 2 : 4 +#define SCLK_F2 2 : 5 +#define SCLK_F1 2 : 6 /**** LVDS Driver Signal definitions ****/ @@ -82,22 +82,22 @@ /**** Readout Method ****/ /* Science Serials */ #if _SCI_SER_CLOCK_DIR == SPLIT - #define sci_serial1 [SP_E2, SP_F2] - #define sci_serial2 [SP_E1, SP_F1] - #define sci_serial3 SP_EF + #define SCI_SCLK1 [SCLK_E2, SCLK_F2] + #define SCI_SCLK2 [SCLK_E1, SCLK_F1] + #define SCI_SCLK3 SCLK_EF #elif _SCI_SER_CLOCK_DIR == F_RIGHT - #define sci_serial1 [SP_E1, SP_F1] - #define sci_serial2 [SP_E2, SP_F2] - #define sci_serial3 SP_EF + #define SCI_SCLK1 [SCLK_E1, SCLK_F1] + #define SCI_SCLK2 [SCLK_E2, SCLK_F2] + #define SCI_SCLK3 SCLK_EF #elif _SCI_SER_CLOCK_DIR == E_LEFT - #define sci_serial1 [SP_E2, SP_F1] - #define sci_serial2 [SP_E1, SP_F2] - #define sci_serial3 SP_EF + #define SCI_SCLK1 [SCLK_E2, SCLK_F1] + #define SCI_SCLK2 [SCLK_E1, SCLK_F2] + #define SCI_SCLK3 SCLK_EF #endif /* Reset Gate Combine */ #define RG [RG_1, RG_2] /* Science Parallels */ -#define sci_parallel1 [PP_A1_1, PP_A1_2, PP_B1_1, PP_B1_2] -#define sci_parallel2 [PP_A2_1, PP_A2_2, PP_B2_1, PP_B2_2] -#define sci_parallel3 [PP_A3_1, PP_A3_2, PP_B3_1, PP_B3_2] +#define SCI_PCLK1 [PCLK_A1_1, PCLK_A1_2, PCLK_B1_1, PCLK_B1_2] +#define SCI_PCLK2 [PCLK_A2_1, PCLK_A2_2, PCLK_B2_1, PCLK_B2_2] +#define SCI_PCLK3 [PCLK_A3_1, PCLK_A3_2, PCLK_B3_1, PCLK_B3_2] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 1cf8e1b..6e5c6c9 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -71,17 +71,22 @@ #define HIGH 1 #define LOW 0 +WAVEFORM SerialRecieving { + 0: SET SCI_SCLK1 to _SER_CLOCK_RCV, FAST; + SET SCI_SCLK2 to _SER_CLOCK_RCV, FAST; +} + WAVEFORM LineTransfer { /* INITIAL STATE NEEDS TO BE DEFINED 0: SET NOP TO HIGH; .+TDRT: SET TG TO _TG_CLOCK_HIGH, SLOW; - SET sci_parallel3 TO _PAR_CLOCK_HIGH, SLOW; - .+TOI: SET sci_parallel2 TO _PAR_CLOCK_LOW, SLOW; - .+TOI: SET sci_parallel1 TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, SLOW; + .+TOI: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, SLOW; + .+TOI: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; .+TOI: SET TG TO _TG_CLOCK_LOW, SLOW; - .+TOI: SET sci_parallel3 TO _PAR_CLOCK_LOW, SLOW; - .+TOI: SET sci_parallel2 TO _PAR_CLOCK_HIGH, SLOW; - .+TOI: SET sci_parallel1 TO _PAR_CLOCK_LOW, SLOW; + .+TOI: SET sSCI_PCLK3 TO _PAR_CLOCK_LOW, SLOW; + .+TOI: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, SLOW; + .+TOI: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; .+TDRT: RETURN; } @@ -93,14 +98,14 @@ WAVEFORM wPixel { SET LINE TO LOW; /* Starts at beginning of waveform */ 0: SET RG TO HIGH; - .+TWX: SET RG TO LOW; + .+TWX: SET RG TO LOW; /* Do something with summing well (following RG) */ /* Do something with serial clocks (starting at 0:) */ - 0: SET sci_serial1 TO HIGH; - SET sci_serial3 TO LOW; - .+TOR: SET sci_serial2 TO HIGH; - .+TOR: SET sci_serial1 TO LOW; - SET sci_serial3 TO HIGH; + 0: SET SCI_SCLK1 TO HIGH; + SET SCI_SCLK3 TO LOW; + .+TOR: SET SCI_SCLK2 TO HIGH; + .+TOR: SET SCI_SCLK1 TO LOW; + SET SCI_SCLK3 TO HIGH; .+TOR: RETURN; } From 0131e5b4d48c9e1b234f54892bbc6b7c637b285b Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Fri, 10 Jan 2025 19:08:36 +0000 Subject: [PATCH 018/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 64 ++++++++++++++++++++++++++------------------------ 1 file changed, 33 insertions(+), 31 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index ee8d6af..d6e3480 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -54,37 +54,39 @@ LINE15="STATE000; CALL ScienceLineRead(param_ScienceLines)" LINE16="STATE000; CALL wCloseShutter" LINE17=ScienceLineRead: LINE18="STATE000;" -LINE19=LineTransfer: -LINE20="STATE001;" -LINE21="STATE002; STATE000(3897)" -LINE22="STATE000; RETURN LineTransfer" -LINE23=wReset: -LINE24="STATE000; RETURN wReset" -LINE25=wUnsetReset: -LINE26="STATE000; RETURN wUnsetReset" -LINE27=OS_Clamp: -LINE28="STATE000; RETURN OS_Clamp" -LINE29=OS_Clamp_: -LINE30="STATE000; RETURN OS_Clamp_" -LINE31=Wait1us: -LINE32="STATE000; STATE000(99)" -LINE33="STATE000; RETURN Wait1us" -LINE34=wOpenShutter: -LINE35="STATE003; RETURN wOpenShutter" -LINE36=wCloseShutter: -LINE37="STATE004; RETURN wCloseShutter" -LINE38=wFrame: -LINE39="STATE005; RETURN wFrame" -LINE40=wLine: -LINE41="STATE006; RETURN wLine" -LINE42=wPixel: -LINE43="STATE001;" -LINE44="STATE002; RETURN wPixel" -LINE45=AD_Clamp: -LINE46="STATE000; RETURN AD_Clamp" -LINE47=AD_Clamp_: -LINE48="STATE000; RETURN AD_Clamp_" -LINES=49 +LINE19=SerialRecieving: +LINE20="STATE000; RETURN SerialRecieving" +LINE21=LineTransfer: +LINE22="STATE001;" +LINE23="STATE002; STATE000(3897)" +LINE24="STATE000; RETURN LineTransfer" +LINE25=wReset: +LINE26="STATE000; RETURN wReset" +LINE27=wUnsetReset: +LINE28="STATE000; RETURN wUnsetReset" +LINE29=OS_Clamp: +LINE30="STATE000; RETURN OS_Clamp" +LINE31=OS_Clamp_: +LINE32="STATE000; RETURN OS_Clamp_" +LINE33=Wait1us: +LINE34="STATE000; STATE000(99)" +LINE35="STATE000; RETURN Wait1us" +LINE36=wOpenShutter: +LINE37="STATE003; RETURN wOpenShutter" +LINE38=wCloseShutter: +LINE39="STATE004; RETURN wCloseShutter" +LINE40=wFrame: +LINE41="STATE005; RETURN wFrame" +LINE42=wLine: +LINE43="STATE006; RETURN wLine" +LINE44=wPixel: +LINE45="STATE001;" +LINE46="STATE002; RETURN wPixel" +LINE47=AD_Clamp: +LINE48="STATE000; RETURN AD_Clamp" +LINE49=AD_Clamp_: +LINE50="STATE000; RETURN AD_Clamp_" +LINES=51 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=10 MOD1\SLOWSLEWRATE1=1 From d7c8a6e11a3bf9611a6f738d6b5f4e8e3e19ab16 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Fri, 10 Jan 2025 11:17:28 -0800 Subject: [PATCH 019/194] added delay from sclk to reset in serial receiving; added initial state to line transfer --- src/deimos/deimos.waveform | 35 +++++++++++++++++++---------------- 1 file changed, 19 insertions(+), 16 deletions(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 6e5c6c9..b6bccb1 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -55,6 +55,7 @@ #define TWX 170 ns /* Reset Pulse Width */ #define TOR 130 ns /* Serial Clock Overlap */ +#define SCLK_RCV_RESET 60 ns /* Serial clock recieving to reset */ /*****************************************/ /* Serial Clock Slew Rate */ @@ -72,19 +73,21 @@ #define LOW 0 WAVEFORM SerialRecieving { - 0: SET SCI_SCLK1 to _SER_CLOCK_RCV, FAST; - SET SCI_SCLK2 to _SER_CLOCK_RCV, FAST; + 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; + .+SCLK_RCV_RESET SET RG TO _RG_CLOCK_HIGH, FAST; } WAVEFORM LineTransfer { - /* INITIAL STATE NEEDS TO BE DEFINED - 0: SET NOP TO HIGH; + 0: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; + SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; + SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; .+TDRT: SET TG TO _TG_CLOCK_HIGH, SLOW; SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, SLOW; .+TOI: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, SLOW; .+TOI: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; .+TOI: SET TG TO _TG_CLOCK_LOW, SLOW; - .+TOI: SET sSCI_PCLK3 TO _PAR_CLOCK_LOW, SLOW; + .+TOI: SET SCI_PCLK3 TO _PAR_CLOCK_LOW, SLOW; .+TOI: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, SLOW; .+TOI: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; .+TDRT: RETURN; @@ -92,21 +95,21 @@ WAVEFORM LineTransfer { WAVEFORM wPixel { /* Starts at beginning of waveform */ - 0: SET PIXEL TO HIGH; + 0: SET PIXEL TO HIGH; .+TICK: SET PIXEL TO LOW; - SET FRAME TO LOW; - SET LINE TO LOW; + SET FRAME TO LOW; + SET LINE TO LOW; /* Starts at beginning of waveform */ - 0: SET RG TO HIGH; - .+TWX: SET RG TO LOW; + 0: SET RG TO HIGH; + .+TWX: SET RG TO LOW; /* Do something with summing well (following RG) */ /* Do something with serial clocks (starting at 0:) */ - 0: SET SCI_SCLK1 TO HIGH; - SET SCI_SCLK3 TO LOW; - .+TOR: SET SCI_SCLK2 TO HIGH; - .+TOR: SET SCI_SCLK1 TO LOW; - SET SCI_SCLK3 TO HIGH; - .+TOR: RETURN; + 0: SET SCI_SCLK1 TO HIGH; + SET SCI_SCLK3 TO LOW; + .+TOR: SET SCI_SCLK2 TO HIGH; + .+TOR: SET SCI_SCLK1 TO LOW; + SET SCI_SCLK3 TO HIGH; + .+TOR: RETURN; } /*****************************************/ From 82dea28b4e3085c798e2021e30d703516b842546 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Fri, 10 Jan 2025 11:32:12 -0800 Subject: [PATCH 020/194] fixed timing definitions to include #eval --- src/deimos/deimos.waveform | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index b6bccb1..00a7706 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -53,9 +53,9 @@ /* Serial transfer timing definitions */ -#define TWX 170 ns /* Reset Pulse Width */ -#define TOR 130 ns /* Serial Clock Overlap */ -#define SCLK_RCV_RESET 60 ns /* Serial clock recieving to reset */ +#define #eval TWX 170 ns /* Reset Pulse Width */ +#define #eval TOR 130 ns /* Serial Clock Overlap */ +#define #eval SCLK_RCV_RESET 60 ns /* Serial clock recieving to reset */ /*****************************************/ /* Serial Clock Slew Rate */ @@ -73,9 +73,9 @@ #define LOW 0 WAVEFORM SerialRecieving { - 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; - .+SCLK_RCV_RESET SET RG TO _RG_CLOCK_HIGH, FAST; + 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; + .+SCLK_RCV_RESET SET RG TO _RG_CLOCK_HIGH, FAST; } WAVEFORM LineTransfer { From 2555b62f36377276ba169198a61c62249736973a Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Fri, 10 Jan 2025 19:33:32 +0000 Subject: [PATCH 021/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 77 ++------------------------------------------------ 1 file changed, 2 insertions(+), 75 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index d6e3480..2ca90c4 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -27,66 +27,7 @@ TRIGOUTFORCE=0 TRIGOUTINVERT=1 TRIGOUTLEVEL=0 TRIGOUTPOWER=0 -PARAMETER0="abort=0" -PARAMETER1="start=0" -PARAMETER2="trigger_ScienceExpose=0" -PARAMETER3="trigger_ScienceRead=0" -PARAMETER4="param_ScienceLines=4154" -PARAMETER5="param_SciencePixels=1000" -PARAMETER6="param_ExposeTime=0" -PARAMETERS=7 -LINE0=StartSeq: -LINE1="STATE000; if start GOTO InitSeq" -LINE2="STATE000; GOTO StartSeq" -LINE3=InitSeq: -LINE4="STATE000; GOTO DetectorSel" -LINE5=DetectorSel: -LINE6="STATE000; if trigger_ScienceExpose CALL SelectScienceReadoutMode" -LINE7="STATE000; GOTO DetectorSel" -LINE8=SelectScienceReadoutMode: -LINE9="STATE000; if trigger_ScienceRead CALL ScienceReadout" -LINE10="STATE000; GOTO SelectScienceReadoutMode" -LINE11=ScienceReadout: -LINE12="STATE000; CALL wCloseShutter" -LINE13="STATE000; CALL wOpenShutter" -LINE14="STATE000; CALL wFrame" -LINE15="STATE000; CALL ScienceLineRead(param_ScienceLines)" -LINE16="STATE000; CALL wCloseShutter" -LINE17=ScienceLineRead: -LINE18="STATE000;" -LINE19=SerialRecieving: -LINE20="STATE000; RETURN SerialRecieving" -LINE21=LineTransfer: -LINE22="STATE001;" -LINE23="STATE002; STATE000(3897)" -LINE24="STATE000; RETURN LineTransfer" -LINE25=wReset: -LINE26="STATE000; RETURN wReset" -LINE27=wUnsetReset: -LINE28="STATE000; RETURN wUnsetReset" -LINE29=OS_Clamp: -LINE30="STATE000; RETURN OS_Clamp" -LINE31=OS_Clamp_: -LINE32="STATE000; RETURN OS_Clamp_" -LINE33=Wait1us: -LINE34="STATE000; STATE000(99)" -LINE35="STATE000; RETURN Wait1us" -LINE36=wOpenShutter: -LINE37="STATE003; RETURN wOpenShutter" -LINE38=wCloseShutter: -LINE39="STATE004; RETURN wCloseShutter" -LINE40=wFrame: -LINE41="STATE005; RETURN wFrame" -LINE42=wLine: -LINE43="STATE006; RETURN wLine" -LINE44=wPixel: -LINE45="STATE001;" -LINE46="STATE002; RETURN wPixel" -LINE47=AD_Clamp: -LINE48="STATE000; RETURN AD_Clamp" -LINE49=AD_Clamp_: -LINE50="STATE000; RETURN AD_Clamp_" -LINES=51 +LINES=0 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=10 MOD1\SLOWSLEWRATE1=1 @@ -389,21 +330,7 @@ MOD4\XVN_ENABLE3=1 MOD4\XVN_V4=-0 MOD4\XVN_ORDER4=0 MOD4\XVN_ENABLE4=1 -STATE0\NAME=STATE000 -STATE0\CONTROL="0,3F" -STATE1\NAME=STATE001 -STATE1\CONTROL="8,37" -STATE2\NAME=STATE002 -STATE2\CONTROL="0,31" -STATE3\NAME=STATE003 -STATE3\CONTROL="1,3E" -STATE4\NAME=STATE004 -STATE4\CONTROL="0,3E" -STATE5\NAME=STATE005 -STATE5\CONTROL="2,3D" -STATE6\NAME=STATE006 -STATE6\CONTROL="4,3B" -STATES=7 +STATES=1 [SYSTEM] BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 From 32fedb402d26e0c4becdde6a5ed192e105488d65 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Fri, 10 Jan 2025 12:17:14 -0800 Subject: [PATCH 022/194] added detail to pixel transfer --- src/deimos/deimos.mod | 16 ++++++++++++++++ src/deimos/deimos.signals | 6 ++++-- src/deimos/deimos.waveform | 13 +++++++++---- 3 files changed, 29 insertions(+), 6 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 20cd3e8..d40cbc5 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -88,6 +88,22 @@ SLOT 7 ad { PREAMPGAIN = low; } +/****** Bias Power Up Order ******/ +/* 1 : Front Substrate */ +/* 1 : Back Substrate to 0V */ +/* 2 : Guard Drain */ +/* 2 : Reset Drain */ +/* 2 : Ouput Drain */ +/* 3 : Output Gate */ +/* 4 : Image Clock High */ +/* 4 : Image Clock Low */ +/* 4 : Register Clock High */ +/* 4 : Register Clock Low */ +/* 4 : Reset Gate High */ +/* 4 : Reset Gate Low */ +/* 5 : Back Substrate to -100V */ + + SLOT 9 hvbias { HVLC 1 [0.00,0]; HVLC 2 [20.0,0] "SCI Guard Drain"; diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index b2ba74b..9929211 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -27,11 +27,13 @@ */ -#define SHUTTER 0 : 1 /* INT signal from the backplane */ +#define SHUTTER 0 : 1 /* INT signal from the backplane */ #define FRAME 0 : 2 /* FRAME signal from the backplane */ #define LINE 0 : 3 /* LINE signal from the backplane */ #define PIXEL 0 : 4 /* PIXEL signal from the backplane */ +#define AD7 7 : 1 /* Access to AC Clamp */ + /**** Parallel Phase Signal Definitions ****/ /* Each detector is made of two 2048x2048 vertically stacked image areas. The top @@ -59,7 +61,7 @@ /**** Serial Phase Signal Definitions ****/ -#define TG 2 : 1 +#define TG 2 : 1 #define SCLK_EF 2 : 2 #define SCLK_E2 2 : 3 #define SCLK_E1 2 : 4 diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 00a7706..643d3cf 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -53,9 +53,11 @@ /* Serial transfer timing definitions */ +#define #eval SCLK_RCV_RESET 60 ns /* Serial clock recieving to reset */ #define #eval TWX 170 ns /* Reset Pulse Width */ #define #eval TOR 130 ns /* Serial Clock Overlap */ -#define #eval SCLK_RCV_RESET 60 ns /* Serial clock recieving to reset */ +#define #eval TSW Pixel_T/2 + /*****************************************/ /* Serial Clock Slew Rate */ @@ -100,10 +102,13 @@ WAVEFORM wPixel { SET FRAME TO LOW; SET LINE TO LOW; /* Starts at beginning of waveform */ - 0: SET RG TO HIGH; - .+TWX: SET RG TO LOW; + /* NEED TO CLARIFY SUMMING WELL BEHAVIOUR */ + 0: SET RG TO HIGH, FAST; + .+TWX: SET RG TO LOW, FAST; + TSW: SET SW TO LOW, FAST; + .+SW_settleT SET SW TO HIGH, SLOW; + /* Do something with summing well (following RG) */ -/* Do something with serial clocks (starting at 0:) */ 0: SET SCI_SCLK1 TO HIGH; SET SCI_SCLK3 TO LOW; .+TOR: SET SCI_SCLK2 TO HIGH; From 67b9fdf12547794564d088c804cf27faddc22f26 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Fri, 10 Jan 2025 14:08:56 -0800 Subject: [PATCH 023/194] restored line transfer and pixel read into .seq --- src/deimos/deimos.seq | 9 ++++----- src/deimos/deimos.waveform | 4 ++-- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 56ddb3d..71be7e9 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -67,16 +67,16 @@ SEQUENCE ScienceReadout { } SEQUENCE ScienceLineRead{ - /*LineTransfer(); + LineTransfer(); wLine(); - */ + /* Initialize Serial Clocks */ /* Flush desired number of post pixels */ - /*wPixel(param_SciencePixels); */ + wPixel(param_SciencePixels); /* Flush desired number of pre serial pixels */ - /* Serial Recieving?? + /* Serial Recieving?? */ wReset(); Wait1us(); @@ -86,5 +86,4 @@ SEQUENCE ScienceLineRead{ OS_Clamp_(); AD_Clamp_(); return; - */ } diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 643d3cf..823695b 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -174,9 +174,9 @@ WAVEFORM wPixel { } WAVEFORM AD_Clamp { - /*0: SET AD7 TO HIGH;*/ + 0: SET AD7 TO HIGH; } WAVEFORM AD_Clamp_ { - /*0: SET AD7 TO LOW;*/ + 0: SET AD7 TO LOW; } From 6191c84a1b7cfdd38c085e2d8e118acbdfb6de38 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Fri, 10 Jan 2025 14:21:04 -0800 Subject: [PATCH 024/194] fixed syntax issues related to timing evaluations and missing colons --- src/deimos/deimos.signals | 3 +++ src/deimos/deimos.waveform | 12 ++++++------ 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 9929211..98bd0ff 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -99,6 +99,9 @@ /* Reset Gate Combine */ #define RG [RG_1, RG_2] +/* Summing Well Combine */ +#define SW [SW_1, SW_2] + /* Science Parallels */ #define SCI_PCLK1 [PCLK_A1_1, PCLK_A1_2, PCLK_B1_1, PCLK_B1_2] #define SCI_PCLK2 [PCLK_A2_1, PCLK_A2_2, PCLK_B2_1, PCLK_B2_2] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 823695b..29533f9 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -53,10 +53,10 @@ /* Serial transfer timing definitions */ -#define #eval SCLK_RCV_RESET 60 ns /* Serial clock recieving to reset */ -#define #eval TWX 170 ns /* Reset Pulse Width */ -#define #eval TOR 130 ns /* Serial Clock Overlap */ -#define #eval TSW Pixel_T/2 +#define SCLK_RCV_RESET #eval 60 ns /* Serial clock recieving to reset */ +#define TWX #eval 170 ns /* Reset Pulse Width */ +#define TOR #eval 130 ns /* Serial Clock Overlap */ +#define TSW #eval Pixel_T/2 /*****************************************/ @@ -77,7 +77,7 @@ WAVEFORM SerialRecieving { 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; - .+SCLK_RCV_RESET SET RG TO _RG_CLOCK_HIGH, FAST; + .+SCLK_RCV_RESET: SET RG TO _RG_CLOCK_HIGH, FAST; } WAVEFORM LineTransfer { @@ -106,7 +106,7 @@ WAVEFORM wPixel { 0: SET RG TO HIGH, FAST; .+TWX: SET RG TO LOW, FAST; TSW: SET SW TO LOW, FAST; - .+SW_settleT SET SW TO HIGH, SLOW; + .+SW_settleT: SET SW TO HIGH, SLOW; /* Do something with summing well (following RG) */ 0: SET SCI_SCLK1 TO HIGH; From 1fbebc01462f9c0cc4a16df8ad579f7b758e8ce3 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Fri, 10 Jan 2025 22:22:34 +0000 Subject: [PATCH 025/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 87 ++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 85 insertions(+), 2 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 2ca90c4..814c15e 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -27,7 +27,76 @@ TRIGOUTFORCE=0 TRIGOUTINVERT=1 TRIGOUTLEVEL=0 TRIGOUTPOWER=0 -LINES=0 +PARAMETER0="abort=0" +PARAMETER1="start=0" +PARAMETER2="trigger_ScienceExpose=0" +PARAMETER3="trigger_ScienceRead=0" +PARAMETER4="param_ScienceLines=4154" +PARAMETER5="param_SciencePixels=1000" +PARAMETER6="param_ExposeTime=0" +PARAMETERS=7 +LINE0=StartSeq: +LINE1="STATE000; if start GOTO InitSeq" +LINE2="STATE000; GOTO StartSeq" +LINE3=InitSeq: +LINE4="STATE000; GOTO DetectorSel" +LINE5=DetectorSel: +LINE6="STATE000; if trigger_ScienceExpose CALL SelectScienceReadoutMode" +LINE7="STATE000; GOTO DetectorSel" +LINE8=SelectScienceReadoutMode: +LINE9="STATE000; if trigger_ScienceRead CALL ScienceReadout" +LINE10="STATE000; GOTO SelectScienceReadoutMode" +LINE11=ScienceReadout: +LINE12="STATE000; CALL wCloseShutter" +LINE13="STATE000; CALL wOpenShutter" +LINE14="STATE000; CALL wFrame" +LINE15="STATE000; CALL ScienceLineRead(param_ScienceLines)" +LINE16="STATE000; CALL wCloseShutter" +LINE17=ScienceLineRead: +LINE18="STATE000; CALL LineTransfer" +LINE19="STATE000; CALL wLine" +LINE20="STATE000; CALL wPixel(param_SciencePixels)" +LINE21="STATE000; CALL wReset" +LINE22="STATE000; CALL Wait1us" +LINE23="STATE000; CALL OS_Clamp" +LINE24="STATE000; CALL AD_Clamp" +LINE25="STATE000; CALL Wait1us" +LINE26="STATE000; CALL OS_Clamp_" +LINE27="STATE000; CALL AD_Clamp_" +LINE28="STATE000; RETURN ScienceLineRead" +LINE29=SerialRecieving: +LINE30="STATE000; STATE000(599)" +LINE31="STATE000; RETURN SerialRecieving" +LINE32=LineTransfer: +LINE33="STATE000; STATE000(15998)" +LINE34="STATE000; RETURN LineTransfer" +LINE35=wPixel: +LINE36="STATE001;" +LINE37="STATE002; RETURN wPixel" +LINE38=wReset: +LINE39="STATE000; RETURN wReset" +LINE40=wUnsetReset: +LINE41="STATE000; RETURN wUnsetReset" +LINE42=OS_Clamp: +LINE43="STATE000; RETURN OS_Clamp" +LINE44=OS_Clamp_: +LINE45="STATE000; RETURN OS_Clamp_" +LINE46=Wait1us: +LINE47="STATE000; STATE000(99)" +LINE48="STATE000; RETURN Wait1us" +LINE49=wOpenShutter: +LINE50="STATE003; RETURN wOpenShutter" +LINE51=wCloseShutter: +LINE52="STATE004; RETURN wCloseShutter" +LINE53=wFrame: +LINE54="STATE005; RETURN wFrame" +LINE55=wLine: +LINE56="STATE006; RETURN wLine" +LINE57=AD_Clamp: +LINE58="STATE000; RETURN AD_Clamp" +LINE59=AD_Clamp_: +LINE60="STATE000; RETURN AD_Clamp_" +LINES=61 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=10 MOD1\SLOWSLEWRATE1=1 @@ -330,7 +399,21 @@ MOD4\XVN_ENABLE3=1 MOD4\XVN_V4=-0 MOD4\XVN_ORDER4=0 MOD4\XVN_ENABLE4=1 -STATES=1 +STATE0\NAME=STATE000 +STATE0\CONTROL="0,3F" +STATE1\NAME=STATE001 +STATE1\CONTROL="8,37" +STATE2\NAME=STATE002 +STATE2\CONTROL="0,31" +STATE3\NAME=STATE003 +STATE3\CONTROL="1,3E" +STATE4\NAME=STATE004 +STATE4\CONTROL="0,3E" +STATE5\NAME=STATE005 +STATE5\CONTROL="2,3D" +STATE6\NAME=STATE006 +STATE6\CONTROL="4,3B" +STATES=7 [SYSTEM] BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 From aa6972225fc1b399094ad2aaa2814ca960a0a9db Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 13 Jan 2025 08:55:48 -0800 Subject: [PATCH 026/194] Module ordering was reversed to suit actual configuration --- src/deimos/deimos.mod | 147 ++++++++++++++++++++------------------ src/deimos/deimos.signals | 61 ++++++++-------- 2 files changed, 110 insertions(+), 98 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index d40cbc5..3dc3b49 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -27,65 +27,12 @@ #define TG_fast 500 /* Evaluate Expression? */ #define TG_slow 100 /* Evaluate Expression? */ -SLOT 1 driverx { - DRVX 1 [PCLK_fast,PCLK_slow,1]; - DRVX 2 [PCLK_fast,PCLK_slow,1]; - DRVX 3 [PCLK_fast,PCLK_slow,1]; - DRVX 4 [PCLK_fast,PCLK_slow,1]; - DRVX 5 [PCLK_fast,PCLK_slow,1]; - DRVX 6 [PCLK_fast,PCLK_slow,1]; - DRVX 7 [PCLK_fast,PCLK_slow,1]; - DRVX 8 [PCLK_fast,PCLK_slow,1]; - DRVX 9 [PCLK_fast,PCLK_slow,1]; - DRVX 10 [PCLK_fast,PCLK_slow,1]; - DRVX 11 [PCLK_fast,PCLK_slow,1]; - DRVX 12 [PCLK_fast,PCLK_slow,1]; -} -SLOT 2 driverx { - DRVX 1 [TG_fast,TG_slow,1]; - DRVX 2 [SCLK_fast,SCLK_slow,1]; - DRVX 3 [SCLK_fast,SCLK_slow,1]; - DRVX 4 [SCLK_fast,SCLK_slow,1]; - DRVX 5 [SCLK_fast,SCLK_slow,1]; - DRVX 6 [SCLK_fast,SCLK_slow,1]; - DRVX 7 [1,1,0]; - DRVX 8 [1,1,0]; - DRVX 9 [1,1,0]; - DRVX 10 [1,1,0]; - DRVX 11 [1,1,0]; - DRVX 12 [1,1,0]; -} -SLOT 3 driverx { - DRVX 1 [1,1,0]; - DRVX 2 [1,1,0]; - DRVX 3 [1,1,0]; - DRVX 4 [1,1,0]; - DRVX 5 [1,1,0]; - DRVX 6 [1,1,0]; - DRVX 7 [1,1,0]; - DRVX 8 [1,1,0]; - DRVX 9 [1,1,0]; - DRVX 10 [1,1,0]; - DRVX 11 [1,1,0]; - DRVX 12 [1,1,0]; -} -SLOT 4 xvbias { - PBIAS 1 [0,0]; - PBIAS 2 [0,0]; - PBIAS 3 [0,0]; - PBIAS 4 [0,0]; - NBIAS 1 [0,-100] "SCI Backside"; - NBIAS 2 [0,-0]; - NBIAS 3 [0,-0]; - NBIAS 4 [0,-0]; -} -/* review */ -SLOT 7 ad { - CLAMP 1 = 0; - CLAMP 2 = 0; - CLAMP 3 = 1.5; - CLAMP 4 = 1.5; - PREAMPGAIN = low; +SLOT 1 lvds { + DIO 1 [0,0]; + DIO 2 [0,0]; + DIO 3 [0,0]; + DIO 4 [0,0]; + DIOPOWER = 0; } /****** Bias Power Up Order ******/ @@ -103,8 +50,7 @@ SLOT 7 ad { /* 4 : Reset Gate Low */ /* 5 : Back Substrate to -100V */ - -SLOT 9 hvbias { +SLOT 3 hvbias { HVLC 1 [0.00,0]; HVLC 2 [20.0,0] "SCI Guard Drain"; HVLC 3 [0.00,0]; @@ -137,8 +83,7 @@ SLOT 9 hvbias { HVHC 6 [29.0,0.0,0,0]; } - -SLOT 10 lvbias { +SLOT 4 lvbias { LVLC 1 [00.0,0]; LVLC 2 [00.0,0]; LVLC 3 [3.00,0] "SCI E Output Gate"; @@ -171,10 +116,74 @@ SLOT 10 lvbias { LVHC 6 [0.00,0.0,0,0]; } -SLOT 12 lvds { - DIO 1 [0,0]; - DIO 2 [0,0]; - DIO 3 [0,0]; - DIO 4 [0,0]; - DIOPOWER = 0; +/* review */ +SLOT 6 ad { + CLAMP 1 = 0; + CLAMP 2 = 0; + CLAMP 3 = 1.5; + CLAMP 4 = 1.5; + PREAMPGAIN = low; } + +SLOT 9 xvbias { + PBIAS 1 [0,0]; + PBIAS 2 [0,0]; + PBIAS 3 [0,0]; + PBIAS 4 [0,0]; + NBIAS 1 [0,-100] "SCI Backside"; + NBIAS 2 [0,-0]; + NBIAS 3 [0,-0]; + NBIAS 4 [0,-0]; +} + +SLOT 10 driverx { + DRVX 1 [1,1,0]; + DRVX 2 [1,1,0]; + DRVX 3 [1,1,0]; + DRVX 4 [1,1,0]; + DRVX 5 [1,1,0]; + DRVX 6 [1,1,0]; + DRVX 7 [1,1,0]; + DRVX 8 [1,1,0]; + DRVX 9 [1,1,0]; + DRVX 10 [1,1,0]; + DRVX 11 [1,1,0]; + DRVX 12 [1,1,0]; +} + +SLOT 11 driverx { + DRVX 1 [TG_fast,TG_slow,1]; + DRVX 2 [SCLK_fast,SCLK_slow,1]; + DRVX 3 [SCLK_fast,SCLK_slow,1]; + DRVX 4 [SCLK_fast,SCLK_slow,1]; + DRVX 5 [SCLK_fast,SCLK_slow,1]; + DRVX 6 [SCLK_fast,SCLK_slow,1]; + DRVX 7 [1,1,0]; + DRVX 8 [1,1,0]; + DRVX 9 [1,1,0]; + DRVX 10 [1,1,0]; + DRVX 11 [1,1,0]; + DRVX 12 [1,1,0]; +} + +SLOT 12 driverx { + DRVX 1 [PCLK_fast,PCLK_slow,1]; + DRVX 2 [PCLK_fast,PCLK_slow,1]; + DRVX 3 [PCLK_fast,PCLK_slow,1]; + DRVX 4 [PCLK_fast,PCLK_slow,1]; + DRVX 5 [PCLK_fast,PCLK_slow,1]; + DRVX 6 [PCLK_fast,PCLK_slow,1]; + DRVX 7 [PCLK_fast,PCLK_slow,1]; + DRVX 8 [PCLK_fast,PCLK_slow,1]; + DRVX 9 [PCLK_fast,PCLK_slow,1]; + DRVX 10 [PCLK_fast,PCLK_slow,1]; + DRVX 11 [PCLK_fast,PCLK_slow,1]; + DRVX 12 [PCLK_fast,PCLK_slow,1]; +} + + + + + + + diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 98bd0ff..47c4737 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -32,7 +32,26 @@ #define LINE 0 : 3 /* LINE signal from the backplane */ #define PIXEL 0 : 4 /* PIXEL signal from the backplane */ -#define AD7 7 : 1 /* Access to AC Clamp */ +#define AD7 6 : 1 /* Access to AC Clamp */ + +/**** LVDS Driver Signal definitions ****/ + +#define RG_1 1 : 7 +#define RG_2 1 : 8 +#define AC_Clamp 1 : 12 +#define SW_1 1 : 15 +#define SW_2 1 : 16 +/* NOP Definition - NEEDS TO BE UNUSED */ +#define NOP 1 : 1 + +/**** Serial Phase Signal Definitions ****/ + +#define TG 11 : 1 +#define SCLK_EF 11 : 2 +#define SCLK_E2 11 : 3 +#define SCLK_E1 11 : 4 +#define SCLK_F2 11 : 5 +#define SCLK_F1 11 : 6 /**** Parallel Phase Signal Definitions ****/ /* Each detector is made of two 2048x2048 @@ -46,37 +65,21 @@ /* Note: _1 refers to detectors 1-4 */ /* _2 refers to detectors 5-8 */ -#define PCLK_B3_2 1 : 1 -#define PCLK_A3_2 1 : 2 -#define PCLK_B2_2 1 : 3 -#define PCLK_A2_2 1 : 4 -#define PCLK_B1_2 1 : 5 -#define PCLK_A1_2 1 : 6 -#define PCLK_A1_1 1 : 7 -#define PCLK_B1_1 1 : 8 -#define PCLK_A2_1 1 : 9 -#define PCLK_B2_1 1 : 10 -#define PCLK_A3_1 1 : 11 -#define PCLK_B3_1 1 : 12 +#define PCLK_B3_2 12 : 1 +#define PCLK_A3_2 12 : 2 +#define PCLK_B2_2 12 : 3 +#define PCLK_A2_2 12 : 4 +#define PCLK_B1_2 12 : 5 +#define PCLK_A1_2 12 : 6 +#define PCLK_A1_1 12 : 7 +#define PCLK_B1_1 12 : 8 +#define PCLK_A2_1 12 : 9 +#define PCLK_B2_1 12 : 10 +#define PCLK_A3_1 12 : 11 +#define PCLK_B3_1 12 : 12 -/**** Serial Phase Signal Definitions ****/ -#define TG 2 : 1 -#define SCLK_EF 2 : 2 -#define SCLK_E2 2 : 3 -#define SCLK_E1 2 : 4 -#define SCLK_F2 2 : 5 -#define SCLK_F1 2 : 6 -/**** LVDS Driver Signal definitions ****/ - -#define RG_1 12 : 7 -#define RG_2 12 : 8 -#define AC_Clamp 12 : 12 -#define SW_1 12 : 15 -#define SW_2 12 : 16 -/* NOP Definition - NEEDS TO BE UNUSED */ -#define NOP 12 : 1 /**** Bias Voltage Definitions ****/ From 977cb9f6970720b64192848fe177d37eca58ccbc Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Mon, 13 Jan 2025 16:58:54 +0000 Subject: [PATCH 027/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 632 ++++++++++++++++++++++++------------------------- 1 file changed, 316 insertions(+), 316 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 814c15e..5a967d6 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -97,308 +97,308 @@ LINE58="STATE000; RETURN AD_Clamp" LINE59=AD_Clamp_: LINE60="STATE000; RETURN AD_Clamp_" LINES=61 -MOD1\ENABLE1=1 -MOD1\FASTSLEWRATE1=10 -MOD1\SLOWSLEWRATE1=1 -MOD1\ENABLE2=1 -MOD1\FASTSLEWRATE2=10 -MOD1\SLOWSLEWRATE2=1 -MOD1\ENABLE3=1 -MOD1\FASTSLEWRATE3=10 -MOD1\SLOWSLEWRATE3=1 -MOD1\ENABLE4=1 -MOD1\FASTSLEWRATE4=10 -MOD1\SLOWSLEWRATE4=1 -MOD1\ENABLE5=1 -MOD1\FASTSLEWRATE5=10 -MOD1\SLOWSLEWRATE5=1 -MOD1\ENABLE6=1 -MOD1\FASTSLEWRATE6=10 -MOD1\SLOWSLEWRATE6=1 -MOD1\ENABLE7=1 -MOD1\FASTSLEWRATE7=10 -MOD1\SLOWSLEWRATE7=1 -MOD1\ENABLE8=1 -MOD1\FASTSLEWRATE8=10 -MOD1\SLOWSLEWRATE8=1 -MOD1\ENABLE9=1 -MOD1\FASTSLEWRATE9=10 -MOD1\SLOWSLEWRATE9=1 -MOD1\ENABLE10=1 -MOD1\FASTSLEWRATE10=10 -MOD1\SLOWSLEWRATE10=1 -MOD1\ENABLE11=1 -MOD1\FASTSLEWRATE11=10 -MOD1\SLOWSLEWRATE11=1 -MOD1\ENABLE12=1 -MOD1\FASTSLEWRATE12=10 -MOD1\SLOWSLEWRATE12=1 -MOD2\ENABLE1=1 -MOD2\FASTSLEWRATE1=500 -MOD2\SLOWSLEWRATE1=100 -MOD2\ENABLE2=1 -MOD2\FASTSLEWRATE2=500 -MOD2\SLOWSLEWRATE2=100 -MOD2\ENABLE3=1 -MOD2\FASTSLEWRATE3=500 -MOD2\SLOWSLEWRATE3=100 -MOD2\ENABLE4=1 -MOD2\FASTSLEWRATE4=500 -MOD2\SLOWSLEWRATE4=100 -MOD2\ENABLE5=1 -MOD2\FASTSLEWRATE5=500 -MOD2\SLOWSLEWRATE5=100 -MOD2\ENABLE6=1 -MOD2\FASTSLEWRATE6=500 -MOD2\SLOWSLEWRATE6=100 -MOD2\ENABLE7=0 -MOD2\FASTSLEWRATE7=1 -MOD2\SLOWSLEWRATE7=1 -MOD2\ENABLE8=0 -MOD2\FASTSLEWRATE8=1 -MOD2\SLOWSLEWRATE8=1 -MOD2\ENABLE9=0 -MOD2\FASTSLEWRATE9=1 -MOD2\SLOWSLEWRATE9=1 -MOD2\ENABLE10=0 -MOD2\FASTSLEWRATE10=1 -MOD2\SLOWSLEWRATE10=1 -MOD2\ENABLE11=0 -MOD2\FASTSLEWRATE11=1 -MOD2\SLOWSLEWRATE11=1 -MOD2\ENABLE12=0 -MOD2\FASTSLEWRATE12=1 -MOD2\SLOWSLEWRATE12=1 -MOD3\ENABLE1=0 -MOD3\FASTSLEWRATE1=1 -MOD3\SLOWSLEWRATE1=1 -MOD3\ENABLE2=0 -MOD3\FASTSLEWRATE2=1 -MOD3\SLOWSLEWRATE2=1 -MOD3\ENABLE3=0 -MOD3\FASTSLEWRATE3=1 -MOD3\SLOWSLEWRATE3=1 -MOD3\ENABLE4=0 -MOD3\FASTSLEWRATE4=1 -MOD3\SLOWSLEWRATE4=1 -MOD3\ENABLE5=0 -MOD3\FASTSLEWRATE5=1 -MOD3\SLOWSLEWRATE5=1 -MOD3\ENABLE6=0 -MOD3\FASTSLEWRATE6=1 -MOD3\SLOWSLEWRATE6=1 -MOD3\ENABLE7=0 -MOD3\FASTSLEWRATE7=1 -MOD3\SLOWSLEWRATE7=1 -MOD3\ENABLE8=0 -MOD3\FASTSLEWRATE8=1 -MOD3\SLOWSLEWRATE8=1 -MOD3\ENABLE9=0 -MOD3\FASTSLEWRATE9=1 -MOD3\SLOWSLEWRATE9=1 -MOD3\ENABLE10=0 -MOD3\FASTSLEWRATE10=1 -MOD3\SLOWSLEWRATE10=1 -MOD3\ENABLE11=0 -MOD3\FASTSLEWRATE11=1 -MOD3\SLOWSLEWRATE11=1 -MOD3\ENABLE12=0 -MOD3\FASTSLEWRATE12=1 -MOD3\SLOWSLEWRATE12=1 -MOD7\CLAMP1=0.0 -MOD7\CLAMP2=0.0 -MOD7\CLAMP3=1.5 -MOD7\CLAMP4=1.5 -MOD7\PREAMPGAIN=0 -MOD9\HVLC_V1=0.00 -MOD9\HVLC_ORDER1=0 -MOD9\HVLC_V2=20.0 -MOD9\HVLC_ORDER2=0 -MOD9\HVLC_LABEL2=SCI Guard Drain -MOD9\HVLC_V3=0.00 -MOD9\HVLC_ORDER3=0 -MOD9\HVLC_V4=0.00 -MOD9\HVLC_ORDER4=0 -MOD9\HVLC_V5=17.0 -MOD9\HVLC_ORDER5=0 -MOD9\HVLC_LABEL5=SCI E Reset Drain -MOD9\HVLC_V6=17.0 -MOD9\HVLC_ORDER6=0 -MOD9\HVLC_LABEL6=SCI F Reset Drain -MOD9\HVLC_V7=0.00 -MOD9\HVLC_ORDER7=0 -MOD9\HVLC_V8=0.00 -MOD9\HVLC_ORDER8=0 -MOD9\HVLC_V9=0.00 -MOD9\HVLC_ORDER9=0 -MOD9\HVLC_V10=0.00 -MOD9\HVLC_ORDER10=0 -MOD9\HVLC_V11=0.00 -MOD9\HVLC_ORDER11=0 -MOD9\HVLC_V12=0.00 -MOD9\HVLC_ORDER12=0 -MOD9\HVLC_V13=0.00 -MOD9\HVLC_ORDER13=0 -MOD9\HVLC_V14=0.00 -MOD9\HVLC_ORDER14=0 -MOD9\HVLC_V15=0.00 -MOD9\HVLC_ORDER15=0 -MOD9\HVLC_V16=0.00 -MOD9\HVLC_ORDER16=0 -MOD9\HVLC_V17=0.00 -MOD9\HVLC_ORDER17=0 -MOD9\HVLC_V18=0.00 -MOD9\HVLC_ORDER18=0 -MOD9\HVLC_V19=0.00 -MOD9\HVLC_ORDER19=0 -MOD9\HVLC_V20=0.00 -MOD9\HVLC_ORDER20=0 -MOD9\HVLC_V21=0.00 -MOD9\HVLC_ORDER21=0 -MOD9\HVLC_V22=0.00 -MOD9\HVLC_ORDER22=0 -MOD9\HVLC_V23=0.00 -MOD9\HVLC_ORDER23=0 -MOD9\HVLC_V24=0.00 -MOD9\HVLC_ORDER24=0 -MOD9\HVHC_ENABLE1=1 -MOD9\HVHC_V1=29.0 -MOD9\HVHC_IL1=0.1 -MOD9\HVHC_ORDER1=0 -MOD9\HVHC_LABEL1=SCI E Output Drain -MOD9\HVHC_ENABLE2=1 -MOD9\HVHC_V2=29.0 -MOD9\HVHC_IL2=0.1 -MOD9\HVHC_ORDER2=0 -MOD9\HVHC_LABEL2=SCI F Output Drain -MOD9\HVHC_ENABLE3=0 -MOD9\HVHC_V3=29.0 -MOD9\HVHC_IL3=0.0 -MOD9\HVHC_ORDER3=0 -MOD9\HVHC_ENABLE4=0 -MOD9\HVHC_V4=29.0 -MOD9\HVHC_IL4=0.0 -MOD9\HVHC_ORDER4=0 -MOD9\HVHC_ENABLE5=0 -MOD9\HVHC_V5=29.0 -MOD9\HVHC_IL5=0.0 -MOD9\HVHC_ORDER5=0 -MOD9\HVHC_ENABLE6=0 -MOD9\HVHC_V6=29.0 -MOD9\HVHC_IL6=0.0 -MOD9\HVHC_ORDER6=0 -MOD10\LVLC_V1=0.0 -MOD10\LVLC_ORDER1=0 -MOD10\LVLC_V2=0.0 -MOD10\LVLC_ORDER2=0 -MOD10\LVLC_V3=3.0 -MOD10\LVLC_ORDER3=0 -MOD10\LVLC_LABEL3=SCI E Output Gate -MOD10\LVLC_V4=3.0 -MOD10\LVLC_ORDER4=0 -MOD10\LVLC_LABEL4=SCI F Output Gate -MOD10\LVLC_V5=1.0 -MOD10\LVLC_ORDER5=0 -MOD10\LVLC_LABEL5=SCI Summing Well - Low -MOD10\LVLC_V6=12.0 -MOD10\LVLC_ORDER6=0 -MOD10\LVLC_LABEL6=SCI Summing Well - High -MOD10\LVLC_V7=1.0 -MOD10\LVLC_ORDER7=0 -MOD10\LVLC_LABEL7=SCI Reset Gate - Low -MOD10\LVLC_V8=12.0 -MOD10\LVLC_ORDER8=0 -MOD10\LVLC_LABEL8=SCI Reset Gate - High -MOD10\LVLC_V9=0.0 -MOD10\LVLC_ORDER9=0 -MOD10\LVLC_V10=0.0 -MOD10\LVLC_ORDER10=0 -MOD10\LVLC_V11=0.0 -MOD10\LVLC_ORDER11=0 -MOD10\LVLC_V12=0.0 -MOD10\LVLC_ORDER12=0 -MOD10\LVLC_V13=0.0 -MOD10\LVLC_ORDER13=0 -MOD10\LVLC_V14=0.0 -MOD10\LVLC_ORDER14=0 -MOD10\LVLC_V15=0.0 -MOD10\LVLC_ORDER15=0 -MOD10\LVLC_V16=0.0 -MOD10\LVLC_ORDER16=0 -MOD10\LVLC_V17=0.0 -MOD10\LVLC_ORDER17=0 -MOD10\LVLC_V18=0.0 -MOD10\LVLC_ORDER18=0 -MOD10\LVLC_V19=0.0 -MOD10\LVLC_ORDER19=0 -MOD10\LVLC_V20=0.0 -MOD10\LVLC_ORDER20=0 -MOD10\LVLC_V21=0.0 -MOD10\LVLC_ORDER21=0 -MOD10\LVLC_V22=0.0 -MOD10\LVLC_ORDER22=0 -MOD10\LVLC_V23=0.0 -MOD10\LVLC_ORDER23=0 -MOD10\LVLC_V24=0.0 -MOD10\LVLC_ORDER24=0 -MOD10\LVHC_ENABLE1=0 -MOD10\LVHC_V1=0.0 -MOD10\LVHC_IL1=0.0 -MOD10\LVHC_ORDER1=0 -MOD10\LVHC_ENABLE2=0 -MOD10\LVHC_V2=0.0 -MOD10\LVHC_IL2=0.0 -MOD10\LVHC_ORDER2=0 -MOD10\LVHC_ENABLE3=0 -MOD10\LVHC_V3=0.0 -MOD10\LVHC_IL3=0.0 -MOD10\LVHC_ORDER3=0 -MOD10\LVHC_ENABLE4=0 -MOD10\LVHC_V4=0.0 -MOD10\LVHC_IL4=0.0 -MOD10\LVHC_ORDER4=0 -MOD10\LVHC_ENABLE5=0 -MOD10\LVHC_V5=0.0 -MOD10\LVHC_IL5=0.0 -MOD10\LVHC_ORDER5=0 -MOD10\LVHC_ENABLE6=0 -MOD10\LVHC_V6=0.0 -MOD10\LVHC_IL6=0.0 -MOD10\LVHC_ORDER6=0 -MOD12\DIO_SOURCE1=0 -MOD12\DIO_DIR1=0 -MOD12\DIO_SOURCE2=0 -MOD12\DIO_DIR2=0 -MOD12\DIO_SOURCE3=0 -MOD12\DIO_DIR3=0 -MOD12\DIO_SOURCE4=0 -MOD12\DIO_DIR4=0 -MOD12\DIO_POWER=0 -MOD4\XVP_V1=0 -MOD4\XVP_ORDER1=0 -MOD4\XVP_ENABLE1=1 -MOD4\XVP_V2=0 -MOD4\XVP_ORDER2=0 -MOD4\XVP_ENABLE2=1 -MOD4\XVP_V3=0 -MOD4\XVP_ORDER3=0 -MOD4\XVP_ENABLE3=1 -MOD4\XVP_V4=0 -MOD4\XVP_ORDER4=0 -MOD4\XVP_ENABLE4=1 -MOD4\XVN_V1=-100 -MOD4\XVN_ORDER1=0 -MOD4\XVN_ENABLE1=1 -MOD4\XVN_LABEL1=SCI Backside -MOD4\XVN_V2=-0 -MOD4\XVN_ORDER2=0 -MOD4\XVN_ENABLE2=1 -MOD4\XVN_V3=-0 -MOD4\XVN_ORDER3=0 -MOD4\XVN_ENABLE3=1 -MOD4\XVN_V4=-0 -MOD4\XVN_ORDER4=0 -MOD4\XVN_ENABLE4=1 +MOD10\ENABLE1=0 +MOD10\FASTSLEWRATE1=1 +MOD10\SLOWSLEWRATE1=1 +MOD10\ENABLE2=0 +MOD10\FASTSLEWRATE2=1 +MOD10\SLOWSLEWRATE2=1 +MOD10\ENABLE3=0 +MOD10\FASTSLEWRATE3=1 +MOD10\SLOWSLEWRATE3=1 +MOD10\ENABLE4=0 +MOD10\FASTSLEWRATE4=1 +MOD10\SLOWSLEWRATE4=1 +MOD10\ENABLE5=0 +MOD10\FASTSLEWRATE5=1 +MOD10\SLOWSLEWRATE5=1 +MOD10\ENABLE6=0 +MOD10\FASTSLEWRATE6=1 +MOD10\SLOWSLEWRATE6=1 +MOD10\ENABLE7=0 +MOD10\FASTSLEWRATE7=1 +MOD10\SLOWSLEWRATE7=1 +MOD10\ENABLE8=0 +MOD10\FASTSLEWRATE8=1 +MOD10\SLOWSLEWRATE8=1 +MOD10\ENABLE9=0 +MOD10\FASTSLEWRATE9=1 +MOD10\SLOWSLEWRATE9=1 +MOD10\ENABLE10=0 +MOD10\FASTSLEWRATE10=1 +MOD10\SLOWSLEWRATE10=1 +MOD10\ENABLE11=0 +MOD10\FASTSLEWRATE11=1 +MOD10\SLOWSLEWRATE11=1 +MOD10\ENABLE12=0 +MOD10\FASTSLEWRATE12=1 +MOD10\SLOWSLEWRATE12=1 +MOD11\ENABLE1=1 +MOD11\FASTSLEWRATE1=500 +MOD11\SLOWSLEWRATE1=100 +MOD11\ENABLE2=1 +MOD11\FASTSLEWRATE2=500 +MOD11\SLOWSLEWRATE2=100 +MOD11\ENABLE3=1 +MOD11\FASTSLEWRATE3=500 +MOD11\SLOWSLEWRATE3=100 +MOD11\ENABLE4=1 +MOD11\FASTSLEWRATE4=500 +MOD11\SLOWSLEWRATE4=100 +MOD11\ENABLE5=1 +MOD11\FASTSLEWRATE5=500 +MOD11\SLOWSLEWRATE5=100 +MOD11\ENABLE6=1 +MOD11\FASTSLEWRATE6=500 +MOD11\SLOWSLEWRATE6=100 +MOD11\ENABLE7=0 +MOD11\FASTSLEWRATE7=1 +MOD11\SLOWSLEWRATE7=1 +MOD11\ENABLE8=0 +MOD11\FASTSLEWRATE8=1 +MOD11\SLOWSLEWRATE8=1 +MOD11\ENABLE9=0 +MOD11\FASTSLEWRATE9=1 +MOD11\SLOWSLEWRATE9=1 +MOD11\ENABLE10=0 +MOD11\FASTSLEWRATE10=1 +MOD11\SLOWSLEWRATE10=1 +MOD11\ENABLE11=0 +MOD11\FASTSLEWRATE11=1 +MOD11\SLOWSLEWRATE11=1 +MOD11\ENABLE12=0 +MOD11\FASTSLEWRATE12=1 +MOD11\SLOWSLEWRATE12=1 +MOD12\ENABLE1=1 +MOD12\FASTSLEWRATE1=10 +MOD12\SLOWSLEWRATE1=1 +MOD12\ENABLE2=1 +MOD12\FASTSLEWRATE2=10 +MOD12\SLOWSLEWRATE2=1 +MOD12\ENABLE3=1 +MOD12\FASTSLEWRATE3=10 +MOD12\SLOWSLEWRATE3=1 +MOD12\ENABLE4=1 +MOD12\FASTSLEWRATE4=10 +MOD12\SLOWSLEWRATE4=1 +MOD12\ENABLE5=1 +MOD12\FASTSLEWRATE5=10 +MOD12\SLOWSLEWRATE5=1 +MOD12\ENABLE6=1 +MOD12\FASTSLEWRATE6=10 +MOD12\SLOWSLEWRATE6=1 +MOD12\ENABLE7=1 +MOD12\FASTSLEWRATE7=10 +MOD12\SLOWSLEWRATE7=1 +MOD12\ENABLE8=1 +MOD12\FASTSLEWRATE8=10 +MOD12\SLOWSLEWRATE8=1 +MOD12\ENABLE9=1 +MOD12\FASTSLEWRATE9=10 +MOD12\SLOWSLEWRATE9=1 +MOD12\ENABLE10=1 +MOD12\FASTSLEWRATE10=10 +MOD12\SLOWSLEWRATE10=1 +MOD12\ENABLE11=1 +MOD12\FASTSLEWRATE11=10 +MOD12\SLOWSLEWRATE11=1 +MOD12\ENABLE12=1 +MOD12\FASTSLEWRATE12=10 +MOD12\SLOWSLEWRATE12=1 +MOD6\CLAMP1=0.0 +MOD6\CLAMP2=0.0 +MOD6\CLAMP3=1.5 +MOD6\CLAMP4=1.5 +MOD6\PREAMPGAIN=0 +MOD3\HVLC_V1=0.00 +MOD3\HVLC_ORDER1=0 +MOD3\HVLC_V2=20.0 +MOD3\HVLC_ORDER2=0 +MOD3\HVLC_LABEL2=SCI Guard Drain +MOD3\HVLC_V3=0.00 +MOD3\HVLC_ORDER3=0 +MOD3\HVLC_V4=0.00 +MOD3\HVLC_ORDER4=0 +MOD3\HVLC_V5=17.0 +MOD3\HVLC_ORDER5=0 +MOD3\HVLC_LABEL5=SCI E Reset Drain +MOD3\HVLC_V6=17.0 +MOD3\HVLC_ORDER6=0 +MOD3\HVLC_LABEL6=SCI F Reset Drain +MOD3\HVLC_V7=0.00 +MOD3\HVLC_ORDER7=0 +MOD3\HVLC_V8=0.00 +MOD3\HVLC_ORDER8=0 +MOD3\HVLC_V9=0.00 +MOD3\HVLC_ORDER9=0 +MOD3\HVLC_V10=0.00 +MOD3\HVLC_ORDER10=0 +MOD3\HVLC_V11=0.00 +MOD3\HVLC_ORDER11=0 +MOD3\HVLC_V12=0.00 +MOD3\HVLC_ORDER12=0 +MOD3\HVLC_V13=0.00 +MOD3\HVLC_ORDER13=0 +MOD3\HVLC_V14=0.00 +MOD3\HVLC_ORDER14=0 +MOD3\HVLC_V15=0.00 +MOD3\HVLC_ORDER15=0 +MOD3\HVLC_V16=0.00 +MOD3\HVLC_ORDER16=0 +MOD3\HVLC_V17=0.00 +MOD3\HVLC_ORDER17=0 +MOD3\HVLC_V18=0.00 +MOD3\HVLC_ORDER18=0 +MOD3\HVLC_V19=0.00 +MOD3\HVLC_ORDER19=0 +MOD3\HVLC_V20=0.00 +MOD3\HVLC_ORDER20=0 +MOD3\HVLC_V21=0.00 +MOD3\HVLC_ORDER21=0 +MOD3\HVLC_V22=0.00 +MOD3\HVLC_ORDER22=0 +MOD3\HVLC_V23=0.00 +MOD3\HVLC_ORDER23=0 +MOD3\HVLC_V24=0.00 +MOD3\HVLC_ORDER24=0 +MOD3\HVHC_ENABLE1=1 +MOD3\HVHC_V1=29.0 +MOD3\HVHC_IL1=0.1 +MOD3\HVHC_ORDER1=0 +MOD3\HVHC_LABEL1=SCI E Output Drain +MOD3\HVHC_ENABLE2=1 +MOD3\HVHC_V2=29.0 +MOD3\HVHC_IL2=0.1 +MOD3\HVHC_ORDER2=0 +MOD3\HVHC_LABEL2=SCI F Output Drain +MOD3\HVHC_ENABLE3=0 +MOD3\HVHC_V3=29.0 +MOD3\HVHC_IL3=0.0 +MOD3\HVHC_ORDER3=0 +MOD3\HVHC_ENABLE4=0 +MOD3\HVHC_V4=29.0 +MOD3\HVHC_IL4=0.0 +MOD3\HVHC_ORDER4=0 +MOD3\HVHC_ENABLE5=0 +MOD3\HVHC_V5=29.0 +MOD3\HVHC_IL5=0.0 +MOD3\HVHC_ORDER5=0 +MOD3\HVHC_ENABLE6=0 +MOD3\HVHC_V6=29.0 +MOD3\HVHC_IL6=0.0 +MOD3\HVHC_ORDER6=0 +MOD4\LVLC_V1=0.0 +MOD4\LVLC_ORDER1=0 +MOD4\LVLC_V2=0.0 +MOD4\LVLC_ORDER2=0 +MOD4\LVLC_V3=3.0 +MOD4\LVLC_ORDER3=0 +MOD4\LVLC_LABEL3=SCI E Output Gate +MOD4\LVLC_V4=3.0 +MOD4\LVLC_ORDER4=0 +MOD4\LVLC_LABEL4=SCI F Output Gate +MOD4\LVLC_V5=1.0 +MOD4\LVLC_ORDER5=0 +MOD4\LVLC_LABEL5=SCI Summing Well - Low +MOD4\LVLC_V6=12.0 +MOD4\LVLC_ORDER6=0 +MOD4\LVLC_LABEL6=SCI Summing Well - High +MOD4\LVLC_V7=1.0 +MOD4\LVLC_ORDER7=0 +MOD4\LVLC_LABEL7=SCI Reset Gate - Low +MOD4\LVLC_V8=12.0 +MOD4\LVLC_ORDER8=0 +MOD4\LVLC_LABEL8=SCI Reset Gate - High +MOD4\LVLC_V9=0.0 +MOD4\LVLC_ORDER9=0 +MOD4\LVLC_V10=0.0 +MOD4\LVLC_ORDER10=0 +MOD4\LVLC_V11=0.0 +MOD4\LVLC_ORDER11=0 +MOD4\LVLC_V12=0.0 +MOD4\LVLC_ORDER12=0 +MOD4\LVLC_V13=0.0 +MOD4\LVLC_ORDER13=0 +MOD4\LVLC_V14=0.0 +MOD4\LVLC_ORDER14=0 +MOD4\LVLC_V15=0.0 +MOD4\LVLC_ORDER15=0 +MOD4\LVLC_V16=0.0 +MOD4\LVLC_ORDER16=0 +MOD4\LVLC_V17=0.0 +MOD4\LVLC_ORDER17=0 +MOD4\LVLC_V18=0.0 +MOD4\LVLC_ORDER18=0 +MOD4\LVLC_V19=0.0 +MOD4\LVLC_ORDER19=0 +MOD4\LVLC_V20=0.0 +MOD4\LVLC_ORDER20=0 +MOD4\LVLC_V21=0.0 +MOD4\LVLC_ORDER21=0 +MOD4\LVLC_V22=0.0 +MOD4\LVLC_ORDER22=0 +MOD4\LVLC_V23=0.0 +MOD4\LVLC_ORDER23=0 +MOD4\LVLC_V24=0.0 +MOD4\LVLC_ORDER24=0 +MOD4\LVHC_ENABLE1=0 +MOD4\LVHC_V1=0.0 +MOD4\LVHC_IL1=0.0 +MOD4\LVHC_ORDER1=0 +MOD4\LVHC_ENABLE2=0 +MOD4\LVHC_V2=0.0 +MOD4\LVHC_IL2=0.0 +MOD4\LVHC_ORDER2=0 +MOD4\LVHC_ENABLE3=0 +MOD4\LVHC_V3=0.0 +MOD4\LVHC_IL3=0.0 +MOD4\LVHC_ORDER3=0 +MOD4\LVHC_ENABLE4=0 +MOD4\LVHC_V4=0.0 +MOD4\LVHC_IL4=0.0 +MOD4\LVHC_ORDER4=0 +MOD4\LVHC_ENABLE5=0 +MOD4\LVHC_V5=0.0 +MOD4\LVHC_IL5=0.0 +MOD4\LVHC_ORDER5=0 +MOD4\LVHC_ENABLE6=0 +MOD4\LVHC_V6=0.0 +MOD4\LVHC_IL6=0.0 +MOD4\LVHC_ORDER6=0 +MOD1\DIO_SOURCE1=0 +MOD1\DIO_DIR1=0 +MOD1\DIO_SOURCE2=0 +MOD1\DIO_DIR2=0 +MOD1\DIO_SOURCE3=0 +MOD1\DIO_DIR3=0 +MOD1\DIO_SOURCE4=0 +MOD1\DIO_DIR4=0 +MOD1\DIO_POWER=0 +MOD9\XVP_V1=0 +MOD9\XVP_ORDER1=0 +MOD9\XVP_ENABLE1=1 +MOD9\XVP_V2=0 +MOD9\XVP_ORDER2=0 +MOD9\XVP_ENABLE2=1 +MOD9\XVP_V3=0 +MOD9\XVP_ORDER3=0 +MOD9\XVP_ENABLE3=1 +MOD9\XVP_V4=0 +MOD9\XVP_ORDER4=0 +MOD9\XVP_ENABLE4=1 +MOD9\XVN_V1=-100 +MOD9\XVN_ORDER1=0 +MOD9\XVN_ENABLE1=1 +MOD9\XVN_LABEL1=SCI Backside +MOD9\XVN_V2=-0 +MOD9\XVN_ORDER2=0 +MOD9\XVN_ENABLE2=1 +MOD9\XVN_V3=-0 +MOD9\XVN_ORDER3=0 +MOD9\XVN_ENABLE3=1 +MOD9\XVN_V4=-0 +MOD9\XVN_ORDER4=0 +MOD9\XVN_ENABLE4=1 STATE0\NAME=STATE000 STATE0\CONTROL="0,3F" STATE1\NAME=STATE001 @@ -422,35 +422,35 @@ BACKPLANE_VERSION=0.0.0 MOD1_ID=0000000000000000 MOD1_REV=0 MOD1_VERSION=0.0.0 -MOD1_TYPE=16 -MOD2_ID=0000000000000000 -MOD2_REV=0 -MOD2_VERSION=0.0.0 -MOD2_TYPE=16 +MOD1_TYPE=10 MOD3_ID=0000000000000000 MOD3_REV=0 MOD3_VERSION=0.0.0 -MOD3_TYPE=16 +MOD3_TYPE=4 MOD4_ID=0000000000000000 MOD4_REV=0 MOD4_VERSION=0.0.0 -MOD4_TYPE=12 -MOD7_ID=0000000000000000 -MOD7_REV=0 -MOD7_VERSION=0.0.0 -MOD7_TYPE=2 +MOD4_TYPE=3 +MOD6_ID=0000000000000000 +MOD6_REV=0 +MOD6_VERSION=0.0.0 +MOD6_TYPE=2 MOD9_ID=0000000000000000 MOD9_REV=0 MOD9_VERSION=0.0.0 -MOD9_TYPE=4 +MOD9_TYPE=12 MOD10_ID=0000000000000000 MOD10_REV=0 MOD10_VERSION=0.0.0 -MOD10_TYPE=3 +MOD10_TYPE=16 +MOD11_ID=0000000000000000 +MOD11_REV=0 +MOD11_VERSION=0.0.0 +MOD11_TYPE=16 MOD12_ID=0000000000000000 MOD12_REV=0 MOD12_VERSION=0.0.0 -MOD12_TYPE=10 +MOD12_TYPE=16 [MODE_DEFAULT] ARCH:AMPS_PER_CCD_HORI=2 ARCH:AMPS_PER_CCD_VERT=1 From b15db434532893bd400e2025ad0d2345b985a1ed Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 13 Jan 2025 09:18:36 -0800 Subject: [PATCH 028/194] Change defeval to define for all instances --- src/deimos/deimos.def | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index a7817ab..906c7bd 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -42,16 +42,16 @@ #define _SERIALPRESCAN 50 #define _SERIALOVERSCAN 100 #define _PARALLELOVERSCAN 50 -#defeval _IMAGEROWS #eval _SECTIONROWS*2 -#defeval _IMAGECOLS #eval _SECTIONCOLS -#defeval _IDLE_LINES #eval _SKIP_LINES + _IMAGEROWS +#define _IMAGEROWS #eval _SECTIONROWS*2 +#define _IMAGECOLS #eval _SECTIONCOLS +#define _IDLE_LINES #eval _SKIP_LINES + _IMAGEROWS -#defeval _LINENUM #eval _IMAGEROWS + _PARALLELOVERSCAN - _SKIP_LINES +#define _LINENUM #eval _IMAGEROWS + _PARALLELOVERSCAN - _SKIP_LINES /* Number of Pixels depends on if both output #if _SCI_SER_CLOCK_DIR == SPLIT - #defeval _PIXELNUM #eval _IMAGECOLS/2 + _SERIALPRESCAN + _SERIALOVERSCAN + #define _PIXELNUM #eval _IMAGECOLS/2 + _SERIALPRESCAN + _SERIALOVERSCAN #elif _SCI_SER_CLOCK_DIR == F_RIGHT || _SCI_SER_CLOCK_DIR == E_LEFT - #defeval _PIXELNUM #eval _IMAGECOLS + _SERIALPRESCAN + _SERIALOVERSCAN + #define _PIXELNUM #eval _IMAGECOLS + _SERIALPRESCAN + _SERIALOVERSCAN #endif From 716609ae6fc3fec0342b8daa0e47627583752bf3 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 13 Jan 2025 09:29:03 -0800 Subject: [PATCH 029/194] Fixing _PIXELNUM conditional statement --- src/deimos/deimos.def | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 906c7bd..14932d5 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -13,7 +13,7 @@ * Configuration modes */ -#define _SCI_SER_CLOCK_DIR SPLIT /* SPLIT | | E_LEFT | F_RIGHT */ +#define _SCI_SER_CLOCK_DIR SPLIT /* SPLIT || E_LEFT || F_RIGHT */ /** -------------------------------------------------------------------------- @@ -50,7 +50,8 @@ /* Number of Pixels depends on if both output #if _SCI_SER_CLOCK_DIR == SPLIT #define _PIXELNUM #eval _IMAGECOLS/2 + _SERIALPRESCAN + _SERIALOVERSCAN -#elif _SCI_SER_CLOCK_DIR == F_RIGHT || _SCI_SER_CLOCK_DIR == E_LEFT +#endif +#if _SCI_SER_CLOCK_DIR == F_RIGHT || _SCI_SER_CLOCK_DIR == E_LEFT #define _PIXELNUM #eval _IMAGECOLS + _SERIALPRESCAN + _SERIALOVERSCAN #endif From 9246a135db3bb1e6e8b52a55827968c496551c8e Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 13 Jan 2025 09:54:37 -0800 Subject: [PATCH 030/194] attempt at ACF fixing; hardcoded _PIXELNUM --- src/deimos/deimos.cds | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index b1993ba..26ddc39 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -8,7 +8,7 @@ BIGBUF = _ARCHON_FRAMEBUFS FRAMEMODE = _ARCHON_FRAMEMODE LINECOUNT = _LINENUM -PIXELCOUNT = _PIXELNUM +PIXELCOUNT = 100 /* _PIXELNUM */ RAWENABLE = _RAW_ENABLE RAWENDLINE = _RAW_ENDLINE RAWSAMPLES = _RAW_SAMPLES From 532348626491df62e145e3488f4b99b94e9da121 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Mon, 13 Jan 2025 17:55:46 +0000 Subject: [PATCH 031/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 5a967d6..257252c 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -2,7 +2,7 @@ BIGBUF = _ARCHON_FRAMEBUFS FRAMEMODE = _ARCHON_FRAMEMODE LINECOUNT = _LINENUM -PIXELCOUNT = _PIXELNUM +PIXELCOUNT = 100 RAWENABLE = _RAW_ENABLE RAWENDLINE = _RAW_ENDLINE RAWSAMPLES = _RAW_SAMPLES From fff796c4cba9d2f4b7bb9640858cc4da8b2948c7 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 13 Jan 2025 10:02:17 -0800 Subject: [PATCH 032/194] fixed LVDS waveform definition such that transitions are only defined as HIGH or LOW --- src/deimos/deimos.waveform | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 29533f9..aa8eaf6 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -75,9 +75,9 @@ #define LOW 0 WAVEFORM SerialRecieving { - 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; + 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; - .+SCLK_RCV_RESET: SET RG TO _RG_CLOCK_HIGH, FAST; + .+SCLK_RCV_RESET: SET RG TO LOW; } WAVEFORM LineTransfer { @@ -103,10 +103,10 @@ WAVEFORM wPixel { SET LINE TO LOW; /* Starts at beginning of waveform */ /* NEED TO CLARIFY SUMMING WELL BEHAVIOUR */ - 0: SET RG TO HIGH, FAST; - .+TWX: SET RG TO LOW, FAST; - TSW: SET SW TO LOW, FAST; - .+SW_settleT: SET SW TO HIGH, SLOW; + 0: SET RG TO HIGH; + .+TWX: SET RG TO LOW; + TSW: SET SW TO LOW; + .+SW_settleT: SET SW TO HIGH; /* Do something with summing well (following RG) */ 0: SET SCI_SCLK1 TO HIGH; @@ -122,15 +122,11 @@ WAVEFORM wPixel { /*****************************************/ WAVEFORM wReset { - 0: SET RG TO _RG_CLOCK_HIGH; + 0: SET RG TO HIGH; } WAVEFORM wUnsetReset { - 0: SET RG TO _RG_CLOCK_LOW; -} - -WAVEFORM wUnsetReset { - 0: SET RG TO _RG_CLOCK_LOW; + 0: SET RG TO LOW; } WAVEFORM OS_Clamp { From f5b353d6d35587d4c1bbaae2b97200059f16026c Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 13 Jan 2025 10:08:45 -0800 Subject: [PATCH 033/194] removing unused definitions --- src/deimos/deimos.def | 8 -------- 1 file changed, 8 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 14932d5..8ce94eb 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -88,14 +88,6 @@ #define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ #define _SER_CLOCK_RCV 13 /* Higher than serial clock high */ -#define _OUTPUT_GATE 3 /* [ 0.50, 4.00] */ - -#define _SW_CLOCK_HIGH 3.3 /* Gate driven see .mod for voltage def */ -#define _SW_CLOCK_LOW 0.0 - -#define _RG_CLOCK_HIGH 3.3 /* Gate driven see .mod for voltage def */ -#define _RG_CLOCK_LOW 0.0 - #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ From f477e16eac497694473ac97c9b02be6e403f9420 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 13 Jan 2025 11:16:11 -0800 Subject: [PATCH 034/194] attempts to fixed - error parsing system configuration - message in archongui --- src/deimos/deimos.cds | 11 ++--------- src/deimos/deimos.mod | 11 +---------- src/deimos/deimos.modes | 2 +- 3 files changed, 4 insertions(+), 20 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 26ddc39..8cd6bfb 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -20,15 +20,8 @@ SHP1 = _FIRST_RESET_SAMPLE SHP2 = _LAST_RESET_SAMPLE SHD1 = _FIRST_VIDEO_SAMPLE SHD2 = _LAST_VIDEO_SAMPLE -TAPLINE0 ="AD5L,1,1022"/*"AD5L,1,0" */ -TAPLINE1 ="AD6L,1,1369"/*"AD6R,1,0"*/ -TAPLINE2 ="AD7L,1,1404"/*"AD7L,1,0"*/ -TAPLINE3 ="AD8L,1,1094"/*"AD8R,1,0" */ -TAPLINE4 ="" -TAPLINE5 ="" -TAPLINE6 ="" -TAPLINE7 ="" -TAPLINES=16 +TAPLINE0 ="AM1,1,0" +TAPLINES=1 TRIGOUTFORCE=0 TRIGOUTINVERT=1 TRIGOUTLEVEL=0 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 3dc3b49..45a7afe 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -116,21 +116,12 @@ SLOT 4 lvbias { LVHC 6 [0.00,0.0,0,0]; } -/* review */ -SLOT 6 ad { - CLAMP 1 = 0; - CLAMP 2 = 0; - CLAMP 3 = 1.5; - CLAMP 4 = 1.5; - PREAMPGAIN = low; -} - SLOT 9 xvbias { PBIAS 1 [0,0]; PBIAS 2 [0,0]; PBIAS 3 [0,0]; PBIAS 4 [0,0]; - NBIAS 1 [0,-100] "SCI Backside"; + NBIAS 1 [0,-95] "SCI Backside"; NBIAS 2 [0,-0]; NBIAS 3 [0,-0]; NBIAS 4 [0,-0]; diff --git a/src/deimos/deimos.modes b/src/deimos/deimos.modes index 94308f1..435cb24 100644 --- a/src/deimos/deimos.modes +++ b/src/deimos/deimos.modes @@ -1,4 +1,4 @@ [MODE_DEFAULT] -ARCH:NUM_CCDS=4 +ARCH:NUM_CCDS=2 ARCH:AMPS_PER_CCD_HORI=2 ARCH:AMPS_PER_CCD_VERT=1 From 3a4bdade74bcb0810cf13b1029558ef5d957ee3b Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Mon, 13 Jan 2025 19:17:34 +0000 Subject: [PATCH 035/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 24 ++++-------------------- 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 257252c..fe139b7 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -14,15 +14,8 @@ SHP1 = _FIRST_RESET_SAMPLE SHP2 = _LAST_RESET_SAMPLE SHD1 = _FIRST_VIDEO_SAMPLE SHD2 = _LAST_VIDEO_SAMPLE -TAPLINE0 ="AD5L,1,1022" -TAPLINE1 ="AD6L,1,1369" -TAPLINE2 ="AD7L,1,1404" -TAPLINE3 ="AD8L,1,1094" -TAPLINE4 ="" -TAPLINE5 ="" -TAPLINE6 ="" -TAPLINE7 ="" -TAPLINES=16 +TAPLINE0 ="AM1,1,0" +TAPLINES=1 TRIGOUTFORCE=0 TRIGOUTINVERT=1 TRIGOUTLEVEL=0 @@ -205,11 +198,6 @@ MOD12\SLOWSLEWRATE11=1 MOD12\ENABLE12=1 MOD12\FASTSLEWRATE12=10 MOD12\SLOWSLEWRATE12=1 -MOD6\CLAMP1=0.0 -MOD6\CLAMP2=0.0 -MOD6\CLAMP3=1.5 -MOD6\CLAMP4=1.5 -MOD6\PREAMPGAIN=0 MOD3\HVLC_V1=0.00 MOD3\HVLC_ORDER1=0 MOD3\HVLC_V2=20.0 @@ -386,7 +374,7 @@ MOD9\XVP_ENABLE3=1 MOD9\XVP_V4=0 MOD9\XVP_ORDER4=0 MOD9\XVP_ENABLE4=1 -MOD9\XVN_V1=-100 +MOD9\XVN_V1=-95 MOD9\XVN_ORDER1=0 MOD9\XVN_ENABLE1=1 MOD9\XVN_LABEL1=SCI Backside @@ -431,10 +419,6 @@ MOD4_ID=0000000000000000 MOD4_REV=0 MOD4_VERSION=0.0.0 MOD4_TYPE=3 -MOD6_ID=0000000000000000 -MOD6_REV=0 -MOD6_VERSION=0.0.0 -MOD6_TYPE=2 MOD9_ID=0000000000000000 MOD9_REV=0 MOD9_VERSION=0.0.0 @@ -454,4 +438,4 @@ MOD12_TYPE=16 [MODE_DEFAULT] ARCH:AMPS_PER_CCD_HORI=2 ARCH:AMPS_PER_CCD_VERT=1 -ARCH:NUM_CCDS=4 +ARCH:NUM_CCDS=2 From cf2749c845c99744560ba4dbdd2156fcab349a2c Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 13 Jan 2025 11:18:36 -0800 Subject: [PATCH 036/194] fixed driverx module ordering --- src/deimos/deimos.mod | 4 ++-- src/deimos/deimos.signals | 12 ++++++------ 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 45a7afe..500e293 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -127,7 +127,7 @@ SLOT 9 xvbias { NBIAS 4 [0,-0]; } -SLOT 10 driverx { +SLOT 11 driverx { DRVX 1 [1,1,0]; DRVX 2 [1,1,0]; DRVX 3 [1,1,0]; @@ -142,7 +142,7 @@ SLOT 10 driverx { DRVX 12 [1,1,0]; } -SLOT 11 driverx { +SLOT 10 driverx { DRVX 1 [TG_fast,TG_slow,1]; DRVX 2 [SCLK_fast,SCLK_slow,1]; DRVX 3 [SCLK_fast,SCLK_slow,1]; diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 47c4737..646e9aa 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -46,12 +46,12 @@ /**** Serial Phase Signal Definitions ****/ -#define TG 11 : 1 -#define SCLK_EF 11 : 2 -#define SCLK_E2 11 : 3 -#define SCLK_E1 11 : 4 -#define SCLK_F2 11 : 5 -#define SCLK_F1 11 : 6 +#define TG 10 : 1 +#define SCLK_EF 10 : 2 +#define SCLK_E2 10 : 3 +#define SCLK_E1 10 : 4 +#define SCLK_F2 10 : 5 +#define SCLK_F1 10 : 6 /**** Parallel Phase Signal Definitions ****/ /* Each detector is made of two 2048x2048 From 5e12c6943466c95f58bd0b243f247761249187d3 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Mon, 13 Jan 2025 19:19:36 +0000 Subject: [PATCH 037/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 116 ++++++++++++++++++++++++------------------------- 1 file changed, 58 insertions(+), 58 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index fe139b7..27873e6 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -90,60 +90,24 @@ LINE58="STATE000; RETURN AD_Clamp" LINE59=AD_Clamp_: LINE60="STATE000; RETURN AD_Clamp_" LINES=61 -MOD10\ENABLE1=0 -MOD10\FASTSLEWRATE1=1 -MOD10\SLOWSLEWRATE1=1 -MOD10\ENABLE2=0 -MOD10\FASTSLEWRATE2=1 -MOD10\SLOWSLEWRATE2=1 -MOD10\ENABLE3=0 -MOD10\FASTSLEWRATE3=1 -MOD10\SLOWSLEWRATE3=1 -MOD10\ENABLE4=0 -MOD10\FASTSLEWRATE4=1 -MOD10\SLOWSLEWRATE4=1 -MOD10\ENABLE5=0 -MOD10\FASTSLEWRATE5=1 -MOD10\SLOWSLEWRATE5=1 -MOD10\ENABLE6=0 -MOD10\FASTSLEWRATE6=1 -MOD10\SLOWSLEWRATE6=1 -MOD10\ENABLE7=0 -MOD10\FASTSLEWRATE7=1 -MOD10\SLOWSLEWRATE7=1 -MOD10\ENABLE8=0 -MOD10\FASTSLEWRATE8=1 -MOD10\SLOWSLEWRATE8=1 -MOD10\ENABLE9=0 -MOD10\FASTSLEWRATE9=1 -MOD10\SLOWSLEWRATE9=1 -MOD10\ENABLE10=0 -MOD10\FASTSLEWRATE10=1 -MOD10\SLOWSLEWRATE10=1 -MOD10\ENABLE11=0 -MOD10\FASTSLEWRATE11=1 -MOD10\SLOWSLEWRATE11=1 -MOD10\ENABLE12=0 -MOD10\FASTSLEWRATE12=1 -MOD10\SLOWSLEWRATE12=1 -MOD11\ENABLE1=1 -MOD11\FASTSLEWRATE1=500 -MOD11\SLOWSLEWRATE1=100 -MOD11\ENABLE2=1 -MOD11\FASTSLEWRATE2=500 -MOD11\SLOWSLEWRATE2=100 -MOD11\ENABLE3=1 -MOD11\FASTSLEWRATE3=500 -MOD11\SLOWSLEWRATE3=100 -MOD11\ENABLE4=1 -MOD11\FASTSLEWRATE4=500 -MOD11\SLOWSLEWRATE4=100 -MOD11\ENABLE5=1 -MOD11\FASTSLEWRATE5=500 -MOD11\SLOWSLEWRATE5=100 -MOD11\ENABLE6=1 -MOD11\FASTSLEWRATE6=500 -MOD11\SLOWSLEWRATE6=100 +MOD11\ENABLE1=0 +MOD11\FASTSLEWRATE1=1 +MOD11\SLOWSLEWRATE1=1 +MOD11\ENABLE2=0 +MOD11\FASTSLEWRATE2=1 +MOD11\SLOWSLEWRATE2=1 +MOD11\ENABLE3=0 +MOD11\FASTSLEWRATE3=1 +MOD11\SLOWSLEWRATE3=1 +MOD11\ENABLE4=0 +MOD11\FASTSLEWRATE4=1 +MOD11\SLOWSLEWRATE4=1 +MOD11\ENABLE5=0 +MOD11\FASTSLEWRATE5=1 +MOD11\SLOWSLEWRATE5=1 +MOD11\ENABLE6=0 +MOD11\FASTSLEWRATE6=1 +MOD11\SLOWSLEWRATE6=1 MOD11\ENABLE7=0 MOD11\FASTSLEWRATE7=1 MOD11\SLOWSLEWRATE7=1 @@ -162,6 +126,42 @@ MOD11\SLOWSLEWRATE11=1 MOD11\ENABLE12=0 MOD11\FASTSLEWRATE12=1 MOD11\SLOWSLEWRATE12=1 +MOD10\ENABLE1=1 +MOD10\FASTSLEWRATE1=500 +MOD10\SLOWSLEWRATE1=100 +MOD10\ENABLE2=1 +MOD10\FASTSLEWRATE2=500 +MOD10\SLOWSLEWRATE2=100 +MOD10\ENABLE3=1 +MOD10\FASTSLEWRATE3=500 +MOD10\SLOWSLEWRATE3=100 +MOD10\ENABLE4=1 +MOD10\FASTSLEWRATE4=500 +MOD10\SLOWSLEWRATE4=100 +MOD10\ENABLE5=1 +MOD10\FASTSLEWRATE5=500 +MOD10\SLOWSLEWRATE5=100 +MOD10\ENABLE6=1 +MOD10\FASTSLEWRATE6=500 +MOD10\SLOWSLEWRATE6=100 +MOD10\ENABLE7=0 +MOD10\FASTSLEWRATE7=1 +MOD10\SLOWSLEWRATE7=1 +MOD10\ENABLE8=0 +MOD10\FASTSLEWRATE8=1 +MOD10\SLOWSLEWRATE8=1 +MOD10\ENABLE9=0 +MOD10\FASTSLEWRATE9=1 +MOD10\SLOWSLEWRATE9=1 +MOD10\ENABLE10=0 +MOD10\FASTSLEWRATE10=1 +MOD10\SLOWSLEWRATE10=1 +MOD10\ENABLE11=0 +MOD10\FASTSLEWRATE11=1 +MOD10\SLOWSLEWRATE11=1 +MOD10\ENABLE12=0 +MOD10\FASTSLEWRATE12=1 +MOD10\SLOWSLEWRATE12=1 MOD12\ENABLE1=1 MOD12\FASTSLEWRATE1=10 MOD12\SLOWSLEWRATE1=1 @@ -423,14 +423,14 @@ MOD9_ID=0000000000000000 MOD9_REV=0 MOD9_VERSION=0.0.0 MOD9_TYPE=12 -MOD10_ID=0000000000000000 -MOD10_REV=0 -MOD10_VERSION=0.0.0 -MOD10_TYPE=16 MOD11_ID=0000000000000000 MOD11_REV=0 MOD11_VERSION=0.0.0 MOD11_TYPE=16 +MOD10_ID=0000000000000000 +MOD10_REV=0 +MOD10_VERSION=0.0.0 +MOD10_TYPE=16 MOD12_ID=0000000000000000 MOD12_REV=0 MOD12_VERSION=0.0.0 From e3945e858332f055cccc2d6cec28f16249caf9bf Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 13 Jan 2025 12:45:43 -0800 Subject: [PATCH 038/194] reversing modules to conform to transition card geometry; modules have been swapped in archon chassis --- src/deimos/deimos.mod | 126 ++++++++++++++++++++------------------ src/deimos/deimos.signals | 60 +++++++++--------- 2 files changed, 94 insertions(+), 92 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 500e293..f2a9726 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -27,14 +27,66 @@ #define TG_fast 500 /* Evaluate Expression? */ #define TG_slow 100 /* Evaluate Expression? */ -SLOT 1 lvds { - DIO 1 [0,0]; - DIO 2 [0,0]; - DIO 3 [0,0]; - DIO 4 [0,0]; - DIOPOWER = 0; +SLOT 1 driverx { + DRVX 1 [PCLK_fast,PCLK_slow,1]; + DRVX 2 [PCLK_fast,PCLK_slow,1]; + DRVX 3 [PCLK_fast,PCLK_slow,1]; + DRVX 4 [PCLK_fast,PCLK_slow,1]; + DRVX 5 [PCLK_fast,PCLK_slow,1]; + DRVX 6 [PCLK_fast,PCLK_slow,1]; + DRVX 7 [PCLK_fast,PCLK_slow,1]; + DRVX 8 [PCLK_fast,PCLK_slow,1]; + DRVX 9 [PCLK_fast,PCLK_slow,1]; + DRVX 10 [PCLK_fast,PCLK_slow,1]; + DRVX 11 [PCLK_fast,PCLK_slow,1]; + DRVX 12 [PCLK_fast,PCLK_slow,1]; +} + +/* Remove comment when adding FCS +SLOT 2 driverx { + DRVX 1 [1,1,0]; + DRVX 2 [1,1,0]; + DRVX 3 [1,1,0]; + DRVX 4 [1,1,0]; + DRVX 5 [1,1,0]; + DRVX 6 [1,1,0]; + DRVX 7 [1,1,0]; + DRVX 8 [1,1,0]; + DRVX 9 [1,1,0]; + DRVX 10 [1,1,0]; + DRVX 11 [1,1,0]; + DRVX 12 [1,1,0]; +} +**********************************/ + +SLOT 3 driverx { + DRVX 1 [TG_fast,TG_slow,1]; + DRVX 2 [SCLK_fast,SCLK_slow,1]; + DRVX 3 [SCLK_fast,SCLK_slow,1]; + DRVX 4 [SCLK_fast,SCLK_slow,1]; + DRVX 5 [SCLK_fast,SCLK_slow,1]; + DRVX 6 [SCLK_fast,SCLK_slow,1]; + DRVX 7 [1,1,0]; + DRVX 8 [1,1,0]; + DRVX 9 [1,1,0]; + DRVX 10 [1,1,0]; + DRVX 11 [1,1,0]; + DRVX 12 [1,1,0]; +} + +SLOT 4 xvbias { + PBIAS 1 [0,0]; + PBIAS 2 [0,0]; + PBIAS 3 [0,0]; + PBIAS 4 [0,0]; + NBIAS 1 [0,-95] "SCI Backside"; + NBIAS 2 [0,-0]; + NBIAS 3 [0,-0]; + NBIAS 4 [0,-0]; } +/* SLOT 7 ADM */ + /****** Bias Power Up Order ******/ /* 1 : Front Substrate */ /* 1 : Back Substrate to 0V */ @@ -50,7 +102,7 @@ SLOT 1 lvds { /* 4 : Reset Gate Low */ /* 5 : Back Substrate to -100V */ -SLOT 3 hvbias { +SLOT 9 hvbias { HVLC 1 [0.00,0]; HVLC 2 [20.0,0] "SCI Guard Drain"; HVLC 3 [0.00,0]; @@ -83,7 +135,7 @@ SLOT 3 hvbias { HVHC 6 [29.0,0.0,0,0]; } -SLOT 4 lvbias { +SLOT 10 lvbias { LVLC 1 [00.0,0]; LVLC 2 [00.0,0]; LVLC 3 [3.00,0] "SCI E Output Gate"; @@ -116,61 +168,15 @@ SLOT 4 lvbias { LVHC 6 [0.00,0.0,0,0]; } -SLOT 9 xvbias { - PBIAS 1 [0,0]; - PBIAS 2 [0,0]; - PBIAS 3 [0,0]; - PBIAS 4 [0,0]; - NBIAS 1 [0,-95] "SCI Backside"; - NBIAS 2 [0,-0]; - NBIAS 3 [0,-0]; - NBIAS 4 [0,-0]; -} - -SLOT 11 driverx { - DRVX 1 [1,1,0]; - DRVX 2 [1,1,0]; - DRVX 3 [1,1,0]; - DRVX 4 [1,1,0]; - DRVX 5 [1,1,0]; - DRVX 6 [1,1,0]; - DRVX 7 [1,1,0]; - DRVX 8 [1,1,0]; - DRVX 9 [1,1,0]; - DRVX 10 [1,1,0]; - DRVX 11 [1,1,0]; - DRVX 12 [1,1,0]; +SLOT 12 lvds { + DIO 1 [0,0]; + DIO 2 [0,0]; + DIO 3 [0,0]; + DIO 4 [0,0]; + DIOPOWER = 0; } -SLOT 10 driverx { - DRVX 1 [TG_fast,TG_slow,1]; - DRVX 2 [SCLK_fast,SCLK_slow,1]; - DRVX 3 [SCLK_fast,SCLK_slow,1]; - DRVX 4 [SCLK_fast,SCLK_slow,1]; - DRVX 5 [SCLK_fast,SCLK_slow,1]; - DRVX 6 [SCLK_fast,SCLK_slow,1]; - DRVX 7 [1,1,0]; - DRVX 8 [1,1,0]; - DRVX 9 [1,1,0]; - DRVX 10 [1,1,0]; - DRVX 11 [1,1,0]; - DRVX 12 [1,1,0]; -} -SLOT 12 driverx { - DRVX 1 [PCLK_fast,PCLK_slow,1]; - DRVX 2 [PCLK_fast,PCLK_slow,1]; - DRVX 3 [PCLK_fast,PCLK_slow,1]; - DRVX 4 [PCLK_fast,PCLK_slow,1]; - DRVX 5 [PCLK_fast,PCLK_slow,1]; - DRVX 6 [PCLK_fast,PCLK_slow,1]; - DRVX 7 [PCLK_fast,PCLK_slow,1]; - DRVX 8 [PCLK_fast,PCLK_slow,1]; - DRVX 9 [PCLK_fast,PCLK_slow,1]; - DRVX 10 [PCLK_fast,PCLK_slow,1]; - DRVX 11 [PCLK_fast,PCLK_slow,1]; - DRVX 12 [PCLK_fast,PCLK_slow,1]; -} diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 646e9aa..7ed7a09 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -32,26 +32,7 @@ #define LINE 0 : 3 /* LINE signal from the backplane */ #define PIXEL 0 : 4 /* PIXEL signal from the backplane */ -#define AD7 6 : 1 /* Access to AC Clamp */ - -/**** LVDS Driver Signal definitions ****/ - -#define RG_1 1 : 7 -#define RG_2 1 : 8 -#define AC_Clamp 1 : 12 -#define SW_1 1 : 15 -#define SW_2 1 : 16 -/* NOP Definition - NEEDS TO BE UNUSED */ -#define NOP 1 : 1 - -/**** Serial Phase Signal Definitions ****/ - -#define TG 10 : 1 -#define SCLK_EF 10 : 2 -#define SCLK_E2 10 : 3 -#define SCLK_E1 10 : 4 -#define SCLK_F2 10 : 5 -#define SCLK_F1 10 : 6 +#define AD7 7 : 1 /* Access to AC Clamp */ /**** Parallel Phase Signal Definitions ****/ /* Each detector is made of two 2048x2048 @@ -65,22 +46,37 @@ /* Note: _1 refers to detectors 1-4 */ /* _2 refers to detectors 5-8 */ -#define PCLK_B3_2 12 : 1 -#define PCLK_A3_2 12 : 2 -#define PCLK_B2_2 12 : 3 -#define PCLK_A2_2 12 : 4 -#define PCLK_B1_2 12 : 5 -#define PCLK_A1_2 12 : 6 -#define PCLK_A1_1 12 : 7 -#define PCLK_B1_1 12 : 8 -#define PCLK_A2_1 12 : 9 -#define PCLK_B2_1 12 : 10 -#define PCLK_A3_1 12 : 11 -#define PCLK_B3_1 12 : 12 +#define PCLK_B3_2 1 : 1 +#define PCLK_A3_2 1 : 2 +#define PCLK_B2_2 1 : 3 +#define PCLK_A2_2 1 : 4 +#define PCLK_B1_2 1 : 5 +#define PCLK_A1_2 1 : 6 +#define PCLK_A1_1 1 : 7 +#define PCLK_B1_1 1 : 8 +#define PCLK_A2_1 1 : 9 +#define PCLK_B2_1 1 : 10 +#define PCLK_A3_1 1 : 11 +#define PCLK_B3_1 1 : 12 +/**** Serial Phase Signal Definitions ****/ +#define TG 3 : 1 +#define SCLK_EF 3 : 2 +#define SCLK_E2 3 : 3 +#define SCLK_E1 3 : 4 +#define SCLK_F2 3 : 5 +#define SCLK_F1 3 : 6 +/**** LVDS Driver Signal definitions ****/ +#define RG_1 12 : 7 +#define RG_2 12 : 8 +#define AC_Clamp 12 : 12 +#define SW_1 12 : 15 +#define SW_2 12 : 16 +/* NOP Definition - NEEDS TO BE UNUSED */ +#define NOP 12 : 1 /**** Bias Voltage Definitions ****/ From fe6a3da9ae9e1d76a242241b6d847501a98609f0 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Mon, 13 Jan 2025 20:46:43 +0000 Subject: [PATCH 039/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 574 +++++++++++++++++++++++-------------------------- 1 file changed, 267 insertions(+), 307 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 27873e6..2268eeb 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -90,303 +90,267 @@ LINE58="STATE000; RETURN AD_Clamp" LINE59=AD_Clamp_: LINE60="STATE000; RETURN AD_Clamp_" LINES=61 -MOD11\ENABLE1=0 -MOD11\FASTSLEWRATE1=1 -MOD11\SLOWSLEWRATE1=1 -MOD11\ENABLE2=0 -MOD11\FASTSLEWRATE2=1 -MOD11\SLOWSLEWRATE2=1 -MOD11\ENABLE3=0 -MOD11\FASTSLEWRATE3=1 -MOD11\SLOWSLEWRATE3=1 -MOD11\ENABLE4=0 -MOD11\FASTSLEWRATE4=1 -MOD11\SLOWSLEWRATE4=1 -MOD11\ENABLE5=0 -MOD11\FASTSLEWRATE5=1 -MOD11\SLOWSLEWRATE5=1 -MOD11\ENABLE6=0 -MOD11\FASTSLEWRATE6=1 -MOD11\SLOWSLEWRATE6=1 -MOD11\ENABLE7=0 -MOD11\FASTSLEWRATE7=1 -MOD11\SLOWSLEWRATE7=1 -MOD11\ENABLE8=0 -MOD11\FASTSLEWRATE8=1 -MOD11\SLOWSLEWRATE8=1 -MOD11\ENABLE9=0 -MOD11\FASTSLEWRATE9=1 -MOD11\SLOWSLEWRATE9=1 -MOD11\ENABLE10=0 -MOD11\FASTSLEWRATE10=1 -MOD11\SLOWSLEWRATE10=1 -MOD11\ENABLE11=0 -MOD11\FASTSLEWRATE11=1 -MOD11\SLOWSLEWRATE11=1 -MOD11\ENABLE12=0 -MOD11\FASTSLEWRATE12=1 -MOD11\SLOWSLEWRATE12=1 -MOD10\ENABLE1=1 -MOD10\FASTSLEWRATE1=500 -MOD10\SLOWSLEWRATE1=100 -MOD10\ENABLE2=1 -MOD10\FASTSLEWRATE2=500 -MOD10\SLOWSLEWRATE2=100 -MOD10\ENABLE3=1 -MOD10\FASTSLEWRATE3=500 -MOD10\SLOWSLEWRATE3=100 -MOD10\ENABLE4=1 -MOD10\FASTSLEWRATE4=500 -MOD10\SLOWSLEWRATE4=100 -MOD10\ENABLE5=1 -MOD10\FASTSLEWRATE5=500 -MOD10\SLOWSLEWRATE5=100 -MOD10\ENABLE6=1 -MOD10\FASTSLEWRATE6=500 -MOD10\SLOWSLEWRATE6=100 -MOD10\ENABLE7=0 -MOD10\FASTSLEWRATE7=1 -MOD10\SLOWSLEWRATE7=1 -MOD10\ENABLE8=0 -MOD10\FASTSLEWRATE8=1 -MOD10\SLOWSLEWRATE8=1 -MOD10\ENABLE9=0 -MOD10\FASTSLEWRATE9=1 -MOD10\SLOWSLEWRATE9=1 -MOD10\ENABLE10=0 -MOD10\FASTSLEWRATE10=1 -MOD10\SLOWSLEWRATE10=1 -MOD10\ENABLE11=0 -MOD10\FASTSLEWRATE11=1 -MOD10\SLOWSLEWRATE11=1 -MOD10\ENABLE12=0 -MOD10\FASTSLEWRATE12=1 -MOD10\SLOWSLEWRATE12=1 -MOD12\ENABLE1=1 -MOD12\FASTSLEWRATE1=10 -MOD12\SLOWSLEWRATE1=1 -MOD12\ENABLE2=1 -MOD12\FASTSLEWRATE2=10 -MOD12\SLOWSLEWRATE2=1 -MOD12\ENABLE3=1 -MOD12\FASTSLEWRATE3=10 -MOD12\SLOWSLEWRATE3=1 -MOD12\ENABLE4=1 -MOD12\FASTSLEWRATE4=10 -MOD12\SLOWSLEWRATE4=1 -MOD12\ENABLE5=1 -MOD12\FASTSLEWRATE5=10 -MOD12\SLOWSLEWRATE5=1 -MOD12\ENABLE6=1 -MOD12\FASTSLEWRATE6=10 -MOD12\SLOWSLEWRATE6=1 -MOD12\ENABLE7=1 -MOD12\FASTSLEWRATE7=10 -MOD12\SLOWSLEWRATE7=1 -MOD12\ENABLE8=1 -MOD12\FASTSLEWRATE8=10 -MOD12\SLOWSLEWRATE8=1 -MOD12\ENABLE9=1 -MOD12\FASTSLEWRATE9=10 -MOD12\SLOWSLEWRATE9=1 -MOD12\ENABLE10=1 -MOD12\FASTSLEWRATE10=10 -MOD12\SLOWSLEWRATE10=1 -MOD12\ENABLE11=1 -MOD12\FASTSLEWRATE11=10 -MOD12\SLOWSLEWRATE11=1 -MOD12\ENABLE12=1 -MOD12\FASTSLEWRATE12=10 -MOD12\SLOWSLEWRATE12=1 -MOD3\HVLC_V1=0.00 -MOD3\HVLC_ORDER1=0 -MOD3\HVLC_V2=20.0 -MOD3\HVLC_ORDER2=0 -MOD3\HVLC_LABEL2=SCI Guard Drain -MOD3\HVLC_V3=0.00 -MOD3\HVLC_ORDER3=0 -MOD3\HVLC_V4=0.00 -MOD3\HVLC_ORDER4=0 -MOD3\HVLC_V5=17.0 -MOD3\HVLC_ORDER5=0 -MOD3\HVLC_LABEL5=SCI E Reset Drain -MOD3\HVLC_V6=17.0 -MOD3\HVLC_ORDER6=0 -MOD3\HVLC_LABEL6=SCI F Reset Drain -MOD3\HVLC_V7=0.00 -MOD3\HVLC_ORDER7=0 -MOD3\HVLC_V8=0.00 -MOD3\HVLC_ORDER8=0 -MOD3\HVLC_V9=0.00 -MOD3\HVLC_ORDER9=0 -MOD3\HVLC_V10=0.00 -MOD3\HVLC_ORDER10=0 -MOD3\HVLC_V11=0.00 -MOD3\HVLC_ORDER11=0 -MOD3\HVLC_V12=0.00 -MOD3\HVLC_ORDER12=0 -MOD3\HVLC_V13=0.00 -MOD3\HVLC_ORDER13=0 -MOD3\HVLC_V14=0.00 -MOD3\HVLC_ORDER14=0 -MOD3\HVLC_V15=0.00 -MOD3\HVLC_ORDER15=0 -MOD3\HVLC_V16=0.00 -MOD3\HVLC_ORDER16=0 -MOD3\HVLC_V17=0.00 -MOD3\HVLC_ORDER17=0 -MOD3\HVLC_V18=0.00 -MOD3\HVLC_ORDER18=0 -MOD3\HVLC_V19=0.00 -MOD3\HVLC_ORDER19=0 -MOD3\HVLC_V20=0.00 -MOD3\HVLC_ORDER20=0 -MOD3\HVLC_V21=0.00 -MOD3\HVLC_ORDER21=0 -MOD3\HVLC_V22=0.00 -MOD3\HVLC_ORDER22=0 -MOD3\HVLC_V23=0.00 -MOD3\HVLC_ORDER23=0 -MOD3\HVLC_V24=0.00 -MOD3\HVLC_ORDER24=0 -MOD3\HVHC_ENABLE1=1 -MOD3\HVHC_V1=29.0 -MOD3\HVHC_IL1=0.1 -MOD3\HVHC_ORDER1=0 -MOD3\HVHC_LABEL1=SCI E Output Drain -MOD3\HVHC_ENABLE2=1 -MOD3\HVHC_V2=29.0 -MOD3\HVHC_IL2=0.1 -MOD3\HVHC_ORDER2=0 -MOD3\HVHC_LABEL2=SCI F Output Drain -MOD3\HVHC_ENABLE3=0 -MOD3\HVHC_V3=29.0 -MOD3\HVHC_IL3=0.0 -MOD3\HVHC_ORDER3=0 -MOD3\HVHC_ENABLE4=0 -MOD3\HVHC_V4=29.0 -MOD3\HVHC_IL4=0.0 -MOD3\HVHC_ORDER4=0 -MOD3\HVHC_ENABLE5=0 -MOD3\HVHC_V5=29.0 -MOD3\HVHC_IL5=0.0 -MOD3\HVHC_ORDER5=0 -MOD3\HVHC_ENABLE6=0 -MOD3\HVHC_V6=29.0 -MOD3\HVHC_IL6=0.0 -MOD3\HVHC_ORDER6=0 -MOD4\LVLC_V1=0.0 -MOD4\LVLC_ORDER1=0 -MOD4\LVLC_V2=0.0 -MOD4\LVLC_ORDER2=0 -MOD4\LVLC_V3=3.0 -MOD4\LVLC_ORDER3=0 -MOD4\LVLC_LABEL3=SCI E Output Gate -MOD4\LVLC_V4=3.0 -MOD4\LVLC_ORDER4=0 -MOD4\LVLC_LABEL4=SCI F Output Gate -MOD4\LVLC_V5=1.0 -MOD4\LVLC_ORDER5=0 -MOD4\LVLC_LABEL5=SCI Summing Well - Low -MOD4\LVLC_V6=12.0 -MOD4\LVLC_ORDER6=0 -MOD4\LVLC_LABEL6=SCI Summing Well - High -MOD4\LVLC_V7=1.0 -MOD4\LVLC_ORDER7=0 -MOD4\LVLC_LABEL7=SCI Reset Gate - Low -MOD4\LVLC_V8=12.0 -MOD4\LVLC_ORDER8=0 -MOD4\LVLC_LABEL8=SCI Reset Gate - High -MOD4\LVLC_V9=0.0 -MOD4\LVLC_ORDER9=0 -MOD4\LVLC_V10=0.0 -MOD4\LVLC_ORDER10=0 -MOD4\LVLC_V11=0.0 -MOD4\LVLC_ORDER11=0 -MOD4\LVLC_V12=0.0 -MOD4\LVLC_ORDER12=0 -MOD4\LVLC_V13=0.0 -MOD4\LVLC_ORDER13=0 -MOD4\LVLC_V14=0.0 -MOD4\LVLC_ORDER14=0 -MOD4\LVLC_V15=0.0 -MOD4\LVLC_ORDER15=0 -MOD4\LVLC_V16=0.0 -MOD4\LVLC_ORDER16=0 -MOD4\LVLC_V17=0.0 -MOD4\LVLC_ORDER17=0 -MOD4\LVLC_V18=0.0 -MOD4\LVLC_ORDER18=0 -MOD4\LVLC_V19=0.0 -MOD4\LVLC_ORDER19=0 -MOD4\LVLC_V20=0.0 -MOD4\LVLC_ORDER20=0 -MOD4\LVLC_V21=0.0 -MOD4\LVLC_ORDER21=0 -MOD4\LVLC_V22=0.0 -MOD4\LVLC_ORDER22=0 -MOD4\LVLC_V23=0.0 -MOD4\LVLC_ORDER23=0 -MOD4\LVLC_V24=0.0 -MOD4\LVLC_ORDER24=0 -MOD4\LVHC_ENABLE1=0 -MOD4\LVHC_V1=0.0 -MOD4\LVHC_IL1=0.0 -MOD4\LVHC_ORDER1=0 -MOD4\LVHC_ENABLE2=0 -MOD4\LVHC_V2=0.0 -MOD4\LVHC_IL2=0.0 -MOD4\LVHC_ORDER2=0 -MOD4\LVHC_ENABLE3=0 -MOD4\LVHC_V3=0.0 -MOD4\LVHC_IL3=0.0 -MOD4\LVHC_ORDER3=0 -MOD4\LVHC_ENABLE4=0 -MOD4\LVHC_V4=0.0 -MOD4\LVHC_IL4=0.0 -MOD4\LVHC_ORDER4=0 -MOD4\LVHC_ENABLE5=0 -MOD4\LVHC_V5=0.0 -MOD4\LVHC_IL5=0.0 -MOD4\LVHC_ORDER5=0 -MOD4\LVHC_ENABLE6=0 -MOD4\LVHC_V6=0.0 -MOD4\LVHC_IL6=0.0 -MOD4\LVHC_ORDER6=0 -MOD1\DIO_SOURCE1=0 -MOD1\DIO_DIR1=0 -MOD1\DIO_SOURCE2=0 -MOD1\DIO_DIR2=0 -MOD1\DIO_SOURCE3=0 -MOD1\DIO_DIR3=0 -MOD1\DIO_SOURCE4=0 -MOD1\DIO_DIR4=0 -MOD1\DIO_POWER=0 -MOD9\XVP_V1=0 -MOD9\XVP_ORDER1=0 -MOD9\XVP_ENABLE1=1 -MOD9\XVP_V2=0 -MOD9\XVP_ORDER2=0 -MOD9\XVP_ENABLE2=1 -MOD9\XVP_V3=0 -MOD9\XVP_ORDER3=0 -MOD9\XVP_ENABLE3=1 -MOD9\XVP_V4=0 -MOD9\XVP_ORDER4=0 -MOD9\XVP_ENABLE4=1 -MOD9\XVN_V1=-95 -MOD9\XVN_ORDER1=0 -MOD9\XVN_ENABLE1=1 -MOD9\XVN_LABEL1=SCI Backside -MOD9\XVN_V2=-0 -MOD9\XVN_ORDER2=0 -MOD9\XVN_ENABLE2=1 -MOD9\XVN_V3=-0 -MOD9\XVN_ORDER3=0 -MOD9\XVN_ENABLE3=1 -MOD9\XVN_V4=-0 -MOD9\XVN_ORDER4=0 -MOD9\XVN_ENABLE4=1 +MOD1\ENABLE1=1 +MOD1\FASTSLEWRATE1=10 +MOD1\SLOWSLEWRATE1=1 +MOD1\ENABLE2=1 +MOD1\FASTSLEWRATE2=10 +MOD1\SLOWSLEWRATE2=1 +MOD1\ENABLE3=1 +MOD1\FASTSLEWRATE3=10 +MOD1\SLOWSLEWRATE3=1 +MOD1\ENABLE4=1 +MOD1\FASTSLEWRATE4=10 +MOD1\SLOWSLEWRATE4=1 +MOD1\ENABLE5=1 +MOD1\FASTSLEWRATE5=10 +MOD1\SLOWSLEWRATE5=1 +MOD1\ENABLE6=1 +MOD1\FASTSLEWRATE6=10 +MOD1\SLOWSLEWRATE6=1 +MOD1\ENABLE7=1 +MOD1\FASTSLEWRATE7=10 +MOD1\SLOWSLEWRATE7=1 +MOD1\ENABLE8=1 +MOD1\FASTSLEWRATE8=10 +MOD1\SLOWSLEWRATE8=1 +MOD1\ENABLE9=1 +MOD1\FASTSLEWRATE9=10 +MOD1\SLOWSLEWRATE9=1 +MOD1\ENABLE10=1 +MOD1\FASTSLEWRATE10=10 +MOD1\SLOWSLEWRATE10=1 +MOD1\ENABLE11=1 +MOD1\FASTSLEWRATE11=10 +MOD1\SLOWSLEWRATE11=1 +MOD1\ENABLE12=1 +MOD1\FASTSLEWRATE12=10 +MOD1\SLOWSLEWRATE12=1 +MOD3\ENABLE1=1 +MOD3\FASTSLEWRATE1=500 +MOD3\SLOWSLEWRATE1=100 +MOD3\ENABLE2=1 +MOD3\FASTSLEWRATE2=500 +MOD3\SLOWSLEWRATE2=100 +MOD3\ENABLE3=1 +MOD3\FASTSLEWRATE3=500 +MOD3\SLOWSLEWRATE3=100 +MOD3\ENABLE4=1 +MOD3\FASTSLEWRATE4=500 +MOD3\SLOWSLEWRATE4=100 +MOD3\ENABLE5=1 +MOD3\FASTSLEWRATE5=500 +MOD3\SLOWSLEWRATE5=100 +MOD3\ENABLE6=1 +MOD3\FASTSLEWRATE6=500 +MOD3\SLOWSLEWRATE6=100 +MOD3\ENABLE7=0 +MOD3\FASTSLEWRATE7=1 +MOD3\SLOWSLEWRATE7=1 +MOD3\ENABLE8=0 +MOD3\FASTSLEWRATE8=1 +MOD3\SLOWSLEWRATE8=1 +MOD3\ENABLE9=0 +MOD3\FASTSLEWRATE9=1 +MOD3\SLOWSLEWRATE9=1 +MOD3\ENABLE10=0 +MOD3\FASTSLEWRATE10=1 +MOD3\SLOWSLEWRATE10=1 +MOD3\ENABLE11=0 +MOD3\FASTSLEWRATE11=1 +MOD3\SLOWSLEWRATE11=1 +MOD3\ENABLE12=0 +MOD3\FASTSLEWRATE12=1 +MOD3\SLOWSLEWRATE12=1 +MOD9\HVLC_V1=0.00 +MOD9\HVLC_ORDER1=0 +MOD9\HVLC_V2=20.0 +MOD9\HVLC_ORDER2=0 +MOD9\HVLC_LABEL2=SCI Guard Drain +MOD9\HVLC_V3=0.00 +MOD9\HVLC_ORDER3=0 +MOD9\HVLC_V4=0.00 +MOD9\HVLC_ORDER4=0 +MOD9\HVLC_V5=17.0 +MOD9\HVLC_ORDER5=0 +MOD9\HVLC_LABEL5=SCI E Reset Drain +MOD9\HVLC_V6=17.0 +MOD9\HVLC_ORDER6=0 +MOD9\HVLC_LABEL6=SCI F Reset Drain +MOD9\HVLC_V7=0.00 +MOD9\HVLC_ORDER7=0 +MOD9\HVLC_V8=0.00 +MOD9\HVLC_ORDER8=0 +MOD9\HVLC_V9=0.00 +MOD9\HVLC_ORDER9=0 +MOD9\HVLC_V10=0.00 +MOD9\HVLC_ORDER10=0 +MOD9\HVLC_V11=0.00 +MOD9\HVLC_ORDER11=0 +MOD9\HVLC_V12=0.00 +MOD9\HVLC_ORDER12=0 +MOD9\HVLC_V13=0.00 +MOD9\HVLC_ORDER13=0 +MOD9\HVLC_V14=0.00 +MOD9\HVLC_ORDER14=0 +MOD9\HVLC_V15=0.00 +MOD9\HVLC_ORDER15=0 +MOD9\HVLC_V16=0.00 +MOD9\HVLC_ORDER16=0 +MOD9\HVLC_V17=0.00 +MOD9\HVLC_ORDER17=0 +MOD9\HVLC_V18=0.00 +MOD9\HVLC_ORDER18=0 +MOD9\HVLC_V19=0.00 +MOD9\HVLC_ORDER19=0 +MOD9\HVLC_V20=0.00 +MOD9\HVLC_ORDER20=0 +MOD9\HVLC_V21=0.00 +MOD9\HVLC_ORDER21=0 +MOD9\HVLC_V22=0.00 +MOD9\HVLC_ORDER22=0 +MOD9\HVLC_V23=0.00 +MOD9\HVLC_ORDER23=0 +MOD9\HVLC_V24=0.00 +MOD9\HVLC_ORDER24=0 +MOD9\HVHC_ENABLE1=1 +MOD9\HVHC_V1=29.0 +MOD9\HVHC_IL1=0.1 +MOD9\HVHC_ORDER1=0 +MOD9\HVHC_LABEL1=SCI E Output Drain +MOD9\HVHC_ENABLE2=1 +MOD9\HVHC_V2=29.0 +MOD9\HVHC_IL2=0.1 +MOD9\HVHC_ORDER2=0 +MOD9\HVHC_LABEL2=SCI F Output Drain +MOD9\HVHC_ENABLE3=0 +MOD9\HVHC_V3=29.0 +MOD9\HVHC_IL3=0.0 +MOD9\HVHC_ORDER3=0 +MOD9\HVHC_ENABLE4=0 +MOD9\HVHC_V4=29.0 +MOD9\HVHC_IL4=0.0 +MOD9\HVHC_ORDER4=0 +MOD9\HVHC_ENABLE5=0 +MOD9\HVHC_V5=29.0 +MOD9\HVHC_IL5=0.0 +MOD9\HVHC_ORDER5=0 +MOD9\HVHC_ENABLE6=0 +MOD9\HVHC_V6=29.0 +MOD9\HVHC_IL6=0.0 +MOD9\HVHC_ORDER6=0 +MOD10\LVLC_V1=0.0 +MOD10\LVLC_ORDER1=0 +MOD10\LVLC_V2=0.0 +MOD10\LVLC_ORDER2=0 +MOD10\LVLC_V3=3.0 +MOD10\LVLC_ORDER3=0 +MOD10\LVLC_LABEL3=SCI E Output Gate +MOD10\LVLC_V4=3.0 +MOD10\LVLC_ORDER4=0 +MOD10\LVLC_LABEL4=SCI F Output Gate +MOD10\LVLC_V5=1.0 +MOD10\LVLC_ORDER5=0 +MOD10\LVLC_LABEL5=SCI Summing Well - Low +MOD10\LVLC_V6=12.0 +MOD10\LVLC_ORDER6=0 +MOD10\LVLC_LABEL6=SCI Summing Well - High +MOD10\LVLC_V7=1.0 +MOD10\LVLC_ORDER7=0 +MOD10\LVLC_LABEL7=SCI Reset Gate - Low +MOD10\LVLC_V8=12.0 +MOD10\LVLC_ORDER8=0 +MOD10\LVLC_LABEL8=SCI Reset Gate - High +MOD10\LVLC_V9=0.0 +MOD10\LVLC_ORDER9=0 +MOD10\LVLC_V10=0.0 +MOD10\LVLC_ORDER10=0 +MOD10\LVLC_V11=0.0 +MOD10\LVLC_ORDER11=0 +MOD10\LVLC_V12=0.0 +MOD10\LVLC_ORDER12=0 +MOD10\LVLC_V13=0.0 +MOD10\LVLC_ORDER13=0 +MOD10\LVLC_V14=0.0 +MOD10\LVLC_ORDER14=0 +MOD10\LVLC_V15=0.0 +MOD10\LVLC_ORDER15=0 +MOD10\LVLC_V16=0.0 +MOD10\LVLC_ORDER16=0 +MOD10\LVLC_V17=0.0 +MOD10\LVLC_ORDER17=0 +MOD10\LVLC_V18=0.0 +MOD10\LVLC_ORDER18=0 +MOD10\LVLC_V19=0.0 +MOD10\LVLC_ORDER19=0 +MOD10\LVLC_V20=0.0 +MOD10\LVLC_ORDER20=0 +MOD10\LVLC_V21=0.0 +MOD10\LVLC_ORDER21=0 +MOD10\LVLC_V22=0.0 +MOD10\LVLC_ORDER22=0 +MOD10\LVLC_V23=0.0 +MOD10\LVLC_ORDER23=0 +MOD10\LVLC_V24=0.0 +MOD10\LVLC_ORDER24=0 +MOD10\LVHC_ENABLE1=0 +MOD10\LVHC_V1=0.0 +MOD10\LVHC_IL1=0.0 +MOD10\LVHC_ORDER1=0 +MOD10\LVHC_ENABLE2=0 +MOD10\LVHC_V2=0.0 +MOD10\LVHC_IL2=0.0 +MOD10\LVHC_ORDER2=0 +MOD10\LVHC_ENABLE3=0 +MOD10\LVHC_V3=0.0 +MOD10\LVHC_IL3=0.0 +MOD10\LVHC_ORDER3=0 +MOD10\LVHC_ENABLE4=0 +MOD10\LVHC_V4=0.0 +MOD10\LVHC_IL4=0.0 +MOD10\LVHC_ORDER4=0 +MOD10\LVHC_ENABLE5=0 +MOD10\LVHC_V5=0.0 +MOD10\LVHC_IL5=0.0 +MOD10\LVHC_ORDER5=0 +MOD10\LVHC_ENABLE6=0 +MOD10\LVHC_V6=0.0 +MOD10\LVHC_IL6=0.0 +MOD10\LVHC_ORDER6=0 +MOD12\DIO_SOURCE1=0 +MOD12\DIO_DIR1=0 +MOD12\DIO_SOURCE2=0 +MOD12\DIO_DIR2=0 +MOD12\DIO_SOURCE3=0 +MOD12\DIO_DIR3=0 +MOD12\DIO_SOURCE4=0 +MOD12\DIO_DIR4=0 +MOD12\DIO_POWER=0 +MOD4\XVP_V1=0 +MOD4\XVP_ORDER1=0 +MOD4\XVP_ENABLE1=1 +MOD4\XVP_V2=0 +MOD4\XVP_ORDER2=0 +MOD4\XVP_ENABLE2=1 +MOD4\XVP_V3=0 +MOD4\XVP_ORDER3=0 +MOD4\XVP_ENABLE3=1 +MOD4\XVP_V4=0 +MOD4\XVP_ORDER4=0 +MOD4\XVP_ENABLE4=1 +MOD4\XVN_V1=-95 +MOD4\XVN_ORDER1=0 +MOD4\XVN_ENABLE1=1 +MOD4\XVN_LABEL1=SCI Backside +MOD4\XVN_V2=-0 +MOD4\XVN_ORDER2=0 +MOD4\XVN_ENABLE2=1 +MOD4\XVN_V3=-0 +MOD4\XVN_ORDER3=0 +MOD4\XVN_ENABLE3=1 +MOD4\XVN_V4=-0 +MOD4\XVN_ORDER4=0 +MOD4\XVN_ENABLE4=1 STATE0\NAME=STATE000 STATE0\CONTROL="0,3F" STATE1\NAME=STATE001 @@ -410,31 +374,27 @@ BACKPLANE_VERSION=0.0.0 MOD1_ID=0000000000000000 MOD1_REV=0 MOD1_VERSION=0.0.0 -MOD1_TYPE=10 +MOD1_TYPE=16 MOD3_ID=0000000000000000 MOD3_REV=0 MOD3_VERSION=0.0.0 -MOD3_TYPE=4 +MOD3_TYPE=16 MOD4_ID=0000000000000000 MOD4_REV=0 MOD4_VERSION=0.0.0 -MOD4_TYPE=3 +MOD4_TYPE=12 MOD9_ID=0000000000000000 MOD9_REV=0 MOD9_VERSION=0.0.0 -MOD9_TYPE=12 -MOD11_ID=0000000000000000 -MOD11_REV=0 -MOD11_VERSION=0.0.0 -MOD11_TYPE=16 +MOD9_TYPE=4 MOD10_ID=0000000000000000 MOD10_REV=0 MOD10_VERSION=0.0.0 -MOD10_TYPE=16 +MOD10_TYPE=3 MOD12_ID=0000000000000000 MOD12_REV=0 MOD12_VERSION=0.0.0 -MOD12_TYPE=16 +MOD12_TYPE=10 [MODE_DEFAULT] ARCH:AMPS_PER_CCD_HORI=2 ARCH:AMPS_PER_CCD_VERT=1 From dfc1009e5f4365facac65c52de895f82c504a9f9 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 13 Jan 2025 12:52:25 -0800 Subject: [PATCH 040/194] adding digital I/O definition to LVXBIAS --- src/deimos/deimos.mod | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index f2a9726..81e54e6 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -166,6 +166,14 @@ SLOT 10 lvbias { LVHC 4 [0.00,0.0,0,0]; LVHC 5 [0.00,0.0,0,0]; LVHC 6 [0.00,0.0,0,0]; + DIO 1 [0,0]; + DIO 2 [0,0]; + DIO 3 [0,0]; + DIO 4 [0,0]; + DIO 5 [0,0]; + DIO 6 [0,0]; + DIO 7 [0,0]; + DIO 8 [0,0]; } SLOT 12 lvds { From 2fc24a143349bde6c15516615d3bacf7230040c7 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Mon, 13 Jan 2025 20:53:22 +0000 Subject: [PATCH 041/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/acf/deimos.acf b/acf/deimos.acf index 2268eeb..35060be 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -317,6 +317,18 @@ MOD10\LVHC_ENABLE6=0 MOD10\LVHC_V6=0.0 MOD10\LVHC_IL6=0.0 MOD10\LVHC_ORDER6=0 +MOD10\DIO_SOURCE1=0 +MOD10\DIO_DIR12=0 +MOD10\DIO_SOURCE2=0 +MOD10\DIO_SOURCE3=0 +MOD10\DIO_DIR34=0 +MOD10\DIO_SOURCE4=0 +MOD10\DIO_SOURCE5=0 +MOD10\DIO_DIR56=0 +MOD10\DIO_SOURCE6=0 +MOD10\DIO_SOURCE7=0 +MOD10\DIO_DIR78=0 +MOD10\DIO_SOURCE8=0 MOD12\DIO_SOURCE1=0 MOD12\DIO_DIR1=0 MOD12\DIO_SOURCE2=0 From 3e407170bf8c59248687c8095b46ec1e080210ea Mon Sep 17 00:00:00 2001 From: j-bichel Date: Tue, 14 Jan 2025 14:21:25 -0800 Subject: [PATCH 042/194] commented out all waveforms --- src/deimos/deimos.waveform | 49 +++++++++++++++++++++++--------------- 1 file changed, 30 insertions(+), 19 deletions(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index aa8eaf6..e0c424a 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -73,13 +73,14 @@ #define CLOSE 0 #define HIGH 1 #define LOW 0 - +/* WAVEFORM SerialRecieving { 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; .+SCLK_RCV_RESET: SET RG TO LOW; } - +*/ +/* WAVEFORM LineTransfer { 0: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; @@ -94,21 +95,17 @@ WAVEFORM LineTransfer { .+TOI: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; .+TDRT: RETURN; } - +*/ +/* WAVEFORM wPixel { - /* Starts at beginning of waveform */ 0: SET PIXEL TO HIGH; .+TICK: SET PIXEL TO LOW; SET FRAME TO LOW; SET LINE TO LOW; - /* Starts at beginning of waveform */ - /* NEED TO CLARIFY SUMMING WELL BEHAVIOUR */ 0: SET RG TO HIGH; .+TWX: SET RG TO LOW; TSW: SET SW TO LOW; .+SW_settleT: SET SW TO HIGH; - -/* Do something with summing well (following RG) */ 0: SET SCI_SCLK1 TO HIGH; SET SCI_SCLK3 TO LOW; .+TOR: SET SCI_SCLK2 TO HIGH; @@ -116,63 +113,77 @@ WAVEFORM wPixel { SET SCI_SCLK3 TO HIGH; .+TOR: RETURN; } - +*/ /*****************************************/ /* Basic DEIMOS control signal waveforms */ /*****************************************/ - +/* WAVEFORM wReset { 0: SET RG TO HIGH; } - +*/ +/* WAVEFORM wUnsetReset { 0: SET RG TO LOW; } - +*/ +/* WAVEFORM OS_Clamp { 0: SET AC_Clamp TO HIGH; } - +*/ +/* WAVEFORM OS_Clamp_ { 0: SET AC_Clamp TO LOW; } - +*/ /*****************************************/ /* ARCHON Timing Control */ /*****************************************/ - +/* WAVEFORM Wait1us { 0: SET NOP TO HIGH; .+1us: SET NOP TO HIGH; } - +*/ /*****************************************/ /* ARCHON control signal waveforms */ /*****************************************/ - +/* WAVEFORM wOpenShutter { 0: SET SHUTTER TO OPEN; } +*/ +/* WAVEFORM wCloseShutter { 0: SET SHUTTER TO CLOSE; } +*/ +/* WAVEFORM wFrame { 0: SET FRAME TO HIGH; } +*/ +/* WAVEFORM wLine { 0: SET LINE TO HIGH; } +*/ +/* WAVEFORM wPixel { 0: SET PIXEL TO HIGH; .+TICK: SET PIXEL TO LOW; SET FRAME TO LOW; SET LINE TO LOW; } - +*/ +/* WAVEFORM AD_Clamp { 0: SET AD7 TO HIGH; } - +*/ +/* WAVEFORM AD_Clamp_ { 0: SET AD7 TO LOW; } +*/ From 5cfb64efabca3ee843b0f255e39e94f0095a4948 Mon Sep 17 00:00:00 2001 From: j-bichel Date: Tue, 14 Jan 2025 14:23:29 -0800 Subject: [PATCH 043/194] commented out all waveform usages in sequence file --- src/deimos/deimos.seq | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 71be7e9..e6543aa 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -55,28 +55,31 @@ SEQUENCE SelectScienceReadoutMode { } SEQUENCE ScienceReadout { + /* wCloseShutter(); - /* Prep Image Area */ + * Prep Image Area * wOpenShutter(); wFrame(); - /* Flush lines? */ + * Flush lines? * ScienceLineRead(param_ScienceLines); - /* Dump Extra lines? */ - /* Put serial clocks in ready for charge state after readout, via serial recieving?? */ + * Dump Extra lines? * + * Put serial clocks in ready for charge state after readout, via serial recieving?? */ wCloseShutter(); + */ } SEQUENCE ScienceLineRead{ + /* LineTransfer(); wLine(); - /* Initialize Serial Clocks */ - /* Flush desired number of post pixels */ + * Initialize Serial Clocks */ + * Flush desired number of post pixels * wPixel(param_SciencePixels); - /* Flush desired number of pre serial pixels */ + * Flush desired number of pre serial pixels * - /* Serial Recieving?? */ + * Serial Recieving?? * wReset(); Wait1us(); @@ -85,5 +88,6 @@ SEQUENCE ScienceLineRead{ Wait1us(); OS_Clamp_(); AD_Clamp_(); + */ return; } From aa24a17c492743806ca67ecc2ec558a6c02c209d Mon Sep 17 00:00:00 2001 From: j-bichel Date: Wed, 15 Jan 2025 15:35:17 -0800 Subject: [PATCH 044/194] ACF compiles properly; start of waveform debugging --- src/deimos/deimos.cds | 9 +++++---- src/deimos/deimos.modes | 3 --- src/deimos/deimos.seq | 8 ++++---- src/deimos/deimos.signals | 2 -- src/deimos/deimos.waveform | 4 ++-- 5 files changed, 11 insertions(+), 15 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 8cd6bfb..8f8e2b1 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -20,9 +20,10 @@ SHP1 = _FIRST_RESET_SAMPLE SHP2 = _LAST_RESET_SAMPLE SHD1 = _FIRST_VIDEO_SAMPLE SHD2 = _LAST_VIDEO_SAMPLE -TAPLINE0 ="AM1,1,0" -TAPLINES=1 +TAPLINE0 ="AM37L,1,0" +TAPLINE1 ="AM38R,1,0" +TAPLINES=2 TRIGOUTFORCE=0 -TRIGOUTINVERT=1 +TRIGOUTINVERT=0 TRIGOUTLEVEL=0 -TRIGOUTPOWER=0 +TRIGOUTPOWER=1 diff --git a/src/deimos/deimos.modes b/src/deimos/deimos.modes index 435cb24..f4c0ed0 100644 --- a/src/deimos/deimos.modes +++ b/src/deimos/deimos.modes @@ -1,4 +1 @@ [MODE_DEFAULT] -ARCH:NUM_CCDS=2 -ARCH:AMPS_PER_CCD_HORI=2 -ARCH:AMPS_PER_CCD_VERT=1 diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index e6543aa..83d1539 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -55,15 +55,15 @@ SEQUENCE SelectScienceReadoutMode { } SEQUENCE ScienceReadout { - /* + wCloseShutter(); - * Prep Image Area * + /* Prep Image Area * wOpenShutter(); wFrame(); * Flush lines? * ScienceLineRead(param_ScienceLines); * Dump Extra lines? * - * Put serial clocks in ready for charge state after readout, via serial recieving?? */ + * Put serial clocks in ready for charge state after readout, via serial recieving?? * wCloseShutter(); */ } @@ -73,7 +73,7 @@ SEQUENCE ScienceLineRead{ LineTransfer(); wLine(); - * Initialize Serial Clocks */ + * Initialize Serial Clocks * * Flush desired number of post pixels * wPixel(param_SciencePixels); diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 7ed7a09..ef06f25 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -32,8 +32,6 @@ #define LINE 0 : 3 /* LINE signal from the backplane */ #define PIXEL 0 : 4 /* PIXEL signal from the backplane */ -#define AD7 7 : 1 /* Access to AC Clamp */ - /**** Parallel Phase Signal Definitions ****/ /* Each detector is made of two 2048x2048 vertically stacked image areas. The top diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index e0c424a..fe4dd29 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -154,11 +154,11 @@ WAVEFORM wOpenShutter { 0: SET SHUTTER TO OPEN; } */ -/* + WAVEFORM wCloseShutter { 0: SET SHUTTER TO CLOSE; } -*/ + /* WAVEFORM wFrame { 0: SET FRAME TO HIGH; From e396379d9d192f320b85243cbaa6cb6bac559fb7 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Wed, 15 Jan 2025 23:36:44 +0000 Subject: [PATCH 045/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 80 ++++++++------------------------------------------ 1 file changed, 12 insertions(+), 68 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 35060be..7949ad2 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -14,12 +14,13 @@ SHP1 = _FIRST_RESET_SAMPLE SHP2 = _LAST_RESET_SAMPLE SHD1 = _FIRST_VIDEO_SAMPLE SHD2 = _LAST_VIDEO_SAMPLE -TAPLINE0 ="AM1,1,0" -TAPLINES=1 +TAPLINE0 ="AM37L,1,0" +TAPLINE1 ="AM38R,1,0" +TAPLINES=2 TRIGOUTFORCE=0 -TRIGOUTINVERT=1 +TRIGOUTINVERT=0 TRIGOUTLEVEL=0 -TRIGOUTPOWER=0 +TRIGOUTPOWER=1 PARAMETER0="abort=0" PARAMETER1="start=0" PARAMETER2="trigger_ScienceExpose=0" @@ -41,55 +42,11 @@ LINE9="STATE000; if trigger_ScienceRead CALL ScienceReadout" LINE10="STATE000; GOTO SelectScienceReadoutMode" LINE11=ScienceReadout: LINE12="STATE000; CALL wCloseShutter" -LINE13="STATE000; CALL wOpenShutter" -LINE14="STATE000; CALL wFrame" -LINE15="STATE000; CALL ScienceLineRead(param_ScienceLines)" -LINE16="STATE000; CALL wCloseShutter" -LINE17=ScienceLineRead: -LINE18="STATE000; CALL LineTransfer" -LINE19="STATE000; CALL wLine" -LINE20="STATE000; CALL wPixel(param_SciencePixels)" -LINE21="STATE000; CALL wReset" -LINE22="STATE000; CALL Wait1us" -LINE23="STATE000; CALL OS_Clamp" -LINE24="STATE000; CALL AD_Clamp" -LINE25="STATE000; CALL Wait1us" -LINE26="STATE000; CALL OS_Clamp_" -LINE27="STATE000; CALL AD_Clamp_" -LINE28="STATE000; RETURN ScienceLineRead" -LINE29=SerialRecieving: -LINE30="STATE000; STATE000(599)" -LINE31="STATE000; RETURN SerialRecieving" -LINE32=LineTransfer: -LINE33="STATE000; STATE000(15998)" -LINE34="STATE000; RETURN LineTransfer" -LINE35=wPixel: -LINE36="STATE001;" -LINE37="STATE002; RETURN wPixel" -LINE38=wReset: -LINE39="STATE000; RETURN wReset" -LINE40=wUnsetReset: -LINE41="STATE000; RETURN wUnsetReset" -LINE42=OS_Clamp: -LINE43="STATE000; RETURN OS_Clamp" -LINE44=OS_Clamp_: -LINE45="STATE000; RETURN OS_Clamp_" -LINE46=Wait1us: -LINE47="STATE000; STATE000(99)" -LINE48="STATE000; RETURN Wait1us" -LINE49=wOpenShutter: -LINE50="STATE003; RETURN wOpenShutter" -LINE51=wCloseShutter: -LINE52="STATE004; RETURN wCloseShutter" -LINE53=wFrame: -LINE54="STATE005; RETURN wFrame" -LINE55=wLine: -LINE56="STATE006; RETURN wLine" -LINE57=AD_Clamp: -LINE58="STATE000; RETURN AD_Clamp" -LINE59=AD_Clamp_: -LINE60="STATE000; RETURN AD_Clamp_" -LINES=61 +LINE13=ScienceLineRead: +LINE14="STATE000; RETURN ScienceLineRead" +LINE15=wCloseShutter: +LINE16="STATE001; RETURN wCloseShutter" +LINES=17 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=10 MOD1\SLOWSLEWRATE1=1 @@ -366,18 +323,8 @@ MOD4\XVN_ENABLE4=1 STATE0\NAME=STATE000 STATE0\CONTROL="0,3F" STATE1\NAME=STATE001 -STATE1\CONTROL="8,37" -STATE2\NAME=STATE002 -STATE2\CONTROL="0,31" -STATE3\NAME=STATE003 -STATE3\CONTROL="1,3E" -STATE4\NAME=STATE004 -STATE4\CONTROL="0,3E" -STATE5\NAME=STATE005 -STATE5\CONTROL="2,3D" -STATE6\NAME=STATE006 -STATE6\CONTROL="4,3B" -STATES=7 +STATE1\CONTROL="0,3E" +STATES=2 [SYSTEM] BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 @@ -408,6 +355,3 @@ MOD12_REV=0 MOD12_VERSION=0.0.0 MOD12_TYPE=10 [MODE_DEFAULT] -ARCH:AMPS_PER_CCD_HORI=2 -ARCH:AMPS_PER_CCD_VERT=1 -ARCH:NUM_CCDS=2 From c6e585c5eff381e5b4ee709b652432ba56e1e160 Mon Sep 17 00:00:00 2001 From: Tojoe Date: Thu, 16 Jan 2025 08:43:19 -0800 Subject: [PATCH 046/194] Uncommenting ScienceReadout --- src/deimos/deimos.seq | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 83d1539..5b103e0 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -57,15 +57,15 @@ SEQUENCE SelectScienceReadoutMode { SEQUENCE ScienceReadout { wCloseShutter(); - /* Prep Image Area * + /* Prep Image Area */ wOpenShutter(); wFrame(); - * Flush lines? * + /* Flush lines? * ScienceLineRead(param_ScienceLines); - * Dump Extra lines? * - * Put serial clocks in ready for charge state after readout, via serial recieving?? * + * Dump Extra lines? */ + /* Put serial clocks in ready for charge state after readout, via serial recieving?? */ wCloseShutter(); - */ + } SEQUENCE ScienceLineRead{ From fe786c7099ceaa398d37108398239e8fec47874a Mon Sep 17 00:00:00 2001 From: Tojoe Date: Thu, 16 Jan 2025 08:47:33 -0800 Subject: [PATCH 047/194] file wasn't saved from last commit --- src/deimos/deimos.waveform | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index fe4dd29..f17d313 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -149,21 +149,19 @@ WAVEFORM Wait1us { /*****************************************/ /* ARCHON control signal waveforms */ /*****************************************/ -/* + WAVEFORM wOpenShutter { 0: SET SHUTTER TO OPEN; } -*/ WAVEFORM wCloseShutter { 0: SET SHUTTER TO CLOSE; } -/* WAVEFORM wFrame { 0: SET FRAME TO HIGH; } -*/ + /* WAVEFORM wLine { 0: SET LINE TO HIGH; From ce60eeee970729ead027e17d69eb9be9dc4ea87a Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Thu, 16 Jan 2025 16:49:51 +0000 Subject: [PATCH 048/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 7949ad2..2c29177 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -42,11 +42,18 @@ LINE9="STATE000; if trigger_ScienceRead CALL ScienceReadout" LINE10="STATE000; GOTO SelectScienceReadoutMode" LINE11=ScienceReadout: LINE12="STATE000; CALL wCloseShutter" -LINE13=ScienceLineRead: -LINE14="STATE000; RETURN ScienceLineRead" -LINE15=wCloseShutter: -LINE16="STATE001; RETURN wCloseShutter" -LINES=17 +LINE13="STATE000; CALL wOpenShutter" +LINE14="STATE000; CALL wFrame" +LINE15="STATE000; CALL wCloseShutter" +LINE16=ScienceLineRead: +LINE17="STATE000; RETURN ScienceLineRead" +LINE18=wOpenShutter: +LINE19="STATE001; RETURN wOpenShutter" +LINE20=wCloseShutter: +LINE21="STATE002; RETURN wCloseShutter" +LINE22=wFrame: +LINE23="STATE003; RETURN wFrame" +LINES=24 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=10 MOD1\SLOWSLEWRATE1=1 @@ -323,8 +330,12 @@ MOD4\XVN_ENABLE4=1 STATE0\NAME=STATE000 STATE0\CONTROL="0,3F" STATE1\NAME=STATE001 -STATE1\CONTROL="0,3E" -STATES=2 +STATE1\CONTROL="1,3E" +STATE2\NAME=STATE002 +STATE2\CONTROL="0,3E" +STATE3\NAME=STATE003 +STATE3\CONTROL="2,3D" +STATES=4 [SYSTEM] BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 From 1d9cababc9e1623c94cfc8f9793831622f678b34 Mon Sep 17 00:00:00 2001 From: Tojoe Date: Thu, 16 Jan 2025 08:51:32 -0800 Subject: [PATCH 049/194] Adding rest of commented out sequence and waveform --- src/deimos/deimos.seq | 17 +++++++---------- src/deimos/deimos.waveform | 37 ++++++++++--------------------------- 2 files changed, 17 insertions(+), 37 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 5b103e0..c5ea275 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -60,34 +60,31 @@ SEQUENCE ScienceReadout { /* Prep Image Area */ wOpenShutter(); wFrame(); - /* Flush lines? * + /* Flush lines? */ ScienceLineRead(param_ScienceLines); - * Dump Extra lines? */ + /* Dump Extra lines? */ /* Put serial clocks in ready for charge state after readout, via serial recieving?? */ wCloseShutter(); } SEQUENCE ScienceLineRead{ - /* + LineTransfer(); wLine(); - * Initialize Serial Clocks * - * Flush desired number of post pixels * + /* Initialize Serial Clocks */ + /* Flush desired number of post pixels */ wPixel(param_SciencePixels); - * Flush desired number of pre serial pixels * + /* Flush desired number of pre serial pixels */ - * Serial Recieving?? * + /* Serial Recieving?? */ wReset(); Wait1us(); OS_Clamp(); - AD_Clamp(); Wait1us(); OS_Clamp_(); - AD_Clamp_(); - */ return; } diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index f17d313..5087a6d 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -80,7 +80,6 @@ WAVEFORM SerialRecieving { .+SCLK_RCV_RESET: SET RG TO LOW; } */ -/* WAVEFORM LineTransfer { 0: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; @@ -95,8 +94,7 @@ WAVEFORM LineTransfer { .+TOI: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; .+TDRT: RETURN; } -*/ -/* + WAVEFORM wPixel { 0: SET PIXEL TO HIGH; .+TICK: SET PIXEL TO LOW; @@ -113,39 +111,36 @@ WAVEFORM wPixel { SET SCI_SCLK3 TO HIGH; .+TOR: RETURN; } -*/ + /*****************************************/ /* Basic DEIMOS control signal waveforms */ /*****************************************/ -/* + WAVEFORM wReset { 0: SET RG TO HIGH; } -*/ -/* + WAVEFORM wUnsetReset { 0: SET RG TO LOW; } -*/ -/* + WAVEFORM OS_Clamp { 0: SET AC_Clamp TO HIGH; } -*/ -/* + WAVEFORM OS_Clamp_ { 0: SET AC_Clamp TO LOW; } -*/ + /*****************************************/ /* ARCHON Timing Control */ /*****************************************/ -/* + WAVEFORM Wait1us { 0: SET NOP TO HIGH; .+1us: SET NOP TO HIGH; } -*/ + /*****************************************/ /* ARCHON control signal waveforms */ /*****************************************/ @@ -162,11 +157,9 @@ WAVEFORM wFrame { 0: SET FRAME TO HIGH; } -/* WAVEFORM wLine { 0: SET LINE TO HIGH; } -*/ /* WAVEFORM wPixel { 0: SET PIXEL TO HIGH; @@ -174,14 +167,4 @@ WAVEFORM wPixel { SET FRAME TO LOW; SET LINE TO LOW; } -*/ -/* -WAVEFORM AD_Clamp { - 0: SET AD7 TO HIGH; -} -*/ -/* -WAVEFORM AD_Clamp_ { - 0: SET AD7 TO LOW; -} -*/ +*/ \ No newline at end of file From c62044db28caa3303ec5035e2bc7cda0bd96a023 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Thu, 16 Jan 2025 16:52:35 +0000 Subject: [PATCH 050/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 63 +++++++++++++++++++++++++++++++++++++++----------- 1 file changed, 49 insertions(+), 14 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 2c29177..222a546 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -44,16 +44,45 @@ LINE11=ScienceReadout: LINE12="STATE000; CALL wCloseShutter" LINE13="STATE000; CALL wOpenShutter" LINE14="STATE000; CALL wFrame" -LINE15="STATE000; CALL wCloseShutter" -LINE16=ScienceLineRead: -LINE17="STATE000; RETURN ScienceLineRead" -LINE18=wOpenShutter: -LINE19="STATE001; RETURN wOpenShutter" -LINE20=wCloseShutter: -LINE21="STATE002; RETURN wCloseShutter" -LINE22=wFrame: -LINE23="STATE003; RETURN wFrame" -LINES=24 +LINE15="STATE000; CALL ScienceLineRead(param_ScienceLines)" +LINE16="STATE000; CALL wCloseShutter" +LINE17=ScienceLineRead: +LINE18="STATE000; CALL LineTransfer" +LINE19="STATE000; CALL wLine" +LINE20="STATE000; CALL wPixel(param_SciencePixels)" +LINE21="STATE000; CALL wReset" +LINE22="STATE000; CALL Wait1us" +LINE23="STATE000; CALL OS_Clamp" +LINE24="STATE000; CALL Wait1us" +LINE25="STATE000; CALL OS_Clamp_" +LINE26="STATE000; RETURN ScienceLineRead" +LINE27=LineTransfer: +LINE28="STATE000; STATE000(15998)" +LINE29="STATE000; RETURN LineTransfer" +LINE30=wPixel: +LINE31="STATE001;" +LINE32="STATE002; STATE000(3897)" +LINE33="STATE000; RETURN wPixel" +LINE34=wReset: +LINE35="STATE000; RETURN wReset" +LINE36=wUnsetReset: +LINE37="STATE000; RETURN wUnsetReset" +LINE38=OS_Clamp: +LINE39="STATE000; RETURN OS_Clamp" +LINE40=OS_Clamp_: +LINE41="STATE000; RETURN OS_Clamp_" +LINE42=Wait1us: +LINE43="STATE000; STATE000(99)" +LINE44="STATE000; RETURN Wait1us" +LINE45=wOpenShutter: +LINE46="STATE003; RETURN wOpenShutter" +LINE47=wCloseShutter: +LINE48="STATE004; RETURN wCloseShutter" +LINE49=wFrame: +LINE50="STATE005; RETURN wFrame" +LINE51=wLine: +LINE52="STATE006; RETURN wLine" +LINES=53 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=10 MOD1\SLOWSLEWRATE1=1 @@ -330,12 +359,18 @@ MOD4\XVN_ENABLE4=1 STATE0\NAME=STATE000 STATE0\CONTROL="0,3F" STATE1\NAME=STATE001 -STATE1\CONTROL="1,3E" +STATE1\CONTROL="8,37" STATE2\NAME=STATE002 -STATE2\CONTROL="0,3E" +STATE2\CONTROL="0,31" STATE3\NAME=STATE003 -STATE3\CONTROL="2,3D" -STATES=4 +STATE3\CONTROL="1,3E" +STATE4\NAME=STATE004 +STATE4\CONTROL="0,3E" +STATE5\NAME=STATE005 +STATE5\CONTROL="2,3D" +STATE6\NAME=STATE006 +STATE6\CONTROL="4,3B" +STATES=7 [SYSTEM] BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 From 0f1c78cd9232b1aa1884622a71d95ab3ade8ea0f Mon Sep 17 00:00:00 2001 From: j-bichel Date: Tue, 21 Jan 2025 15:06:25 -0800 Subject: [PATCH 051/194] adding back all waveforms --- src/deimos/.modules | 200 ------------------------------------- src/deimos/.system | 37 ------- src/deimos/deimos.waveform | 12 +-- 3 files changed, 6 insertions(+), 243 deletions(-) delete mode 100644 src/deimos/.modules delete mode 100644 src/deimos/.system diff --git a/src/deimos/.modules b/src/deimos/.modules deleted file mode 100644 index 3eb83b1..0000000 --- a/src/deimos/.modules +++ /dev/null @@ -1,200 +0,0 @@ -[CONFIG] -MOD1\ENABLE1=1 -MOD1\FASTSLEWRATE1=1 -MOD1\SLOWSLEWRATE1=1 -MOD1\ENABLE2=1 -MOD1\FASTSLEWRATE2=1 -MOD1\SLOWSLEWRATE2=1 -MOD1\ENABLE3=1 -MOD1\FASTSLEWRATE3=1 -MOD1\SLOWSLEWRATE3=1 -MOD1\ENABLE4=1 -MOD1\FASTSLEWRATE4=1 -MOD1\SLOWSLEWRATE4=1 -MOD1\ENABLE5=1 -MOD1\FASTSLEWRATE5=1 -MOD1\SLOWSLEWRATE5=1 -MOD1\ENABLE6=1 -MOD1\FASTSLEWRATE6=1 -MOD1\SLOWSLEWRATE6=1 -MOD1\ENABLE7=1 -MOD1\FASTSLEWRATE7=1 -MOD1\SLOWSLEWRATE7=1 -MOD1\ENABLE8=1 -MOD1\FASTSLEWRATE8=1 -MOD1\SLOWSLEWRATE8=1 -MOD1\ENABLE9=1 -MOD1\FASTSLEWRATE9=1 -MOD1\SLOWSLEWRATE9=1 -MOD1\ENABLE10=1 -MOD1\FASTSLEWRATE10=1 -MOD1\SLOWSLEWRATE10=1 -MOD1\ENABLE11=1 -MOD1\FASTSLEWRATE11=1 -MOD1\SLOWSLEWRATE11=1 -MOD1\ENABLE12=1 -MOD1\FASTSLEWRATE12=1 -MOD1\SLOWSLEWRATE12=1 -MOD2\ENABLE1=1 -MOD2\FASTSLEWRATE1=1 -MOD2\SLOWSLEWRATE1=1 -MOD2\ENABLE2=1 -MOD2\FASTSLEWRATE2=1 -MOD2\SLOWSLEWRATE2=1 -MOD2\ENABLE3=1 -MOD2\FASTSLEWRATE3=1 -MOD2\SLOWSLEWRATE3=1 -MOD2\ENABLE4=1 -MOD2\FASTSLEWRATE4=1 -MOD2\SLOWSLEWRATE4=1 -MOD2\ENABLE5=1 -MOD2\FASTSLEWRATE5=1 -MOD2\SLOWSLEWRATE5=1 -MOD2\ENABLE6=1 -MOD2\FASTSLEWRATE6=1 -MOD2\SLOWSLEWRATE6=1 -MOD2\ENABLE7=1 -MOD2\FASTSLEWRATE7=1 -MOD2\SLOWSLEWRATE7=1 -MOD2\ENABLE8=1 -MOD2\FASTSLEWRATE8=1 -MOD2\SLOWSLEWRATE8=1 -MOD2\ENABLE9=1 -MOD2\FASTSLEWRATE9=1 -MOD2\SLOWSLEWRATE9=1 -MOD2\ENABLE10=1 -MOD2\FASTSLEWRATE10=1 -MOD2\SLOWSLEWRATE10=1 -MOD2\ENABLE11=1 -MOD2\FASTSLEWRATE11=1 -MOD2\SLOWSLEWRATE11=1 -MOD2\ENABLE12=1 -MOD2\FASTSLEWRATE12=1 -MOD2\SLOWSLEWRATE12=1 -MOD3\ENABLE1=1 -MOD3\FASTSLEWRATE1=1 -MOD3\SLOWSLEWRATE1=1 -MOD3\ENABLE2=1 -MOD3\FASTSLEWRATE2=1 -MOD3\SLOWSLEWRATE2=1 -MOD3\ENABLE3=1 -MOD3\FASTSLEWRATE3=1 -MOD3\SLOWSLEWRATE3=1 -MOD3\ENABLE4=1 -MOD3\FASTSLEWRATE4=1 -MOD3\SLOWSLEWRATE4=1 -MOD3\ENABLE5=1 -MOD3\FASTSLEWRATE5=1 -MOD3\SLOWSLEWRATE5=1 -MOD3\ENABLE6=1 -MOD3\FASTSLEWRATE6=1 -MOD3\SLOWSLEWRATE6=1 -MOD3\ENABLE7=1 -MOD3\FASTSLEWRATE7=1 -MOD3\SLOWSLEWRATE7=1 -MOD3\ENABLE8=1 -MOD3\FASTSLEWRATE8=1 -MOD3\SLOWSLEWRATE8=1 -MOD3\ENABLE9=1 -MOD3\FASTSLEWRATE9=1 -MOD3\SLOWSLEWRATE9=1 -MOD3\ENABLE10=1 -MOD3\FASTSLEWRATE10=1 -MOD3\SLOWSLEWRATE10=1 -MOD3\ENABLE11=1 -MOD3\FASTSLEWRATE11=1 -MOD3\SLOWSLEWRATE11=1 -MOD3\ENABLE12=1 -MOD3\FASTSLEWRATE12=1 -MOD3\SLOWSLEWRATE12=1 -MOD7\CLAMP1=0.0 -MOD7\CLAMP2=0.0 -MOD7\CLAMP3=1.5 -MOD7\CLAMP4=1.5 -MOD7\PREAMPGAIN=0 -MOD9\HVLC_V1=0 -MOD9\HVLC_ORDER1=0 -MOD9\HVLC_V2=0 -MOD9\HVLC_ORDER2=0 -MOD9\HVLC_V3=3.0 -MOD9\HVLC_ORDER3=0 -MOD9\HVLC_V4=12.0 -MOD9\HVLC_ORDER4=0 -MOD9\HVLC_V5=19 -MOD9\HVLC_ORDER5=0 -MOD9\HVLC_V6=19 -MOD9\HVLC_ORDER6=0 -MOD9\HVLC_V7=19 -MOD9\HVLC_ORDER7=0 -MOD9\HVLC_V8=29 -MOD9\HVLC_ORDER8=0 -MOD9\HVLC_V9=3.5 -MOD9\HVLC_ORDER9=0 -MOD9\HVLC_V10=0 -MOD9\HVLC_ORDER10=0 -MOD9\HVLC_V11=19 -MOD9\HVLC_ORDER11=0 -MOD9\HVLC_V12=30 -MOD9\HVLC_ORDER12=0 -MOD9\HVLC_V13=15 -MOD9\HVLC_ORDER13=0 -MOD9\HVLC_V14=15 -MOD9\HVLC_ORDER14=0 -MOD9\HVLC_V15=1 -MOD9\HVLC_ORDER15=0 -MOD9\HVLC_V16=24 -MOD9\HVLC_ORDER16=0 -MOD9\HVLC_V17=15 -MOD9\HVLC_ORDER17=0 -MOD9\HVLC_V18=1 -MOD9\HVLC_ORDER18=0 -MOD9\HVLC_V19=24 -MOD9\HVLC_ORDER19=0 -MOD9\HVLC_V20=15 -MOD9\HVLC_ORDER20=0 -MOD9\HVLC_V21=24 -MOD9\HVLC_ORDER21=0 -MOD9\HVLC_V22=24 -MOD9\HVLC_ORDER22=0 -MOD9\HVLC_V23=24 -MOD9\HVLC_ORDER23=0 -MOD9\HVLC_V24=15 -MOD9\HVLC_ORDER24=0 -MOD10\HVLC_V1=0 -MOD10\HVLC_ORDER1=0 -MOD9\HVHC_ENABLE1=1 -MOD9\HVHC_V1=15 -MOD9\HVHC_IL1=0 -MOD9\HVHC_ORDER1=0 -MOD9\HVHC_ENABLE2=1 -MOD9\HVHC_V2=15 -MOD9\HVHC_IL2=0 -MOD9\HVHC_ORDER2=0 -MOD9\HVHC_ENABLE3=1 -MOD9\HVHC_V3=15 -MOD9\HVHC_IL3=0 -MOD9\HVHC_ORDER3=0 -MOD9\HVHC_ENABLE4=1 -MOD9\HVHC_V4=15 -MOD9\HVHC_IL4=0 -MOD9\HVHC_ORDER4=0 -MOD9\HVHC_ENABLE5=1 -MOD9\HVHC_V5=15 -MOD9\HVHC_IL5=0 -MOD9\HVHC_ORDER5=0 -MOD9\HVHC_ENABLE6=1 -MOD9\HVHC_V6=15 -MOD9\HVHC_IL6=0 -MOD9\HVHC_ORDER6=0 -MOD12\DIO_SOURCE1=0 -MOD12\DIO_DIR1=0 -MOD12\DIO_SOURCE2=0 -MOD12\DIO_DIR2=0 -MOD12\DIO_SOURCE3=0 -MOD12\DIO_DIR3=0 -MOD12\DIO_SOURCE4=0 -MOD12\DIO_DIR4=0 -MOD12\DIO_POWER=0 -MOD4\XVN_V1=-100 -MOD4\XVN_ORDER1=0 -MOD4\XVN_ENABLE1=1 diff --git a/src/deimos/.system b/src/deimos/.system deleted file mode 100644 index 72baa29..0000000 --- a/src/deimos/.system +++ /dev/null @@ -1,37 +0,0 @@ -[SYSTEM] -BACKPLANE_ID=0000000000000000 -BACKPLANE_REV=0 -BACKPLANE_TYPE=1 -BACKPLANE_VERSION=0.0.0 -MOD1_ID=0000000000000000 -MOD1_REV=0 -MOD1_VERSION=0.0.0 -MOD1_TYPE=16 -MOD2_ID=0000000000000000 -MOD2_REV=0 -MOD2_VERSION=0.0.0 -MOD2_TYPE=16 -MOD3_ID=0000000000000000 -MOD3_REV=0 -MOD3_VERSION=0.0.0 -MOD3_TYPE=16 -MOD4_ID=0000000000000000 -MOD4_REV=0 -MOD4_VERSION=0.0.0 -MOD4_TYPE=12 -MOD7_ID=0000000000000000 -MOD7_REV=0 -MOD7_VERSION=0.0.0 -MOD7_TYPE=2 -MOD9_ID=0000000000000000 -MOD9_REV=0 -MOD9_VERSION=0.0.0 -MOD9_TYPE=4 -MOD10_ID=0000000000000000 -MOD10_REV=0 -MOD10_VERSION=0.0.0 -MOD10_TYPE=3 -MOD12_ID=0000000000000000 -MOD12_REV=0 -MOD12_VERSION=0.0.0 -MOD12_TYPE=10 diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 5087a6d..c9c9f1e 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -104,11 +104,11 @@ WAVEFORM wPixel { .+TWX: SET RG TO LOW; TSW: SET SW TO LOW; .+SW_settleT: SET SW TO HIGH; - 0: SET SCI_SCLK1 TO HIGH; - SET SCI_SCLK3 TO LOW; - .+TOR: SET SCI_SCLK2 TO HIGH; - .+TOR: SET SCI_SCLK1 TO LOW; - SET SCI_SCLK3 TO HIGH; + 0: SET SCI_SCLK1 TO HIGH,FAST; + SET SCI_SCLK3 TO LOW,FAST; + .+TOR: SET SCI_SCLK2 TO HIGH,FAST; + .+TOR: SET SCI_SCLK1 TO LOW,FAST; + SET SCI_SCLK3 TO HIGH,FAST; .+TOR: RETURN; } @@ -167,4 +167,4 @@ WAVEFORM wPixel { SET FRAME TO LOW; SET LINE TO LOW; } -*/ \ No newline at end of file +*/ From 22344155f7ac5f1fd8ad59b7af8b4cce274235aa Mon Sep 17 00:00:00 2001 From: j-bichel Date: Tue, 21 Jan 2025 15:09:15 -0800 Subject: [PATCH 052/194] adding python generated deimos.acf in /acf; not actually correct --- acf/deimos.acf | 63 +++++++++++++++++++++++++++++++++++++++----------- 1 file changed, 49 insertions(+), 14 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 2c29177..222a546 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -44,16 +44,45 @@ LINE11=ScienceReadout: LINE12="STATE000; CALL wCloseShutter" LINE13="STATE000; CALL wOpenShutter" LINE14="STATE000; CALL wFrame" -LINE15="STATE000; CALL wCloseShutter" -LINE16=ScienceLineRead: -LINE17="STATE000; RETURN ScienceLineRead" -LINE18=wOpenShutter: -LINE19="STATE001; RETURN wOpenShutter" -LINE20=wCloseShutter: -LINE21="STATE002; RETURN wCloseShutter" -LINE22=wFrame: -LINE23="STATE003; RETURN wFrame" -LINES=24 +LINE15="STATE000; CALL ScienceLineRead(param_ScienceLines)" +LINE16="STATE000; CALL wCloseShutter" +LINE17=ScienceLineRead: +LINE18="STATE000; CALL LineTransfer" +LINE19="STATE000; CALL wLine" +LINE20="STATE000; CALL wPixel(param_SciencePixels)" +LINE21="STATE000; CALL wReset" +LINE22="STATE000; CALL Wait1us" +LINE23="STATE000; CALL OS_Clamp" +LINE24="STATE000; CALL Wait1us" +LINE25="STATE000; CALL OS_Clamp_" +LINE26="STATE000; RETURN ScienceLineRead" +LINE27=LineTransfer: +LINE28="STATE000; STATE000(15998)" +LINE29="STATE000; RETURN LineTransfer" +LINE30=wPixel: +LINE31="STATE001;" +LINE32="STATE002; STATE000(3897)" +LINE33="STATE000; RETURN wPixel" +LINE34=wReset: +LINE35="STATE000; RETURN wReset" +LINE36=wUnsetReset: +LINE37="STATE000; RETURN wUnsetReset" +LINE38=OS_Clamp: +LINE39="STATE000; RETURN OS_Clamp" +LINE40=OS_Clamp_: +LINE41="STATE000; RETURN OS_Clamp_" +LINE42=Wait1us: +LINE43="STATE000; STATE000(99)" +LINE44="STATE000; RETURN Wait1us" +LINE45=wOpenShutter: +LINE46="STATE003; RETURN wOpenShutter" +LINE47=wCloseShutter: +LINE48="STATE004; RETURN wCloseShutter" +LINE49=wFrame: +LINE50="STATE005; RETURN wFrame" +LINE51=wLine: +LINE52="STATE006; RETURN wLine" +LINES=53 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=10 MOD1\SLOWSLEWRATE1=1 @@ -330,12 +359,18 @@ MOD4\XVN_ENABLE4=1 STATE0\NAME=STATE000 STATE0\CONTROL="0,3F" STATE1\NAME=STATE001 -STATE1\CONTROL="1,3E" +STATE1\CONTROL="8,37" STATE2\NAME=STATE002 -STATE2\CONTROL="0,3E" +STATE2\CONTROL="0,31" STATE3\NAME=STATE003 -STATE3\CONTROL="2,3D" -STATES=4 +STATE3\CONTROL="1,3E" +STATE4\NAME=STATE004 +STATE4\CONTROL="0,3E" +STATE5\NAME=STATE005 +STATE5\CONTROL="2,3D" +STATE6\NAME=STATE006 +STATE6\CONTROL="4,3B" +STATES=7 [SYSTEM] BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 From 343435364e7d4f3a70fc0a995d8a67f25a1e3e3b Mon Sep 17 00:00:00 2001 From: Tojoe Date: Thu, 23 Jan 2025 09:21:23 -0800 Subject: [PATCH 053/194] rearranging .def and .mod files to allow for slew rate calculations --- src/deimos/deimos.def | 37 ------------------------------------- src/deimos/deimos.mod | 21 +++++++++++++++++++-- 2 files changed, 19 insertions(+), 39 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 8ce94eb..08a2ef4 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -72,42 +72,5 @@ #define _FIRST_VIDEO_SAMPLE #eval Pixel_T/2 - 1 + SW_settleT /* Start video sample after reset pedestal and summing well settle */ #define _LAST_VIDEO_SAMPLE #eval Pixel_T - 2 /* Stop video sample at end of pixel time */ -/** --------------------------------------------------------------------------- - * Define clock voltage levels here (units are volts) - * All voltages are set relative to front substrate voltage (typ. 0V) - * evaluations relative to FSS should be implemented if variability is required -/*/ - -#define _PAR_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ -#define _PAR_CLOCK_LOW 0 /* [-0.50, 0.50] */ - -#define _TG_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ -#define _TG_CLOCK_LOW 0 /* [-0.50, 0.50] */ - -#define _SER_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ -#define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ -#define _SER_CLOCK_RCV 13 /* Higher than serial clock high */ - -#define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ -#define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ - -/** --------------------------------------------------------------------------- - * Define clock slew rates here - * units are Volts per microsecond, range from 0.001 to 1000 - * For fast readout speeds the slew rate is dependant on the pulse width - * Will be defined in waveform file - */ -/* - #define _PAR_CLOCK_SLEW_FAST 10 - #define _PAR_CLOCK_SLEW_SLOW 1 - #define _SER_CLOCK_SLEW_FAST 500 - #define _SER_CLOCK_SLEW_SLOW 1 - #define _TG_CLOCK_SLEW_FAST 500 - #define _TG_CLOCK_SLEW_SLOW 100 - #define _SW_CLOCK_SLEW_FAST 500 - #define _SW_CLOCK_SLEW_SLOW 100 - */ - - diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 81e54e6..74f3f7f 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -1,12 +1,29 @@ +/** --------------------------------------------------------------------------- + * Define clock voltage levels here (units are volts) + * All voltages are set relative to front substrate voltage (typ. 0V) + * evaluations relative to FSS should be implemented if variability is required +/*/ + +#define _PAR_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _PAR_CLOCK_LOW 0 /* [-0.50, 0.50] */ + +#define _TG_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _TG_CLOCK_LOW 0 /* [-0.50, 0.50] */ + +#define _SER_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ +#define _SER_CLOCK_RCV 13 /* Higher than serial clock high */ + +#define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ +#define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ /* Fast and Slow slew rates are defined here */ /* A boolean is set during a SET..TO command */ /* to select between fast and slow slew rate */ - /* Expressions to be determined */ #define SCLK_fast 500 -#define SCLK_slow 100 +#define SCLK_slow (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / PIXEL_T * 1ns ) #define PCLK_fast 10 #define PCLK_slow 1 #define SW_fast 500 From 57248ec5f3e617ab4dc0c9b4f6ab09f3aa6c1dfd Mon Sep 17 00:00:00 2001 From: Tojoe Date: Thu, 23 Jan 2025 09:24:50 -0800 Subject: [PATCH 054/194] Adding voltage definitions back --- src/deimos/deimos.def | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 08a2ef4..ceaf170 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -72,5 +72,24 @@ #define _FIRST_VIDEO_SAMPLE #eval Pixel_T/2 - 1 + SW_settleT /* Start video sample after reset pedestal and summing well settle */ #define _LAST_VIDEO_SAMPLE #eval Pixel_T - 2 /* Stop video sample at end of pixel time */ +/** --------------------------------------------------------------------------- + * Define clock voltage levels here (units are volts) + * All voltages are set relative to front substrate voltage (typ. 0V) + * evaluations relative to FSS should be implemented if variability is required +/*/ + +#define _PAR_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _PAR_CLOCK_LOW 0 /* [-0.50, 0.50] */ + +#define _TG_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _TG_CLOCK_LOW 0 /* [-0.50, 0.50] */ + +#define _SER_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ +#define _SER_CLOCK_RCV 13 /* Higher than serial clock high */ + +#define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ +#define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ + From 8515dbc6c55559c08df5e1febf8ca3f047cb7c37 Mon Sep 17 00:00:00 2001 From: Tojoe Date: Thu, 23 Jan 2025 16:22:42 -0800 Subject: [PATCH 055/194] Fixed serial clocking waveform after feedback from digital analyzer; minor fix to .mod --- src/deimos/deimos.mod | 2 +- src/deimos/deimos.waveform | 11 ++++++----- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 74f3f7f..e0092bb 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -23,7 +23,7 @@ /* Expressions to be determined */ #define SCLK_fast 500 -#define SCLK_slow (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / PIXEL_T * 1ns ) +#define SCLK_slow (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / ( PIXEL_T * 1ns ) #define PCLK_fast 10 #define PCLK_slow 1 #define SW_fast 500 diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index c9c9f1e..9cee7e8 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -104,11 +104,12 @@ WAVEFORM wPixel { .+TWX: SET RG TO LOW; TSW: SET SW TO LOW; .+SW_settleT: SET SW TO HIGH; - 0: SET SCI_SCLK1 TO HIGH,FAST; - SET SCI_SCLK3 TO LOW,FAST; - .+TOR: SET SCI_SCLK2 TO HIGH,FAST; - .+TOR: SET SCI_SCLK1 TO LOW,FAST; - SET SCI_SCLK3 TO HIGH,FAST; + 0: SET SCI_SCLK1 TO _SER_CLOCK_HIGH,FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW,FAST; + .+TOR: SET SCI_SCLK2 TO _SER_CLOCK_HIGH,FAST; + .+TOR: SET SCI_SCLK1 TO _SER_CLOCK_LOW,FAST; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH,FAST; + .+TOR: SET SCI_SCLK2 TO _SER_CLOCK_LOW,FAST; .+TOR: RETURN; } From c3acfdde940d2d68e10239e7ef9dafcff41a443b Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Fri, 24 Jan 2025 00:24:23 +0000 Subject: [PATCH 056/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 222a546..52118da 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -61,7 +61,7 @@ LINE28="STATE000; STATE000(15998)" LINE29="STATE000; RETURN LineTransfer" LINE30=wPixel: LINE31="STATE001;" -LINE32="STATE002; STATE000(3897)" +LINE32="STATE002; STATE000(5197)" LINE33="STATE000; RETURN wPixel" LINE34=wReset: LINE35="STATE000; RETURN wReset" From 706c6fbadc591cbbae6129fc1970bce14556fdfc Mon Sep 17 00:00:00 2001 From: j-bichel Date: Fri, 24 Jan 2025 08:38:04 -0800 Subject: [PATCH 057/194] changing .conf to -x --- src/deimos/deimos.conf | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 src/deimos/deimos.conf diff --git a/src/deimos/deimos.conf b/src/deimos/deimos.conf old mode 100755 new mode 100644 From 9ec81f7ff460e1961c21015748febc0c9c8d1542 Mon Sep 17 00:00:00 2001 From: Tojoe Date: Fri, 24 Jan 2025 08:54:37 -0800 Subject: [PATCH 058/194] Adding include file such that timing and voltage level definitions may be used in multiple files; modified .mod and .wavefrom to reflect this change --- src/deimos/deimos.mod | 23 ++--------- src/deimos/deimos.waveform | 34 +-------------- src/deimos/voltage_timing_parameters.h | 57 ++++++++++++++++++++++++++ 3 files changed, 61 insertions(+), 53 deletions(-) create mode 100644 src/deimos/voltage_timing_parameters.h diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index e0092bb..0cae88b 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -1,21 +1,4 @@ -/** --------------------------------------------------------------------------- - * Define clock voltage levels here (units are volts) - * All voltages are set relative to front substrate voltage (typ. 0V) - * evaluations relative to FSS should be implemented if variability is required -/*/ - -#define _PAR_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ -#define _PAR_CLOCK_LOW 0 /* [-0.50, 0.50] */ - -#define _TG_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ -#define _TG_CLOCK_LOW 0 /* [-0.50, 0.50] */ - -#define _SER_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ -#define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ -#define _SER_CLOCK_RCV 13 /* Higher than serial clock high */ - -#define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ -#define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ +#include voltage_timing_parameters.h /* Fast and Slow slew rates are defined here */ /* A boolean is set during a SET..TO command */ @@ -23,9 +6,9 @@ /* Expressions to be determined */ #define SCLK_fast 500 -#define SCLK_slow (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / ( PIXEL_T * 1ns ) +#define SCLK_slow (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / ( TSR ) #define PCLK_fast 10 -#define PCLK_slow 1 +#define PCLK_slow (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / ( 2 * TOI ) #define SW_fast 500 #define SW_slow 100 #define TG_fast 500 diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 9cee7e8..1aa8dfd 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -25,39 +25,7 @@ * */ - -#define clockfreq 100000000 /* 100 MHz master clock frequency in Hz */ -#define sec *(clockfreq) /* clock cycles per second */ -#define ms *(clockfreq/1000) /* clock cycles per millisec */ -#define us *(clockfreq/1000000) /* clock cycles per microsec */ -#define ns *(clockfreq/10000000) /* clock cycles per nanosecond */ -#define clicks *(clockfreq/100000000) /* clock cycles per nanosecond */ - -/* Timing defines */ -/* Generic timing parameters */ -#define TICK #eval 1 clicks /* 10 nsec */ -#define 1ns #eval 1 ns -#define 1us #eval 1 us -#define 2us #eval 2 us -#define 10us #eval 10 us -#define 20us #eval 20 us -#define 25us #eval 25 us -/* #define 1ms #eval 99999 clicks /* 999 usec WHY */ -#define 10ms #eval 10 ms - - -/* Line transfer timing definitions */ -#define TDRT 20us -#define TOI 20us -#define TDTR 20us - -/* Serial transfer timing definitions */ - -#define SCLK_RCV_RESET #eval 60 ns /* Serial clock recieving to reset */ -#define TWX #eval 170 ns /* Reset Pulse Width */ -#define TOR #eval 130 ns /* Serial Clock Overlap */ -#define TSW #eval Pixel_T/2 - +#include voltage_timing_parameters.h /*****************************************/ /* Serial Clock Slew Rate */ diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h new file mode 100644 index 0000000..ad247ee --- /dev/null +++ b/src/deimos/voltage_timing_parameters.h @@ -0,0 +1,57 @@ +/** --------------------------------------------------------------------------- + * Define clock voltage levels here (units are in volts) + * All voltages are set relative to front substrate voltage (typ. 0V) + * evaluations relative to FSS should be implemented if variability is required +/*/ + +#define _PAR_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _PAR_CLOCK_LOW 0 /* [-0.50, 0.50] */ + +#define _TG_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _TG_CLOCK_LOW 0 /* [-0.50, 0.50] */ + +#define _SER_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ +#define _SER_CLOCK_RCV 13 /* Higher than serial clock high */ + +#define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ +#define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ + +/** --------------------------------------------------------------------------- + * Define timing parameters here (units are in ticks - 10ns) + * Evaluations are used for specific timing parameters and slew rates +/*/ + + +#define clockfreq 100000000 /* 100 MHz master clock frequency in Hz */ +#define sec *(clockfreq) /* clock cycles per second */ +#define ms *(clockfreq/1000) /* clock cycles per millisec */ +#define us *(clockfreq/1000000) /* clock cycles per microsec */ +#define ns *(clockfreq/10000000) /* clock cycles per nanosecond */ +#define clicks *(clockfreq/100000000) /* clock cycles per nanosecond */ + +/* Timing defines */ +/* Generic timing parameters */ +#define TICK #eval 1 clicks /* 10 nsec */ +#define 1ns #eval 1 ns +#define 1us #eval 1 us +#define 2us #eval 2 us +#define 10us #eval 10 us +#define 20us #eval 20 us +#define 25us #eval 25 us +/* #define 1ms #eval 99999 clicks /* 999 usec WHY */ +#define 10ms #eval 10 ms + + +/* Line transfer timing definitions */ +#define TDRT 20us +#define TOI 20us +#define TDTR 20us + +/* Serial transfer timing definitions */ + +#define SCLK_RCV_RESET #eval 60 ns /* Serial clock recieving to reset */ +#define TWX #eval 170 ns /* Reset Pulse Width */ +#define TOR #eval 130 ns /* Serial Clock Overlap */ +#define TSW #eval Pixel_T/2 ns +#define TSR #eval Pixel_T/3 ns \ No newline at end of file From 7009ac6830ce1232c8f9f6df43a18d3fe783450f Mon Sep 17 00:00:00 2001 From: Tojoe Date: Fri, 24 Jan 2025 12:35:31 -0800 Subject: [PATCH 059/194] modifying timing definition for serial clocks --- src/deimos/deimos.waveform | 7 ------- src/deimos/voltage_timing_parameters.h | 2 +- 2 files changed, 1 insertion(+), 8 deletions(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 1aa8dfd..b04f147 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -27,13 +27,6 @@ #include voltage_timing_parameters.h -/*****************************************/ -/* Serial Clock Slew Rate */ -/*****************************************/ -/* Usually defined in .def */ -#define _SER_CLOCK_SLEW_SLOW #eval (_SER_CLOCK_HIGH-_SER_CLOCK_LOW)/(Pixel_T/3) - - /*****************************************/ /* LOGIC STATES */ /*****************************************/ diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index ad247ee..651c9ea 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -52,6 +52,6 @@ #define SCLK_RCV_RESET #eval 60 ns /* Serial clock recieving to reset */ #define TWX #eval 170 ns /* Reset Pulse Width */ -#define TOR #eval 130 ns /* Serial Clock Overlap */ +#define TOR #eval 130 TICK /* Serial Clock Overlap */ #define TSW #eval Pixel_T/2 ns #define TSR #eval Pixel_T/3 ns \ No newline at end of file From 40d586f905783eff862453a9ff4a631ab347aacf Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Fri, 24 Jan 2025 20:36:18 +0000 Subject: [PATCH 060/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 52118da..04e4077 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -61,7 +61,7 @@ LINE28="STATE000; STATE000(15998)" LINE29="STATE000; RETURN LineTransfer" LINE30=wPixel: LINE31="STATE001;" -LINE32="STATE002; STATE000(5197)" +LINE32="STATE002; STATE000(5201)" LINE33="STATE000; RETURN wPixel" LINE34=wReset: LINE35="STATE000; RETURN wReset" From b53bce39e2deb998770f2474b8b1e42942ed4e1e Mon Sep 17 00:00:00 2001 From: j-bichel Date: Mon, 27 Jan 2025 09:07:55 -0800 Subject: [PATCH 061/194] fixing sequential timing waveform with plain numbers; to be reviewed --- src/deimos/deimos.seq | 6 ++--- src/deimos/deimos.waveform | 33 ++++++++++++++------------ src/deimos/voltage_timing_parameters.h | 10 ++++---- 3 files changed, 26 insertions(+), 23 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index c5ea275..21e8077 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -81,10 +81,10 @@ SEQUENCE ScienceLineRead{ /* Serial Recieving?? */ - wReset(); + /* wReset(); Wait1us(); OS_Clamp(); Wait1us(); - OS_Clamp_(); - return; + OS_Clamp_();*/ + RETURN; } diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index b04f147..a96e9e2 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -57,21 +57,23 @@ WAVEFORM LineTransfer { } WAVEFORM wPixel { - 0: SET PIXEL TO HIGH; + 0: SET PIXEL TO HIGH; .+TICK: SET PIXEL TO LOW; - SET FRAME TO LOW; - SET LINE TO LOW; - 0: SET RG TO HIGH; - .+TWX: SET RG TO LOW; - TSW: SET SW TO LOW; - .+SW_settleT: SET SW TO HIGH; - 0: SET SCI_SCLK1 TO _SER_CLOCK_HIGH,FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW,FAST; - .+TOR: SET SCI_SCLK2 TO _SER_CLOCK_HIGH,FAST; - .+TOR: SET SCI_SCLK1 TO _SER_CLOCK_LOW,FAST; - SET SCI_SCLK3 TO _SER_CLOCK_HIGH,FAST; - .+TOR: SET SCI_SCLK2 TO _SER_CLOCK_LOW,FAST; - .+TOR: RETURN; + SET FRAME TO LOW; + SET LINE TO LOW; + 0: SET RG TO HIGH; + .+10: SET RG TO LOW; + + 50: SET SW TO LOW; + .+20: SET SW TO HIGH; + + 0: SET SCI_SCLK1 TO _SER_CLOCK_HIGH,FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW,FAST; + .+33: SET SCI_SCLK2 TO _SER_CLOCK_HIGH,FAST; + SET SCI_SCLK1 TO _SER_CLOCK_LOW,FAST; + .+33: SET SCI_SCLK3 TO _SER_CLOCK_HIGH,FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW,FAST; + .+33: RETURN; } /*****************************************/ @@ -100,7 +102,7 @@ WAVEFORM OS_Clamp_ { WAVEFORM Wait1us { 0: SET NOP TO HIGH; - .+1us: SET NOP TO HIGH; + .+1us: RETURN; } /*****************************************/ @@ -122,6 +124,7 @@ WAVEFORM wFrame { WAVEFORM wLine { 0: SET LINE TO HIGH; } + /* WAVEFORM wPixel { 0: SET PIXEL TO HIGH; diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 651c9ea..6ed2753 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -50,8 +50,8 @@ /* Serial transfer timing definitions */ -#define SCLK_RCV_RESET #eval 60 ns /* Serial clock recieving to reset */ -#define TWX #eval 170 ns /* Reset Pulse Width */ -#define TOR #eval 130 TICK /* Serial Clock Overlap */ -#define TSW #eval Pixel_T/2 ns -#define TSR #eval Pixel_T/3 ns \ No newline at end of file +#define SCLK_RCV_RESET #eval 60 TICK /* Serial clock recieving to reset */ +#define TWX #eval 8 TICK /* Reset Pulse Width */ +#define TOR #eval 56 TICK /* Serial Clock Overlap */ +#define TSW #eval Pixel_T/2 TICK +#define TSR #eval Pixel_T/3 TICK From 6d0bdde5013b12e59714643554cd2fc49563ccf9 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Mon, 27 Jan 2025 17:10:51 +0000 Subject: [PATCH 062/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 61 +++++++++++++++++++++++--------------------------- 1 file changed, 28 insertions(+), 33 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 04e4077..113cfc9 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -50,39 +50,34 @@ LINE17=ScienceLineRead: LINE18="STATE000; CALL LineTransfer" LINE19="STATE000; CALL wLine" LINE20="STATE000; CALL wPixel(param_SciencePixels)" -LINE21="STATE000; CALL wReset" -LINE22="STATE000; CALL Wait1us" -LINE23="STATE000; CALL OS_Clamp" -LINE24="STATE000; CALL Wait1us" -LINE25="STATE000; CALL OS_Clamp_" -LINE26="STATE000; RETURN ScienceLineRead" -LINE27=LineTransfer: -LINE28="STATE000; STATE000(15998)" -LINE29="STATE000; RETURN LineTransfer" -LINE30=wPixel: -LINE31="STATE001;" -LINE32="STATE002; STATE000(5201)" -LINE33="STATE000; RETURN wPixel" -LINE34=wReset: -LINE35="STATE000; RETURN wReset" -LINE36=wUnsetReset: -LINE37="STATE000; RETURN wUnsetReset" -LINE38=OS_Clamp: -LINE39="STATE000; RETURN OS_Clamp" -LINE40=OS_Clamp_: -LINE41="STATE000; RETURN OS_Clamp_" -LINE42=Wait1us: -LINE43="STATE000; STATE000(99)" -LINE44="STATE000; RETURN Wait1us" -LINE45=wOpenShutter: -LINE46="STATE003; RETURN wOpenShutter" -LINE47=wCloseShutter: -LINE48="STATE004; RETURN wCloseShutter" -LINE49=wFrame: -LINE50="STATE005; RETURN wFrame" -LINE51=wLine: -LINE52="STATE006; RETURN wLine" -LINES=53 +LINE21="STATE000; RETURN ScienceLineRead" +LINE22=LineTransfer: +LINE23="STATE000; STATE000(15998)" +LINE24="STATE000; RETURN LineTransfer" +LINE25=wPixel: +LINE26="STATE001;" +LINE27="STATE002; STATE000(96)" +LINE28="STATE000; RETURN wPixel" +LINE29=wReset: +LINE30="STATE000; RETURN wReset" +LINE31=wUnsetReset: +LINE32="STATE000; RETURN wUnsetReset" +LINE33=OS_Clamp: +LINE34="STATE000; RETURN OS_Clamp" +LINE35=OS_Clamp_: +LINE36="STATE000; RETURN OS_Clamp_" +LINE37=Wait1us: +LINE38="STATE000; STATE000(98)" +LINE39="STATE000; RETURN Wait1us" +LINE40=wOpenShutter: +LINE41="STATE003; RETURN wOpenShutter" +LINE42=wCloseShutter: +LINE43="STATE004; RETURN wCloseShutter" +LINE44=wFrame: +LINE45="STATE005; RETURN wFrame" +LINE46=wLine: +LINE47="STATE006; RETURN wLine" +LINES=48 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=10 MOD1\SLOWSLEWRATE1=1 From cd3e48744d80a95e5be41d87134b5be5e255e61e Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 4 Feb 2025 16:08:29 -0800 Subject: [PATCH 063/194] concurrent clocking sequence for standard frame readout --- src/deimos/deimos.def | 4 +- src/deimos/deimos.mod | 8 +- src/deimos/deimos.seq | 96 +++++++++------------ src/deimos/deimos.waveform | 110 +++++++++++++++---------- src/deimos/voltage_timing_parameters.h | 15 +++- 5 files changed, 126 insertions(+), 107 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index ceaf170..4cb4d3b 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -46,7 +46,7 @@ #define _IMAGECOLS #eval _SECTIONCOLS #define _IDLE_LINES #eval _SKIP_LINES + _IMAGEROWS -#define _LINENUM #eval _IMAGEROWS + _PARALLELOVERSCAN - _SKIP_LINES +#define _LINENUM #eval _IMAGEROWS + _PARALLELiOVERSCAN - _SKIP_LINES /* Number of Pixels depends on if both output #if _SCI_SER_CLOCK_DIR == SPLIT #define _PIXELNUM #eval _IMAGECOLS/2 + _SERIALPRESCAN + _SERIALOVERSCAN @@ -91,5 +91,3 @@ #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ - - diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 0cae88b..95158bb 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -140,10 +140,10 @@ SLOT 10 lvbias { LVLC 2 [00.0,0]; LVLC 3 [3.00,0] "SCI E Output Gate"; LVLC 4 [3.00,0] "SCI F Output Gate"; - LVLC 5 [1.00,0] "SCI Summing Well - Low"; - LVLC 6 [12.0,0] "SCI Summing Well - High"; - LVLC 7 [1.00,0] "SCI Reset Gate - Low"; - LVLC 8 [12.0,0] "SCI Reset Gate - High"; + LVLC 5 [_SW_LOW,0] "SCI Summing Well - Low"; + LVLC 6 [_SW_HIGH,0] "SCI Summing Well - High"; + LVLC 7 [_RG_LOW,0] "SCI Reset Gate - Low"; + LVLC 8 [_RG_HIGH,0] "SCI Reset Gate - High"; LVLC 9 [00.0,0]; LVLC 10 [00.0,0]; LVLC 11 [00.0,0]; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 21e8077..0eee1d2 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -15,76 +15,58 @@ * syntax: param paramname=value */ -/** System Control Triggers **/ -param abort=0 -param start=0 -/** Science Readout Control Triggers **/ -param trigger_ScienceExpose = 0 -param trigger_ScienceRead = 0 +#define PIXELS_PER_SEG 1 +#define LINE_PIXELS 1 -/** Science Readout Control Parameters **/ +/** System Control Triggers **/ +param readout_enable = 1 //will be pulled externally when we want a frame +param integrate_enable = 0 // to be set externally if we want an integration time -param param_ScienceLines = _LINENUM -param param_SciencePixels = 1000/*_PIXELNUM*/ -param param_ExposeTime = 0 +param integrate_ms = 0 // will be set externally to choose integration ms +param integrate_s = 0 // will be set externally to choose integration seconds + param framecount = 0 //will be set SEQUENCE StartSeq { - /*BiasLow();*/ - if start GOTO InitSeq(); + if integrate_enable CheckIntegrate(); + if readout_enable FrameReadout(); GOTO StartSeq(); } -SEQUENCE InitSeq { - /* BiasInit(); */ - /* ACReset(); */ - /* Initialize Serial and Parallel Lines - What is serial recieving???? */ - /* Do something to parallel lines to prepare for exposure - GUARDS UP*/ - GOTO DetectorSel(); -} - -SEQUENCE DetectorSel { - if trigger_ScienceExpose SelectScienceReadoutMode(); - GOTO DetectorSel(); +SEQUENCE CheckIntegrate +{ + if framecount Integrate(); + framecount--; } - -SEQUENCE SelectScienceReadoutMode { - if trigger_ScienceRead ScienceReadout(); - GOTO SelectScienceReadoutMode(); + +SEQUENCE Integrate +{ + SetupIntegration(); + Wait1ms(integrate_ms); + Wait1s(integrate_s); + TearDownIntegration(); } -SEQUENCE ScienceReadout { - - wCloseShutter(); - /* Prep Image Area */ - wOpenShutter(); - wFrame(); - /* Flush lines? */ - ScienceLineRead(param_ScienceLines); - /* Dump Extra lines? */ - /* Put serial clocks in ready for charge state after readout, via serial recieving?? */ - wCloseShutter(); - +SEQUENCE FrameReadout +{ + ReadoutBegin(); + //single serial read to flush the register + ReadPixels(LINE_PIXELS); + //read all image rows + LineReadout(_IMAGEROWS); + LineReadout(_PARALLELOVERSCAN); } -SEQUENCE ScienceLineRead{ - - LineTransfer(); - wLine(); - - /* Initialize Serial Clocks */ - /* Flush desired number of post pixels */ - - wPixel(param_SciencePixels); - /* Flush desired number of pre serial pixels */ - /* Serial Recieving?? */ - - /* wReset(); - Wait1us(); - OS_Clamp(); - Wait1us(); - OS_Clamp_();*/ - RETURN; +SEQUENCE LineReadout +{ + TransferToSerialRegister(); + ParallelForwardSegment1(); + ReadPixels(PIXELS_PER_SEG); + ParallelForwardSegment2(); + ReadPixels(PIXELS_PER_SEG); + ParallelForwardSegment3(); + ReadPixels(PIXELS_PER_SEG); } + diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index a96e9e2..8c75c5f 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -56,45 +56,13 @@ WAVEFORM LineTransfer { .+TDRT: RETURN; } -WAVEFORM wPixel { - 0: SET PIXEL TO HIGH; - .+TICK: SET PIXEL TO LOW; - SET FRAME TO LOW; - SET LINE TO LOW; - 0: SET RG TO HIGH; - .+10: SET RG TO LOW; - - 50: SET SW TO LOW; - .+20: SET SW TO HIGH; - - 0: SET SCI_SCLK1 TO _SER_CLOCK_HIGH,FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW,FAST; - .+33: SET SCI_SCLK2 TO _SER_CLOCK_HIGH,FAST; - SET SCI_SCLK1 TO _SER_CLOCK_LOW,FAST; - .+33: SET SCI_SCLK3 TO _SER_CLOCK_HIGH,FAST; - SET SCI_SCLK2 TO _SER_CLOCK_LOW,FAST; - .+33: RETURN; -} -/*****************************************/ -/* Basic DEIMOS control signal waveforms */ -/*****************************************/ +WAVEFORM TransferToSerialRegister { -WAVEFORM wReset { - 0: SET RG TO HIGH; -} -WAVEFORM wUnsetReset { - 0: SET RG TO LOW; } -WAVEFORM OS_Clamp { - 0: SET AC_Clamp TO HIGH; -} -WAVEFORM OS_Clamp_ { - 0: SET AC_Clamp TO LOW; -} /*****************************************/ /* ARCHON Timing Control */ @@ -105,26 +73,84 @@ WAVEFORM Wait1us { .+1us: RETURN; } +WAVEFORM Wait1ms { + 0: SET NOP TO HIGH; + .+1ms: RETURN; +} + +WAVEFORM Wait1s { + 0: SET NOP TO HIGH; + .+1s: RETURN; +} + + /*****************************************/ -/* ARCHON control signal waveforms */ +/* Integration related waveforms */ /*****************************************/ -WAVEFORM wOpenShutter { - 0: SET SHUTTER TO OPEN; +WAVEFORM SetupIntegration { + 0: SET SHUTTER TO OPEN; + } -WAVEFORM wCloseShutter { - 0: SET SHUTTER TO CLOSE; +WAVEFORM TearDownIntegration { + 0: SET SHUTTER TO CLOSE; } -WAVEFORM wFrame { - 0: SET FRAME TO HIGH; +WAVEFORM ReadoutBegin +{ + 0: SET FRAME TO HIGH; + .+1: SET FRAME TO LOW; } -WAVEFORM wLine { - 0: SET LINE TO HIGH; +WAVEFORM TransferToSerialRegister +{ + //set serials to receive charge + 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; + .+SERTRANSDELAY: SET TG TO _TG_CLOCK_HIGH, FAST; + .+TGDELAY: SET TG TO _TG_CLOCK_LOW, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; } + +//waveforms for coincident (triangular) parallel clocking +WAVEFORM ParallelForwardSegment1 +{ + //NOTE: after integration, if done properly + //all charge should be under SCI_PCLK3 + // the transfer to serial reg is done before this happens + 0: SET SCI_PCLK3 to _PAR_CLOCK_LOW, FAST; + SET SCI_PCLK1 to _PAR_CLOCK_HIGH, FAST; +} + +WAVEFORM ParallelForwardSegment2 +{ + 0: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; + SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; +} + +WAVEFORM ParallelForwardSegment3 +{ + 0: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; + SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; +} + +WAVEFORM ReadPixels +{ + //NB using slow slew rate for triangular serial clocking + 0: SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; + //SW and RG are on LVDS signals + SET SW TO HIGH; + SET RG TO HIGH; + .+ +} + + + + + /* WAVEFORM wPixel { 0: SET PIXEL TO HIGH; diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 6ed2753..5ad1307 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -17,6 +17,13 @@ #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ +//#define _RG_LOW _SER_CLOCK_LOW /* [-0.5, 1.0] */ +//#define _RG_HIGH _SER_CLOCK_HIGH /* [8.0, 14.0] */ + +//#define _SW_LOW _SER_CLOCK_LOW /* [-0.5, 1.0] */ +//#define _SW_HIGH _SER_CLOCK_HIGH /* [8.0, 14.0] */ + + /** --------------------------------------------------------------------------- * Define timing parameters here (units are in ticks - 10ns) * Evaluations are used for specific timing parameters and slew rates @@ -39,8 +46,9 @@ #define 10us #eval 10 us #define 20us #eval 20 us #define 25us #eval 25 us -/* #define 1ms #eval 99999 clicks /* 999 usec WHY */ +#define 1ms #eval 100000 clicks /* 999 usec WHY */ #define 10ms #eval 10 ms +#define 1s #eval 1000 ms /* Line transfer timing definitions */ @@ -48,6 +56,11 @@ #define TOI 20us #define TDTR 20us +#define TGDELAY 20us +#define SERTRANSDELAY 10us + +#define PIX_SCLK_DELAY + /* Serial transfer timing definitions */ #define SCLK_RCV_RESET #eval 60 TICK /* Serial clock recieving to reset */ From a75f84a9766aad6c4c6532ed41d52255c6dc74c8 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 4 Feb 2025 16:46:33 -0800 Subject: [PATCH 064/194] coincident clocking sequence mostly defined, some constants still to work out --- src/deimos/deimos.def | 6 ++++++ src/deimos/deimos.mod | 8 ++++---- src/deimos/deimos.waveform | 25 ++++++++++++++++++++++--- src/deimos/voltage_timing_parameters.h | 10 +++++----- 4 files changed, 37 insertions(+), 12 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 4cb4d3b..add336e 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -72,6 +72,12 @@ #define _FIRST_VIDEO_SAMPLE #eval Pixel_T/2 - 1 + SW_settleT /* Start video sample after reset pedestal and summing well settle */ #define _LAST_VIDEO_SAMPLE #eval Pixel_T - 2 /* Stop video sample at end of pixel time */ +#define CDS_RESET_LENGTH 1 +#define CDS_SIGNAL_LENGTH 1 +#define COINC_SW_DELAY 1 +#define COINC_SCLK_LAST_DELAY 1 + + /** --------------------------------------------------------------------------- * Define clock voltage levels here (units are volts) * All voltages are set relative to front substrate voltage (typ. 0V) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 95158bb..0fda89d 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -140,10 +140,10 @@ SLOT 10 lvbias { LVLC 2 [00.0,0]; LVLC 3 [3.00,0] "SCI E Output Gate"; LVLC 4 [3.00,0] "SCI F Output Gate"; - LVLC 5 [_SW_LOW,0] "SCI Summing Well - Low"; - LVLC 6 [_SW_HIGH,0] "SCI Summing Well - High"; - LVLC 7 [_RG_LOW,0] "SCI Reset Gate - Low"; - LVLC 8 [_RG_HIGH,0] "SCI Reset Gate - High"; + LVLC 5 [1.00,0] "SCI Summing Well - Low"; + LVLC 6 [12.00,0] "SCI Summing Well - High"; + LVLC 7 [1.00,0] "SCI Reset Gate - Low"; + LVLC 8 [12.00,0] "SCI Reset Gate - High"; LVLC 9 [00.0,0]; LVLC 10 [00.0,0]; LVLC 11 [00.0,0]; diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 8c75c5f..64ae11a 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -140,11 +140,30 @@ WAVEFORM ParallelForwardSegment3 WAVEFORM ReadPixels { //NB using slow slew rate for triangular serial clocking - 0: SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; + 0:=PIX_BEGIN //SW and RG are on LVDS signals - SET SW TO HIGH; SET RG TO HIGH; - .+ + + PIX_BEGIN+RG_settleT: SET RG to LOW; + SET PIXEL TO HIGH; + .+1:=CDS_RESET_BEGIN SET PIXEL TO LOW; + //serials COINCIDENT, start moving charge immediately + //when CDS reset begins + SET SCI_SCLK2 TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; + + //...except the summing wells at the output which we pulse just when we + //finish CDS first integration period + CDS_RESET_BEGIN+COINC_SW_DELAY:=SWPULSE_START SET SW TO HIGH; + SWPULSE_START+SW_settleT: SET SW TO LOW; + + //now we're in the CDS signal period begin triangular shuffling serials again + CDS_RESET_BEGIN+CDS_RESET_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK1 TO _SER_CLOCK_HIGH, SLOW; + + .+COINC_SCLK_LAST_DELAY: SET SCI_SCLK1 TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK2 TO _SER_CLOCK_HIGH, SLOW; + } diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 5ad1307..732fed6 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -17,11 +17,11 @@ #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ -//#define _RG_LOW _SER_CLOCK_LOW /* [-0.5, 1.0] */ -//#define _RG_HIGH _SER_CLOCK_HIGH /* [8.0, 14.0] */ +#define _RG_LOW 0.0 /* [-0.5, 1.0] */ +#define _RG_HIGH 12.0 /* [8.0, 14.0] */ -//#define _SW_LOW _SER_CLOCK_LOW /* [-0.5, 1.0] */ -//#define _SW_HIGH _SER_CLOCK_HIGH /* [8.0, 14.0] */ +#define _SW_LOW 1.0 /* [-0.5, 1.0] */ +#define _SW_HIGH 12.0 /* [8.0, 14.0] */ /** --------------------------------------------------------------------------- @@ -59,7 +59,7 @@ #define TGDELAY 20us #define SERTRANSDELAY 10us -#define PIX_SCLK_DELAY + /* Serial transfer timing definitions */ From 95f37a08554d504999d3ab53fccd8f696cd772f5 Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Wed, 5 Feb 2025 00:47:23 +0000 Subject: [PATCH 065/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 132 ++++++++++++++++++++++++++----------------------- 1 file changed, 70 insertions(+), 62 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index 113cfc9..dab71bf 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -21,63 +21,71 @@ TRIGOUTFORCE=0 TRIGOUTINVERT=0 TRIGOUTLEVEL=0 TRIGOUTPOWER=1 -PARAMETER0="abort=0" -PARAMETER1="start=0" -PARAMETER2="trigger_ScienceExpose=0" -PARAMETER3="trigger_ScienceRead=0" -PARAMETER4="param_ScienceLines=4154" -PARAMETER5="param_SciencePixels=1000" -PARAMETER6="param_ExposeTime=0" -PARAMETERS=7 +PARAMETER0="readout_enable=1" +PARAMETER1="integrate_enable=0" +PARAMETER2="integrate_ms=0" +PARAMETER3="integrate_s=0" +PARAMETER4="framecount=0" +PARAMETERS=5 LINE0=StartSeq: -LINE1="STATE000; if start GOTO InitSeq" -LINE2="STATE000; GOTO StartSeq" -LINE3=InitSeq: -LINE4="STATE000; GOTO DetectorSel" -LINE5=DetectorSel: -LINE6="STATE000; if trigger_ScienceExpose CALL SelectScienceReadoutMode" -LINE7="STATE000; GOTO DetectorSel" -LINE8=SelectScienceReadoutMode: -LINE9="STATE000; if trigger_ScienceRead CALL ScienceReadout" -LINE10="STATE000; GOTO SelectScienceReadoutMode" -LINE11=ScienceReadout: -LINE12="STATE000; CALL wCloseShutter" -LINE13="STATE000; CALL wOpenShutter" -LINE14="STATE000; CALL wFrame" -LINE15="STATE000; CALL ScienceLineRead(param_ScienceLines)" -LINE16="STATE000; CALL wCloseShutter" -LINE17=ScienceLineRead: -LINE18="STATE000; CALL LineTransfer" -LINE19="STATE000; CALL wLine" -LINE20="STATE000; CALL wPixel(param_SciencePixels)" -LINE21="STATE000; RETURN ScienceLineRead" -LINE22=LineTransfer: -LINE23="STATE000; STATE000(15998)" -LINE24="STATE000; RETURN LineTransfer" -LINE25=wPixel: -LINE26="STATE001;" -LINE27="STATE002; STATE000(96)" -LINE28="STATE000; RETURN wPixel" -LINE29=wReset: -LINE30="STATE000; RETURN wReset" -LINE31=wUnsetReset: -LINE32="STATE000; RETURN wUnsetReset" -LINE33=OS_Clamp: -LINE34="STATE000; RETURN OS_Clamp" -LINE35=OS_Clamp_: -LINE36="STATE000; RETURN OS_Clamp_" -LINE37=Wait1us: -LINE38="STATE000; STATE000(98)" -LINE39="STATE000; RETURN Wait1us" -LINE40=wOpenShutter: -LINE41="STATE003; RETURN wOpenShutter" -LINE42=wCloseShutter: -LINE43="STATE004; RETURN wCloseShutter" -LINE44=wFrame: -LINE45="STATE005; RETURN wFrame" -LINE46=wLine: -LINE47="STATE006; RETURN wLine" -LINES=48 +LINE1="STATE000; if integrate_enable CALL CheckIntegrate" +LINE2="STATE000; if readout_enable CALL FrameReadout" +LINE3="STATE000; GOTO StartSeq" +LINE4=CheckIntegrate: +LINE5="STATE000; if framecount CALL Integrate" +LINE6="STATE000; framecount--" +LINE7=Integrate: +LINE8="STATE000; CALL SetupIntegration" +LINE9="STATE000; CALL Wait1ms(integrate_ms)" +LINE10="STATE000; CALL Wait1s(integrate_s)" +LINE11="STATE000; CALL TearDownIntegration" +LINE12=FrameReadout: +LINE13="STATE000; CALL ReadoutBegin" +LINE14="STATE000; CALL ReadPixels(1)" +LINE15="STATE000; CALL LineReadout(4104)" +LINE16="STATE000; CALL LineReadout(50)" +LINE17=LineReadout: +LINE18="STATE000; CALL TransferToSerialRegister" +LINE19="STATE000; CALL ParallelForwardSegment1" +LINE20="STATE000; CALL ReadPixels(1)" +LINE21="STATE000; CALL ParallelForwardSegment2" +LINE22="STATE000; CALL ReadPixels(1)" +LINE23="STATE000; CALL ParallelForwardSegment3" +LINE24="STATE000; CALL ReadPixels(1)" +LINE25=LineTransfer: +LINE26="STATE000; STATE000(15998)" +LINE27="STATE000; RETURN LineTransfer" +LINE28=TransferToSerialRegister: +LINE29="STATE000; STATE000(2999)" +LINE30="STATE000; RETURN TransferToSerialRegister" +LINE31=Wait1us: +LINE32="STATE000; STATE000(98)" +LINE33="STATE000; RETURN Wait1us" +LINE34=Wait1ms: +LINE35="STATE000; STATE000(99998)" +LINE36="STATE000; RETURN Wait1ms" +LINE37=Wait1s: +LINE38="STATE000; STATE000(99999998)" +LINE39="STATE000; RETURN Wait1s" +LINE40=SetupIntegration: +LINE41="STATE001; RETURN SetupIntegration" +LINE42=TearDownIntegration: +LINE43="STATE002; RETURN TearDownIntegration" +LINE44=ReadoutBegin: +LINE45="STATE003;" +LINE46="STATE004; RETURN ReadoutBegin" +LINE47=ParallelForwardSegment1: +LINE48="STATE000; RETURN ParallelForwardSegment1" +LINE49=ParallelForwardSegment2: +LINE50="STATE000; RETURN ParallelForwardSegment2" +LINE51=ParallelForwardSegment3: +LINE52="STATE000; RETURN ParallelForwardSegment3" +LINE53=ReadPixels: +LINE54="STATE000; STATE000(16)" +LINE55="STATE005;" +LINE56="STATE006; STATE000(16)" +LINE57="STATE000; RETURN ReadPixels" +LINES=58 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=10 MOD1\SLOWSLEWRATE1=1 @@ -354,17 +362,17 @@ MOD4\XVN_ENABLE4=1 STATE0\NAME=STATE000 STATE0\CONTROL="0,3F" STATE1\NAME=STATE001 -STATE1\CONTROL="8,37" +STATE1\CONTROL="1,3E" STATE2\NAME=STATE002 -STATE2\CONTROL="0,31" +STATE2\CONTROL="0,3E" STATE3\NAME=STATE003 -STATE3\CONTROL="1,3E" +STATE3\CONTROL="2,3D" STATE4\NAME=STATE004 -STATE4\CONTROL="0,3E" +STATE4\CONTROL="0,3D" STATE5\NAME=STATE005 -STATE5\CONTROL="2,3D" +STATE5\CONTROL="8,37" STATE6\NAME=STATE006 -STATE6\CONTROL="4,3B" +STATE6\CONTROL="0,37" STATES=7 [SYSTEM] BACKPLANE_ID=0000000000000000 From cd5e5b01367a71df05613217f3f570b42feedc6e Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 4 Feb 2025 17:13:58 -0800 Subject: [PATCH 066/194] calculations for pixel number in segmented line --- src/deimos/deimos.def | 20 ++++++++++++-------- src/deimos/deimos.seq | 23 ++++++++++++++++++++--- src/deimos/deimos.waveform | 3 +++ src/deimos/voltage_timing_parameters.h | 4 ++-- 4 files changed, 37 insertions(+), 13 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index add336e..1ec3b4d 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -34,19 +34,22 @@ /** --------------------------------------------------------------------------- * Detector Array Parameters */ - -#define _SECTIONROWS 2052 /* Number of rows in one section -#define _SECTIONCOLS 2048 /* Number of columns in one section + +#define _SECTION_A_ROWS 2056 +#define _SECTION_B_ROWS 2048 + +#define _IMAGECOLS 2048 +#define _AMPCOLS #eval _IMAGECOLS / 2 +#define _IMAGEROWS #eval _SECTION_A_ROWS + _SECTION_B_ROWS + /* #define _CDS_WIDTH 10 /* width of each CDS integration component in clocks */ -#define _SKIP_LINES 0 #define _SERIALPRESCAN 50 #define _SERIALOVERSCAN 100 #define _PARALLELOVERSCAN 50 -#define _IMAGEROWS #eval _SECTIONROWS*2 -#define _IMAGECOLS #eval _SECTIONCOLS -#define _IDLE_LINES #eval _SKIP_LINES + _IMAGEROWS -#define _LINENUM #eval _IMAGEROWS + _PARALLELiOVERSCAN - _SKIP_LINES +#define _AMPREADCOLS #eval _AMPCOLS + _SERIALPRESCAN + + /* Number of Pixels depends on if both output #if _SCI_SER_CLOCK_DIR == SPLIT #define _PIXELNUM #eval _IMAGECOLS/2 + _SERIALPRESCAN + _SERIALOVERSCAN @@ -57,6 +60,7 @@ + /** --------------------------------------------------------------------------- * CDS-Deinterlace options */ diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 0eee1d2..9977d36 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -16,8 +16,6 @@ */ -#define PIXELS_PER_SEG 1 -#define LINE_PIXELS 1 /** System Control Triggers **/ param readout_enable = 1 //will be pulled externally when we want a frame @@ -48,13 +46,26 @@ SEQUENCE Integrate TearDownIntegration(); } + + +#define LINE_COLS #eval _SERIALPRESCAN + _AMPCOLS + + +//segment calculations +//this does floor arithmetic, so might end up with wrong number +//if number cols changes +#define PIXELS_PER_SEG #eval _AMPCOLS / 3 +#define REMAINDER_PIX #eval _AMPCOLS - (PIXELS_PER_SEG * 3) + + SEQUENCE FrameReadout { ReadoutBegin(); //single serial read to flush the register - ReadPixels(LINE_PIXELS); + ReadPixels(_AMPREADCOLS); //read all image rows LineReadout(_IMAGEROWS); + //and the desired overscan LineReadout(_PARALLELOVERSCAN); } @@ -62,11 +73,17 @@ SEQUENCE FrameReadout SEQUENCE LineReadout { TransferToSerialRegister(); + ReadPixels(_SERIALPRESCAN) ParallelForwardSegment1(); ReadPixels(PIXELS_PER_SEG); ParallelForwardSegment2(); ReadPixels(PIXELS_PER_SEG); ParallelForwardSegment3(); ReadPixels(PIXELS_PER_SEG); + //if there are leftover pixels, do them here + #if _AMPCOLS % 3 + ReadPixels(REMAINDER_PIX); + + #endif } diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 64ae11a..64973e4 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -112,6 +112,9 @@ WAVEFORM TransferToSerialRegister .+TGDELAY: SET TG TO _TG_CLOCK_LOW, FAST; SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET LINE TO HIGH; + .+1: SET LINE TO LOW; + } diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 732fed6..9d28bc0 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -20,8 +20,8 @@ #define _RG_LOW 0.0 /* [-0.5, 1.0] */ #define _RG_HIGH 12.0 /* [8.0, 14.0] */ -#define _SW_LOW 1.0 /* [-0.5, 1.0] */ -#define _SW_HIGH 12.0 /* [8.0, 14.0] */ +#define _SW_LOW #eval _SER_CLOCK_LOW /* [-0.5, 1.0] */ +#define _SW_HIGH #eval _SER_CLOCK_HIGH /* [8.0, 14.0] */ /** --------------------------------------------------------------------------- From afb91813ab326639b82e57caf22f09619a93959d Mon Sep 17 00:00:00 2001 From: "github-actions[bot]" Date: Wed, 5 Feb 2025 01:19:25 +0000 Subject: [PATCH 067/194] Automated ACF files update by GitHub Actions --- acf/deimos.acf | 98 ++++++++++++++++++++++++++------------------------ 1 file changed, 52 insertions(+), 46 deletions(-) diff --git a/acf/deimos.acf b/acf/deimos.acf index dab71bf..3b29ae0 100644 --- a/acf/deimos.acf +++ b/acf/deimos.acf @@ -41,51 +41,53 @@ LINE10="STATE000; CALL Wait1s(integrate_s)" LINE11="STATE000; CALL TearDownIntegration" LINE12=FrameReadout: LINE13="STATE000; CALL ReadoutBegin" -LINE14="STATE000; CALL ReadPixels(1)" +LINE14="STATE000; CALL ReadPixels(1074)" LINE15="STATE000; CALL LineReadout(4104)" LINE16="STATE000; CALL LineReadout(50)" LINE17=LineReadout: LINE18="STATE000; CALL TransferToSerialRegister" -LINE19="STATE000; CALL ParallelForwardSegment1" -LINE20="STATE000; CALL ReadPixels(1)" +LINE19="STATE000; CALL ReadPixels(50) CALL ParallelForwardSegment1" +LINE20="STATE000; CALL ReadPixels(341)" LINE21="STATE000; CALL ParallelForwardSegment2" -LINE22="STATE000; CALL ReadPixels(1)" +LINE22="STATE000; CALL ReadPixels(341)" LINE23="STATE000; CALL ParallelForwardSegment3" -LINE24="STATE000; CALL ReadPixels(1)" -LINE25=LineTransfer: -LINE26="STATE000; STATE000(15998)" -LINE27="STATE000; RETURN LineTransfer" -LINE28=TransferToSerialRegister: -LINE29="STATE000; STATE000(2999)" -LINE30="STATE000; RETURN TransferToSerialRegister" -LINE31=Wait1us: -LINE32="STATE000; STATE000(98)" -LINE33="STATE000; RETURN Wait1us" -LINE34=Wait1ms: -LINE35="STATE000; STATE000(99998)" -LINE36="STATE000; RETURN Wait1ms" -LINE37=Wait1s: -LINE38="STATE000; STATE000(99999998)" -LINE39="STATE000; RETURN Wait1s" -LINE40=SetupIntegration: -LINE41="STATE001; RETURN SetupIntegration" -LINE42=TearDownIntegration: -LINE43="STATE002; RETURN TearDownIntegration" -LINE44=ReadoutBegin: -LINE45="STATE003;" -LINE46="STATE004; RETURN ReadoutBegin" -LINE47=ParallelForwardSegment1: -LINE48="STATE000; RETURN ParallelForwardSegment1" -LINE49=ParallelForwardSegment2: -LINE50="STATE000; RETURN ParallelForwardSegment2" -LINE51=ParallelForwardSegment3: -LINE52="STATE000; RETURN ParallelForwardSegment3" -LINE53=ReadPixels: -LINE54="STATE000; STATE000(16)" -LINE55="STATE005;" -LINE56="STATE006; STATE000(16)" -LINE57="STATE000; RETURN ReadPixels" -LINES=58 +LINE24="STATE000; CALL ReadPixels(341)" +LINE25="STATE000; CALL ReadPixels(1)" +LINE26=LineTransfer: +LINE27="STATE000; STATE000(15998)" +LINE28="STATE000; RETURN LineTransfer" +LINE29=TransferToSerialRegister: +LINE30="STATE000; STATE000(2999)" +LINE31="STATE001;" +LINE32="STATE002; RETURN TransferToSerialRegister" +LINE33=Wait1us: +LINE34="STATE000; STATE000(98)" +LINE35="STATE000; RETURN Wait1us" +LINE36=Wait1ms: +LINE37="STATE000; STATE000(99998)" +LINE38="STATE000; RETURN Wait1ms" +LINE39=Wait1s: +LINE40="STATE000; STATE000(99999998)" +LINE41="STATE000; RETURN Wait1s" +LINE42=SetupIntegration: +LINE43="STATE003; RETURN SetupIntegration" +LINE44=TearDownIntegration: +LINE45="STATE004; RETURN TearDownIntegration" +LINE46=ReadoutBegin: +LINE47="STATE005;" +LINE48="STATE006; RETURN ReadoutBegin" +LINE49=ParallelForwardSegment1: +LINE50="STATE000; RETURN ParallelForwardSegment1" +LINE51=ParallelForwardSegment2: +LINE52="STATE000; RETURN ParallelForwardSegment2" +LINE53=ParallelForwardSegment3: +LINE54="STATE000; RETURN ParallelForwardSegment3" +LINE55=ReadPixels: +LINE56="STATE000; STATE000(16)" +LINE57="STATE007;" +LINE58="STATE008; STATE000(16)" +LINE59="STATE000; RETURN ReadPixels" +LINES=60 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=10 MOD1\SLOWSLEWRATE1=1 @@ -362,18 +364,22 @@ MOD4\XVN_ENABLE4=1 STATE0\NAME=STATE000 STATE0\CONTROL="0,3F" STATE1\NAME=STATE001 -STATE1\CONTROL="1,3E" +STATE1\CONTROL="4,3B" STATE2\NAME=STATE002 -STATE2\CONTROL="0,3E" +STATE2\CONTROL="0,3B" STATE3\NAME=STATE003 -STATE3\CONTROL="2,3D" +STATE3\CONTROL="1,3E" STATE4\NAME=STATE004 -STATE4\CONTROL="0,3D" +STATE4\CONTROL="0,3E" STATE5\NAME=STATE005 -STATE5\CONTROL="8,37" +STATE5\CONTROL="2,3D" STATE6\NAME=STATE006 -STATE6\CONTROL="0,37" -STATES=7 +STATE6\CONTROL="0,3D" +STATE7\NAME=STATE007 +STATE7\CONTROL="8,37" +STATE8\NAME=STATE008 +STATE8\CONTROL="0,37" +STATES=9 [SYSTEM] BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 From 20802d595a7cbed121c1e17a910aee1230025f33 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 5 Feb 2025 12:54:19 -0800 Subject: [PATCH 068/194] Add the basics of calculating slew rates to the waveforms. WARNING: this had to change the makefile because GPP doesn't support floating point computations in #eval statemsnts. We are therefore now shelling out to the 'bc' command line calculator program which then takes care of that for us via the #exec statement. This is a really ugly solution, for what are hopefully obvious reasons. Long term maybe we need more powerful meta tools, perhaps e.g. Jinja2 templating of these or sometrhing even better than that. gpp doesn't support #exec without adding the -x flag, hence it is now added. Please don't run this on machines where you care about security therefore --- src/deimos/Makefile | 8 +++---- src/deimos/deimos.def | 23 +++++++----------- src/deimos/deimos.mod | 21 ----------------- src/deimos/deimos.seq | 4 ++-- src/deimos/voltage_timing_parameters.h | 32 ++++++++++++++++++++++++++ 5 files changed, 46 insertions(+), 42 deletions(-) diff --git a/src/deimos/Makefile b/src/deimos/Makefile index 79e412e..40fd578 100644 --- a/src/deimos/Makefile +++ b/src/deimos/Makefile @@ -46,12 +46,12 @@ # set to path to gpp GPP = /usr/bin/gpp # set to path to wdl code -WDLPATH = $(HOME)/Software/wdl/wdl/ +WDLPATH = $(HOME)/Software/wdl/wdl # output for *.acf file ACFPATH = $(HOME)/Software/wdlfiles/src/deimos/ -PLOT = False # True # show waveform plots by default, True | False -GFLAGS = +c "/*" "*/" +c "//" "\n" +c "\\\n" "" +PLOT = True # True # show waveform plots by default, True | False +GFLAGS = +c "/*" "*/" +c "//" "\n" +c "\\\n" "" -x SEQPARSER = $(WDLPATH)/seqParserDriver.py INCPARSER = $(WDLPATH)/incParserDriver.py WDLPARSER = $(WDLPATH)/wdlParserDriver.py @@ -62,7 +62,7 @@ I2A = $(WDLPATH)/ini2acf.pl INCL = -I$(CURDIR) # Global variable to store the filename -FILE_NAME := +FILE_NAME=deimos SCAN_CDSFILE = cat $(FILE_NAME).conf | $(GPP) $(GFLAGS) $(INCL) | \ awk -F= '{gsub(" |\t","",$$1)} $$1=="CDS_FILE"{print $$2}' | cut -d'"' -f2 diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 1ec3b4d..1377356 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -82,22 +82,15 @@ #define COINC_SCLK_LAST_DELAY 1 -/** --------------------------------------------------------------------------- - * Define clock voltage levels here (units are volts) - * All voltages are set relative to front substrate voltage (typ. 0V) - * evaluations relative to FSS should be implemented if variability is required -/*/ - -#define _PAR_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ -#define _PAR_CLOCK_LOW 0 /* [-0.50, 0.50] */ +/** basic constants to assist in somewhat automating slew rate for triange clocking. + For now we are just entering a slew time manually, then calculating the rate to make + sure we hit the intended voltage at the top of the triangle waveform **/ -#define _TG_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ -#define _TG_CLOCK_LOW 0 /* [-0.50, 0.50] */ +#define PAR_SLEW_TIME_US 15 +#define SER_SLEW_TIME_US 1 -#define _SER_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ -#define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ -#define _SER_CLOCK_RCV 13 /* Higher than serial clock high */ -#define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ -#define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ +//NOTE archon slew rates are defined in Volts per microsecond, NOT in volts per Archon clock tick +#define PAR_SLEW_RATE #eval (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / PAR_SLEW_TIME_US +#define SER_SLEW_RATE #eval (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / SER_SLEW_TIME_US diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 0fda89d..87ea0f4 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -4,28 +4,7 @@ /* A boolean is set during a SET..TO command */ /* to select between fast and slow slew rate */ -/* Expressions to be determined */ -#define SCLK_fast 500 -#define SCLK_slow (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / ( TSR ) -#define PCLK_fast 10 -#define PCLK_slow (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / ( 2 * TOI ) -#define SW_fast 500 -#define SW_slow 100 -#define TG_fast 500 -#define TG_slow 100 -/* Fast and Slow slew rates are defined here */ -/* A boolean is set during a SET..TO command */ -/* to select between fast and slow slew rate */ - -#define SCLK_fast 500 /* Evaluate Expression */ -#define SCLK_slow 100 /* Evaluate Expression */ -#define PCLK_fast 10 -#define PCLK_slow 1 -#define SW_fast 500 /* Evaluate Expression */ -#define SW_slow 100 /* Evaluate Expression */ -#define TG_fast 500 /* Evaluate Expression? */ -#define TG_slow 100 /* Evaluate Expression? */ SLOT 1 driverx { DRVX 1 [PCLK_fast,PCLK_slow,1]; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 9977d36..de815ac 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -24,7 +24,7 @@ param integrate_enable = 0 // to be set externally if we want an integration tim param integrate_ms = 0 // will be set externally to choose integration ms param integrate_s = 0 // will be set externally to choose integration seconds - param framecount = 0 //will be set +param framecount = 0 //will be set SEQUENCE StartSeq { if integrate_enable CheckIntegrate(); @@ -82,7 +82,7 @@ SEQUENCE LineReadout ReadPixels(PIXELS_PER_SEG); //if there are leftover pixels, do them here #if _AMPCOLS % 3 - ReadPixels(REMAINDER_PIX); + ReadPixels(REMAINDER_PIX); #endif } diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 9d28bc0..f47b89c 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -68,3 +68,35 @@ #define TOR #eval 56 TICK /* Serial Clock Overlap */ #define TSW #eval Pixel_T/2 TICK #define TSR #eval Pixel_T/3 TICK + +/** basic constants to assist in somewhat automating slew rate for triange clocking. + For now we are just entering a slew time manually, then calculating the rate to make + sure we hit the intended voltage at the top of the triangle waveform **/ + +#define PAR_SLEW_TIME_US 15 +#define SER_SLEW_TIME_US 1 + + +//NOTE: OH DEAR, does GPP not do floating point calculations? +//UGLY HACK: for now we call a command line calculator to do it + +//NOTE archon slew rates are defined in Volts per microsecond, NOT in volts per Archon clock tick +//NOTE waveforms currently use parallel SLOW slew rate to mean triangular clock, +// and FAST to mean immediate clock + +#define P_TRI_SLEW_RATE #exec printf '%2.1f' $(bc <<< "scale=2; (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / PAR_SLEW_TIME_US") +#define S_TRI_SLEW_RATE #exec printf '%2.1f' $(bc <<< "scale=2; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / SER_SLEW_TIME_US") + + +#define PCLK_slow P_TRI_SLEW_RATE +#define PCLK_fast 200 //nominal value for now + +//NOTE: waveforms currently use serial "slow" slew rate for triangular waveform +// serial "FAST" is for immediate changes (like e.g. resetting serial register) +#define SCLK_fast S_TRI_SLEW_RATE +#define SCLK_slow 500 //nominal value for now + +//transfer gate uses only one slew rate + +#define TG_fast 100 +#define TG_slow 100 From 344a84f5e9a5945571990933ed7a301166d9960b Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 6 Feb 2025 13:13:38 -0800 Subject: [PATCH 069/194] on ubuntu the default shell is Dash not Bash, so fix up that hideous #exec command to work on Dash as well.... urgh --- src/deimos/Makefile | 6 +++--- src/deimos/deimos.mod | 1 + src/deimos/voltage_timing_parameters.h | 10 ++++++++-- 3 files changed, 12 insertions(+), 5 deletions(-) diff --git a/src/deimos/Makefile b/src/deimos/Makefile index 40fd578..1230731 100644 --- a/src/deimos/Makefile +++ b/src/deimos/Makefile @@ -46,11 +46,11 @@ # set to path to gpp GPP = /usr/bin/gpp # set to path to wdl code -WDLPATH = $(HOME)/Software/wdl/wdl +WDLPATH = $(HOME)/wdl/wdl # output for *.acf file -ACFPATH = $(HOME)/Software/wdlfiles/src/deimos/ +ACFPATH = $(HOME)/wdlfiles/src/deimos/ -PLOT = True # True # show waveform plots by default, True | False +PLOT = False # True # show waveform plots by default, True | False GFLAGS = +c "/*" "*/" +c "//" "\n" +c "\\\n" "" -x SEQPARSER = $(WDLPATH)/seqParserDriver.py INCPARSER = $(WDLPATH)/incParserDriver.py diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 87ea0f4..f408235 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -1,3 +1,4 @@ +deimos #include voltage_timing_parameters.h /* Fast and Slow slew rates are defined here */ diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index f47b89c..96f959b 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -84,8 +84,14 @@ //NOTE waveforms currently use parallel SLOW slew rate to mean triangular clock, // and FAST to mean immediate clock -#define P_TRI_SLEW_RATE #exec printf '%2.1f' $(bc <<< "scale=2; (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / PAR_SLEW_TIME_US") -#define S_TRI_SLEW_RATE #exec printf '%2.1f' $(bc <<< "scale=2; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / SER_SLEW_TIME_US") +//these exec constructs only work on bash shell, and therefore fail on ubuntu where /bin/sh +//is still INEXPLICABLY dash rather than bash. wah wah. +//#define P_TRI_SLEW_RATE #exec printf '%2.1f' $(bc <<< "scale=2; (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / PAR_SLEW_TIME_US") +//#define S_TRI_SLEW_RATE #exec printf '%2.1f' $(bc <<< "scale=2; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / SER_SLEW_TIME_US") +#define P_TRI_SLEW_RATE #exec printf "%2.2f" $(echo "scale=2; (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / PAR_SLEW_TIME_US" | bc) +#define S_TRI_SLEW_RATE #exec printf "%2.2f" $(echo "scale=2; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / SER_SLEW_TIME_US" | bc) + + #define PCLK_slow P_TRI_SLEW_RATE From d0b88526807541db52128ee9a7a9c4405e89f685 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 6 Feb 2025 14:30:31 -0800 Subject: [PATCH 070/194] set voltage ranges compliant with LVDS driver requirements --- src/deimos/deimos.mod | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index f408235..bd24127 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -119,11 +119,11 @@ SLOT 10 lvbias { LVLC 1 [00.0,0]; LVLC 2 [00.0,0]; LVLC 3 [3.00,0] "SCI E Output Gate"; - LVLC 4 [3.00,0] "SCI F Output Gate"; - LVLC 5 [1.00,0] "SCI Summing Well - Low"; - LVLC 6 [12.00,0] "SCI Summing Well - High"; - LVLC 7 [1.00,0] "SCI Reset Gate - Low"; - LVLC 8 [12.00,0] "SCI Reset Gate - High"; + LVLC 4 [3.00,0] "SCI F Output Gate"; + LVLC 5 [1.00,0] "SCI Summing Well - Low"; // NB goes through a line driver + LVLC 6 [11.50,0] "SCI Summing Well - High"; // NB goes through a line driver + LVLC 7 [1.00,0] "SCI Reset Gate - Low"; // NB goes through a line driver + LVLC 8 [11.5,0] "SCI Reset Gate - High"; // NB goes through a line driver LVLC 9 [00.0,0]; LVLC 10 [00.0,0]; LVLC 11 [00.0,0]; From 0cfbc04b6ba910815d04f5739ec08f9c342917b4 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 6 Feb 2025 15:00:47 -0800 Subject: [PATCH 071/194] fix timing definitions some --- src/deimos/deimos.seq | 8 ++++++++ src/deimos/deimos.waveform | 8 ++++---- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index de815ac..67b5e4d 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -70,6 +70,14 @@ SEQUENCE FrameReadout } +//NOTE this has to be a sequence because can't call +//enough repeats in 1ms archon limit of repeats +SEQUENCE Wait1s { + Wait1ms(1000); + +} + + SEQUENCE LineReadout { TransferToSerialRegister(); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 64973e4..fbad223 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -78,10 +78,10 @@ WAVEFORM Wait1ms { .+1ms: RETURN; } -WAVEFORM Wait1s { - 0: SET NOP TO HIGH; - .+1s: RETURN; -} +/* WAVEFORM Wait1s { */ +/* 0: SET NOP TO HIGH; */ +/* .+1s: RETURN; */ +/* } */ /*****************************************/ From a75afe497ef4168f134b3a85751b7efcaffc735b Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 7 Feb 2025 13:25:45 -0800 Subject: [PATCH 072/194] apparently if you don't manually put RETURN in a SEQ it doesn't get emitted. Awful --- src/deimos/deimos.seq | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 67b5e4d..d90c9a2 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -36,6 +36,7 @@ SEQUENCE CheckIntegrate { if framecount Integrate(); framecount--; + RETURN; } SEQUENCE Integrate @@ -44,6 +45,7 @@ SEQUENCE Integrate Wait1ms(integrate_ms); Wait1s(integrate_s); TearDownIntegration(); + RETURN; } @@ -67,6 +69,7 @@ SEQUENCE FrameReadout LineReadout(_IMAGEROWS); //and the desired overscan LineReadout(_PARALLELOVERSCAN); + RETURN; } @@ -74,7 +77,7 @@ SEQUENCE FrameReadout //enough repeats in 1ms archon limit of repeats SEQUENCE Wait1s { Wait1ms(1000); - + RETURN; } @@ -93,5 +96,6 @@ SEQUENCE LineReadout ReadPixels(REMAINDER_PIX); #endif + RETURN; } From ebc89abefd2bd32031e5d21ddf31387ab65494d7 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 7 Feb 2025 13:26:10 -0800 Subject: [PATCH 073/194] add labels to .mod files but it doesn't seem to get propagated --- src/deimos/deimos.mod | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index bd24127..4a22afd 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -8,11 +8,11 @@ deimos SLOT 1 driverx { - DRVX 1 [PCLK_fast,PCLK_slow,1]; - DRVX 2 [PCLK_fast,PCLK_slow,1]; - DRVX 3 [PCLK_fast,PCLK_slow,1]; - DRVX 4 [PCLK_fast,PCLK_slow,1]; - DRVX 5 [PCLK_fast,PCLK_slow,1]; + DRVX 1 [PCLK_fast,PCLK_slow,1] "PCLK_B3_2"; + DRVX 2 [PCLK_fast,PCLK_slow,1] "PCLK_A3_2"; + DRVX 3 [PCLK_fast,PCLK_slow,1] "PCLK_B2_2"; + DRVX 4 [PCLK_fast,PCLK_slow,1] "PCLK_A2_2"; + DRVX 5 [PCLK_fast,PCLK_slow,1] "PCLK_B1_2"; DRVX 6 [PCLK_fast,PCLK_slow,1]; DRVX 7 [PCLK_fast,PCLK_slow,1]; DRVX 8 [PCLK_fast,PCLK_slow,1]; @@ -59,7 +59,7 @@ SLOT 4 xvbias { PBIAS 2 [0,0]; PBIAS 3 [0,0]; PBIAS 4 [0,0]; - NBIAS 1 [0,-95] "SCI Backside"; + NBIAS 1 [0, -0] "SCI Backside"; NBIAS 2 [0,-0]; NBIAS 3 [0,-0]; NBIAS 4 [0,-0]; @@ -84,11 +84,11 @@ SLOT 4 xvbias { SLOT 9 hvbias { HVLC 1 [0.00,0]; - HVLC 2 [20.0,0] "SCI Guard Drain"; + HVLC 2 [20.0,1] "SCI Guard Drain"; HVLC 3 [0.00,0]; HVLC 4 [0.00,0]; - HVLC 5 [17.0,0] "SCI E Reset Drain"; - HVLC 6 [17.0,0] "SCI F Reset Drain"; + HVLC 5 [17.0,2] "SCI E Reset Drain"; + HVLC 6 [17.0,2] "SCI F Reset Drain"; HVLC 7 [0.00,0]; HVLC 8 [0.00,0]; HVLC 9 [0.00,0]; @@ -107,8 +107,8 @@ SLOT 9 hvbias { HVLC 22 [0.00,0]; HVLC 23 [0.00,0]; HVLC 24 [0.00,0]; - HVHC 1 [29.0,0.1,0,1] "SCI E Output Drain"; - HVHC 2 [29.0,0.1,0,1] "SCI F Output Drain"; + HVHC 1 [29.0,0.1,3,1] "SCI E Output Drain"; + HVHC 2 [29.0,0.1,3,1] "SCI F Output Drain"; HVHC 3 [29.0,0.0,0,0]; HVHC 4 [29.0,0.0,0,0]; HVHC 5 [29.0,0.0,0,0]; @@ -118,12 +118,12 @@ SLOT 9 hvbias { SLOT 10 lvbias { LVLC 1 [00.0,0]; LVLC 2 [00.0,0]; - LVLC 3 [3.00,0] "SCI E Output Gate"; - LVLC 4 [3.00,0] "SCI F Output Gate"; - LVLC 5 [1.00,0] "SCI Summing Well - Low"; // NB goes through a line driver - LVLC 6 [11.50,0] "SCI Summing Well - High"; // NB goes through a line driver - LVLC 7 [1.00,0] "SCI Reset Gate - Low"; // NB goes through a line driver - LVLC 8 [11.5,0] "SCI Reset Gate - High"; // NB goes through a line driver + LVLC 3 [3.00,4] "SCI E Output Gate"; + LVLC 4 [3.00,4] "SCI F Output Gate"; + LVLC 5 [1.00,5] "SCI Summing Well - Low"; // NB goes through a line driver + LVLC 6 [11.50,5] "SCI Summing Well - High"; // NB goes through a line driver + LVLC 7 [1.00,5] "SCI Reset Gate - Low"; // NB goes through a line driver + LVLC 8 [11.5,5] "SCI Reset Gate - High"; // NB goes through a line driver LVLC 9 [00.0,0]; LVLC 10 [00.0,0]; LVLC 11 [00.0,0]; From 009e32acec23c1733a5c101091af1b79537c08f7 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 7 Feb 2025 15:43:44 -0800 Subject: [PATCH 074/194] fix pixel and line numbers in timing --- src/deimos/deimos.cds | 3 ++- src/deimos/deimos.def | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 8f8e2b1..ad4b255 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -4,11 +4,12 @@ * @brief CDS/Deinterlace parameters for WaSP instrument */ +#include "voltage_timing_parameters.h" BIGBUF = _ARCHON_FRAMEBUFS FRAMEMODE = _ARCHON_FRAMEMODE LINECOUNT = _LINENUM -PIXELCOUNT = 100 /* _PIXELNUM */ +PIXELCOUNT = _AMPREADCOLS RAWENABLE = _RAW_ENABLE RAWENDLINE = _RAW_ENDLINE RAWSAMPLES = _RAW_SAMPLES diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 1377356..1730837 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -42,12 +42,14 @@ #define _AMPCOLS #eval _IMAGECOLS / 2 #define _IMAGEROWS #eval _SECTION_A_ROWS + _SECTION_B_ROWS + /* #define _CDS_WIDTH 10 /* width of each CDS integration component in clocks */ #define _SERIALPRESCAN 50 #define _SERIALOVERSCAN 100 #define _PARALLELOVERSCAN 50 #define _AMPREADCOLS #eval _AMPCOLS + _SERIALPRESCAN +#define _LINENUM #eval _IMAGEROWS + _PARALLELOVERSCAN /* Number of Pixels depends on if both output From 3a17be93a822c20d034230d744a97ed9c68adef7 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 7 Feb 2025 16:35:12 -0800 Subject: [PATCH 075/194] name of system in deimos.mod has to specifically be deimos_TMP. Don't ask why --- src/deimos/deimos.def | 14 +++----------- src/deimos/deimos.mod | 2 +- src/deimos/voltage_timing_parameters.h | 4 ++-- 3 files changed, 6 insertions(+), 14 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 1730837..5dbc679 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -32,7 +32,7 @@ #define _RAW_SELECT 7 /* AD channel for raw data capture, 0-15 */ /** --------------------------------------------------------------------------- - * Detector Array Parameters +* Detector Array Parameters */ #define _SECTION_A_ROWS 2056 @@ -70,8 +70,8 @@ #define Pixel_T 100 /* Full pixel time : 10s of ns */ /* TODO CLARIFY VLAYES FOR RG AND SW settling time */ -#define RG_settleT 17 /*32*/ /* Settling Time for the reset gate 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ -#define SW_settleT 16 /*32*/ /* Settling Time for charge dump 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ +#define RG_settleT 32 /*32*/ /* Settling Time for the reset gate 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ +#define SW_settleT 32 /*32*/ /* Settling Time for charge dump 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ #define _FIRST_RESET_SAMPLE #eval RG_settleT /* Start Reset sample after reset settling time */ #define _LAST_RESET_SAMPLE #eval Pixel_T/2 - 1 /* Half of the pixel time to reset pedestal */ @@ -88,11 +88,3 @@ For now we are just entering a slew time manually, then calculating the rate to make sure we hit the intended voltage at the top of the triangle waveform **/ -#define PAR_SLEW_TIME_US 15 -#define SER_SLEW_TIME_US 1 - - -//NOTE archon slew rates are defined in Volts per microsecond, NOT in volts per Archon clock tick -#define PAR_SLEW_RATE #eval (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / PAR_SLEW_TIME_US -#define SER_SLEW_RATE #eval (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / SER_SLEW_TIME_US - diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 4a22afd..6d5a3ca 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -1,4 +1,4 @@ -deimos +deimos_TMP #include voltage_timing_parameters.h /* Fast and Slow slew rates are defined here */ diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 96f959b..d09fe1b 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -73,8 +73,8 @@ For now we are just entering a slew time manually, then calculating the rate to make sure we hit the intended voltage at the top of the triangle waveform **/ -#define PAR_SLEW_TIME_US 15 -#define SER_SLEW_TIME_US 1 +#define PAR_SLEW_TIME_US 341 +#define SER_SLEW_TIME_US 0.33 //NOTE: OH DEAR, does GPP not do floating point calculations? From b51a83a4bbe32d27cd57d499cce2bf6cd132b228 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 7 Feb 2025 17:18:49 -0800 Subject: [PATCH 076/194] fix a bunch of stuff, parallel waveforms vaguely correct --- src/deimos/deimos.seq | 2 +- src/deimos/deimos.waveform | 34 +++++--------------------- src/deimos/voltage_timing_parameters.h | 9 ++++--- 3 files changed, 13 insertions(+), 32 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index d90c9a2..1d6b0af 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -84,7 +84,7 @@ SEQUENCE Wait1s { SEQUENCE LineReadout { TransferToSerialRegister(); - ReadPixels(_SERIALPRESCAN) + ReadPixels(_SERIALPRESCAN); ParallelForwardSegment1(); ReadPixels(PIXELS_PER_SEG); ParallelForwardSegment2(); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index fbad223..7934784 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -41,28 +41,6 @@ WAVEFORM SerialRecieving { .+SCLK_RCV_RESET: SET RG TO LOW; } */ -WAVEFORM LineTransfer { - 0: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; - SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; - SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; - .+TDRT: SET TG TO _TG_CLOCK_HIGH, SLOW; - SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, SLOW; - .+TOI: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, SLOW; - .+TOI: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; - .+TOI: SET TG TO _TG_CLOCK_LOW, SLOW; - .+TOI: SET SCI_PCLK3 TO _PAR_CLOCK_LOW, SLOW; - .+TOI: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, SLOW; - .+TOI: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; - .+TDRT: RETURN; -} - - -WAVEFORM TransferToSerialRegister { - - -} - - /*****************************************/ /* ARCHON Timing Control */ @@ -124,20 +102,20 @@ WAVEFORM ParallelForwardSegment1 //NOTE: after integration, if done properly //all charge should be under SCI_PCLK3 // the transfer to serial reg is done before this happens - 0: SET SCI_PCLK3 to _PAR_CLOCK_LOW, FAST; - SET SCI_PCLK1 to _PAR_CLOCK_HIGH, FAST; + 0: SET SCI_PCLK3 to _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK1 to _PAR_CLOCK_HIGH, SLOW; } WAVEFORM ParallelForwardSegment2 { - 0: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; - SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; + 0: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, SLOW; } WAVEFORM ParallelForwardSegment3 { - 0: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; - SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; + 0: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, SLOW; } WAVEFORM ReadPixels diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index d09fe1b..f8ab8bc 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -73,7 +73,10 @@ For now we are just entering a slew time manually, then calculating the rate to make sure we hit the intended voltage at the top of the triangle waveform **/ -#define PAR_SLEW_TIME_US 341 +/** basic slew rate logic: you are doing 1024 serial transfer cycles (for each amp), each lasing around 1us. In this time 3 parallel clock transfers happen, up and down once each. Therefore in 2048us we need to do 6 slews from top to bottom, hence the slew time is 1024 / 6 = 171 */ + + +#define PAR_SLEW_TIME_US 171 #define SER_SLEW_TIME_US 0.33 @@ -99,8 +102,8 @@ //NOTE: waveforms currently use serial "slow" slew rate for triangular waveform // serial "FAST" is for immediate changes (like e.g. resetting serial register) -#define SCLK_fast S_TRI_SLEW_RATE -#define SCLK_slow 500 //nominal value for now +#define SCLK_fast 500 +#define SCLK_slow S_TRI_SLEW_RATE //nominal value for now //transfer gate uses only one slew rate From 660f8186d37605dd131d78c0e5a10af39bdec12e Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 18 Feb 2025 18:01:39 -0800 Subject: [PATCH 077/194] fix couple of minor waveform timing issues --- src/deimos/deimos.def | 4 ++-- src/deimos/deimos.waveform | 14 ++++++++++---- 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 5dbc679..7b89d36 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -78,8 +78,8 @@ #define _FIRST_VIDEO_SAMPLE #eval Pixel_T/2 - 1 + SW_settleT /* Start video sample after reset pedestal and summing well settle */ #define _LAST_VIDEO_SAMPLE #eval Pixel_T - 2 /* Stop video sample at end of pixel time */ -#define CDS_RESET_LENGTH 1 -#define CDS_SIGNAL_LENGTH 1 +#define CDS_RESET_LENGTH 35 +#define CDS_SIGNAL_LENGTH 35 #define COINC_SW_DELAY 1 #define COINC_SCLK_LAST_DELAY 1 diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 7934784..e0bb818 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -34,6 +34,12 @@ #define CLOSE 0 #define HIGH 1 #define LOW 0 + +#define INV_HIGH 0 //Some signals are inverted. Use this sigil to indicate that +#define INV_LOW 1 + + + /* WAVEFORM SerialRecieving { 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; @@ -123,9 +129,9 @@ WAVEFORM ReadPixels //NB using slow slew rate for triangular serial clocking 0:=PIX_BEGIN //SW and RG are on LVDS signals - SET RG TO HIGH; + SET RG TO INV_HIGH; //NOTE reset gate is inverted - PIX_BEGIN+RG_settleT: SET RG to LOW; + PIX_BEGIN+RG_settleT: SET RG to INV_LOW; SET PIXEL TO HIGH; .+1:=CDS_RESET_BEGIN SET PIXEL TO LOW; //serials COINCIDENT, start moving charge immediately @@ -135,8 +141,8 @@ WAVEFORM ReadPixels //...except the summing wells at the output which we pulse just when we //finish CDS first integration period - CDS_RESET_BEGIN+COINC_SW_DELAY:=SWPULSE_START SET SW TO HIGH; - SWPULSE_START+SW_settleT: SET SW TO LOW; + CDS_RESET_BEGIN+COINC_SW_DELAY:=SWPULSE_START SET SW TO INV_HIGH; //NOTE: summing well is inverted + SWPULSE_START+SW_settleT: SET SW TO INV_LOW; //now we're in the CDS signal period begin triangular shuffling serials again CDS_RESET_BEGIN+CDS_RESET_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; From 6581a8a3edc76820ba513252ca112ff37881f133 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 19 Feb 2025 10:26:33 -0800 Subject: [PATCH 078/194] update clamp logic --- src/deimos/deimos.def | 5 ++++- src/deimos/deimos.mod | 31 ++++++++++++++++--------------- src/deimos/deimos.waveform | 15 +++++++++++---- 3 files changed, 31 insertions(+), 20 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 7b89d36..4a89bac 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -81,7 +81,10 @@ #define CDS_RESET_LENGTH 35 #define CDS_SIGNAL_LENGTH 35 #define COINC_SW_DELAY 1 -#define COINC_SCLK_LAST_DELAY 1 + + +#define AC_CLAMP_ON_TIME 100 +#define AC_CLAMP_EXTRA_RECOVER 10 /** basic constants to assist in somewhat automating slew rate for triange clocking. diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 6d5a3ca..a288733 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -120,25 +120,25 @@ SLOT 10 lvbias { LVLC 2 [00.0,0]; LVLC 3 [3.00,4] "SCI E Output Gate"; LVLC 4 [3.00,4] "SCI F Output Gate"; - LVLC 5 [1.00,5] "SCI Summing Well - Low"; // NB goes through a line driver - LVLC 6 [11.50,5] "SCI Summing Well - High"; // NB goes through a line driver - LVLC 7 [1.00,5] "SCI Reset Gate - Low"; // NB goes through a line driver - LVLC 8 [11.5,5] "SCI Reset Gate - High"; // NB goes through a line driver + LVLC 5 [1.00,0] "SCI Summing Well - Low"; // NB goes through a line driver + LVLC 6 [11.50,0] "SCI Summing Well - High"; // NB goes through a line driver + LVLC 7 [1.00,0] "SCI Reset Gate - Low"; // NB goes through a line driver + LVLC 8 [11.5,0] "SCI Reset Gate - High"; // NB goes through a line driver LVLC 9 [00.0,0]; - LVLC 10 [00.0,0]; - LVLC 11 [00.0,0]; - LVLC 12 [00.0,0]; - LVLC 13 [00.0,0]; + LVLC 10 [3.0,0] "LastGateA FCS 1"; + LVLC 11 [3.0,0] "LastGateB FCS 1"; + LVLC 12 [3.0,0] "LastGateA FCS 2"; + LVLC 13 [3.0,0] "LastGateB FCS 2"; LVLC 14 [00.0,0]; - LVLC 15 [00.0,0]; - LVLC 16 [00.0,0]; - LVLC 17 [00.0,0]; - LVLC 18 [00.0,0]; - LVLC 19 [00.0,0]; + LVLC 15 [1.0,0] "FCS Summing Well - Low"; + LVLC 16 [11.5,0] "FCS Summing Well - High"; + LVLC 17 [00.0,0]; + LVLC 18 [1.0,0] "FCS reset gate - Low"; + LVLC 19 [11.5,0] "FCS reset gate - High"; LVLC 20 [00.0,0]; LVLC 21 [00.0,0]; - LVLC 22 [00.0,0]; - LVLC 23 [00.0,0]; + LVLC 22 [00.0,0] "Video offset FCS"; + LVLC 23 [00.0,0] "Video offset SCI"; LVLC 24 [00.0,0]; LVHC 1 [0.00,0.0,0,0]; LVHC 2 [0.00,0.0,0,0]; @@ -162,6 +162,7 @@ SLOT 12 lvds { DIO 3 [0,0]; DIO 4 [0,0]; DIOPOWER = 0; + } diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index e0bb818..b565497 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -87,21 +87,28 @@ WAVEFORM ReadoutBegin .+1: SET FRAME TO LOW; } + WAVEFORM TransferToSerialRegister { //set serials to receive charge - 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; + 0:=BEGIN SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; .+SERTRANSDELAY: SET TG TO _TG_CLOCK_HIGH, FAST; .+TGDELAY: SET TG TO _TG_CLOCK_LOW, FAST; SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; SET LINE TO HIGH; - .+1: SET LINE TO LOW; - + .+1:=END_RECV SET LINE TO LOW; + + //simultaneously, operate the AC clamp + BEGIN: SET AC_Clamp to HIGH; + .+AC_CLAMP_ON_TIME: SET AC_Clamp to LOW; + END_RECV: SET NOP TO HIGH; + .+AC_CLAMP_EXTRA_RECOVER: RETURN; } + //waveforms for coincident (triangular) parallel clocking WAVEFORM ParallelForwardSegment1 { @@ -148,7 +155,7 @@ WAVEFORM ReadPixels CDS_RESET_BEGIN+CDS_RESET_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; SET SCI_SCLK1 TO _SER_CLOCK_HIGH, SLOW; - .+COINC_SCLK_LAST_DELAY: SET SCI_SCLK1 TO _SER_CLOCK_LOW, SLOW; + .+CDS_SIGNAL_LENGTH: SET SCI_SCLK1 TO _SER_CLOCK_LOW, SLOW; SET SCI_SCLK2 TO _SER_CLOCK_HIGH, SLOW; } From 500e375617267ecacace70d61c2ec9e8be527a8e Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 20 Feb 2025 16:39:47 -0800 Subject: [PATCH 079/194] refactor check timing a bit --- src/deimos/deimos.seq | 10 ++++++++-- src/deimos/deimos.waveform | 10 +++++++--- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 1d6b0af..1ddfae2 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -28,14 +28,14 @@ param framecount = 0 //will be set SEQUENCE StartSeq { if integrate_enable CheckIntegrate(); - if readout_enable FrameReadout(); + if readout_enable CheckReadout(); + if framecount framecount--; GOTO StartSeq(); } SEQUENCE CheckIntegrate { if framecount Integrate(); - framecount--; RETURN; } @@ -48,6 +48,12 @@ SEQUENCE Integrate RETURN; } +SEQUENCE CheckReadout +{ + if framecount KeepThisFrame(); + FrameReadout(); + +} #define LINE_COLS #eval _SERIALPRESCAN + _AMPCOLS diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index b565497..0759ac1 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -67,6 +67,10 @@ WAVEFORM Wait1ms { /* .+1s: RETURN; */ /* } */ +WAVEFORM KeepThisFrame { + 0: SET FRAME TO HIGH; +} + /*****************************************/ /* Integration related waveforms */ @@ -84,7 +88,6 @@ WAVEFORM TearDownIntegration { WAVEFORM ReadoutBegin { 0: SET FRAME TO HIGH; - .+1: SET FRAME TO LOW; } @@ -94,11 +97,10 @@ WAVEFORM TransferToSerialRegister 0:=BEGIN SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; .+SERTRANSDELAY: SET TG TO _TG_CLOCK_HIGH, FAST; - .+TGDELAY: SET TG TO _TG_CLOCK_LOW, FAST; + .+TGDELAY:=END_RECV SET TG TO _TG_CLOCK_LOW, FAST; SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; SET LINE TO HIGH; - .+1:=END_RECV SET LINE TO LOW; //simultaneously, operate the AC clamp BEGIN: SET AC_Clamp to HIGH; @@ -141,6 +143,8 @@ WAVEFORM ReadPixels PIX_BEGIN+RG_settleT: SET RG to INV_LOW; SET PIXEL TO HIGH; .+1:=CDS_RESET_BEGIN SET PIXEL TO LOW; + SET LINE TO LOW; + SET FRAME TO LOW; //serials COINCIDENT, start moving charge immediately //when CDS reset begins SET SCI_SCLK2 TO _SER_CLOCK_LOW, SLOW; From acd8de07894523dc933258a23099a14498c5485f Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 20 Feb 2025 16:41:20 -0800 Subject: [PATCH 080/194] fix if statement --- src/deimos/deimos.seq | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 1ddfae2..bce6e96 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -29,7 +29,7 @@ param framecount = 0 //will be set SEQUENCE StartSeq { if integrate_enable CheckIntegrate(); if readout_enable CheckReadout(); - if framecount framecount--; + framecount--; GOTO StartSeq(); } From bb404622a175e6873e63a928c46e111c74aafd11 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 26 Feb 2025 12:39:48 -0800 Subject: [PATCH 081/194] start work on total deferred charge measurement sequence --- src/deimos/deimos.def | 3 +++ src/deimos/deimos.mod | 12 ++++++------ src/deimos/deimos.seq | 17 ++++++++++++++++- src/deimos/deimos.signals | 11 +++++++++++ src/deimos/deimos.waveform | 25 +++++++++++++++++++++++++ src/deimos/voltage_timing_parameters.h | 4 ++-- 6 files changed, 63 insertions(+), 9 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 4a89bac..883c246 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -87,6 +87,9 @@ #define AC_CLAMP_EXTRA_RECOVER 10 + + + /** basic constants to assist in somewhat automating slew rate for triange clocking. For now we are just entering a slew time manually, then calculating the rate to make sure we hit the intended voltage at the top of the triangle waveform **/ diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index a288733..d7160c5 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -40,12 +40,12 @@ SLOT 2 driverx { **********************************/ SLOT 3 driverx { - DRVX 1 [TG_fast,TG_slow,1]; - DRVX 2 [SCLK_fast,SCLK_slow,1]; - DRVX 3 [SCLK_fast,SCLK_slow,1]; - DRVX 4 [SCLK_fast,SCLK_slow,1]; - DRVX 5 [SCLK_fast,SCLK_slow,1]; - DRVX 6 [SCLK_fast,SCLK_slow,1]; + DRVX 1 [TG_fast,TG_slow,1] "Transfer Gate"; + DRVX 2 [SCLK_fast,SCLK_slow,1] "Serial EF"; + DRVX 3 [SCLK_fast,SCLK_slow,1] "Serial E2"; + DRVX 4 [SCLK_fast,SCLK_slow,1] "Serial E1"; + DRVX 5 [SCLK_fast,SCLK_slow,1] "Serial F2"; + DRVX 6 [SCLK_fast,SCLK_slow,1] "Serial F1"; DRVX 7 [1,1,0]; DRVX 8 [1,1,0]; DRVX 9 [1,1,0]; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index bce6e96..2bab905 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -52,7 +52,7 @@ SEQUENCE CheckReadout { if framecount KeepThisFrame(); FrameReadout(); - + RETURN; } @@ -104,4 +104,19 @@ SEQUENCE LineReadout #endif RETURN; } + + +SEQUENCE ParallelDCMeasReadout +{ + ReadoutBegin(); + //single line read to flush the register + ReadPixels(_AMPREADCOLS); + + + //dump the 'A' image section + RETURN; + +} + + diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index ef06f25..ada1723 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -103,3 +103,14 @@ #define SCI_PCLK1 [PCLK_A1_1, PCLK_A1_2, PCLK_B1_1, PCLK_B1_2] #define SCI_PCLK2 [PCLK_A2_1, PCLK_A2_2, PCLK_B2_1, PCLK_B2_2] #define SCI_PCLK3 [PCLK_A3_1, PCLK_A3_2, PCLK_B3_1, PCLK_B3_2] + + +/* Science parallels section A */ +#define SCI_PCLK1_A [PCLK_A1_1, PCLK_B1_2] +#define SCI_PCLK2_A [PCLK_A2_1, PCLK_B2_2] +#define SCI_PCLK3_A [PCLK_A3_1, PCLK_B3_2] + +#define SCI_PCLK1_B [PCLK_B1_1, PCLK_B1_2] +#define SCI_PCLK2_B [PCLK_B2_1, PCLK_B2_2] +#define SCI_PCLK3_B [PCLK_B3_1, PCLK_B3_2] + diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 0759ac1..6bc92b8 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -164,6 +164,31 @@ WAVEFORM ReadPixels } +#define PCLK_NOREAD_DELAY + + +WAVEFORM ForwardParallelSectionA +{ + 0: SET SCI_PCLK3_A to _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK1_A to _PAR_CLOCK_HIGH, SLOW; + PAR_SLEW_TIME_US*100: SET SCI_PCLK1_A to _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK2_A TO _PAR_CLOCK_HIGH, SLOW; + 2*PAR_SLEW_TIME_US*100: SET SCI_PCLK2_A TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK3_A TO _PAR_CLOCK_HIGH, SLOW; + +} + +WAVEFORM BackwardParallelSectionB +{ + 0: SET SCI_PCLK3_B TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK1_B TO _PAR_CLOCK_LOW, SLOW; + PAR_SLEW_TIME_US*100: SET SCI_PCLK1_B TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK2_B TO _PAR_CLOCK_HIGH, SLOW; + 2*PAR_SLEW_TIME_US*100: SET SCI_PCLK2_B TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK3_B TO _PAR_CLOCK_HIGH, SLOW; +} + + diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index f8ab8bc..86f335d 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -73,10 +73,10 @@ For now we are just entering a slew time manually, then calculating the rate to make sure we hit the intended voltage at the top of the triangle waveform **/ -/** basic slew rate logic: you are doing 1024 serial transfer cycles (for each amp), each lasing around 1us. In this time 3 parallel clock transfers happen, up and down once each. Therefore in 2048us we need to do 6 slews from top to bottom, hence the slew time is 1024 / 6 = 171 */ +/** basic slew rate logic: you are doing 1024 serial transfer cycles (for each amp), each lasing around 1us. In this time 3 parallel clock transfers happen, up and down once each. Therefore in 2048us we need to do 3 slews from top to bottom, hence the slew time is 1024 / 6 = 171 */ -#define PAR_SLEW_TIME_US 171 +#define PAR_SLEW_TIME_US 341 #define SER_SLEW_TIME_US 0.33 From b39091fd37427d18c9b8af05e8b080ff90004e4c Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 27 Feb 2025 16:47:39 -0800 Subject: [PATCH 082/194] add abort for long integrations, start on section A dump sequence for total deferred charge measurement --- src/deimos/deimos.seq | 27 +++++++++++++++++++++++++++ src/deimos/deimos.waveform | 21 +++++++++++++++++++++ 2 files changed, 48 insertions(+) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 2bab905..684fc94 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -25,6 +25,8 @@ param integrate_ms = 0 // will be set externally to choose integration ms param integrate_s = 0 // will be set externally to choose integration seconds param framecount = 0 //will be set +param abortintegrate = 0 //checked by the integration waiters and they bail out if it is set + SEQUENCE StartSeq { if integrate_enable CheckIntegrate(); @@ -82,10 +84,16 @@ SEQUENCE FrameReadout //NOTE this has to be a sequence because can't call //enough repeats in 1ms archon limit of repeats SEQUENCE Wait1s { + if abortintegrate abortintegration(); Wait1ms(1000); RETURN; } +SEQUENCE abortintegration { + TearDownIntegration(); + GOTO StartSeq(); +} + SEQUENCE LineReadout { @@ -105,6 +113,23 @@ SEQUENCE LineReadout RETURN; } +SEQUENCE LineReadoutDumpA +{ + TransferToSerialRegister(); + ReadPixels(_SERIALPRESCAN); + ParallelForwardSectionASegment1(); + ReadPixels(PIXELS_PER_SEG); + ParallelForwardSectionASegment2(); + ReadPixels(PIXELS_PER_SEG); + ParallelForwardSectionASegment3(); + ReadPixels(PIXELS_PER_SEG); + + #if _AMPCOLS %3 + ReadPixels(REMAINDER_PIX); + #endif + RETURN ; +} + SEQUENCE ParallelDCMeasReadout { @@ -114,6 +139,8 @@ SEQUENCE ParallelDCMeasReadout //dump the 'A' image section + + RETURN; } diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 6bc92b8..4e696f2 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -178,6 +178,27 @@ WAVEFORM ForwardParallelSectionA } +WAVEFORM ParallelForwardSectionASegment1 +{ + 0: SET SCI_PCLK3_A to _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK1_A to _PAR_CLOCK_HIGH, SLOW; +} + +WAVEFORM ParallelForwardSectionASegment2 +{ + 0: SET SCI_PCLK1_A to _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK2_A TO _PAR_CLOCK_HIGH, SLOW; +} + +WAVEFORM ParallelForwardSectionASegment3 +{ + 0: SET SCI_PCLK2_A TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK3_A TO _PAR_CLOCK_HIGH, SLOW; +} + + + + WAVEFORM BackwardParallelSectionB { 0: SET SCI_PCLK3_B TO _PAR_CLOCK_LOW, SLOW; From 9eb0d3fe4b592cf2a93c0705381b7f446a2e7bfe Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 5 Mar 2025 15:46:35 -0800 Subject: [PATCH 083/194] progress on sequences and waveforms for total deferred charge readout --- src/deimos/deimos.def | 22 ++++--- src/deimos/deimos.seq | 30 ++++++++-- src/deimos/deimos.signals | 22 +++---- src/deimos/deimos.waveform | 114 ++++++++++++++++++++++++++++++++++--- 4 files changed, 149 insertions(+), 39 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 883c246..2342b5a 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -13,7 +13,6 @@ * Configuration modes */ -#define _SCI_SER_CLOCK_DIR SPLIT /* SPLIT || E_LEFT || F_RIGHT */ /** -------------------------------------------------------------------------- @@ -49,17 +48,7 @@ #define _PARALLELOVERSCAN 50 #define _AMPREADCOLS #eval _AMPCOLS + _SERIALPRESCAN -#define _LINENUM #eval _IMAGEROWS + _PARALLELOVERSCAN - - -/* Number of Pixels depends on if both output -#if _SCI_SER_CLOCK_DIR == SPLIT - #define _PIXELNUM #eval _IMAGECOLS/2 + _SERIALPRESCAN + _SERIALOVERSCAN -#endif -#if _SCI_SER_CLOCK_DIR == F_RIGHT || _SCI_SER_CLOCK_DIR == E_LEFT - #define _PIXELNUM #eval _IMAGECOLS + _SERIALPRESCAN + _SERIALOVERSCAN -#endif - +#define _LINENUM #eval _IMAGEROWS + _PARALLELVERSCAN @@ -87,6 +76,15 @@ #define AC_CLAMP_EXTRA_RECOVER 10 +// constants for use with parallel total deferred charge measurements +#define LLEL_TDC_LINE_SPACING 10 +#define LLEL_TDC_BINS 1 + +//could in principle calculate - based on line spacing and how many total lines are availablei +#define LLEL_TDC_LOOPS 100 + + + diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 684fc94..8f67811 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -113,7 +113,7 @@ SEQUENCE LineReadout RETURN; } -SEQUENCE LineReadoutDumpA +SEQUENCE LineReadoutAOnly { TransferToSerialRegister(); ReadPixels(_SERIALPRESCAN); @@ -130,20 +130,38 @@ SEQUENCE LineReadoutDumpA RETURN ; } - SEQUENCE ParallelDCMeasReadout { ReadoutBegin(); //single line read to flush the register ReadPixels(_AMPREADCOLS); - - + //dump the 'A' image section - - + LineReadoutAOnly(_SECTION_A_ROWS); + ParallelDCLineLoop(LLEL_TDC_LOOPS); RETURN; } +SEQUENCE ParallelDCLineLoop +{ + //now we have a bunch of charge in B section, A section is empty + //go forward on B clocks only, this gets a bright line into section A + //multiple forwards of section B bins charge into section A + ForwardParallelSectionB(LLEL_TDC_BINS); + + //then forward for the number of line spacings + LineReadoutAOnly(LLEL_TDC_LINE_SPACING); + RETURN; +} + + +SEQUENCE SerialDCMeasReadoutE +{ + ReadoutBegin(); + //single line read to flush the register + ReadPixels(_AMPREADCOLS); + +} diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index ada1723..57960c4 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -80,19 +80,9 @@ /**** Readout Method ****/ /* Science Serials */ -#if _SCI_SER_CLOCK_DIR == SPLIT - #define SCI_SCLK1 [SCLK_E2, SCLK_F2] - #define SCI_SCLK2 [SCLK_E1, SCLK_F1] - #define SCI_SCLK3 SCLK_EF -#elif _SCI_SER_CLOCK_DIR == F_RIGHT - #define SCI_SCLK1 [SCLK_E1, SCLK_F1] - #define SCI_SCLK2 [SCLK_E2, SCLK_F2] - #define SCI_SCLK3 SCLK_EF -#elif _SCI_SER_CLOCK_DIR == E_LEFT - #define SCI_SCLK1 [SCLK_E2, SCLK_F1] - #define SCI_SCLK2 [SCLK_E1, SCLK_F2] - #define SCI_SCLK3 SCLK_EF -#endif +#define SCI_SCLK1 [SCLK_E2, SCLK_F2] +#define SCI_SCLK2 [SCLK_E1, SCLK_F1] +#define SCI_SCLK3 SCLK_EF /* Reset Gate Combine */ #define RG [RG_1, RG_2] @@ -114,3 +104,9 @@ #define SCI_PCLK2_B [PCLK_B2_1, PCLK_B2_2] #define SCI_PCLK3_B [PCLK_B3_1, PCLK_B3_2] +#define SCI_SCLK1_EONLY SCLK_E2 +#define SCI_SCLK1_FONLY SCLK_F2 + +#define SCI_SCLK2_EONLY SCLK_E1 +#define SCI_SCLK2_FONLY SCLK_F1 + diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 4e696f2..b693292 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -166,7 +166,7 @@ WAVEFORM ReadPixels #define PCLK_NOREAD_DELAY - +//definitions for llel total deferred charge measurement WAVEFORM ForwardParallelSectionA { 0: SET SCI_PCLK3_A to _PAR_CLOCK_LOW, SLOW; @@ -175,9 +175,19 @@ WAVEFORM ForwardParallelSectionA SET SCI_PCLK2_A TO _PAR_CLOCK_HIGH, SLOW; 2*PAR_SLEW_TIME_US*100: SET SCI_PCLK2_A TO _PAR_CLOCK_LOW, SLOW; SET SCI_PCLK3_A TO _PAR_CLOCK_HIGH, SLOW; +} +WAVEFORM ForwardParallelSectionB +{ + 0: SET SCI_PCLK3_B TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK1_B TO _PAR_CLOCK_HIGH, SLOW; + PAR_SLEW_TIME_US*100: SET SCI_PCLK1_B TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK2_B TO _PAR_CLOCK_HIGH, SLOW; + 2*PAR_SLEW_TIME_US*100: SET SCI_PCLK2_B TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK3_B TO _PAR_CLOCK_HIGH, SLOW; } + WAVEFORM ParallelForwardSectionASegment1 { 0: SET SCI_PCLK3_A to _PAR_CLOCK_LOW, SLOW; @@ -197,18 +207,106 @@ WAVEFORM ParallelForwardSectionASegment3 } +//definitions for serial total deferred charge measurement -WAVEFORM BackwardParallelSectionB +//readout only clocking the E register (we have stored bright edge in the F for this one) +WAVEFORM ReadPixelsEOnly { - 0: SET SCI_PCLK3_B TO _PAR_CLOCK_LOW, SLOW; - SET SCI_PCLK1_B TO _PAR_CLOCK_LOW, SLOW; - PAR_SLEW_TIME_US*100: SET SCI_PCLK1_B TO _PAR_CLOCK_LOW, SLOW; - SET SCI_PCLK2_B TO _PAR_CLOCK_HIGH, SLOW; - 2*PAR_SLEW_TIME_US*100: SET SCI_PCLK2_B TO _PAR_CLOCK_LOW, SLOW; - SET SCI_PCLK3_B TO _PAR_CLOCK_HIGH, SLOW; + //NB using slow slew rate for triangular serial clocking + 0:=PIX_BEGIN + //SW and RG are on LVDS signals + SET RG TO INV_HIGH; //NOTE reset gate is inverted + + PIX_BEGIN+RG_settleT: SET RG to INV_LOW; + SET PIXEL TO HIGH; + .+1:=CDS_RESET_BEGIN SET PIXEL TO LOW; + SET LINE TO LOW; + SET FRAME TO LOW; + //serials COINCIDENT, start moving charge immediately + //when CDS reset begins + SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; + + //...except the summing wells at the output which we pulse just when we + //finish CDS first integration period + CDS_RESET_BEGIN+COINC_SW_DELAY:=SWPULSE_START SET SW TO INV_HIGH; //NOTE: summing well is inverted + SWPULSE_START+SW_settleT: SET SW TO INV_LOW; + + //now we're in the CDS signal period begin triangular shuffling serials again + CDS_RESET_BEGIN+CDS_RESET_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, SLOW; + + .+CDS_SIGNAL_LENGTH: SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, SLOW; +} + + +//similarly, read out only clocking the F register +WAVEFORM ReadPixelsFOnly +{ + //NB using slow slew rate for triangular serial clocking + 0:=PIX_BEGIN + //SW and RG are on LVDS signals + SET RG TO INV_HIGH; //NOTE reset gate is inverted + + PIX_BEGIN+RG_settleT: SET RG to INV_LOW; + SET PIXEL TO HIGH; + .+1:=CDS_RESET_BEGIN SET PIXEL TO LOW; + SET LINE TO LOW; + SET FRAME TO LOW; + //serials COINCIDENT, start moving charge immediately + //when CDS reset begins + SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; + + //...except the summing wells at the output which we pulse just when we + //finish CDS first integration period + CDS_RESET_BEGIN+COINC_SW_DELAY:=SWPULSE_START SET SW TO INV_HIGH; //NOTE: summing well is inverted + SWPULSE_START+SW_settleT: SET SW TO INV_LOW; + + //now we're in the CDS signal period begin triangular shuffling serials again + CDS_RESET_BEGIN+CDS_RESET_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, SLOW; + + .+CDS_SIGNAL_LENGTH: SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, SLOW; +} + +//use this to move charge from F register back into E register +WAVEFORM SerialFBackwards +{ + 0: SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, SLOW; + CDS_RESET_BEGIN+CDS_RESET_LENGTH: + SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; + + .+CDS_SIGNAL_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, SLOW; } +//use this to move charge from E register back into F register +WAVEFORM SerialEBackwards +{ + 0: SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, SLOW; + + CDS_RESET_BEGIN+CDS_RESET_LENGTH: + SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; + + .+CDS_SIGNAL_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; + SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, SLOW; + +} + + + + + + + From 091296323ddcd030640d2f7fe764182cf3a575d3 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 6 Mar 2025 12:53:48 -0800 Subject: [PATCH 084/194] add missing CDS lines for multi device readout --- src/deimos/deimos.cds | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index ad4b255..17c83fc 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -21,9 +21,28 @@ SHP1 = _FIRST_RESET_SAMPLE SHP2 = _LAST_RESET_SAMPLE SHD1 = _FIRST_VIDEO_SAMPLE SHD2 = _LAST_VIDEO_SAMPLE + + //ADM module installed in slot 7 TAPLINE0 ="AM37L,1,0" TAPLINE1 ="AM38R,1,0" -TAPLINES=2 +TAPLINE2 ="AM39L,1,0" +TAPLINE3 ="AM40R,1,0" +TAPLINE4 ="AM41L,1,0" +TAPLINE5 ="AM42R,1,0" +TAPLINE6 ="AM43L,1,0" +TAPLINE7 ="AM44R,1,0" +TAPLINE8 ="AM45L,1,0" +TAPLINE9 ="AM46R,1,0" +TAPLINE10 ="AM47L,1,0" +TAPLINE11 ="AM48R,1,0" +TAPLINE12 ="AM49L,1,0" +TAPLINE13 ="AM50R,1,0" +TAPLINE14 ="AM51L,1,0" +TAPLINE15 ="AM52R,1,0" +TAPLINE16 ="AM53L,1,0" +TAPLINE17 ="AM54R,1,0" + +TAPLINES=18 TRIGOUTFORCE=0 TRIGOUTINVERT=0 TRIGOUTLEVEL=0 From 0d1898efb54be759579ecce47af84bb92061183c Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 7 Mar 2025 16:37:05 -0800 Subject: [PATCH 085/194] DEIMOS serial DC measurement update --- src/deimos/deimos.def | 5 +++++ src/deimos/deimos.seq | 27 +++++++++++++++++++++++++++ src/deimos/deimos.waveform | 10 ++++++++++ 3 files changed, 42 insertions(+) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 2342b5a..524c994 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -84,6 +84,11 @@ #define LLEL_TDC_LOOPS 100 +#define SER_TDC_LLEL_BINS 1 +#define SER_TDC_SER_BINS 1 +#define SER_TDC_ROW_SPACING 10 + + diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 8f67811..c3b8b42 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -161,7 +161,34 @@ SEQUENCE SerialDCMeasReadoutE ReadoutBegin(); //single line read to flush the register ReadPixels(_AMPREADCOLS); + + //run the serial DC line loop + + +} + +SEQUENCE SerialDCLineLoopE +{ + //first we dump a number of lines into the serial register (to build up the charge size) + ForwardParallelAll(SER_TDC_BINS); + + //now empty the E side of the register + ReadPixelsEOnly(_AMPCOLS); + + //read out pixels from E only - the number read out is the spacing + ReadPixelsEOnly(SER_TDC_ROW_SPACING); + + RETURN; +} + +SEQUENCE SerialDCRowLoopE +{ + //back clock F the defined number of times this should get a bright line into E + SerialFBackwards(SER_TDC_SER_BINS); + //read out the pixels from E register only - NO NEED TO + ReadPixelsEOnly(SER_TDC_ROW_SPACING); + } diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index b693292..305fd2e 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -187,6 +187,16 @@ WAVEFORM ForwardParallelSectionB SET SCI_PCLK3_B TO _PAR_CLOCK_HIGH, SLOW; } +WAVEFORM ForwardParallelAll +{ + 0: SET SCI_PCLK3 TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, SLOW; + PAR_SLEW_TIME_US*100: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, SLOW; + 2*PAR_SLEW_TIME_US*100: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, SLOW; +} + WAVEFORM ParallelForwardSectionASegment1 { From 0f2b97732a6bf36699cad956089f62d4a4f3192a Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 10 Mar 2025 15:50:38 -0700 Subject: [PATCH 086/194] fix missing return statements --- src/deimos/deimos.seq | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index c3b8b42..3e6d073 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -164,13 +164,13 @@ SEQUENCE SerialDCMeasReadoutE //run the serial DC line loop - + RETURN; } SEQUENCE SerialDCLineLoopE { //first we dump a number of lines into the serial register (to build up the charge size) - ForwardParallelAll(SER_TDC_BINS); + ForwardParallelAll(SER_TDC_LLEL_BINS); //now empty the E side of the register ReadPixelsEOnly(_AMPCOLS); @@ -190,5 +190,5 @@ SEQUENCE SerialDCRowLoopE //read out the pixels from E register only - NO NEED TO ReadPixelsEOnly(SER_TDC_ROW_SPACING); - + RETURN; } From e1d5bf69f34c66742942d14089e33424202dd749 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 10 Mar 2025 17:28:32 -0700 Subject: [PATCH 087/194] offset CDS lines --- src/deimos/deimos.cds | 36 ++++++++++++++++++------------------ src/deimos/deimos.def | 14 +++++++++----- src/deimos/deimos.waveform | 8 ++++---- 3 files changed, 31 insertions(+), 27 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 17c83fc..942ca77 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -23,24 +23,24 @@ SHD1 = _FIRST_VIDEO_SAMPLE SHD2 = _LAST_VIDEO_SAMPLE //ADM module installed in slot 7 -TAPLINE0 ="AM37L,1,0" -TAPLINE1 ="AM38R,1,0" -TAPLINE2 ="AM39L,1,0" -TAPLINE3 ="AM40R,1,0" -TAPLINE4 ="AM41L,1,0" -TAPLINE5 ="AM42R,1,0" -TAPLINE6 ="AM43L,1,0" -TAPLINE7 ="AM44R,1,0" -TAPLINE8 ="AM45L,1,0" -TAPLINE9 ="AM46R,1,0" -TAPLINE10 ="AM47L,1,0" -TAPLINE11 ="AM48R,1,0" -TAPLINE12 ="AM49L,1,0" -TAPLINE13 ="AM50R,1,0" -TAPLINE14 ="AM51L,1,0" -TAPLINE15 ="AM52R,1,0" -TAPLINE16 ="AM53L,1,0" -TAPLINE17 ="AM54R,1,0" +TAPLINE0 ="AM37L,1,100" +TAPLINE1 ="AM38R,1,100" +TAPLINE2 ="AM39L,1,100" +TAPLINE3 ="AM40R,1,100" +TAPLINE4 ="AM41L,1,100" +TAPLINE5 ="AM42R,1,100" +TAPLINE6 ="AM43L,1,100" +TAPLINE7 ="AM44R,1,100" +TAPLINE8 ="AM45L,1,100" +TAPLINE9 ="AM46R,1,100" +TAPLINE10 ="AM47L,1,100" +TAPLINE11 ="AM48R,1,100" +TAPLINE12 ="AM49L,1,100" +TAPLINE13 ="AM50R,1,100" +TAPLINE14 ="AM51L,1,100" +TAPLINE15 ="AM52R,1,100" +TAPLINE16 ="AM53L,1,100" +TAPLINE17 ="AM54R,1,100" TAPLINES=18 TRIGOUTFORCE=0 diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 524c994..d787011 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -48,7 +48,7 @@ #define _PARALLELOVERSCAN 50 #define _AMPREADCOLS #eval _AMPCOLS + _SERIALPRESCAN -#define _LINENUM #eval _IMAGEROWS + _PARALLELVERSCAN +#define _LINENUM #eval _IMAGEROWS + _PARALLELOVERSCAN @@ -62,16 +62,20 @@ #define RG_settleT 32 /*32*/ /* Settling Time for the reset gate 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ #define SW_settleT 32 /*32*/ /* Settling Time for charge dump 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ -#define _FIRST_RESET_SAMPLE #eval RG_settleT /* Start Reset sample after reset settling time */ -#define _LAST_RESET_SAMPLE #eval Pixel_T/2 - 1 /* Half of the pixel time to reset pedestal */ -#define _FIRST_VIDEO_SAMPLE #eval Pixel_T/2 - 1 + SW_settleT /* Start video sample after reset pedestal and summing well settle */ -#define _LAST_VIDEO_SAMPLE #eval Pixel_T - 2 /* Stop video sample at end of pixel time */ #define CDS_RESET_LENGTH 35 #define CDS_SIGNAL_LENGTH 35 #define COINC_SW_DELAY 1 +//pixel timing should be set up such that pixel trigger only happens when RG comes down, so we start at 0 +#define _FIRST_RESET_SAMPLE 0 +#define _LAST_RESET_SAMPLE 35 +#define _FIRST_VIDEO_SAMPLE 36 +#define _LAST_VIDEO_SAMPLE 71 + + + #define AC_CLAMP_ON_TIME 100 #define AC_CLAMP_EXTRA_RECOVER 10 diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 305fd2e..eacf8d2 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -103,10 +103,10 @@ WAVEFORM TransferToSerialRegister SET LINE TO HIGH; //simultaneously, operate the AC clamp - BEGIN: SET AC_Clamp to HIGH; - .+AC_CLAMP_ON_TIME: SET AC_Clamp to LOW; - END_RECV: SET NOP TO HIGH; - .+AC_CLAMP_EXTRA_RECOVER: RETURN; + // BEGIN: SET AC_Clamp to HIGH; + // .+AC_CLAMP_ON_TIME: SET AC_Clamp to LOW; + // END_RECV: SET NOP TO HIGH; + // .+AC_CLAMP_EXTRA_RECOVER: RETURN; } From 45848d7a723164b7f41e26cdfdc0b7493fe3d8af Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 10 Mar 2025 20:02:51 -0700 Subject: [PATCH 088/194] first day of messing around --- src/deimos/deimos.def | 27 ++++++++++++++++++++------- src/deimos/deimos.seq | 5 +++++ src/deimos/deimos.waveform | 30 ++++++++++++++++++++++++------ 3 files changed, 49 insertions(+), 13 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index d787011..e6be054 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -23,12 +23,25 @@ #define _ARCHON_FRAMEMODE 2 /* 0=top, 1=bottom, 2=split */ #define _ARCHON_FRAMEBUFS 0 /* 0=3x512MB, 1=2x768MB, I.E. "BIGBUF" */ -#define _RAW_ENABLE 0 /* 0=no, 1=yes */ +#define _RAW_ENABLE 1 /* 0=no, 1=yes */ #define _RAW_STARTLINE 0 /* first line of raw data, 0-65535 */ #define _RAW_ENDLINE 10 /* last line of raw data, 0-65535 */ #define _RAW_STARTPIXEL 50 #define _RAW_SAMPLES 2000 -#define _RAW_SELECT 7 /* AD channel for raw data capture, 0-15 */ +#define _RAW_SELECT 11 /* AD channel for raw data capture, 0-15 */ + +//NOTE correspondence from Greg Bredthauer to Dan W: +// +//Raw Channel Select 1-4 => ADM channels 1-4 +/* Raw Channel Select 5-8 => ADM channels 19-22 */ +/* Raw Channel Select 9-12 => ADM channels 37-40 */ +/* Raw Channel Select 13-16 => ADM channels 55-58 */ +/* Raw Channel Select 17-30 => ADM channels 5-18 */ +/* Raw Channel Select 31-44 => ADM channels 23-36 */ +/* Raw Channel Select 45-58 => ADM channels 41-54 */ +/* Raw Channel Select 59-72 => ADM channels 59-72 */ +// does not seem that obvious to guess tbh + /** --------------------------------------------------------------------------- * Detector Array Parameters @@ -59,13 +72,13 @@ #define Pixel_T 100 /* Full pixel time : 10s of ns */ /* TODO CLARIFY VLAYES FOR RG AND SW settling time */ -#define RG_settleT 32 /*32*/ /* Settling Time for the reset gate 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ -#define SW_settleT 32 /*32*/ /* Settling Time for charge dump 310ns */ /* Static */ /* Used in CDS Window calculation */ /* Shifted to 1 less from previous */ +#define RG_settleT 60 // TODO: reduce when get better damping +#define SW_settleT 30 // TODO: reduce when get better damping #define CDS_RESET_LENGTH 35 #define CDS_SIGNAL_LENGTH 35 -#define COINC_SW_DELAY 1 +#define COINC_SW_DELAY 2 //pixel timing should be set up such that pixel trigger only happens when RG comes down, so we start at 0 @@ -76,8 +89,8 @@ -#define AC_CLAMP_ON_TIME 100 -#define AC_CLAMP_EXTRA_RECOVER 10 +#define AC_CLAMP_ON_TIME 1000 +#define AC_CLAMP_EXTRA_RECOVER 100 // constants for use with parallel total deferred charge measurements diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 3e6d073..ece8313 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -27,8 +27,13 @@ param integrate_s = 0 // will be set externally to choose integration seconds param framecount = 0 //will be set param abortintegrate = 0 //checked by the integration waiters and they bail out if it is set +param firsttimesetup = 1 + SEQUENCE StartSeq { + if firsttimesetup FirstTimeSetup(); + firsttimesetup--; + if integrate_enable CheckIntegrate(); if readout_enable CheckReadout(); framecount--; diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index eacf8d2..9e90c52 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -76,9 +76,26 @@ WAVEFORM KeepThisFrame { /* Integration related waveforms */ /*****************************************/ -WAVEFORM SetupIntegration { - 0: SET SHUTTER TO OPEN; +#define PAR_SLEW_TIME_TICKS #eval PAR_SLEW_TIME_US * 100 + +WAVEFORM FirstTimeSetup { + 0: + SET SCI_PCLK3 TO HIGH, SLOW; + SET SCI_PCLK1 TO LOW, SLOW; + SET SCI_PCLK2 TO LOW, SLOW; + .+PAR_SLEW_TIME_TICKS: SET NOP TO HIGH; + +} + + +WAVEFORM SetupIntegration { + 0: + SET SCI_PCLK3 TO HIGH, SLOW; + SET SCI_PCLK1 TO LOW, SLOW; + SET SCI_PCLK2 TO LOW, SLOW; + .+PAR_SLEW_TIME_TICKS: + SET SHUTTER TO OPEN; } WAVEFORM TearDownIntegration { @@ -96,6 +113,7 @@ WAVEFORM TransferToSerialRegister //set serials to receive charge 0:=BEGIN SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; .+SERTRANSDELAY: SET TG TO _TG_CLOCK_HIGH, FAST; .+TGDELAY:=END_RECV SET TG TO _TG_CLOCK_LOW, FAST; SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; @@ -103,10 +121,10 @@ WAVEFORM TransferToSerialRegister SET LINE TO HIGH; //simultaneously, operate the AC clamp - // BEGIN: SET AC_Clamp to HIGH; - // .+AC_CLAMP_ON_TIME: SET AC_Clamp to LOW; - // END_RECV: SET NOP TO HIGH; - // .+AC_CLAMP_EXTRA_RECOVER: RETURN; + BEGIN: SET AC_Clamp to INV_HIGH; + .+AC_CLAMP_ON_TIME: SET AC_Clamp to INV_LOW; + END_RECV: SET NOP TO HIGH; + .+AC_CLAMP_EXTRA_RECOVER: RETURN; } From bf3ad514d3b71e9699d491df1399b59dd7393c6d Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 11 Mar 2025 13:48:23 -0700 Subject: [PATCH 089/194] minor fixes to clock signal definitions --- src/deimos/deimos.mod | 14 +++++++------- src/deimos/deimos.signals | 6 +++--- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index d7160c5..4505b63 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -13,13 +13,13 @@ SLOT 1 driverx { DRVX 3 [PCLK_fast,PCLK_slow,1] "PCLK_B2_2"; DRVX 4 [PCLK_fast,PCLK_slow,1] "PCLK_A2_2"; DRVX 5 [PCLK_fast,PCLK_slow,1] "PCLK_B1_2"; - DRVX 6 [PCLK_fast,PCLK_slow,1]; - DRVX 7 [PCLK_fast,PCLK_slow,1]; - DRVX 8 [PCLK_fast,PCLK_slow,1]; - DRVX 9 [PCLK_fast,PCLK_slow,1]; - DRVX 10 [PCLK_fast,PCLK_slow,1]; - DRVX 11 [PCLK_fast,PCLK_slow,1]; - DRVX 12 [PCLK_fast,PCLK_slow,1]; + DRVX 6 [PCLK_fast,PCLK_slow,1] "PCLK_A1_2"; + DRVX 7 [PCLK_fast,PCLK_slow,1] "PCLK_B1_1"; + DRVX 8 [PCLK_fast,PCLK_slow,1] "PCLK_A2_1"; + DRVX 9 [PCLK_fast,PCLK_slow,1] "PCLK_A2_1"; + DRVX 10 [PCLK_fast,PCLK_slow,1] "PCLK_B2_1"; + DRVX 11 [PCLK_fast,PCLK_slow,1] "PCLK_A3_1"; + DRVX 12 [PCLK_fast,PCLK_slow,1] "PCLK_B3_1"; } /* Remove comment when adding FCS diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 57960c4..a0e0303 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -96,9 +96,9 @@ /* Science parallels section A */ -#define SCI_PCLK1_A [PCLK_A1_1, PCLK_B1_2] -#define SCI_PCLK2_A [PCLK_A2_1, PCLK_B2_2] -#define SCI_PCLK3_A [PCLK_A3_1, PCLK_B3_2] +#define SCI_PCLK1_A [PCLK_A1_1, PCLK_A1_2] +#define SCI_PCLK2_A [PCLK_A2_1, PCLK_A2_2] +#define SCI_PCLK3_A [PCLK_A3_1, PCLK_A3_2] #define SCI_PCLK1_B [PCLK_B1_1, PCLK_B1_2] #define SCI_PCLK2_B [PCLK_B2_1, PCLK_B2_2] From 68c4e5fcc735ae6c646724293e185152c5722be6 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 12 Mar 2025 17:28:25 -0700 Subject: [PATCH 090/194] changes to arrangement in ReadPixel, doesn't quite work yet --- src/deimos/deimos.cds | 36 +++++++++++++++++++++++------ src/deimos/deimos.def | 8 +++---- src/deimos/deimos.mod | 4 ++-- src/deimos/deimos.seq | 17 +++++++++++--- src/deimos/deimos.waveform | 47 ++++++++++++++++++++++++++------------ 5 files changed, 82 insertions(+), 30 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 942ca77..3fd65a1 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -7,13 +7,17 @@ #include "voltage_timing_parameters.h" BIGBUF = _ARCHON_FRAMEBUFS -FRAMEMODE = _ARCHON_FRAMEMODE -LINECOUNT = _LINENUM -PIXELCOUNT = _AMPREADCOLS +FRAMEMODE = 0 + LINECOUNT = _LINENUM + + //LINECOUNT = 1 + //PIXELCOUNT = 1000 + PIXELCOUNT = _AMPREADCOLS RAWENABLE = _RAW_ENABLE RAWENDLINE = _RAW_ENDLINE RAWSAMPLES = _RAW_SAMPLES -RAWSEL = _RAW_SELECT + //RAWSEL = _RAW_SELECT +RAWSEL = 47 RAWSTARTLINE = _RAW_STARTLINE RAWSTARTPIXEL = _RAW_STARTPIXEL SAMPLEMODE = _ARCHON_SAMPLE_MODE @@ -23,6 +27,23 @@ SHD1 = _FIRST_VIDEO_SAMPLE SHD2 = _LAST_VIDEO_SAMPLE //ADM module installed in slot 7 +#define SINGLE_DET_TEST 1 + + // NOTE tghere is a re-mapping due to the cameralink cable, + // that is not accounted for by the current DEIMOS VIB. + // currently, SCI 2E channel is connected to FCS L1 (which will be channel 9 in the ADM card, tap channel 45) + // raw channel selection 49 + // SCI 2F channel is connected to SCI 4f (which will be channel 8 in the ADM card, tap channel 44) + // note this should also be inverted in principle, not sure if that's actually ahppenbing TBD + // raw channel selection 48 + + + +#if SINGLE_DET_TEST +TAPLINE0 ="AM45L,1,100" +TAPLINE1 ="AM44R,-1,100" +TAPLINES=2 +#else TAPLINE0 ="AM37L,1,100" TAPLINE1 ="AM38R,1,100" TAPLINE2 ="AM39L,1,100" @@ -39,10 +60,11 @@ TAPLINE12 ="AM49L,1,100" TAPLINE13 ="AM50R,1,100" TAPLINE14 ="AM51L,1,100" TAPLINE15 ="AM52R,1,100" -TAPLINE16 ="AM53L,1,100" -TAPLINE17 ="AM54R,1,100" +TAPLINES=16 + +#endif + -TAPLINES=18 TRIGOUTFORCE=0 TRIGOUTINVERT=0 TRIGOUTLEVEL=0 diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index e6be054..0cf736e 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -57,10 +57,10 @@ /* #define _CDS_WIDTH 10 /* width of each CDS integration component in clocks */ #define _SERIALPRESCAN 50 -#define _SERIALOVERSCAN 100 +#define _SERIALOVERSCAN 20 #define _PARALLELOVERSCAN 50 -#define _AMPREADCOLS #eval _AMPCOLS + _SERIALPRESCAN +#define _AMPREADCOLS #eval _AMPCOLS + _SERIALPRESCAN + _SERIALOVERSCAN #define _LINENUM #eval _IMAGEROWS + _PARALLELOVERSCAN @@ -72,7 +72,7 @@ #define Pixel_T 100 /* Full pixel time : 10s of ns */ /* TODO CLARIFY VLAYES FOR RG AND SW settling time */ -#define RG_settleT 60 // TODO: reduce when get better damping +#define RG_settleT 10 // TODO: reduce when get better damping #define SW_settleT 30 // TODO: reduce when get better damping @@ -90,7 +90,7 @@ #define AC_CLAMP_ON_TIME 1000 -#define AC_CLAMP_EXTRA_RECOVER 100 +#define AC_CLAMP_EXTRA_RECOVER 1 // constants for use with parallel total deferred charge measurements diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 4505b63..e362a02 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -107,8 +107,8 @@ SLOT 9 hvbias { HVLC 22 [0.00,0]; HVLC 23 [0.00,0]; HVLC 24 [0.00,0]; - HVHC 1 [29.0,0.1,3,1] "SCI E Output Drain"; - HVHC 2 [29.0,0.1,3,1] "SCI F Output Drain"; + HVHC 1 [29.0,2.0,3,1] "SCI E Output Drain"; + HVHC 2 [29.0,7.0,3,1] "SCI F Output Drain"; //NOTE THE HIGH CURRENT SETTING HERE... INVESTIGATE HVHC 3 [29.0,0.0,0,0]; HVHC 4 [29.0,0.0,0,0]; HVHC 5 [29.0,0.0,0,0]; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index ece8313..1d24a74 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -28,6 +28,18 @@ param framecount = 0 //will be set param abortintegrate = 0 //checked by the integration waiters and they bail out if it is set param firsttimesetup = 1 + +#define NOISETEST 0 + +#if NOISETEST +SEQUENCE NoiseTest { + setupTGTest(); + bounceTGTest(1000); + GOTO NoiseTest(); + +} +#endif + SEQUENCE StartSeq { @@ -63,14 +75,13 @@ SEQUENCE CheckReadout } -#define LINE_COLS #eval _SERIALPRESCAN + _AMPCOLS //segment calculations //this does floor arithmetic, so might end up with wrong number //if number cols changes -#define PIXELS_PER_SEG #eval _AMPCOLS / 3 -#define REMAINDER_PIX #eval _AMPCOLS - (PIXELS_PER_SEG * 3) +#define PIXELS_PER_SEG #eval _AMPREADCOLS / 3 +#define REMAINDER_PIX #eval _AMPREADCOLS - (PIXELS_PER_SEG * 3) SEQUENCE FrameReadout diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 9e90c52..25da823 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -84,8 +84,8 @@ WAVEFORM FirstTimeSetup { SET SCI_PCLK3 TO HIGH, SLOW; SET SCI_PCLK1 TO LOW, SLOW; SET SCI_PCLK2 TO LOW, SLOW; + SET AC_Clamp TO LOW; .+PAR_SLEW_TIME_TICKS: SET NOP TO HIGH; - } @@ -104,7 +104,6 @@ WAVEFORM TearDownIntegration { WAVEFORM ReadoutBegin { - 0: SET FRAME TO HIGH; } @@ -121,9 +120,9 @@ WAVEFORM TransferToSerialRegister SET LINE TO HIGH; //simultaneously, operate the AC clamp - BEGIN: SET AC_Clamp to INV_HIGH; - .+AC_CLAMP_ON_TIME: SET AC_Clamp to INV_LOW; - END_RECV: SET NOP TO HIGH; + BEGIN: SET AC_Clamp to HIGH; + .+AC_CLAMP_ON_TIME: SET AC_Clamp to LOW; + END_RECV: SET NOP TO HIGH; .+AC_CLAMP_EXTRA_RECOVER: RETURN; } @@ -155,14 +154,17 @@ WAVEFORM ReadPixels { //NB using slow slew rate for triangular serial clocking 0:=PIX_BEGIN + SET PIXEL TO HIGH; + .+1: SET PIXEL TO LOW; + SET LINE TO LOW; + SET FRAME TO LOW; + + //SW and RG are on LVDS signals SET RG TO INV_HIGH; //NOTE reset gate is inverted PIX_BEGIN+RG_settleT: SET RG to INV_LOW; - SET PIXEL TO HIGH; - .+1:=CDS_RESET_BEGIN SET PIXEL TO LOW; - SET LINE TO LOW; - SET FRAME TO LOW; + .+1:=CDS_RESET_BEGIN //serials COINCIDENT, start moving charge immediately //when CDS reset begins SET SCI_SCLK2 TO _SER_CLOCK_LOW, SLOW; @@ -170,16 +172,16 @@ WAVEFORM ReadPixels //...except the summing wells at the output which we pulse just when we //finish CDS first integration period - CDS_RESET_BEGIN+COINC_SW_DELAY:=SWPULSE_START SET SW TO INV_HIGH; //NOTE: summing well is inverted - SWPULSE_START+SW_settleT: SET SW TO INV_LOW; + .+COINC_SW_DELAY:=SWPULSE_START SET SW TO INV_HIGH; //NOTE: summing well is inverted //now we're in the CDS signal period begin triangular shuffling serials again - CDS_RESET_BEGIN+CDS_RESET_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; + .+1: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; SET SCI_SCLK1 TO _SER_CLOCK_HIGH, SLOW; - .+CDS_SIGNAL_LENGTH: SET SCI_SCLK1 TO _SER_CLOCK_LOW, SLOW; SET SCI_SCLK2 TO _SER_CLOCK_HIGH, SLOW; - + + + SWPULSE_START + 24: SET SW TO INV_LOW; } #define PCLK_NOREAD_DELAY @@ -330,10 +332,27 @@ WAVEFORM SerialEBackwards } +WAVEFORM bounceTGTest +{ + 0: SET TG to _TG_CLOCK_HIGH,FAST; + 30: SET TG to _TG_CLOCK_LOW, FAST; + 60: SET NOP to HIGH; + 0: SET PIXEL TO HIGH; + .+1: SET PIXEL TO LOW; + SET FRAME TO LOW; + SET LINE TO LOW; +} +WAVEFORM setupTGTest +{ + 0: SET FRAME TO HIGH; + SET LINE TO HIGH; + +} + From 5721ec146374ef61eef9190eaa1c369a61ca6b52 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 13 Mar 2025 16:45:03 -0700 Subject: [PATCH 091/194] updates from Thursday tinkering --- src/deimos/deimos.cds | 8 ++-- src/deimos/deimos.def | 10 ++-- src/deimos/deimos.seq | 1 + src/deimos/deimos.waveform | 66 ++++++++++++++++---------- src/deimos/voltage_timing_parameters.h | 2 +- 5 files changed, 51 insertions(+), 36 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 3fd65a1..664dbfd 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -14,12 +14,12 @@ FRAMEMODE = 0 //PIXELCOUNT = 1000 PIXELCOUNT = _AMPREADCOLS RAWENABLE = _RAW_ENABLE -RAWENDLINE = _RAW_ENDLINE -RAWSAMPLES = _RAW_SAMPLES +RAWENDLINE = 200 +RAWSAMPLES = 5000 //RAWSEL = _RAW_SELECT RAWSEL = 47 -RAWSTARTLINE = _RAW_STARTLINE -RAWSTARTPIXEL = _RAW_STARTPIXEL +RAWSTARTLINE = 0 +RAWSTARTPIXEL = 48 SAMPLEMODE = _ARCHON_SAMPLE_MODE SHP1 = _FIRST_RESET_SAMPLE SHP2 = _LAST_RESET_SAMPLE diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 0cf736e..28a7115 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -72,7 +72,7 @@ #define Pixel_T 100 /* Full pixel time : 10s of ns */ /* TODO CLARIFY VLAYES FOR RG AND SW settling time */ -#define RG_settleT 10 // TODO: reduce when get better damping +#define RG_settleT 40 // TODO: reduce when get better damping #define SW_settleT 30 // TODO: reduce when get better damping @@ -82,10 +82,10 @@ //pixel timing should be set up such that pixel trigger only happens when RG comes down, so we start at 0 -#define _FIRST_RESET_SAMPLE 0 -#define _LAST_RESET_SAMPLE 35 -#define _FIRST_VIDEO_SAMPLE 36 -#define _LAST_VIDEO_SAMPLE 71 +#define _FIRST_RESET_SAMPLE 20 +#define _LAST_RESET_SAMPLE 30 +#define _FIRST_VIDEO_SAMPLE 40 +#define _LAST_VIDEO_SAMPLE 50 diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 1d24a74..57fa94c 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -113,6 +113,7 @@ SEQUENCE abortintegration { SEQUENCE LineReadout { + TransferToSerialRegister(); ReadPixels(_SERIALPRESCAN); ParallelForwardSegment1(); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 25da823..c0387f8 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -77,6 +77,7 @@ WAVEFORM KeepThisFrame { /*****************************************/ #define PAR_SLEW_TIME_TICKS #eval PAR_SLEW_TIME_US * 100 +#define SER_SLEW_TIME_TICKS #eval SER_SLEW_TIME_US * 100 WAVEFORM FirstTimeSetup { @@ -85,6 +86,13 @@ WAVEFORM FirstTimeSetup { SET SCI_PCLK1 TO LOW, SLOW; SET SCI_PCLK2 TO LOW, SLOW; SET AC_Clamp TO LOW; + SET SW TO 1; + SET RG TO 1; + SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET TG TO _TG_CLOCK_LOW, FAST; + .+PAR_SLEW_TIME_TICKS: SET NOP TO HIGH; } @@ -104,6 +112,7 @@ WAVEFORM TearDownIntegration { WAVEFORM ReadoutBegin { + SET LINE TO HIGH; } @@ -115,8 +124,8 @@ WAVEFORM TransferToSerialRegister SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; .+SERTRANSDELAY: SET TG TO _TG_CLOCK_HIGH, FAST; .+TGDELAY:=END_RECV SET TG TO _TG_CLOCK_LOW, FAST; - SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; SET LINE TO HIGH; //simultaneously, operate the AC clamp @@ -152,36 +161,39 @@ WAVEFORM ParallelForwardSegment3 WAVEFORM ReadPixels { - //NB using slow slew rate for triangular serial clocking + //NB using slow slew rate for triangular serial clockingdef 0:=PIX_BEGIN SET PIXEL TO HIGH; .+1: SET PIXEL TO LOW; SET LINE TO LOW; SET FRAME TO LOW; - - //SW and RG are on LVDS signals + //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted + PIX_BEGIN+RG_settleT: SET RG to INV_LOW; - PIX_BEGIN+RG_settleT: SET RG to INV_LOW; - .+1:=CDS_RESET_BEGIN - //serials COINCIDENT, start moving charge immediately - //when CDS reset begins - SET SCI_SCLK2 TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; - - //...except the summing wells at the output which we pulse just when we - //finish CDS first integration period - .+COINC_SW_DELAY:=SWPULSE_START SET SW TO INV_HIGH; //NOTE: summing well is inverted - //now we're in the CDS signal period begin triangular shuffling serials again - .+1: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; + //triangular serial clocks, running as they please + 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, SLOW; + SET SCI_SCLK1 TO _SER_CLOCK_LOW, SLOW; + .+SER_SLEW_TIME_TICKS:=CHARGE_UNDER_SCK2 + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, SLOW; + .+SER_SLEW_TIME_TICKS: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, SLOW; - .+CDS_SIGNAL_LENGTH: SET SCI_SCLK1 TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK2 TO _SER_CLOCK_HIGH, SLOW; - - - SWPULSE_START + 24: SET SW TO INV_LOW; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; + .+SER_SLEW_TIME_TICKS: + SET NOP TO HIGH; + + //at the point where charge is under SCLK2, delay by a small amount then + //let SW RIP + + CHARGE_UNDER_SCK2+COINC_SW_DELAY: + SET SW TO INV_HIGH; + .+SW_settleT: + SET SW TO INV_LOW; + //at this point the charge has plopped over the OG and is in the node. + //should readout here } #define PCLK_NOREAD_DELAY @@ -257,11 +269,13 @@ WAVEFORM ReadPixelsEOnly //when CDS reset begins SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, SLOW; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; + SET SW TO INV_HIGH; + + .+SW_settleT: SET SW TO INV_LOW; + + + CDS_RESET_BEGIN + - //...except the summing wells at the output which we pulse just when we - //finish CDS first integration period - CDS_RESET_BEGIN+COINC_SW_DELAY:=SWPULSE_START SET SW TO INV_HIGH; //NOTE: summing well is inverted - SWPULSE_START+SW_settleT: SET SW TO INV_LOW; //now we're in the CDS signal period begin triangular shuffling serials again CDS_RESET_BEGIN+CDS_RESET_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 86f335d..181763f 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -77,7 +77,7 @@ #define PAR_SLEW_TIME_US 341 -#define SER_SLEW_TIME_US 0.33 +#define SER_SLEW_TIME_US 0.66 //NOTE: OH DEAR, does GPP not do floating point calculations? From e7c3e62ba62a2a359d097cd9826ec53ea89b5dd0 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 14 Mar 2025 19:26:55 -0700 Subject: [PATCH 092/194] nearly working it feels like --- src/deimos/deimos.cds | 2 +- src/deimos/deimos.def | 12 +++++------ src/deimos/deimos.seq | 10 ++++----- src/deimos/deimos.waveform | 28 ++++++++++++++++---------- src/deimos/voltage_timing_parameters.h | 9 ++++----- 5 files changed, 33 insertions(+), 28 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 664dbfd..397cdfc 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -20,7 +20,7 @@ RAWSAMPLES = 5000 RAWSEL = 47 RAWSTARTLINE = 0 RAWSTARTPIXEL = 48 -SAMPLEMODE = _ARCHON_SAMPLE_MODE +SAMPLEMODE = 0 SHP1 = _FIRST_RESET_SAMPLE SHP2 = _LAST_RESET_SAMPLE SHD1 = _FIRST_VIDEO_SAMPLE diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 28a7115..f95556a 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -58,10 +58,10 @@ /* #define _CDS_WIDTH 10 /* width of each CDS integration component in clocks */ #define _SERIALPRESCAN 50 #define _SERIALOVERSCAN 20 -#define _PARALLELOVERSCAN 50 +#define _PARALLELOVERSCAN 20 -#define _AMPREADCOLS #eval _AMPCOLS + _SERIALPRESCAN + _SERIALOVERSCAN -#define _LINENUM #eval _IMAGEROWS + _PARALLELOVERSCAN +#define _AMPREADCOLS #eval (_AMPCOLS + _SERIALPRESCAN + _SERIALOVERSCAN) +#define _LINENUM #eval (_IMAGEROWS + _PARALLELOVERSCAN) @@ -69,11 +69,11 @@ * CDS-Deinterlace options */ -#define Pixel_T 100 /* Full pixel time : 10s of ns */ +#define Pixel_T 500 /* Full pixel time : 10s of ns */ /* TODO CLARIFY VLAYES FOR RG AND SW settling time */ #define RG_settleT 40 // TODO: reduce when get better damping -#define SW_settleT 30 // TODO: reduce when get better damping +#define SW_settleT 20 // TODO: reduce when get better damping #define CDS_RESET_LENGTH 35 @@ -90,7 +90,7 @@ #define AC_CLAMP_ON_TIME 1000 -#define AC_CLAMP_EXTRA_RECOVER 1 +#define AC_CLAMP_EXTRA_RECOVER 1000 // constants for use with parallel total deferred charge measurements diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 57fa94c..c850eae 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -80,7 +80,7 @@ SEQUENCE CheckReadout //segment calculations //this does floor arithmetic, so might end up with wrong number //if number cols changes -#define PIXELS_PER_SEG #eval _AMPREADCOLS / 3 +#define PIXELS_PER_SEG #eval _AMPREADCOLS / 3 #define REMAINDER_PIX #eval _AMPREADCOLS - (PIXELS_PER_SEG * 3) @@ -114,16 +114,16 @@ SEQUENCE abortintegration { SEQUENCE LineReadout { - TransferToSerialRegister(); - ReadPixels(_SERIALPRESCAN); + TransferToSerialRegisterBegin(); ParallelForwardSegment1(); + TransferToSerialRegisterEnd(); ReadPixels(PIXELS_PER_SEG); ParallelForwardSegment2(); ReadPixels(PIXELS_PER_SEG); ParallelForwardSegment3(); ReadPixels(PIXELS_PER_SEG); //if there are leftover pixels, do them here - #if _AMPCOLS % 3 + #if PIXELS_PER_SEG %3 ReadPixels(REMAINDER_PIX); #endif @@ -132,7 +132,7 @@ SEQUENCE LineReadout SEQUENCE LineReadoutAOnly { - TransferToSerialRegister(); + TransferToSerialRegisterBegin(); ReadPixels(_SERIALPRESCAN); ParallelForwardSectionASegment1(); ReadPixels(PIXELS_PER_SEG); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index c0387f8..6623331 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -116,23 +116,29 @@ WAVEFORM ReadoutBegin } -WAVEFORM TransferToSerialRegister +WAVEFORM TransferToSerialRegisterBegin { //set serials to receive charge 0:=BEGIN SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - .+SERTRANSDELAY: SET TG TO _TG_CLOCK_HIGH, FAST; - .+TGDELAY:=END_RECV SET TG TO _TG_CLOCK_LOW, FAST; + .+1000:=TGUP SET TG TO _TG_CLOCK_HIGH, FAST; + //simultaneously, operate the AC clamp + BEGIN: SET AC_Clamp to HIGH; + +} + + +WAVEFORM TransferToSerialRegisterEnd +{ + + 0:SET NOP TO HIGH; + + .+1000:=END_RECV SET TG TO _TG_CLOCK_LOW, FAST; SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; SET LINE TO HIGH; - - //simultaneously, operate the AC clamp - BEGIN: SET AC_Clamp to HIGH; - .+AC_CLAMP_ON_TIME: SET AC_Clamp to LOW; - END_RECV: SET NOP TO HIGH; - .+AC_CLAMP_EXTRA_RECOVER: RETURN; + END_RECV+AC_CLAMP_EXTRA_RECOVER: SET AC_Clamp TO LOW; } @@ -179,7 +185,7 @@ WAVEFORM ReadPixels .+SER_SLEW_TIME_TICKS:=CHARGE_UNDER_SCK2 SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; SET SCI_SCLK2 TO _SER_CLOCK_LOW, SLOW; - .+SER_SLEW_TIME_TICKS: + .+SER_SLEW_TIME_TICKS:=CHARGE_UNDER_SCK3 SET SCI_SCLK1 TO _SER_CLOCK_HIGH, SLOW; SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; .+SER_SLEW_TIME_TICKS: @@ -188,7 +194,7 @@ WAVEFORM ReadPixels //at the point where charge is under SCLK2, delay by a small amount then //let SW RIP - CHARGE_UNDER_SCK2+COINC_SW_DELAY: + CHARGE_UNDER_SCK2: SET SW TO INV_HIGH; .+SW_settleT: SET SW TO INV_LOW; diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 181763f..f384c8b 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -75,9 +75,8 @@ /** basic slew rate logic: you are doing 1024 serial transfer cycles (for each amp), each lasing around 1us. In this time 3 parallel clock transfers happen, up and down once each. Therefore in 2048us we need to do 3 slews from top to bottom, hence the slew time is 1024 / 6 = 171 */ - -#define PAR_SLEW_TIME_US 341 -#define SER_SLEW_TIME_US 0.66 +#define PAR_SLEW_TIME_US 1823.3 +#define SER_SLEW_TIME_US 1.66 //NOTE: OH DEAR, does GPP not do floating point calculations? @@ -91,8 +90,8 @@ //is still INEXPLICABLY dash rather than bash. wah wah. //#define P_TRI_SLEW_RATE #exec printf '%2.1f' $(bc <<< "scale=2; (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / PAR_SLEW_TIME_US") //#define S_TRI_SLEW_RATE #exec printf '%2.1f' $(bc <<< "scale=2; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / SER_SLEW_TIME_US") -#define P_TRI_SLEW_RATE #exec printf "%2.2f" $(echo "scale=2; (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / PAR_SLEW_TIME_US" | bc) -#define S_TRI_SLEW_RATE #exec printf "%2.2f" $(echo "scale=2; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / SER_SLEW_TIME_US" | bc) +#define P_TRI_SLEW_RATE #exec printf "%2.4f" $(echo "scale=4; (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / PAR_SLEW_TIME_US" | bc) +#define S_TRI_SLEW_RATE #exec printf "%2.4f" $(echo "scale=4; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / SER_SLEW_TIME_US" | bc) From c8f51067ba5a67a8ab767c0a36107574bf412fae Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 17 Mar 2025 17:44:47 -0700 Subject: [PATCH 093/194] updates March 17 investigations --- src/deimos/deimos.def | 10 +++++----- src/deimos/deimos.mod | 24 ++++++++++++------------ src/deimos/deimos.waveform | 8 ++++++-- src/deimos/voltage_timing_parameters.h | 20 +++++++++++++------- 4 files changed, 36 insertions(+), 26 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index f95556a..730b3a1 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -69,7 +69,7 @@ * CDS-Deinterlace options */ -#define Pixel_T 500 /* Full pixel time : 10s of ns */ + /* TODO CLARIFY VLAYES FOR RG AND SW settling time */ #define RG_settleT 40 // TODO: reduce when get better damping @@ -82,10 +82,10 @@ //pixel timing should be set up such that pixel trigger only happens when RG comes down, so we start at 0 -#define _FIRST_RESET_SAMPLE 20 -#define _LAST_RESET_SAMPLE 30 -#define _FIRST_VIDEO_SAMPLE 40 -#define _LAST_VIDEO_SAMPLE 50 +#define _FIRST_RESET_SAMPLE 500 +#define _LAST_RESET_SAMPLE 600 +#define _FIRST_VIDEO_SAMPLE 800 +#define _LAST_VIDEO_SAMPLE 900 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index e362a02..2a637f3 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -8,18 +8,18 @@ deimos_TMP SLOT 1 driverx { - DRVX 1 [PCLK_fast,PCLK_slow,1] "PCLK_B3_2"; - DRVX 2 [PCLK_fast,PCLK_slow,1] "PCLK_A3_2"; - DRVX 3 [PCLK_fast,PCLK_slow,1] "PCLK_B2_2"; - DRVX 4 [PCLK_fast,PCLK_slow,1] "PCLK_A2_2"; - DRVX 5 [PCLK_fast,PCLK_slow,1] "PCLK_B1_2"; - DRVX 6 [PCLK_fast,PCLK_slow,1] "PCLK_A1_2"; - DRVX 7 [PCLK_fast,PCLK_slow,1] "PCLK_B1_1"; - DRVX 8 [PCLK_fast,PCLK_slow,1] "PCLK_A2_1"; - DRVX 9 [PCLK_fast,PCLK_slow,1] "PCLK_A2_1"; - DRVX 10 [PCLK_fast,PCLK_slow,1] "PCLK_B2_1"; - DRVX 11 [PCLK_fast,PCLK_slow,1] "PCLK_A3_1"; - DRVX 12 [PCLK_fast,PCLK_slow,1] "PCLK_B3_1"; + DRVX 1 [PCLK_fast,PCLK_slow,0] "PCLK_B3_2"; + DRVX 2 [PCLK_fast,PCLK_slow,0] "PCLK_A3_2"; + DRVX 3 [PCLK_fast,PCLK_slow,0] "PCLK_B2_2"; + DRVX 4 [PCLK_fast,PCLK_slow,0] "PCLK_A2_2"; + DRVX 5 [PCLK_fast,PCLK_slow,0] "PCLK_B1_2"; + DRVX 6 [PCLK_fast,PCLK_slow,0] "PCLK_A1_2"; + DRVX 7 [PCLK_fast,PCLK_slow,0] "PCLK_B1_1"; + DRVX 8 [PCLK_fast,PCLK_slow,0] "PCLK_A2_1"; + DRVX 9 [PCLK_fast,PCLK_slow,0] "PCLK_A2_1"; + DRVX 10 [PCLK_fast,PCLK_slow,0] "PCLK_B2_1"; + DRVX 11 [PCLK_fast,PCLK_slow,0] "PCLK_A3_1"; + DRVX 12 [PCLK_fast,PCLK_slow,0] "PCLK_B3_1"; } /* Remove comment when adding FCS diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 6623331..cc0f592 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -122,9 +122,12 @@ WAVEFORM TransferToSerialRegisterBegin 0:=BEGIN SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET RG TO INV_HIGH; .+1000:=TGUP SET TG TO _TG_CLOCK_HIGH, FAST; + //NOTE: don't think we want to clamp with reset gate activated + SET RG TO INV_LOW; //simultaneously, operate the AC clamp - BEGIN: SET AC_Clamp to HIGH; + SET AC_Clamp to HIGH; } @@ -165,6 +168,7 @@ WAVEFORM ParallelForwardSegment3 SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, SLOW; } + WAVEFORM ReadPixels { //NB using slow slew rate for triangular serial clockingdef @@ -196,7 +200,7 @@ WAVEFORM ReadPixels CHARGE_UNDER_SCK2: SET SW TO INV_HIGH; - .+SW_settleT: + CHARGE_UNDER_SCK3+SW_settleT: SET SW TO INV_LOW; //at this point the charge has plopped over the OG and is in the node. //should readout here diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index f384c8b..ba8ebb2 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -4,15 +4,15 @@ * evaluations relative to FSS should be implemented if variability is required /*/ -#define _PAR_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _PAR_CLOCK_HIGH 11 /* [ 8.00, 14.0] */ #define _PAR_CLOCK_LOW 0 /* [-0.50, 0.50] */ #define _TG_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ #define _TG_CLOCK_LOW 0 /* [-0.50, 0.50] */ -#define _SER_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _SER_CLOCK_HIGH 11 /* [ 8.00, 14.0] */ #define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ -#define _SER_CLOCK_RCV 13 /* Higher than serial clock high */ +#define _SER_CLOCK_RCV 12 /* Higher than serial clock high */ #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ @@ -75,8 +75,14 @@ /** basic slew rate logic: you are doing 1024 serial transfer cycles (for each amp), each lasing around 1us. In this time 3 parallel clock transfers happen, up and down once each. Therefore in 2048us we need to do 3 slews from top to bottom, hence the slew time is 1024 / 6 = 171 */ -#define PAR_SLEW_TIME_US 1823.3 -#define SER_SLEW_TIME_US 1.66 +#define Pixel_T 1000 /* Full pixel time : 10s of ns */ +#define SER_SLEW_TIME_TICKS 333 + +#define SER_SLEW_TIME_US 3.33 + +#defeval PAR_SLEW_TIME_US ((2048)/2 + 50 + 20) * (Pixel_T / 100) / 3 + + //NOTE: OH DEAR, does GPP not do floating point calculations? @@ -106,5 +112,5 @@ //transfer gate uses only one slew rate -#define TG_fast 100 -#define TG_slow 100 +#define TG_fast 50 +#define TG_slow 10 From 3341b3862066065cad3982c434d462f6f9f1d81c Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 19 Mar 2025 13:23:52 -0700 Subject: [PATCH 094/194] sequences for TG and clamp tests etc --- src/deimos/deimos.cds | 15 +++-- src/deimos/deimos.def | 14 +++++ src/deimos/deimos.mod | 16 +++--- src/deimos/deimos.seq | 57 ++++++++++++++++--- src/deimos/deimos.waveform | 78 ++++++++++++++++++++------ src/deimos/voltage_timing_parameters.h | 20 ++++--- 6 files changed, 154 insertions(+), 46 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 397cdfc..9a127bf 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -7,11 +7,7 @@ #include "voltage_timing_parameters.h" BIGBUF = _ARCHON_FRAMEBUFS -FRAMEMODE = 0 LINECOUNT = _LINENUM - - //LINECOUNT = 1 - //PIXELCOUNT = 1000 PIXELCOUNT = _AMPREADCOLS RAWENABLE = _RAW_ENABLE RAWENDLINE = 200 @@ -37,13 +33,20 @@ SHD2 = _LAST_VIDEO_SAMPLE // note this should also be inverted in principle, not sure if that's actually ahppenbing TBD // raw channel selection 48 + + //NOTE due to a small mistake in the VIB schematic, ALL signals come out inverted. Due to a mistake in the mapping of the cameralink cable, the channels are mixed up and some are inverted. This inversion cancels out the other inversion. Hence SCI2F is NOT inverted, but SCI 2E IS + #if SINGLE_DET_TEST -TAPLINE0 ="AM45L,1,100" -TAPLINE1 ="AM44R,-1,100" +TAPLINE0 ="AM45L,-1,100" +TAPLINE1 ="AM44R,1,100" TAPLINES=2 +FRAMEMODE=0 + + #else +FRAMEMODE=2 TAPLINE0 ="AM37L,1,100" TAPLINE1 ="AM38R,1,100" TAPLINE2 ="AM39L,1,100" diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 730b3a1..91bcdc3 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -13,6 +13,8 @@ * Configuration modes */ +#include "voltage_timing_parameters.h" + /** -------------------------------------------------------------------------- @@ -81,6 +83,16 @@ #define COINC_SW_DELAY 2 + +#if NOISETEST + +#define _FIRST_RESET_SAMPLE 25 +#define _LAST_RESET_SAMPLE 75 +#define _FIRST_VIDEO_SAMPLE 125 +#define _LAST_VIDEO_SAMPLE 175 + +#else + //pixel timing should be set up such that pixel trigger only happens when RG comes down, so we start at 0 #define _FIRST_RESET_SAMPLE 500 #define _LAST_RESET_SAMPLE 600 @@ -88,6 +100,8 @@ #define _LAST_VIDEO_SAMPLE 900 +#endif + #define AC_CLAMP_ON_TIME 1000 #define AC_CLAMP_EXTRA_RECOVER 1000 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 2a637f3..400b647 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -14,12 +14,12 @@ SLOT 1 driverx { DRVX 4 [PCLK_fast,PCLK_slow,0] "PCLK_A2_2"; DRVX 5 [PCLK_fast,PCLK_slow,0] "PCLK_B1_2"; DRVX 6 [PCLK_fast,PCLK_slow,0] "PCLK_A1_2"; - DRVX 7 [PCLK_fast,PCLK_slow,0] "PCLK_B1_1"; - DRVX 8 [PCLK_fast,PCLK_slow,0] "PCLK_A2_1"; - DRVX 9 [PCLK_fast,PCLK_slow,0] "PCLK_A2_1"; - DRVX 10 [PCLK_fast,PCLK_slow,0] "PCLK_B2_1"; - DRVX 11 [PCLK_fast,PCLK_slow,0] "PCLK_A3_1"; - DRVX 12 [PCLK_fast,PCLK_slow,0] "PCLK_B3_1"; + DRVX 7 [PCLK_fast,PCLK_slow,1] "PCLK_B1_1"; + DRVX 8 [PCLK_fast,PCLK_slow,1] "PCLK_A2_1"; + DRVX 9 [PCLK_fast,PCLK_slow,1] "PCLK_A2_1"; + DRVX 10 [PCLK_fast,PCLK_slow,1] "PCLK_B2_1"; + DRVX 11 [PCLK_fast,PCLK_slow,1] "PCLK_A3_1"; + DRVX 12 [PCLK_fast,PCLK_slow,1] "PCLK_B3_1"; } /* Remove comment when adding FCS @@ -107,8 +107,8 @@ SLOT 9 hvbias { HVLC 22 [0.00,0]; HVLC 23 [0.00,0]; HVLC 24 [0.00,0]; - HVHC 1 [29.0,2.0,3,1] "SCI E Output Drain"; - HVHC 2 [29.0,7.0,3,1] "SCI F Output Drain"; //NOTE THE HIGH CURRENT SETTING HERE... INVESTIGATE + HVHC 1 [29.0,2.0,3,1] "SCI E Output Drain"; //This one draws low current, not sure why yet + HVHC 2 [29.0,7.0,3,1] "SCI F Output Drain"; HVHC 3 [29.0,0.0,0,0]; HVHC 4 [29.0,0.0,0,0]; HVHC 5 [29.0,0.0,0,0]; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index c850eae..2f13f61 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -24,23 +24,64 @@ param integrate_enable = 0 // to be set externally if we want an integration tim param integrate_ms = 0 // will be set externally to choose integration ms param integrate_s = 0 // will be set externally to choose integration seconds -param framecount = 0 //will be set +param framecount = 100 //will be set param abortintegrate = 0 //checked by the integration waiters and they bail out if it is set param firsttimesetup = 1 - -#define NOISETEST 0 + #if NOISETEST SEQUENCE NoiseTest { setupTGTest(); - bounceTGTest(1000); + BounceTGTestOuter(_IMAGEROWS); + BounceTGTestOuter(_PARALLELOVERSCAN); GOTO NoiseTest(); +} + + +SEQUENCE BounceTGTestOuter +{ + TGTestLineStart(); + BounceTGTest(_AMPREADCOLS); + RETURN; } + +#endif + +#if CLAMPTEST + +#define CLAMP_TEST_ITERS #eval _AMPREADCOLS / 4 + +SEQUENCE ClampTestRun { + //note clamp test and TG setup are the same + setupTGTest(); + + ClampTestOuter(_IMAGEROWS); + ClampTestOuter(_PARALLELOVERSCAN); + RETURN; +} + + +SEQUENCE ClampTestOuter +{ + ClampTestLineStart(); + ClampTest(CLAMP_TEST_ITERS); + RETURN; + +} + + +SEQUENCE ClampTest +{ + ClampOn(); + ClampTestInner(2); + ClampOff(); + ClampTestInner(2); + RETURN; +} + #endif - - SEQUENCE StartSeq { if firsttimesetup FirstTimeSetup(); @@ -115,8 +156,8 @@ SEQUENCE LineReadout { TransferToSerialRegisterBegin(); - ParallelForwardSegment1(); TransferToSerialRegisterEnd(); + ParallelForwardSegment1(); ReadPixels(PIXELS_PER_SEG); ParallelForwardSegment2(); ReadPixels(PIXELS_PER_SEG); @@ -186,7 +227,7 @@ SEQUENCE SerialDCMeasReadoutE SEQUENCE SerialDCLineLoopE { - //first we dump a number of lines into the serial register (to build up the charge size) + //first we dump a number of lines into the serial register (to build uBp the charge size) ForwardParallelAll(SER_TDC_LLEL_BINS); //now empty the E side of the register diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index cc0f592..dd15b00 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -82,9 +82,9 @@ WAVEFORM KeepThisFrame { WAVEFORM FirstTimeSetup { 0: - SET SCI_PCLK3 TO HIGH, SLOW; + SET SCI_PCLK3 TO LOW, SLOW; SET SCI_PCLK1 TO LOW, SLOW; - SET SCI_PCLK2 TO LOW, SLOW; + SET SCI_PCLK3 TO HIGH, SLOW; SET AC_Clamp TO LOW; SET SW TO 1; SET RG TO 1; @@ -99,9 +99,9 @@ WAVEFORM FirstTimeSetup { WAVEFORM SetupIntegration { 0: - SET SCI_PCLK3 TO HIGH, SLOW; SET SCI_PCLK1 TO LOW, SLOW; - SET SCI_PCLK2 TO LOW, SLOW; + SET SCI_PCLK2 TO HIGH, SLOW; + SET SCI_PCLK3 TO LOW, SLOW; .+PAR_SLEW_TIME_TICKS: SET SHUTTER TO OPEN; } @@ -123,10 +123,11 @@ WAVEFORM TransferToSerialRegisterBegin SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; SET RG TO INV_HIGH; - .+1000:=TGUP SET TG TO _TG_CLOCK_HIGH, FAST; + .+100:=TGUP SET TG TO _TG_CLOCK_HIGH, FAST; //NOTE: don't think we want to clamp with reset gate activated SET RG TO INV_LOW; //simultaneously, operate the AC clamp + .+100: SET AC_Clamp to HIGH; } @@ -150,22 +151,22 @@ WAVEFORM TransferToSerialRegisterEnd WAVEFORM ParallelForwardSegment1 { //NOTE: after integration, if done properly - //all charge should be under SCI_PCLK3 + //all charge should be under SCI_PCLK2 // the transfer to serial reg is done before this happens - 0: SET SCI_PCLK3 to _PAR_CLOCK_LOW, SLOW; - SET SCI_PCLK1 to _PAR_CLOCK_HIGH, SLOW; + 0: SET SCI_PCLK2 to _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK3 to _PAR_CLOCK_HIGH, SLOW; } WAVEFORM ParallelForwardSegment2 { - 0: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; - SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, SLOW; + 0: SET SCI_PCLK3 TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, SLOW; } WAVEFORM ParallelForwardSegment3 { - 0: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, SLOW; - SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, SLOW; + 0: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, SLOW; + SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, SLOW; } @@ -356,11 +357,11 @@ WAVEFORM SerialEBackwards } -WAVEFORM bounceTGTest +WAVEFORM BounceTGTest { 0: SET TG to _TG_CLOCK_HIGH,FAST; - 30: SET TG to _TG_CLOCK_LOW, FAST; - 60: SET NOP to HIGH; + .+100: SET TG to _TG_CLOCK_LOW, FAST; + .+500: SET NOP to HIGH; 0: SET PIXEL TO HIGH; .+1: SET PIXEL TO LOW; SET FRAME TO LOW; @@ -368,12 +369,57 @@ WAVEFORM bounceTGTest } +WAVEFORM ClampTestInner +{ + 0: SET TG to _TG_CLOCK_HIGH,FAST; + .+100: SET TG to _TG_CLOCK_LOW, FAST; + .+100: SET NOP to HIGH; + 0: SET PIXEL TO HIGH; + .+1: SET PIXEL TO LOW; + SET FRAME TO LOW; + SET LINE TO LOW; + +} + +WAVEFORM ClampOn +{ + 0: SET AC_Clamp TO HIGH; + +} + +Waveform ClampOff +{ + 0: SET AC_Clamp to LOW; +} + +WAVEFORM ClampTestLineStart +{ + 0: SET LINE TO HIGH; +} + + +WAVEFORM TGTestLineStart +{ + 0: SET LINE TO HIGH; + SET AC_Clamp TO HIGH; + .+100: SET AC_Clamp TO LOW; + + +} WAVEFORM setupTGTest { 0: SET FRAME TO HIGH; - SET LINE TO HIGH; + SET RG TO INV_LOW; + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + + SET SCI_PCLK1 TO _PAR_CLOCK_LOW,FAST; + SET SCI_PCLK2 TO _PAR_CLOCK_LOW,FAST; + SET SCI_PCLK3 TO _PAR_CLOCK_LOW,FAST; + SET SW TO INV_LOW; } diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index ba8ebb2..d6b0559 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -4,15 +4,15 @@ * evaluations relative to FSS should be implemented if variability is required /*/ -#define _PAR_CLOCK_HIGH 11 /* [ 8.00, 14.0] */ +#define _PAR_CLOCK_HIGH 11.0 /* [ 8.00, 14.0] */ #define _PAR_CLOCK_LOW 0 /* [-0.50, 0.50] */ -#define _TG_CLOCK_HIGH 12 /* [ 8.00, 14.0] */ +#define _TG_CLOCK_HIGH 12.0 /* [ 8.00, 14.0] */ #define _TG_CLOCK_LOW 0 /* [-0.50, 0.50] */ -#define _SER_CLOCK_HIGH 11 /* [ 8.00, 14.0] */ +#define _SER_CLOCK_HIGH 10.0 /* [ 8.00, 14.0] */ #define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ -#define _SER_CLOCK_RCV 12 /* Higher than serial clock high */ +#define _SER_CLOCK_RCV 13.0 /* Higher than serial clock high */ #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ @@ -81,7 +81,7 @@ #define SER_SLEW_TIME_US 3.33 #defeval PAR_SLEW_TIME_US ((2048)/2 + 50 + 20) * (Pixel_T / 100) / 3 - +#define PAR_SLEW_TIME_TICKS PAR_SLEW_TIME_US * 100 @@ -103,14 +103,18 @@ #define PCLK_slow P_TRI_SLEW_RATE -#define PCLK_fast 200 //nominal value for now +#define PCLK_fast 20 //nominal value for now //NOTE: waveforms currently use serial "slow" slew rate for triangular waveform // serial "FAST" is for immediate changes (like e.g. resetting serial register) -#define SCLK_fast 500 +#define SCLK_fast 20 #define SCLK_slow S_TRI_SLEW_RATE //nominal value for now //transfer gate uses only one slew rate -#define TG_fast 50 +#define TG_fast 20 #define TG_slow 10 + + +#define NOISETEST 1 +#define CLAMPTEST 0 From 5d6a6aad59de6bb5cdac24c4b42f47c091a41de3 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 21 Mar 2025 15:12:51 -0700 Subject: [PATCH 095/194] switch to conventional serial & llel for now --- src/deimos/deimos.def | 2 +- src/deimos/deimos.mod | 2 +- src/deimos/deimos.seq | 18 ++++-- src/deimos/deimos.waveform | 84 +++++++++++++++++++++----- src/deimos/voltage_timing_parameters.h | 13 ++-- 5 files changed, 90 insertions(+), 29 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 91bcdc3..c6bf820 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -74,7 +74,7 @@ /* TODO CLARIFY VLAYES FOR RG AND SW settling time */ -#define RG_settleT 40 // TODO: reduce when get better damping +#define RG_settleT 20 // TODO: reduce when get better damping #define SW_settleT 20 // TODO: reduce when get better damping diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 400b647..d4f1c04 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -122,7 +122,7 @@ SLOT 10 lvbias { LVLC 4 [3.00,4] "SCI F Output Gate"; LVLC 5 [1.00,0] "SCI Summing Well - Low"; // NB goes through a line driver LVLC 6 [11.50,0] "SCI Summing Well - High"; // NB goes through a line driver - LVLC 7 [1.00,0] "SCI Reset Gate - Low"; // NB goes through a line driver + LVLC 7 [5.00,0] "SCI Reset Gate - Low"; // NB goes through a line driver LVLC 8 [11.5,0] "SCI Reset Gate - High"; // NB goes through a line driver LVLC 9 [00.0,0]; LVLC 10 [3.0,0] "LastGateA FCS 1"; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 2f13f61..8569908 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -59,7 +59,7 @@ SEQUENCE ClampTestRun { ClampTestOuter(_IMAGEROWS); ClampTestOuter(_PARALLELOVERSCAN); - RETURN; + GOTO ClampTestRun; } @@ -83,6 +83,9 @@ SEQUENCE ClampTest #endif + + + SEQUENCE StartSeq { if firsttimesetup FirstTimeSetup(); firsttimesetup--; @@ -155,13 +158,16 @@ SEQUENCE abortintegration { SEQUENCE LineReadout { - TransferToSerialRegisterBegin(); - TransferToSerialRegisterEnd(); - ParallelForwardSegment1(); + // TransferToSerialRegisterBegin(); + //TransferToSerialRegisterEnd(); + //ParallelForwardSegment1(); + // ParallelForwardSegment2(); + //Wait10us(); + //ParallelForwardSegment3(); + ParallelForwardNoCoincident(); + ReadPixels(PIXELS_PER_SEG); - ParallelForwardSegment2(); ReadPixels(PIXELS_PER_SEG); - ParallelForwardSegment3(); ReadPixels(PIXELS_PER_SEG); //if there are leftover pixels, do them here #if PIXELS_PER_SEG %3 diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index dd15b00..833ea1c 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -82,9 +82,9 @@ WAVEFORM KeepThisFrame { WAVEFORM FirstTimeSetup { 0: - SET SCI_PCLK3 TO LOW, SLOW; - SET SCI_PCLK1 TO LOW, SLOW; - SET SCI_PCLK3 TO HIGH, SLOW; + SET SCI_PCLK3 TO LOW, FAST; + SET SCI_PCLK1 TO LOW, FAST; + SET SCI_PCLK2 TO HIGH, FAST; SET AC_Clamp TO LOW; SET SW TO 1; SET RG TO 1; @@ -98,11 +98,6 @@ WAVEFORM FirstTimeSetup { WAVEFORM SetupIntegration { - 0: - SET SCI_PCLK1 TO LOW, SLOW; - SET SCI_PCLK2 TO HIGH, SLOW; - SET SCI_PCLK3 TO LOW, SLOW; - .+PAR_SLEW_TIME_TICKS: SET SHUTTER TO OPEN; } @@ -146,6 +141,45 @@ WAVEFORM TransferToSerialRegisterEnd } +WAVEFORM ParallelForwardNoCoincident +{ + 0: SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; + SET TG TO _TG_CLOCK_HIGH, FAST; + SET LINE TO HIGH; + + .+200: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; + + .+200: SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; + .+200:=TG_GOES_LOW SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; + SET TG TO _TG_CLOCK_LOW, FAST; + + .+200: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; + .+200: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; + + + + //serial receive side + 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET RG to INV_HIGH; + + TG_GOES_LOW+20:=RG_GOES_LOW + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET RG TO INV_LOW; + .+50: + SET AC_Clamp TO HIGH; + RG_GOES_LOW+20: + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + + .+80: SET AC_Clamp TO LOW; + + +} + + //waveforms for coincident (triangular) parallel clocking WAVEFORM ParallelForwardSegment1 @@ -181,9 +215,26 @@ WAVEFORM ReadPixels //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - PIX_BEGIN+RG_settleT: SET RG to INV_LOW; + PIX_BEGIN+RG_settleT:=RESET_OFF SET RG to INV_LOW; + + + //charge STARTS UNDER RPhi3 + //conventional serial clock + 0: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + .+50: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + .+50: SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + SET SW TO INV_HIGH; + + .+400: SET SW TO INV_LOW; + .+400: SET NOP TO HIGH; + + +#if 0 //triangular serial clocks, running as they please 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, SLOW; SET SCI_SCLK1 TO _SER_CLOCK_LOW, SLOW; @@ -199,12 +250,13 @@ WAVEFORM ReadPixels //at the point where charge is under SCLK2, delay by a small amount then //let SW RIP - CHARGE_UNDER_SCK2: + CHARGE_UNDER_SCK2 + 100: SET SW TO INV_HIGH; CHARGE_UNDER_SCK3+SW_settleT: SET SW TO INV_LOW; //at this point the charge has plopped over the OG and is in the node. //should readout here + #endif } #define PCLK_NOREAD_DELAY @@ -261,7 +313,10 @@ WAVEFORM ParallelForwardSectionASegment3 //definitions for serial total deferred charge measurement - +WAVEFORM Wait10us +{ + 1000: SET NOP TO HIGH; +} //readout only clocking the E register (we have stored bright edge in the F for this one) WAVEFORM ReadPixelsEOnly @@ -285,7 +340,6 @@ WAVEFORM ReadPixelsEOnly .+SW_settleT: SET SW TO INV_LOW; - CDS_RESET_BEGIN + //now we're in the CDS signal period begin triangular shuffling serials again @@ -359,9 +413,9 @@ WAVEFORM SerialEBackwards WAVEFORM BounceTGTest { - 0: SET TG to _TG_CLOCK_HIGH,FAST; - .+100: SET TG to _TG_CLOCK_LOW, FAST; - .+500: SET NOP to HIGH; + 0: SET TG to _TG_CLOCK_HIGH,SLOW; + .+500: SET TG to _TG_CLOCK_LOW, FAST; + .+200: SET NOP to HIGH; 0: SET PIXEL TO HIGH; .+1: SET PIXEL TO LOW; SET FRAME TO LOW; diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index d6b0559..66a136b 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -103,18 +103,19 @@ #define PCLK_slow P_TRI_SLEW_RATE -#define PCLK_fast 20 //nominal value for now +#define PCLK_fast 50 //nominal value for now //NOTE: waveforms currently use serial "slow" slew rate for triangular waveform // serial "FAST" is for immediate changes (like e.g. resetting serial register) -#define SCLK_fast 20 +#define SCLK_fast 100 #define SCLK_slow S_TRI_SLEW_RATE //nominal value for now //transfer gate uses only one slew rate -#define TG_fast 20 -#define TG_slow 10 +#define TG_fast 100 +#define TG_slow 12 -#define NOISETEST 1 -#define CLAMPTEST 0 +#define NOISETEST 0 +#define CLAMPTEST 0 +#define RESETTEST 0 From d4e883ba0bb7cb76196b417a47fb41bf7cf7e191 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 25 Mar 2025 11:25:34 -0700 Subject: [PATCH 096/194] intermittently working DEIIMOS clocking --- src/deimos/deimos.def | 14 +++++++++----- src/deimos/deimos.seq | 11 +++++------ src/deimos/deimos.signals | 11 +++++++++++ src/deimos/deimos.waveform | 37 ++++++++++++++++--------------------- 4 files changed, 41 insertions(+), 32 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index c6bf820..3f362b0 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -53,7 +53,11 @@ #define _SECTION_B_ROWS 2048 #define _IMAGECOLS 2048 -#define _AMPCOLS #eval _IMAGECOLS / 2 + +//NOTE: read out all through one amp test +#define _AMPCOLS _IMAGECOLS + +//#define _AMPCOLS #eval _IMAGECOLS / 2 #define _IMAGEROWS #eval _SECTION_A_ROWS + _SECTION_B_ROWS @@ -94,10 +98,10 @@ #else //pixel timing should be set up such that pixel trigger only happens when RG comes down, so we start at 0 -#define _FIRST_RESET_SAMPLE 500 -#define _LAST_RESET_SAMPLE 600 -#define _FIRST_VIDEO_SAMPLE 800 -#define _LAST_VIDEO_SAMPLE 900 +#define _FIRST_RESET_SAMPLE 130 +#define _LAST_RESET_SAMPLE 160 +#define _FIRST_VIDEO_SAMPLE 200 +#define _LAST_VIDEO_SAMPLE 260 #endif diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 8569908..fd616bc 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -21,10 +21,10 @@ param readout_enable = 1 //will be pulled externally when we want a frame param integrate_enable = 0 // to be set externally if we want an integration time -param integrate_ms = 0 // will be set externally to choose integration ms +param integrate_ms = 50 // will be set externally to choose integration ms param integrate_s = 0 // will be set externally to choose integration seconds -param framecount = 100 //will be set +param framecount = 1 //will be set param abortintegrate = 0 //checked by the integration waiters and they bail out if it is set param firsttimesetup = 1 @@ -146,8 +146,7 @@ SEQUENCE FrameReadout SEQUENCE Wait1s { if abortintegrate abortintegration(); Wait1ms(1000); - RETURN; -} + RETURN;} SEQUENCE abortintegration { TearDownIntegration(); @@ -170,7 +169,7 @@ SEQUENCE LineReadout ReadPixels(PIXELS_PER_SEG); ReadPixels(PIXELS_PER_SEG); //if there are leftover pixels, do them here - #if PIXELS_PER_SEG %3 + #if REMAINDER_PIX ReadPixels(REMAINDER_PIX); #endif @@ -188,7 +187,7 @@ SEQUENCE LineReadoutAOnly ParallelForwardSectionASegment3(); ReadPixels(PIXELS_PER_SEG); - #if _AMPCOLS %3 + #if REMAINDER_PIX ReadPixels(REMAINDER_PIX); #endif RETURN ; diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index a0e0303..330bb88 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -80,8 +80,19 @@ /**** Readout Method ****/ /* Science Serials */ + +//ALL read out through F section +#define SCI_SCLK1 [SCLK_E1, SCLK_F2] +#define SCI_SCLK2 [SCLK_E2, SCLK_F1] + +#if 0 + #define SCI_SCLK1 [SCLK_E2, SCLK_F2] #define SCI_SCLK2 [SCLK_E1, SCLK_F1] + +#endif + + #define SCI_SCLK3 SCLK_EF /* Reset Gate Combine */ #define RG [RG_1, RG_2] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 833ea1c..6366ceb 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -92,7 +92,6 @@ WAVEFORM FirstTimeSetup { SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; SET TG TO _TG_CLOCK_LOW, FAST; - .+PAR_SLEW_TIME_TICKS: SET NOP TO HIGH; } @@ -156,8 +155,6 @@ WAVEFORM ParallelForwardNoCoincident .+200: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; .+200: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; - - //serial receive side 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; @@ -165,18 +162,18 @@ WAVEFORM ParallelForwardNoCoincident SET RG to INV_HIGH; TG_GOES_LOW+20:=RG_GOES_LOW + SET NOP TO HIGH; + .+200: SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; SET RG TO INV_LOW; .+50: SET AC_Clamp TO HIGH; - RG_GOES_LOW+20: - SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + .+80: SET AC_Clamp TO LOW; - } @@ -215,22 +212,20 @@ WAVEFORM ReadPixels //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - PIX_BEGIN+RG_settleT:=RESET_OFF SET RG to INV_LOW; - - - //charge STARTS UNDER RPhi3 + .+50: SET RG TO INV_LOW; + //charge STARTS UNDER RPhi2 //conventional serial clock - 0: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - .+50: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - .+50: SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; - SET SW TO INV_HIGH; - - .+400: SET SW TO INV_LOW; - .+400: SET NOP TO HIGH; + 0: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + .+30: + SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + .+30: SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + SET SW TO INV_HIGH; + .+100: SET SW TO INV_LOW; + .+100: SET NOP TO HIGH; From 0d17d26b1b0b7c0bf37348c31e81ee8b61074d09 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 27 Mar 2025 10:13:45 -0700 Subject: [PATCH 097/194] add modulate RD test --- src/deimos/deimos.seq | 11 +++++++++++ src/deimos/deimos.signals | 7 +++++++ src/deimos/deimos.waveform | 36 ++++++++++++++++++++++++++++++++++++ 3 files changed, 54 insertions(+) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index fd616bc..a7a2b7d 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -84,6 +84,17 @@ SEQUENCE ClampTest #endif +SEQUENCE TestBrokenReadout +{ + OutputTestSetup(); + PulseTGA(); + + VRDModulate(); + + GOTO TestBrokenReadout(); +} + + SEQUENCE StartSeq { diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 330bb88..0019d70 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -78,6 +78,13 @@ /**** Bias Voltage Definitions ****/ + + +#define VRD_E 9 : 5 +#define VRD_F 9 : 6 + +#define VRD [VRD_E, VRD_F] + /**** Readout Method ****/ /* Science Serials */ diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 6366ceb..9d6159d 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -200,6 +200,42 @@ WAVEFORM ParallelForwardSegment3 SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, SLOW; } +WAVEFORM OutputTestSetup +{ + 0: SET RG TO INV_HIGH; + SET VRD TO 14.0; + SET TG TO _TG_CLOCK_LOW, FAST; + .+25us: SET NOP TO HIGH; + +} + +WAVEFORM PulseTGA +{ + 0: SET TG TO _TG_CLOCK_HIGH,FAST; + .+25us: SET TG TO _TG_CLOCK_LOW,FAST; + .+25us: SET NOP TO HIGH; +} + + + + +WAVEFORM VRDModulate +{ + 0: SET VRD TO 14.0; + .+10ms: SET VRD TO 14.5; + .+10ms: SET VRD TO 15.0; + .+10ms: SET VRD TO 15.5; + .+10ms: SET VRD TO 16.0; + .+10ms: SET VRD TO 16.5; + .+10ms: SET VRD TO 17.0; + .+10ms: SET VRD TO 16.5; + .+10ms: SET VRD TO 16.0; + .+10ms: SET VRD TO 15.5; + .+10ms: SET VRD TO 15.0; + .+10ms: SET VRD TO 14.5; + +} + WAVEFORM ReadPixels { From 56923d5fd126437229b24c60c83e9711e325b980 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 27 Mar 2025 13:56:32 -0700 Subject: [PATCH 098/194] tests for broken output sense node investigation --- src/deimos/deimos.mod | 4 +- src/deimos/deimos.seq | 4 +- src/deimos/deimos.waveform | 87 ++++++++++++++++++++++++++++---------- 3 files changed, 69 insertions(+), 26 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index d4f1c04..93af0d2 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -82,7 +82,7 @@ SLOT 4 xvbias { /* 4 : Reset Gate Low */ /* 5 : Back Substrate to -100V */ -SLOT 9 hvbias { +SLOT 9 hvxbias { HVLC 1 [0.00,0]; HVLC 2 [20.0,1] "SCI Guard Drain"; HVLC 3 [0.00,0]; @@ -115,7 +115,7 @@ SLOT 9 hvbias { HVHC 6 [29.0,0.0,0,0]; } -SLOT 10 lvbias { +SLOT 10 lvxbias { LVLC 1 [00.0,0]; LVLC 2 [00.0,0]; LVLC 3 [3.00,4] "SCI E Output Gate"; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index a7a2b7d..4a82f04 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -83,7 +83,7 @@ SEQUENCE ClampTest #endif - +#if 0 SEQUENCE TestBrokenReadout { OutputTestSetup(); @@ -93,7 +93,7 @@ SEQUENCE TestBrokenReadout GOTO TestBrokenReadout(); } - +#endif diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 9d6159d..1bf7973 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -144,12 +144,13 @@ WAVEFORM ParallelForwardNoCoincident { 0: SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; SET TG TO _TG_CLOCK_HIGH, FAST; + SET SW TO LOW; SET LINE TO HIGH; - .+200: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; + .+100: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; - .+200: SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; - .+200:=TG_GOES_LOW SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; + .+100: SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; + .+100:=TG_GOES_LOW SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; SET TG TO _TG_CLOCK_LOW, FAST; .+200: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; @@ -163,11 +164,11 @@ WAVEFORM ParallelForwardNoCoincident TG_GOES_LOW+20:=RG_GOES_LOW SET NOP TO HIGH; + SET RG TO INV_LOW; .+200: - SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; - SET RG TO INV_LOW; .+50: SET AC_Clamp TO HIGH; @@ -203,37 +204,79 @@ WAVEFORM ParallelForwardSegment3 WAVEFORM OutputTestSetup { 0: SET RG TO INV_HIGH; - SET VRD TO 14.0; + SET VRD_F TO 17.0; + SET SW TO INV_HIGH; + .+10ms: SET NOP TO HIGH; SET TG TO _TG_CLOCK_LOW, FAST; - .+25us: SET NOP TO HIGH; + .+10ms: SET NOP TO HIGH; + SET SCI_SCLK1 TO _SER_CLOCK_LOW,FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + + SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; + SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; + SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; } WAVEFORM PulseTGA { 0: SET TG TO _TG_CLOCK_HIGH,FAST; .+25us: SET TG TO _TG_CLOCK_LOW,FAST; - .+25us: SET NOP TO HIGH; + .+25us: SET RG TO INV_LOW; } + WAVEFORM VRDModulate { - 0: SET VRD TO 14.0; - .+10ms: SET VRD TO 14.5; - .+10ms: SET VRD TO 15.0; - .+10ms: SET VRD TO 15.5; - .+10ms: SET VRD TO 16.0; - .+10ms: SET VRD TO 16.5; - .+10ms: SET VRD TO 17.0; - .+10ms: SET VRD TO 16.5; - .+10ms: SET VRD TO 16.0; - .+10ms: SET VRD TO 15.5; - .+10ms: SET VRD TO 15.0; - .+10ms: SET VRD TO 14.5; - + 0: SET VRD_F TO 14.0; + .+10ms: SET RG TO INV_HIGH; + .+1us: SET RG TO INV_LOW; + .+1us: SET VRD_F TO 14.5; + + .+10ms: SET RG TO INV_HIGH; + .+1us: SET RG TO INV_LOW; + .+1us: SET VRD_F TO 15.0; + + .+10ms: SET RG TO INV_HIGH; + .+1us: SET RG TO INV_LOW; + .+1us: SET VRD_F TO 15.5; + + .+10ms: SET RG TO INV_HIGH; + .+1us: SET RG TO INV_LOW; + .+1us: SET VRD_F TO 16.0; + + .+10ms: SET RG TO INV_HIGH; + .+1us: SET RG TO INV_LOW; + .+1us: SET VRD_F TO 16.5; + + .+10ms: SET RG TO INV_HIGH; + .+1us: SET RG TO INV_LOW; + .+1us: SET VRD_F TO 17.0; + + .+10ms: SET RG TO INV_HIGH; + .+1us: SET RG TO INV_LOW; + .+1us: SET VRD_F TO 16.5; + + .+10ms: SET RG TO INV_HIGH; + .+1us: SET RG TO INV_LOW; + .+1us: SET VRD_F TO 16.0; + + .+10ms: SET RG TO INV_HIGH; + .+1us: SET RG TO INV_LOW; + .+1us: SET VRD_F TO 15.5; + + .+10ms: SET RG TO INV_HIGH; + .+1us: SET RG TO INV_LOW; + .+1us: SET VRD_F TO 15.0; + + .+10ms: SET RG TO INV_HIGH; + .+1us: SET RG TO INV_LOW; + .+1us: SET VRD_F TO 14.5; + } From fab9709ba0b587c446f97f670a736501eb6032a7 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 27 Mar 2025 17:54:21 -0700 Subject: [PATCH 099/194] 2nd working image attempt --- src/deimos/deimos.waveform | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 1bf7973..05e3f8f 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -82,8 +82,8 @@ WAVEFORM KeepThisFrame { WAVEFORM FirstTimeSetup { 0: - SET SCI_PCLK3 TO LOW, FAST; - SET SCI_PCLK1 TO LOW, FAST; + SET SCI_PCLK3 TO HIGH, FAST; + SET SCI_PCLK1 TO HIGH, FAST; SET SCI_PCLK2 TO HIGH, FAST; SET AC_Clamp TO LOW; SET SW TO 1; @@ -93,10 +93,14 @@ WAVEFORM FirstTimeSetup { SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; SET TG TO _TG_CLOCK_LOW, FAST; .+PAR_SLEW_TIME_TICKS: SET NOP TO HIGH; + SET SCI_PCLK3 TO LOW, FAST; } WAVEFORM SetupIntegration { + 0: SET SCI_PCLK3 TO LOW, FAST; + SET SCI_PCLK1 TO HIGH, FAST; + SET SCI_PCLK2 TO HIGH, FAST; SET SHUTTER TO OPEN; } @@ -166,8 +170,8 @@ WAVEFORM ParallelForwardNoCoincident SET NOP TO HIGH; SET RG TO INV_LOW; .+200: - SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; .+50: SET AC_Clamp TO HIGH; @@ -228,7 +232,7 @@ WAVEFORM PulseTGA - +#if 0 WAVEFORM VRDModulate { @@ -278,7 +282,7 @@ WAVEFORM VRDModulate .+1us: SET VRD_F TO 14.5; } - +#endif WAVEFORM ReadPixels { From 41f25dbb5478a033f53ca54f6d95cf833a4656b8 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 2 Apr 2025 13:58:02 -0700 Subject: [PATCH 100/194] working flush sequence for DEIMOS eng grade detector... --- src/deimos/deimos.def | 4 +- src/deimos/deimos.mod | 12 ++-- src/deimos/deimos.seq | 22 +++++-- src/deimos/deimos.signals | 8 --- src/deimos/deimos.waveform | 80 +++++++++++++++++--------- src/deimos/voltage_timing_parameters.h | 14 ++--- 6 files changed, 85 insertions(+), 55 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 3f362b0..c8fb860 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -55,9 +55,9 @@ #define _IMAGECOLS 2048 //NOTE: read out all through one amp test -#define _AMPCOLS _IMAGECOLS +//#define _AMPCOLS _IMAGECOLS -//#define _AMPCOLS #eval _IMAGECOLS / 2 +#define _AMPCOLS #eval _IMAGECOLS / 2 #define _IMAGEROWS #eval _SECTION_A_ROWS + _SECTION_B_ROWS diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 93af0d2..bceed23 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -82,7 +82,7 @@ SLOT 4 xvbias { /* 4 : Reset Gate Low */ /* 5 : Back Substrate to -100V */ -SLOT 9 hvxbias { +SLOT 9 hvbias { HVLC 1 [0.00,0]; HVLC 2 [20.0,1] "SCI Guard Drain"; HVLC 3 [0.00,0]; @@ -107,21 +107,21 @@ SLOT 9 hvxbias { HVLC 22 [0.00,0]; HVLC 23 [0.00,0]; HVLC 24 [0.00,0]; - HVHC 1 [29.0,2.0,3,1] "SCI E Output Drain"; //This one draws low current, not sure why yet - HVHC 2 [29.0,7.0,3,1] "SCI F Output Drain"; + HVHC 1 [29.0,10.0,3,1] "SCI E Output Drain"; + HVHC 2 [29.0,10.0,3,1] "SCI F Output Drain"; HVHC 3 [29.0,0.0,0,0]; HVHC 4 [29.0,0.0,0,0]; HVHC 5 [29.0,0.0,0,0]; HVHC 6 [29.0,0.0,0,0]; } -SLOT 10 lvxbias { +SLOT 10 lvbias { LVLC 1 [00.0,0]; LVLC 2 [00.0,0]; LVLC 3 [3.00,4] "SCI E Output Gate"; LVLC 4 [3.00,4] "SCI F Output Gate"; - LVLC 5 [1.00,0] "SCI Summing Well - Low"; // NB goes through a line driver - LVLC 6 [11.50,0] "SCI Summing Well - High"; // NB goes through a line driver + LVLC 5 [0.0,0] "SCI Summing Well - Low"; // NB goes through a line driver + LVLC 6 [13.0,0] "SCI Summing Well - High"; // NB goes through a line driver LVLC 7 [5.00,0] "SCI Reset Gate - Low"; // NB goes through a line driver LVLC 8 [11.5,0] "SCI Reset Gate - High"; // NB goes through a line driver LVLC 9 [00.0,0]; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 4a82f04..9d37ae3 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -18,16 +18,16 @@ /** System Control Triggers **/ -param readout_enable = 1 //will be pulled externally when we want a frame +param readout_enable = 0 //will be pulled externally when we want a frame param integrate_enable = 0 // to be set externally if we want an integration time param integrate_ms = 50 // will be set externally to choose integration ms param integrate_s = 0 // will be set externally to choose integration seconds -param framecount = 1 //will be set +param framecount = 1000 //will be set param abortintegrate = 0 //checked by the integration waiters and they bail out if it is set -param firsttimesetup = 1 +param flush = 1 #if NOISETEST @@ -98,8 +98,8 @@ SEQUENCE TestBrokenReadout SEQUENCE StartSeq { - if firsttimesetup FirstTimeSetup(); - firsttimesetup--; + + if flush Flush(); if integrate_enable CheckIntegrate(); if readout_enable CheckReadout(); @@ -107,6 +107,16 @@ SEQUENCE StartSeq { GOTO StartSeq(); } +SEQUENCE Flush +{ + FlushSetup(); + Wait1ms(20); + FlushTearDown(); + RETURN Flush; +} + + + SEQUENCE CheckIntegrate { if framecount Integrate(); @@ -148,6 +158,8 @@ SEQUENCE FrameReadout LineReadout(_IMAGEROWS); //and the desired overscan LineReadout(_PARALLELOVERSCAN); + + ReadoutEnd(); RETURN; } diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 0019d70..faa703c 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -88,18 +88,10 @@ /**** Readout Method ****/ /* Science Serials */ -//ALL read out through F section -#define SCI_SCLK1 [SCLK_E1, SCLK_F2] -#define SCI_SCLK2 [SCLK_E2, SCLK_F1] - -#if 0 #define SCI_SCLK1 [SCLK_E2, SCLK_F2] #define SCI_SCLK2 [SCLK_E1, SCLK_F1] -#endif - - #define SCI_SCLK3 SCLK_EF /* Reset Gate Combine */ #define RG [RG_1, RG_2] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 05e3f8f..4c9ba42 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -79,28 +79,44 @@ WAVEFORM KeepThisFrame { #define PAR_SLEW_TIME_TICKS #eval PAR_SLEW_TIME_US * 100 #define SER_SLEW_TIME_TICKS #eval SER_SLEW_TIME_US * 100 +#define _PAR_CLOCK_FLUSH -10.0 +#define _SER_CLOCK_FLUSH -10.0 + +WAVEFORM FlushSetup { + 0: + SET NOP TO HIGH; + SET SCI_PCLK3 TO _PAR_CLOCK_FLUSH, FAST; + SET SCI_PCLK2 TO _PAR_CLOCK_FLUSH, FAST; + SET SCI_PCLK1 TO _PAR_CLOCK_FLUSH, FAST; + + // SET TG TO _TG_CLOCK_HIGH, FAST; + //SET AC_Clamp TO LOW; + // SET SW TO 0; + //SET RG TO 0; + // SET SCI_SCLK1 TO _SER_CLOCK_FLUSH, FAST; + //SET SCI_SCLK2 TO _SER_CLOCK_FLUSH, FAST; + //SET SCI_SCLK3 TO _SER_CLOCK_FLUSH, FAST; + +} + +WAVEFORM FlushTearDown { + 0: SET NOP TO HIGH; + SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; + SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; + SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; + + // SET TG TO _TG_CLOCK_LOW, FAST; + + //SET SW TO 1; + //SET RG TO 1; -WAVEFORM FirstTimeSetup { - 0: - SET SCI_PCLK3 TO HIGH, FAST; - SET SCI_PCLK1 TO HIGH, FAST; - SET SCI_PCLK2 TO HIGH, FAST; - SET AC_Clamp TO LOW; - SET SW TO 1; - SET RG TO 1; - SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - SET TG TO _TG_CLOCK_LOW, FAST; - .+PAR_SLEW_TIME_TICKS: SET NOP TO HIGH; - SET SCI_PCLK3 TO LOW, FAST; } + + WAVEFORM SetupIntegration { - 0: SET SCI_PCLK3 TO LOW, FAST; - SET SCI_PCLK1 TO HIGH, FAST; - SET SCI_PCLK2 TO HIGH, FAST; + 0: SET SHUTTER TO OPEN; } @@ -111,6 +127,13 @@ WAVEFORM TearDownIntegration { WAVEFORM ReadoutBegin { SET LINE TO HIGH; + SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; +} + +WAVEFORM ReadoutEnd +{ + SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; + SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; } @@ -148,17 +171,17 @@ WAVEFORM ParallelForwardNoCoincident { 0: SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; SET TG TO _TG_CLOCK_HIGH, FAST; - SET SW TO LOW; + SET SW TO INV_LOW; SET LINE TO HIGH; - .+100: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; + .+1000: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; - .+100: SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; - .+100:=TG_GOES_LOW SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; + .+1000: SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; + .+1000:=TG_GOES_LOW SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; SET TG TO _TG_CLOCK_LOW, FAST; - .+200: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; - .+200: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; + .+1000: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; + .+1000: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; //serial receive side 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; @@ -169,15 +192,18 @@ WAVEFORM ParallelForwardNoCoincident TG_GOES_LOW+20:=RG_GOES_LOW SET NOP TO HIGH; SET RG TO INV_LOW; - .+200: + .+300: SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; .+50: SET AC_Clamp TO HIGH; + .+50: SET AC_Clamp TO LOW; - .+80: SET AC_Clamp TO LOW; + .+50: + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; } diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 66a136b..d3b25bf 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -4,20 +4,20 @@ * evaluations relative to FSS should be implemented if variability is required /*/ -#define _PAR_CLOCK_HIGH 11.0 /* [ 8.00, 14.0] */ -#define _PAR_CLOCK_LOW 0 /* [-0.50, 0.50] */ +#define _PAR_CLOCK_HIGH 10.0 /* [ 8.00, 14.0] */ +#define _PAR_CLOCK_LOW 0.0 /* [-0.50, 0.50] */ -#define _TG_CLOCK_HIGH 12.0 /* [ 8.00, 14.0] */ -#define _TG_CLOCK_LOW 0 /* [-0.50, 0.50] */ +#define _TG_CLOCK_HIGH 10.0 /* [ 8.00, 14.0] */ +#define _TG_CLOCK_LOW 0.0 /* [-0.50, 0.50] */ -#define _SER_CLOCK_HIGH 10.0 /* [ 8.00, 14.0] */ -#define _SER_CLOCK_LOW 1 /* [-0.50, 1.50] */ +#define _SER_CLOCK_HIGH 11.0 /* [ 8.00, 14.0] */ +#define _SER_CLOCK_LOW 1.0 /* [-0.50, 1.50] */ #define _SER_CLOCK_RCV 13.0 /* Higher than serial clock high */ #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ -#define _RG_LOW 0.0 /* [-0.5, 1.0] */ +#define _RG_LOW 5.0 /* [-0.5, 1.0] */ #define _RG_HIGH 12.0 /* [8.0, 14.0] */ #define _SW_LOW #eval _SER_CLOCK_LOW /* [-0.5, 1.0] */ From 1e44ab263c96ca0cbb34cfd5862232339fd3e799 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 7 Apr 2025 10:55:04 -0700 Subject: [PATCH 101/194] tests to try and get imaging Signed-off-by: Dan Weatherill --- src/deimos/deimos.cds | 2 +- src/deimos/deimos.def | 2 +- src/deimos/deimos.mod | 12 +-- src/deimos/deimos.seq | 18 ++-- src/deimos/deimos.signals | 11 ++- src/deimos/deimos.waveform | 110 ++++++++++++++++++------- src/deimos/voltage_timing_parameters.h | 30 ++++--- 7 files changed, 129 insertions(+), 56 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 9a127bf..132b8a4 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -10,7 +10,7 @@ BIGBUF = _ARCHON_FRAMEBUFS LINECOUNT = _LINENUM PIXELCOUNT = _AMPREADCOLS RAWENABLE = _RAW_ENABLE -RAWENDLINE = 200 +RAWENDLINE = 800 RAWSAMPLES = 5000 //RAWSEL = _RAW_SELECT RAWSEL = 47 diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index c8fb860..1d57967 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -67,7 +67,7 @@ #define _PARALLELOVERSCAN 20 #define _AMPREADCOLS #eval (_AMPCOLS + _SERIALPRESCAN + _SERIALOVERSCAN) -#define _LINENUM #eval (_IMAGEROWS + _PARALLELOVERSCAN) +#define _LINENUM #eval (_IMAGEROWS + _PARALLELOVERSCAN) + 1 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index bceed23..befabfb 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -87,8 +87,8 @@ SLOT 9 hvbias { HVLC 2 [20.0,1] "SCI Guard Drain"; HVLC 3 [0.00,0]; HVLC 4 [0.00,0]; - HVLC 5 [17.0,2] "SCI E Reset Drain"; - HVLC 6 [17.0,2] "SCI F Reset Drain"; + HVLC 5 [17.0,1] "SCI E Reset Drain"; + HVLC 6 [17.0,1] "SCI F Reset Drain"; HVLC 7 [0.00,0]; HVLC 8 [0.00,0]; HVLC 9 [0.00,0]; @@ -118,10 +118,10 @@ SLOT 9 hvbias { SLOT 10 lvbias { LVLC 1 [00.0,0]; LVLC 2 [00.0,0]; - LVLC 3 [3.00,4] "SCI E Output Gate"; - LVLC 4 [3.00,4] "SCI F Output Gate"; - LVLC 5 [0.0,0] "SCI Summing Well - Low"; // NB goes through a line driver - LVLC 6 [13.0,0] "SCI Summing Well - High"; // NB goes through a line driver + LVLC 3 [0.00,4] "SCI E Output Gate"; + LVLC 4 [0.00,4] "SCI F Output Gate"; + LVLC 5 [_SW_LOW,0] "SCI Summing Well - Low"; // NB goes through a line driver + LVLC 6 [_SW_HIGH,0] "SCI Summing Well - High"; // NB goes through a line driver LVLC 7 [5.00,0] "SCI Reset Gate - Low"; // NB goes through a line driver LVLC 8 [11.5,0] "SCI Reset Gate - High"; // NB goes through a line driver LVLC 9 [00.0,0]; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 9d37ae3..371ebe5 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -98,8 +98,8 @@ SEQUENCE TestBrokenReadout SEQUENCE StartSeq { - - if flush Flush(); + InitialSetup(); + if flush Flush(); if integrate_enable CheckIntegrate(); if readout_enable CheckReadout(); @@ -110,8 +110,9 @@ SEQUENCE StartSeq { SEQUENCE Flush { FlushSetup(); - Wait1ms(20); + Wait1s(); FlushTearDown(); + Wait1ms(10); RETURN Flush; } @@ -151,7 +152,10 @@ SEQUENCE CheckReadout SEQUENCE FrameReadout { + + //Readout begin does half a llel transfer, so wait while that settles doewn ReadoutBegin(); + Wait1us(50); //single serial read to flush the register ReadPixels(_AMPREADCOLS); //read all image rows @@ -179,15 +183,17 @@ SEQUENCE abortintegration { SEQUENCE LineReadout { - // TransferToSerialRegisterBegin(); //TransferToSerialRegisterEnd(); //ParallelForwardSegment1(); // ParallelForwardSegment2(); //Wait10us(); //ParallelForwardSegment3(); - ParallelForwardNoCoincident(); + + RegisterFlush(); + ParallelForwardNoCoincident(); + ReadPixels(PIXELS_PER_SEG); ReadPixels(PIXELS_PER_SEG); ReadPixels(PIXELS_PER_SEG); @@ -196,6 +202,8 @@ SEQUENCE LineReadout ReadPixels(REMAINDER_PIX); #endif + + Wait1us(50); RETURN; } diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index faa703c..05c3b1b 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -100,9 +100,14 @@ #define SW [SW_1, SW_2] /* Science Parallels */ -#define SCI_PCLK1 [PCLK_A1_1, PCLK_A1_2, PCLK_B1_1, PCLK_B1_2] -#define SCI_PCLK2 [PCLK_A2_1, PCLK_A2_2, PCLK_B2_1, PCLK_B2_2] -#define SCI_PCLK3 [PCLK_A3_1, PCLK_A3_2, PCLK_B3_1, PCLK_B3_2] + #define SCI_PCLK1 [PCLK_A1_1, PCLK_A1_2, PCLK_B1_1, PCLK_B1_2] + #define SCI_PCLK2 [PCLK_A2_1, PCLK_A2_2, PCLK_B2_1, PCLK_B2_2] + #define SCI_PCLK3 [PCLK_A3_1, PCLK_A3_2, PCLK_B3_1, PCLK_B3_2] +// #define SCI_PCLK1 [PCLK_A1_1, PCLK_A1_2] +// #define SCI_PCLK2 [PCLK_A2_1, PCLK_A2_2] +// #define SCI_PCLK3 [PCLK_A3_1, PCLK_A3_2] + + /* Science parallels section A */ diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 4c9ba42..e9a1f06 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -79,23 +79,67 @@ WAVEFORM KeepThisFrame { #define PAR_SLEW_TIME_TICKS #eval PAR_SLEW_TIME_US * 100 #define SER_SLEW_TIME_TICKS #eval SER_SLEW_TIME_US * 100 +#define _PAR_CLOCK_FLUSH_LOW -3.5 +#define _PAR_CLOCK_FLUSH_HIGH 7.5 #define _PAR_CLOCK_FLUSH -10.0 + #define _SER_CLOCK_FLUSH -10.0 +WAVEFORM LineFlush { + 0: SET SCI_PCLK1 TO _PAR_CLOCK_FLUSH_HIGH, FAST; + SET SCI_PCLK2 TO _PAR_CLOCK_FLUSH_HIGH, FAST; + SET SCI_PCLK3 TO _PAR_CLOCK_FLUSH_LOW, FAST; + .+1000: SET NOP TO HIGH; +} + + +WAVEFORM RegisterFlush { + 0: SET SCI_SCLK1 TO _SER_CLOCK_FLUSH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_FLUSH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_FLUSH, FAST; + .+1000: + SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; +} + + +WAVEFORM InitialSetup +{0 : + SET RG TO 1; + SET SW TO 1; + + SET AC_Clamp to HIGH; + + .+1000: + SET AC_Clamp to LOW; + + SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; + SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; + SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; + + .+10000: + SET NOP TO HIGH; + +} + + + + + WAVEFORM FlushSetup { 0: - SET NOP TO HIGH; SET SCI_PCLK3 TO _PAR_CLOCK_FLUSH, FAST; SET SCI_PCLK2 TO _PAR_CLOCK_FLUSH, FAST; SET SCI_PCLK1 TO _PAR_CLOCK_FLUSH, FAST; - // SET TG TO _TG_CLOCK_HIGH, FAST; + SET TG TO _TG_CLOCK_HIGH, FAST; //SET AC_Clamp TO LOW; - // SET SW TO 0; - //SET RG TO 0; - // SET SCI_SCLK1 TO _SER_CLOCK_FLUSH, FAST; - //SET SCI_SCLK2 TO _SER_CLOCK_FLUSH, FAST; - //SET SCI_SCLK3 TO _SER_CLOCK_FLUSH, FAST; + SET SW TO 0; + SET RG TO 0; + SET SCI_SCLK1 TO _SER_CLOCK_FLUSH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_FLUSH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_FLUSH, FAST; } @@ -105,10 +149,14 @@ WAVEFORM FlushTearDown { SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; - // SET TG TO _TG_CLOCK_LOW, FAST; + SET TG TO _TG_CLOCK_LOW, FAST; + + SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - //SET SW TO 1; - //SET RG TO 1; + SET SW TO 1; + SET RG TO 1; } @@ -169,13 +217,16 @@ WAVEFORM TransferToSerialRegisterEnd WAVEFORM ParallelForwardNoCoincident { - 0: SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; + 0: SET NOP TO HIGH; + .+1000:=PHASE3_HIGH + + SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; SET TG TO _TG_CLOCK_HIGH, FAST; + SET SW TO INV_LOW; SET LINE TO HIGH; .+1000: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; - .+1000: SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; .+1000:=TG_GOES_LOW SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; SET TG TO _TG_CLOCK_LOW, FAST; @@ -183,15 +234,20 @@ WAVEFORM ParallelForwardNoCoincident .+1000: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; .+1000: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; + + + //delay before starting SCLKs + .+1000: SET NOP TO HIGH; + + //serial receive side - 0: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; + PHASE3_HIGH: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; SET RG to INV_HIGH; - TG_GOES_LOW+20:=RG_GOES_LOW - SET NOP TO HIGH; - SET RG TO INV_LOW; + TG_GOES_LOW+200:=RG_GOES_LOW + SET RG TO INV_LOW; .+300: SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; @@ -201,9 +257,7 @@ WAVEFORM ParallelForwardNoCoincident .+50: SET AC_Clamp TO LOW; - .+50: - SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + } @@ -321,19 +375,19 @@ WAVEFORM ReadPixels //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - .+50: SET RG TO INV_LOW; + .+70: SET RG TO INV_LOW; //charge STARTS UNDER RPhi2 //conventional serial clock - 0: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + 0: SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + SET SW TO INV_HIGH; .+30: - SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - .+30: SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; - SET SW TO INV_HIGH; - .+100: SET SW TO INV_LOW; + SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + .+30: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + .+100: SET SW TO INV_LOW; .+100: SET NOP TO HIGH; diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index d3b25bf..dfa1dce 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -4,15 +4,15 @@ * evaluations relative to FSS should be implemented if variability is required /*/ -#define _PAR_CLOCK_HIGH 10.0 /* [ 8.00, 14.0] */ -#define _PAR_CLOCK_LOW 0.0 /* [-0.50, 0.50] */ +#define _PAR_CLOCK_HIGH 6.0 /* [ 8.00, 14.0] */ +#define _PAR_CLOCK_LOW -6.0 /* [-0.50, 0.50] */ -#define _TG_CLOCK_HIGH 10.0 /* [ 8.00, 14.0] */ -#define _TG_CLOCK_LOW 0.0 /* [-0.50, 0.50] */ +#define _TG_CLOCK_HIGH 6.5 /* [ 8.00, 14.0] */ +#define _TG_CLOCK_LOW -6.0 /* [-0.50, 0.50] */ -#define _SER_CLOCK_HIGH 11.0 /* [ 8.00, 14.0] */ -#define _SER_CLOCK_LOW 1.0 /* [-0.50, 1.50] */ -#define _SER_CLOCK_RCV 13.0 /* Higher than serial clock high */ +#define _SER_CLOCK_HIGH 7.0 /* [ 8.00, 14.0] */ +#define _SER_CLOCK_LOW -4.0 /* [-0.50, 1.50] */ +#define _SER_CLOCK_RCV 8.5 /* Higher than serial clock high */ #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ @@ -20,8 +20,8 @@ #define _RG_LOW 5.0 /* [-0.5, 1.0] */ #define _RG_HIGH 12.0 /* [8.0, 14.0] */ -#define _SW_LOW #eval _SER_CLOCK_LOW /* [-0.5, 1.0] */ -#define _SW_HIGH #eval _SER_CLOCK_HIGH /* [8.0, 14.0] */ +#defeval _SW_LOW _SER_CLOCK_LOW /* [-0.5, 1.0] */ +#defeval _SW_HIGH _SER_CLOCK_HIGH /* [8.0, 14.0] */ /** --------------------------------------------------------------------------- @@ -103,16 +103,22 @@ #define PCLK_slow P_TRI_SLEW_RATE -#define PCLK_fast 50 //nominal value for now + +//e2v says need on average 1.us rise time, for "normal" clocking calculate PCLK_fast that way + +#define PCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / 1.5" | bc) + + +//e2v says need on average 90ns rise time for a serial clock +#define SCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / 0.09" | bc) //NOTE: waveforms currently use serial "slow" slew rate for triangular waveform // serial "FAST" is for immediate changes (like e.g. resetting serial register) -#define SCLK_fast 100 #define SCLK_slow S_TRI_SLEW_RATE //nominal value for now //transfer gate uses only one slew rate -#define TG_fast 100 +#define TG_fast PCLK_fast #define TG_slow 12 From 4cc60bd6c0811d20068b575f5010288466548cf0 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 7 Apr 2025 12:40:36 -0700 Subject: [PATCH 102/194] working imaging! --- src/deimos/deimos.mod | 4 ++-- src/deimos/deimos.seq | 4 ++-- src/deimos/deimos.waveform | 8 ++++---- src/deimos/voltage_timing_parameters.h | 14 +++++++------- 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index befabfb..d2641b6 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -118,8 +118,8 @@ SLOT 9 hvbias { SLOT 10 lvbias { LVLC 1 [00.0,0]; LVLC 2 [00.0,0]; - LVLC 3 [0.00,4] "SCI E Output Gate"; - LVLC 4 [0.00,4] "SCI F Output Gate"; + LVLC 3 [3.00,4] "SCI E Output Gate"; + LVLC 4 [3.00,4] "SCI F Output Gate"; LVLC 5 [_SW_LOW,0] "SCI Summing Well - Low"; // NB goes through a line driver LVLC 6 [_SW_HIGH,0] "SCI Summing Well - High"; // NB goes through a line driver LVLC 7 [5.00,0] "SCI Reset Gate - Low"; // NB goes through a line driver diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 371ebe5..91be76c 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -99,7 +99,7 @@ SEQUENCE TestBrokenReadout SEQUENCE StartSeq { InitialSetup(); - if flush Flush(); + //if flush Flush(); if integrate_enable CheckIntegrate(); if readout_enable CheckReadout(); @@ -190,7 +190,7 @@ SEQUENCE LineReadout //Wait10us(); //ParallelForwardSegment3(); - RegisterFlush(); + //RegisterFlush(); ParallelForwardNoCoincident(); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index e9a1f06..e145cbe 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -81,9 +81,9 @@ WAVEFORM KeepThisFrame { #define _PAR_CLOCK_FLUSH_LOW -3.5 #define _PAR_CLOCK_FLUSH_HIGH 7.5 -#define _PAR_CLOCK_FLUSH -10.0 +#define _PAR_CLOCK_FLUSH 0.0 -#define _SER_CLOCK_FLUSH -10.0 +#define _SER_CLOCK_FLUSH 0.0 WAVEFORM LineFlush { 0: SET SCI_PCLK1 TO _PAR_CLOCK_FLUSH_HIGH, FAST; @@ -382,10 +382,10 @@ WAVEFORM ReadPixels 0: SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; SET SW TO INV_HIGH; - .+30: + .+40: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - .+30: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + .+40: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; .+100: SET SW TO INV_LOW; .+100: SET NOP TO HIGH; diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index dfa1dce..d7d219c 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -4,15 +4,15 @@ * evaluations relative to FSS should be implemented if variability is required /*/ -#define _PAR_CLOCK_HIGH 6.0 /* [ 8.00, 14.0] */ -#define _PAR_CLOCK_LOW -6.0 /* [-0.50, 0.50] */ +#define _PAR_CLOCK_HIGH 8.0 /* [ 8.00, 14.0] */ +#define _PAR_CLOCK_LOW 0.0 /* [-0.50, 0.50] */ -#define _TG_CLOCK_HIGH 6.5 /* [ 8.00, 14.0] */ -#define _TG_CLOCK_LOW -6.0 /* [-0.50, 0.50] */ +#define _TG_CLOCK_HIGH 8.5 /* [ 8.00, 14.0] */ +#define _TG_CLOCK_LOW 0.0 /* [-0.50, 0.50] */ -#define _SER_CLOCK_HIGH 7.0 /* [ 8.00, 14.0] */ -#define _SER_CLOCK_LOW -4.0 /* [-0.50, 1.50] */ -#define _SER_CLOCK_RCV 8.5 /* Higher than serial clock high */ +#define _SER_CLOCK_HIGH 9.0 /* [ 8.00, 14.0] */ +#define _SER_CLOCK_LOW 1.0 /* [-0.50, 1.50] */ +#define _SER_CLOCK_RCV 9.5 /* Higher than serial clock high */ #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ From 8a4301e26ffa8afba5347bf392f245298ff55b9e Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 8 Apr 2025 12:58:37 -0700 Subject: [PATCH 103/194] GM working standard clocking --- src/deimos/deimos.seq | 2 +- src/deimos/deimos.waveform | 54 ++++++++++---------------------------- 2 files changed, 15 insertions(+), 41 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 91be76c..6c53d8a 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -99,7 +99,7 @@ SEQUENCE TestBrokenReadout SEQUENCE StartSeq { InitialSetup(); - //if flush Flush(); + if flush Flush(); if integrate_enable CheckIntegrate(); if readout_enable CheckReadout(); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index e145cbe..19fecca 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -81,9 +81,9 @@ WAVEFORM KeepThisFrame { #define _PAR_CLOCK_FLUSH_LOW -3.5 #define _PAR_CLOCK_FLUSH_HIGH 7.5 -#define _PAR_CLOCK_FLUSH 0.0 +#define _PAR_CLOCK_FLUSH 10.0 -#define _SER_CLOCK_FLUSH 0.0 +#define _SER_CLOCK_FLUSH 10.0 WAVEFORM LineFlush { 0: SET SCI_PCLK1 TO _PAR_CLOCK_FLUSH_HIGH, FAST; @@ -106,8 +106,8 @@ WAVEFORM RegisterFlush { WAVEFORM InitialSetup {0 : - SET RG TO 1; - SET SW TO 1; + SET RG TO 0; + SET SW TO 0; SET AC_Clamp to HIGH; @@ -234,8 +234,6 @@ WAVEFORM ParallelForwardNoCoincident .+1000: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; .+1000: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; - - //delay before starting SCLKs .+1000: SET NOP TO HIGH; @@ -249,8 +247,8 @@ WAVEFORM ParallelForwardNoCoincident TG_GOES_LOW+200:=RG_GOES_LOW SET RG TO INV_LOW; .+300: - SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; .+50: SET AC_Clamp TO HIGH; @@ -379,42 +377,18 @@ WAVEFORM ReadPixels //charge STARTS UNDER RPhi2 //conventional serial clock - 0: SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + .+100: SET SW TO INV_HIGH; - .+40: - SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - .+40: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - .+100: SET SW TO INV_LOW; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + .+100: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET SW TO INV_LOW; .+100: SET NOP TO HIGH; - -#if 0 - //triangular serial clocks, running as they please - 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, SLOW; - SET SCI_SCLK1 TO _SER_CLOCK_LOW, SLOW; - .+SER_SLEW_TIME_TICKS:=CHARGE_UNDER_SCK2 - SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; - SET SCI_SCLK2 TO _SER_CLOCK_LOW, SLOW; - .+SER_SLEW_TIME_TICKS:=CHARGE_UNDER_SCK3 - SET SCI_SCLK1 TO _SER_CLOCK_HIGH, SLOW; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; - .+SER_SLEW_TIME_TICKS: - SET NOP TO HIGH; - - //at the point where charge is under SCLK2, delay by a small amount then - //let SW RIP - - CHARGE_UNDER_SCK2 + 100: - SET SW TO INV_HIGH; - CHARGE_UNDER_SCK3+SW_settleT: - SET SW TO INV_LOW; - //at this point the charge has plopped over the OG and is in the node. - //should readout here - #endif } #define PCLK_NOREAD_DELAY From b0580f511b792e5dcd05953a62b5fdebeac6440d Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 9 Apr 2025 11:18:08 -0700 Subject: [PATCH 104/194] coincident llel clocking now an option and seems to be working --- src/deimos/deimos.cds | 20 ++++++++-- src/deimos/deimos.def | 16 +------- src/deimos/deimos.seq | 53 +++++++++++++++++--------- src/deimos/deimos.waveform | 44 ++++++++++----------- src/deimos/voltage_timing_parameters.h | 4 +- 5 files changed, 77 insertions(+), 60 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 132b8a4..df9048e 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -17,10 +17,22 @@ RAWSEL = 47 RAWSTARTLINE = 0 RAWSTARTPIXEL = 48 SAMPLEMODE = 0 -SHP1 = _FIRST_RESET_SAMPLE -SHP2 = _LAST_RESET_SAMPLE -SHD1 = _FIRST_VIDEO_SAMPLE -SHD2 = _LAST_VIDEO_SAMPLE + +//attempt pixel timing coincident with the nearest ADM samples. That means multiples of 8 +//by eye, try 80 to start +// then it looks like 13 ADM samples, 80 + 13 *8 = 184 + + //signal is 13 ADM samples, starting from time 232 + //232 + 13 * 8 = 338 + + // last sample number must fit the series 8*n-1 + // first sample number must be in the series 8*n + + +SHP1 = 80 +SHP2 = 183 +SHD1 = 232 +SHD2 = 327 //ADM module installed in slot 7 #define SINGLE_DET_TEST 1 diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 1d57967..82fd66d 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -88,23 +88,9 @@ -#if NOISETEST +//attempt pixel timing coincident with the nearest ADM samples -#define _FIRST_RESET_SAMPLE 25 -#define _LAST_RESET_SAMPLE 75 -#define _FIRST_VIDEO_SAMPLE 125 -#define _LAST_VIDEO_SAMPLE 175 -#else - -//pixel timing should be set up such that pixel trigger only happens when RG comes down, so we start at 0 -#define _FIRST_RESET_SAMPLE 130 -#define _LAST_RESET_SAMPLE 160 -#define _FIRST_VIDEO_SAMPLE 200 -#define _LAST_VIDEO_SAMPLE 260 - - -#endif #define AC_CLAMP_ON_TIME 1000 diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 6c53d8a..1202b58 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -28,7 +28,10 @@ param framecount = 1000 //will be set param abortintegrate = 0 //checked by the integration waiters and they bail out if it is set param flush = 1 - + + + param llel_coincident = 1 //use coincident llel clocks + param llel_seq = 0 //use sequential llel clocks (must be not of llel_coincident) #if NOISETEST SEQUENCE NoiseTest { @@ -150,6 +153,8 @@ SEQUENCE CheckReadout #define REMAINDER_PIX #eval _AMPREADCOLS - (PIXELS_PER_SEG * 3) +#define TOTAL_ROWS #eval _IMAGEROWS + _PARALLELOVERSCAN + SEQUENCE FrameReadout { @@ -158,10 +163,12 @@ SEQUENCE FrameReadout Wait1us(50); //single serial read to flush the register ReadPixels(_AMPREADCOLS); - //read all image rows - LineReadout(_IMAGEROWS); - //and the desired overscan - LineReadout(_PARALLELOVERSCAN); + + + + //read all image rows and the desired overscan + IF llel_seq LineReadout(TOTAL_ROWS); + IF llel_coincident LineReadoutCoincident(TOTAL_ROWS); ReadoutEnd(); RETURN; @@ -182,18 +189,12 @@ SEQUENCE abortintegration { SEQUENCE LineReadout -{ - // TransferToSerialRegisterBegin(); - //TransferToSerialRegisterEnd(); - //ParallelForwardSegment1(); - // ParallelForwardSegment2(); - //Wait10us(); - //ParallelForwardSegment3(); - - //RegisterFlush(); - +{ ParallelForwardNoCoincident(); + //wait here is for the clamp to die down. Put some of it in prescan, but not all + Wait1us(50); + ReadPixels(PIXELS_PER_SEG); ReadPixels(PIXELS_PER_SEG); ReadPixels(PIXELS_PER_SEG); @@ -203,13 +204,31 @@ SEQUENCE LineReadout #endif - Wait1us(50); + Wait1us(10); RETURN; } +SEQUENCE LineReadoutCoincident +{ + //charge assumed must be under I2 at this point, set up in preamble + ParallelForwardSegment1(); + TransferToSerialRegisterCoincident(); + ReadPixels(PIXELS_PER_SEG); + ParallelForwardSegment2(); + ReadPixels(PIXELS_PER_SEG); + ParallelForwardSegment3(); + ReadPixels(PIXELS_PER_SEG) + #if REMAINDER_PIX + ReadPixels(REMAINDER_PIX); + #endif + + RETURN; +} + + SEQUENCE LineReadoutAOnly { - TransferToSerialRegisterBegin(); + TransferToSerialRegisterCoincident(); ReadPixels(_SERIALPRESCAN); ParallelForwardSectionASegment1(); ReadPixels(PIXELS_PER_SEG); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 19fecca..1a3f135 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -185,35 +185,33 @@ WAVEFORM ReadoutEnd } -WAVEFORM TransferToSerialRegisterBegin +WAVEFORM TransferToSerialRegisterCoincident { //set serials to receive charge 0:=BEGIN SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; SET RG TO INV_HIGH; - .+100:=TGUP SET TG TO _TG_CLOCK_HIGH, FAST; + SET TG TO _TG_CLOCK_HIGH, FAST; + SET LINE TO HIGH; + SET SW TO INV_LOW; //NOTE: don't think we want to clamp with reset gate activated + .+1000: SET RG TO INV_LOW; + SET TG TO _TG_CLOCK_LOW, FAST; //simultaneously, operate the AC clamp - .+100: + .+50: SET AC_Clamp to HIGH; + SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + .+50: + SET AC_Clamp to LOW; + } -WAVEFORM TransferToSerialRegisterEnd -{ - - 0:SET NOP TO HIGH; - - .+1000:=END_RECV SET TG TO _TG_CLOCK_LOW, FAST; - SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; - SET LINE TO HIGH; - END_RECV+AC_CLAMP_EXTRA_RECOVER: SET AC_Clamp TO LOW; -} - WAVEFORM ParallelForwardNoCoincident { @@ -246,12 +244,11 @@ WAVEFORM ParallelForwardNoCoincident TG_GOES_LOW+200:=RG_GOES_LOW SET RG TO INV_LOW; + .+50: SET AC_Clamp to HIGH; .+300: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - .+50: - SET AC_Clamp TO HIGH; .+50: SET AC_Clamp TO LOW; @@ -266,7 +263,7 @@ WAVEFORM ParallelForwardSegment1 { //NOTE: after integration, if done properly //all charge should be under SCI_PCLK2 - // the transfer to serial reg is done before this happens + // the transfer to serial reg is done after this happens 0: SET SCI_PCLK2 to _PAR_CLOCK_LOW, SLOW; SET SCI_PCLK3 to _PAR_CLOCK_HIGH, SLOW; } @@ -373,20 +370,23 @@ WAVEFORM ReadPixels //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - .+70: SET RG TO INV_LOW; + .+30: SET RG TO INV_LOW; //charge STARTS UNDER RPhi2 //conventional serial clock 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - .+100: + .+30: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; - .+100: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + .+150: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; SET SW TO INV_LOW; - .+100: SET NOP TO HIGH; + + //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL + //stay as groups of 8. + .+147: SET NOP TO HIGH; } diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index d7d219c..93db086 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -7,12 +7,12 @@ #define _PAR_CLOCK_HIGH 8.0 /* [ 8.00, 14.0] */ #define _PAR_CLOCK_LOW 0.0 /* [-0.50, 0.50] */ -#define _TG_CLOCK_HIGH 8.5 /* [ 8.00, 14.0] */ +#define _TG_CLOCK_HIGH 9.0 /* [ 8.00, 14.0] */ #define _TG_CLOCK_LOW 0.0 /* [-0.50, 0.50] */ #define _SER_CLOCK_HIGH 9.0 /* [ 8.00, 14.0] */ #define _SER_CLOCK_LOW 1.0 /* [-0.50, 1.50] */ -#define _SER_CLOCK_RCV 9.5 /* Higher than serial clock high */ +#define _SER_CLOCK_RCV 10.0 /* Higher than serial clock high */ #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ From adebce06cd71c59f5063fc2aae2292679961eb4f Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 23 May 2025 14:49:01 -0700 Subject: [PATCH 105/194] switch (mostly) to the new wdl CLI tool way of calling legacy drivers --- src/deimos/Makefile | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/src/deimos/Makefile b/src/deimos/Makefile index 1230731..6f24d87 100644 --- a/src/deimos/Makefile +++ b/src/deimos/Makefile @@ -46,19 +46,19 @@ # set to path to gpp GPP = /usr/bin/gpp # set to path to wdl code -WDLPATH = $(HOME)/wdl/wdl +WDLPATH = $(HOME)/Software/wdl/wdl # output for *.acf file ACFPATH = $(HOME)/wdlfiles/src/deimos/ -PLOT = False # True # show waveform plots by default, True | False +PLOT = # --plots # show waveform plots by default, True | False GFLAGS = +c "/*" "*/" +c "//" "\n" +c "\\\n" "" -x -SEQPARSER = $(WDLPATH)/seqParserDriver.py -INCPARSER = $(WDLPATH)/incParserDriver.py -WDLPARSER = $(WDLPATH)/wdlParserDriver.py -MODPARSER = $(WDLPATH)/modParserDriver.py -WAVGEN = $(WDLPATH)/wavgenDriver.py -MODEGEN = $(WDLPATH)/modegenDriver.py -I2A = $(WDLPATH)/ini2acf.pl +SEQPARSER = wdl --debug seq +INCPARSER = wdl --debug inc +WDLPARSER = wdl --debug wdl +MODPARSER = wdl --debug mod +WAVGEN = wdl --debug wavgen +MODEGEN = wdl --debug modegen +I2A = ${WDLPATH}/ini2acf.pl INCL = -I$(CURDIR) # Global variable to store the filename @@ -96,18 +96,18 @@ generate_wdl: @test -f $(FILE_NAME).conf || { echo "$(FILE_NAME).conf does not exist"; exit 1; } $(call debug_message, "Found configuration file: $(FILE_NAME).conf") - @echo "Making $(F_TMP).wdl from $(FILE_NAME).conf ..." - @cat $(FILE_NAME).conf | $(SEQPARSER) - | $(GPP) $(GFLAGS) $(INCL) | $(WDLPARSER) - > $(F_TMP).wdl + echo "Making $(F_TMP).wdl from $(FILE_NAME).conf ..." + cat $(FILE_NAME).conf | $(SEQPARSER) - | $(GPP) $(GFLAGS) $(INCL) | $(WDLPARSER) - > $(F_TMP).wdl $(call debug_message, "Created WDL file: $(F_TMP).wdl") - @echo "Making $(F_TMP).script and $(F_TMP).states from $(F_TMP).wdl ..." - @test -f $(MODFILE) || { echo "$(MODFILE) does not exist"; exit 1; } + echo "Making $(F_TMP).script and $(F_TMP).states from $(F_TMP).wdl ..." + test -f $(MODFILE) || { echo "$(MODFILE) does not exist"; exit 1; } $(call debug_message, "Found MODULE_FILE: $(MODFILE)") - @cat $(MODFILE) | $(GPP) $(GFLAGS) $(INCL) | $(MODPARSER) - + cat $(MODFILE) | $(GPP) $(GFLAGS) $(INCL) | $(MODPARSER) - $(call debug_message, "Processed MODULE_FILE: $(MODFILE)") - @$(WAVGEN) $(F_TMP) $(PLOT) || { echo "Waveform generation failed"; exit 1; } + $(WAVGEN) $(F_TMP) $(PLOT) || { echo "Waveform generation failed"; exit 1; } $(call debug_message, "Finished waveform generation for $(F_TMP) with plot: $(PLOT)") # Rule for generating script states From 1339a93a9db5fd6fc2e692734471741a11cb4457 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 13 Jun 2025 14:30:47 -0700 Subject: [PATCH 106/194] update bias, clock and LVDS definitions for new VIB etc --- src/deimos/deimos.mod | 86 +++++++++++++++++++-------------------- src/deimos/deimos.signals | 59 ++++++++++++++++++++++----- 2 files changed, 90 insertions(+), 55 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index d4f1c04..71f6031 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -22,36 +22,34 @@ SLOT 1 driverx { DRVX 12 [PCLK_fast,PCLK_slow,1] "PCLK_B3_1"; } -/* Remove comment when adding FCS SLOT 2 driverx { - DRVX 1 [1,1,0]; - DRVX 2 [1,1,0]; - DRVX 3 [1,1,0]; - DRVX 4 [1,1,0]; - DRVX 5 [1,1,0]; - DRVX 6 [1,1,0]; - DRVX 7 [1,1,0]; - DRVX 8 [1,1,0]; - DRVX 9 [1,1,0]; - DRVX 10 [1,1,0]; - DRVX 11 [1,1,0]; - DRVX 12 [1,1,0]; + DRVX 1 [1,1,1] "SCI_RGBACKUP2"; + DRVX 2 [1,1,1] "SCI_SWBACKUP1"; + DRVX 3 [1,1,1] "FCS2_S2L"; + DRVX 4 [1,1,1] "FCS1_S2L"; + DRVX 5 [1,1,1] "FCS2_S3L"; + DRVX 6 [1,1,1] "FCS_S1"; + DRVX 7 [1,1,1] "SCI_SWBACKUP2"; + DRVX 8 [1,1,1] "FCS_RG"; + DRVX 9 [1,1,1] "FCS_SW"; + DRVX 10 [1,1,1] "FCS1_S3L"; + DRVX 11 [1,1,0] "Spare1"; + DRVX 12 [1,1,0] "Spare2"; } -**********************************/ SLOT 3 driverx { - DRVX 1 [TG_fast,TG_slow,1] "Transfer Gate"; + DRVX 1 [TG_fast,TG_slow,1] "TGA1"; DRVX 2 [SCLK_fast,SCLK_slow,1] "Serial EF"; DRVX 3 [SCLK_fast,SCLK_slow,1] "Serial E2"; DRVX 4 [SCLK_fast,SCLK_slow,1] "Serial E1"; DRVX 5 [SCLK_fast,SCLK_slow,1] "Serial F2"; DRVX 6 [SCLK_fast,SCLK_slow,1] "Serial F1"; - DRVX 7 [1,1,0]; - DRVX 8 [1,1,0]; - DRVX 9 [1,1,0]; - DRVX 10 [1,1,0]; - DRVX 11 [1,1,0]; - DRVX 12 [1,1,0]; + DRVX 7 [1,1,1] "FCS_P3U"; + DRVX 8 [1,1,1] "FCS_P3L"; + DRVX 9 [1,1,1] "FCS_P2"; + DRVX 10 [1,1,1] "FCS_P1"; + DRVX 11 [TG_fast,TG_slow,1] "TGA2"; + DRVX 12 [1,1,1] "SCI_RGBACKUP1"; } SLOT 4 xvbias { @@ -90,11 +88,11 @@ SLOT 9 hvbias { HVLC 5 [17.0,2] "SCI E Reset Drain"; HVLC 6 [17.0,2] "SCI F Reset Drain"; HVLC 7 [0.00,0]; - HVLC 8 [0.00,0]; - HVLC 9 [0.00,0]; - HVLC 10 [0.00,0]; - HVLC 11 [0.00,0]; - HVLC 12 [0.00,0]; + HVLC 8 [14.00,0] "FCS1 Reset Drain A"; + HVLC 9 [14.00,0] "FCS1 Reset Drain B"; + HVLC 10 [14.00,0] "FCS2 Reset Drain A"; + HVLC 11 [14.00,0] "FCS2 Reset Drain B"; + HVLC 12 [13.00,1] "FCS Overflow Drain"; //TODO: what voltage? HVLC 13 [0.00,0]; HVLC 14 [0.00,0]; HVLC 15 [0.00,0]; @@ -103,20 +101,20 @@ SLOT 9 hvbias { HVLC 18 [0.00,0]; HVLC 19 [0.00,0]; HVLC 20 [0.00,0]; - HVLC 21 [0.00,0]; - HVLC 22 [0.00,0]; - HVLC 23 [0.00,0]; - HVLC 24 [0.00,0]; - HVHC 1 [29.0,2.0,3,1] "SCI E Output Drain"; //This one draws low current, not sure why yet + HVLC 21 [17.00,2] "SCI2 E Reset Drain"; + HVLC 22 [17.00,2] "SCI2 F Reset Drain"; + HVLC 23 [29.00,1] "SCI2 E Output Drain" ; //TODO: needs re-assignment! + HVLC 24 [29.00,1] "SCI2 F Output Drain"; //TODO: needs re-assignment! + HVHC 1 [29.0,2.0,3,1] "SCI E Output Drain"; HVHC 2 [29.0,7.0,3,1] "SCI F Output Drain"; - HVHC 3 [29.0,0.0,0,0]; - HVHC 4 [29.0,0.0,0,0]; - HVHC 5 [29.0,0.0,0,0]; - HVHC 6 [29.0,0.0,0,0]; + HVHC 3 [24.3,2.0,0,1] "FCS1 Output Drain A"; + HVHC 4 [24.3,2.0,0,1] "FCS1 Output Drain B"; + HVHC 5 [24.3,2.0,0,1] "FCS2 Output Drain A"; + HVHC 6 [24.3,2.0,0,1] "FCS2 Output Drain B"; } SLOT 10 lvbias { - LVLC 1 [00.0,0]; + LVLC 1 [3.3,5] "LVDS Receiver Output Enable"; LVLC 2 [00.0,0]; LVLC 3 [3.00,4] "SCI E Output Gate"; LVLC 4 [3.00,4] "SCI F Output Gate"; @@ -125,16 +123,16 @@ SLOT 10 lvbias { LVLC 7 [5.00,0] "SCI Reset Gate - Low"; // NB goes through a line driver LVLC 8 [11.5,0] "SCI Reset Gate - High"; // NB goes through a line driver LVLC 9 [00.0,0]; - LVLC 10 [3.0,0] "LastGateA FCS 1"; - LVLC 11 [3.0,0] "LastGateB FCS 1"; - LVLC 12 [3.0,0] "LastGateA FCS 2"; - LVLC 13 [3.0,0] "LastGateB FCS 2"; + LVLC 10 [-4.0,0] "LastGateA FCS 1"; + LVLC 11 [-4.0,0] "LastGateB FCS 1"; + LVLC 12 [-4.0,0] "LastGateA FCS 2"; + LVLC 13 [-4.0,0] "LastGateB FCS 2"; LVLC 14 [00.0,0]; - LVLC 15 [1.0,0] "FCS Summing Well - Low"; - LVLC 16 [11.5,0] "FCS Summing Well - High"; + LVLC 15 [-6.0,0] "FCS Summing Well - Low"; + LVLC 16 [5.0,0] "FCS Summing Well - High"; LVLC 17 [00.0,0]; - LVLC 18 [1.0,0] "FCS reset gate - Low"; - LVLC 19 [11.5,0] "FCS reset gate - High"; + LVLC 18 [0.0,0] "FCS reset gate - Low"; + LVLC 19 [12.0,0] "FCS reset gate - High"; LVLC 20 [00.0,0]; LVLC 21 [00.0,0]; LVLC 22 [00.0,0] "Video offset FCS"; diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index a0e0303..b20a065 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -44,37 +44,74 @@ /* Note: _1 refers to detectors 1-4 */ /* _2 refers to detectors 5-8 */ -#define PCLK_B3_2 1 : 1 -#define PCLK_A3_2 1 : 2 -#define PCLK_B2_2 1 : 3 -#define PCLK_A2_2 1 : 4 +#define PCLK_B3_2 1 : 1 +#define PCLK_A3_2 1 : 2 +#define PCLK_B2_2 1 : 3 +#define PCLK_A2_2 1 : 4 #define PCLK_B1_2 1 : 5 #define PCLK_A1_2 1 : 6 -#define PCLK_A1_1 1 : 7 +#define PCLK_A1_1 1 : 7 #define PCLK_B1_1 1 : 8 -#define PCLK_A2_1 1 : 9 +#define PCLK_A2_1 1 : 9 #define PCLK_B2_1 1 : 10 #define PCLK_A3_1 1 : 11 #define PCLK_B3_1 1 : 12 +#define TGA1 3 : 1 //new VIB assignment + /**** Serial Phase Signal Definitions ****/ -#define TG 3 : 1 #define SCLK_EF 3 : 2 #define SCLK_E2 3 : 3 #define SCLK_E1 3 : 4 #define SCLK_F2 3 : 5 #define SCLK_F1 3 : 6 +#define FCS_P3U 3 : 7 // new VIB assignment +#define FCS_P3L 3 : 8 // new VIB assignment +#define FCS_P2 3 : 9 // new VIB assignment +#define FCS_P1 3 : 10 // new VIB assignment +#define TGA2 3 : 11 // new VIB assignment +#define SCI_RGBACKUP1 3 : 12 //new VIB assignment + +//** FCS serials and more backups ** + +#define SCI_RGBACKUP2 2 : 1 //new VIB assignment +#define SCI_SWBACKUP1 2 : 2 //new VIB assignment +#define FCS2_S2L 2 : 3 //new VIB assignment +#define FCS1_S2L 2 : 4 //new VIB assignment +#define FCS2_S3L 2 : 5 //new VIB assignmet +#define FCS_S1 2 : 6 //new VIB assignment +#define SCI_SWBACKUP2 2 : 7 //new VIB assignment +#define FCS_RG 2 : 8 //new VIB assignment +#define FCS_SW 2 : 9 //new VIB assignment +#define FCS1_S3L 2 : 10 //new VIB assignment +#define Spare1 2 : 11 //new VIB assignment +#define Spare2 2 : 12 //new VIB assignment + + +#define TGA [TGA1 TGA2] //new VIB assignment + + /**** LVDS Driver Signal definitions ****/ #define RG_1 12 : 7 #define RG_2 12 : 8 #define AC_Clamp 12 : 12 #define SW_1 12 : 15 -#define SW_2 12 : 16 /* NOP Definition - NEEDS TO BE UNUSED */ -#define NOP 12 : 1 +#define NOP 12 : 2 //new VIB redefine +#define PD_OE_IN 12 : 1 //new VIB assignment +#define RG_SCI3 12 : 5 //new VIB assignment +#define RG_SCI4 12 : 6 //new VIB assignment +#define RG_SCI1 12 : 7 //new VIB assignment +#define RG_SCI2 12 : 8 //new VIB assignment + +#define SW_SCI2 12 : 16 //new VIB redefine +#define SW_SCI1 12 : 15 //new VIB redefine +#define SW_SCI3 12 : 14 //new VIB assignment +#define SW_SCI4 12 : 13 //new VIB assignment + /**** Bias Voltage Definitions ****/ @@ -84,10 +121,10 @@ #define SCI_SCLK2 [SCLK_E1, SCLK_F1] #define SCI_SCLK3 SCLK_EF /* Reset Gate Combine */ -#define RG [RG_1, RG_2] +#define RG [RG_SCI1, RG_SCI2, RG_SCI3, RG_SCI4] /* Summing Well Combine */ -#define SW [SW_1, SW_2] +#define SW [SW_SCI1, SW_SCI2, SW_SCI3, SW_SCI4] /* Science Parallels */ #define SCI_PCLK1 [PCLK_A1_1, PCLK_A1_2, PCLK_B1_1, PCLK_B1_2] From 2dd2d3e8c0b40c1278c0879083292a255cc52920 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 16 Jun 2025 12:31:17 -0700 Subject: [PATCH 107/194] weirdness in gpp include processing --- src/deimos/deimos.signals | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 6fdfc59..223ee0c 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -71,6 +71,7 @@ #define FCS_P3L 3 : 8 // new VIB assignment #define FCS_P2 3 : 9 // new VIB assignment #define FCS_P1 3 : 10 // new VIB assignment + #define TGA2 3 : 11 // new VIB assignment #define SCI_RGBACKUP1 3 : 12 //new VIB assignment @@ -90,24 +91,26 @@ #define Spare2 2 : 12 //new VIB assignment -#define TGA [TGA1 TGA2] //new VIB assignment +#define TG [TGA1, TGA2] //new VIB assignment /**** LVDS Driver Signal definitions ****/ -#define RG_1 12 : 7 -#define RG_2 12 : 8 #define AC_Clamp 12 : 12 -#define SW_1 12 : 15 /* NOP Definition - NEEDS TO BE UNUSED */ #define NOP 12 : 2 //new VIB redefine #define PD_OE_IN 12 : 1 //new VIB assignment + #define RG_SCI3 12 : 5 //new VIB assignment + #define RG_SCI4 12 : 6 //new VIB assignment + #define RG_SCI1 12 : 7 //new VIB assignment + #define RG_SCI2 12 : 8 //new VIB assignment #define SW_SCI2 12 : 16 //new VIB redefine + #define SW_SCI1 12 : 15 //new VIB redefine #define SW_SCI3 12 : 14 //new VIB assignment #define SW_SCI4 12 : 13 //new VIB assignment @@ -131,7 +134,7 @@ #define SCI_SCLK3 SCLK_EF /* Reset Gate Combine */ -#define RG [RG_SCI1, RG_SCI2, RG_SCI3, RG_SCI4] +#define RG [ RG_SCI1, RG_SCI2, RG_SCI3, RG_SCI4] /* Summing Well Combine */ #define SW [SW_SCI1, SW_SCI2, SW_SCI3, SW_SCI4] From 9c7f340e3e7010e04a8feb19932f3337f44c9ccf Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 16 Jun 2025 12:47:04 -0700 Subject: [PATCH 108/194] add disable to the unused XVBias channels --- src/deimos/deimos.mod | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index b0124ad..01b1ad0 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -53,14 +53,14 @@ SLOT 3 driverx { } SLOT 4 xvbias { - PBIAS 1 [0,0]; - PBIAS 2 [0,0]; - PBIAS 3 [0,0]; - PBIAS 4 [0,0]; - NBIAS 1 [0, -0] "SCI Backside"; - NBIAS 2 [0,-0]; - NBIAS 3 [0,-0]; - NBIAS 4 [0,-0]; + PBIAS 1 0 [0,0]; + PBIAS 2 0 [0,0]; + PBIAS 3 0 [0,0]; + PBIAS 4 0 [0,0]; + NBIAS 1 1 [0, -0] "SCI Backside"; + NBIAS 2 0 [0,-0]; + NBIAS 3 0 [0,-0]; + NBIAS 4 0 [0,-0]; } /* SLOT 7 ADM */ From db3e6f95f2cbed277a301708dad8457796412fff Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 25 Jun 2025 14:09:53 -0700 Subject: [PATCH 109/194] update module defs to newer TC --- src/deimos/deimos.mod | 13 ++++++++----- src/deimos/deimos.signals | 8 ++++++-- src/deimos/deimos.waveform | 14 ++++++++++++++ 3 files changed, 28 insertions(+), 7 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 01b1ad0..218749f 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -114,14 +114,17 @@ SLOT 9 hvbias { } SLOT 10 lvbias { - LVLC 1 [3.3,5] "LVDS Receiver Output Enable"; + LVLC 1 [3.3,6] "LVDS Receiver Output Enable"; LVLC 2 [00.0,0]; LVLC 3 [3.00,4] "SCI E Output Gate"; LVLC 4 [3.00,4] "SCI F Output Gate"; - LVLC 5 [1.00,0] "SCI Summing Well - Low"; // NB goes through a line driver - LVLC 6 [11.50,0] "SCI Summing Well - High"; // NB goes through a line driver - LVLC 7 [5.00,0] "SCI Reset Gate - Low"; // NB goes through a line driver - LVLC 8 [11.5,0] "SCI Reset Gate - High"; // NB goes through a line driver + LVLC 5 [1.00,5] "SCI Summing Well - Low"; // NB goes through a line driver + LVLC 6 [11.50,5] "SCI Summing Well - High"; // NB goes through a line driver + + LVLC 7 [11.50,5] "SCI Reset Gate - HIGH"; // NB at the moment RG low and high are swapped in the cable by accident! +// LVLC 7 [5.00,5] "SCI Reset Gate - Low"; // NB goes through a line driver + // LVLC 8 [11.5,5] "SCI Reset Gate - High"; // NB goes through a line driver + LVLC 8 [11.5,5] "SCI Reset Gate - LOW"; //// NB at the moment RG low and high are swapped in the cable by accident! LVLC 9 [00.0,0]; LVLC 10 [-4.0,0] "LastGateA FCS 1"; LVLC 11 [-4.0,0] "LastGateB FCS 1"; diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 223ee0c..a08a0f3 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -91,6 +91,9 @@ #define Spare2 2 : 12 //new VIB assignment +#define RG_CLOCKS [3 : 12, SCI_RGBACKUP2] +#define SW_CLOCKS [SCI_SWBACKUP1, 2 : 7] + #define TG [TGA1, TGA2] //new VIB assignment @@ -134,10 +137,11 @@ #define SCI_SCLK3 SCLK_EF /* Reset Gate Combine */ -#define RG [ RG_SCI1, RG_SCI2, RG_SCI3, RG_SCI4] +#define RG [RG_SCI1, RG_SCI2, RG_SCI3, RG_SCI4] /* Summing Well Combine */ -#define SW [SW_SCI1, SW_SCI2, SW_SCI3, SW_SCI4] +/*define SW [SW_SCI1, SW_SCI2, SW_SCI3, SW_SCI4] */ +#define SW [SW_SCI1, SW_SCI2] /* Science Parallels */ #define SCI_PCLK1 [PCLK_A1_1, PCLK_A1_2, PCLK_B1_1, PCLK_B1_2] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 1a3f135..1416eb0 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -108,6 +108,11 @@ WAVEFORM InitialSetup {0 : SET RG TO 0; SET SW TO 0; + SET RG_CLOCKS TO _RG_LOW; + SET SW_CLOCKS TO _SW_LOW; + + //disable the pin drivers + SET PD_OE_IN TO 1; SET AC_Clamp to HIGH; @@ -156,7 +161,9 @@ WAVEFORM FlushTearDown { SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; SET SW TO 1; + SET SW_CLOCKS to _SW_LOW; SET RG TO 1; + SET RG_CLOCKS TO _RG_LOW; } @@ -195,9 +202,11 @@ WAVEFORM TransferToSerialRegisterCoincident SET TG TO _TG_CLOCK_HIGH, FAST; SET LINE TO HIGH; SET SW TO INV_LOW; + SET SW_CLOCKS TO _SW_LOW; //NOTE: don't think we want to clamp with reset gate activated .+1000: SET RG TO INV_LOW; + SET RG_CLOCKS TO _RG_LOW; SET TG TO _TG_CLOCK_LOW, FAST; //simultaneously, operate the AC clamp .+50: @@ -222,6 +231,7 @@ WAVEFORM ParallelForwardNoCoincident SET TG TO _TG_CLOCK_HIGH, FAST; SET SW TO INV_LOW; + SET SW_CLOCKS TO _SW_LOW; SET LINE TO HIGH; .+1000: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; @@ -241,9 +251,11 @@ WAVEFORM ParallelForwardNoCoincident SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; SET RG to INV_HIGH; + SET RG_CLOCKS TO _RG_HIGH; TG_GOES_LOW+200:=RG_GOES_LOW SET RG TO INV_LOW; + SET RG_CLOCKS TO _RG_LOW; .+50: SET AC_Clamp to HIGH; .+300: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; @@ -283,8 +295,10 @@ WAVEFORM ParallelForwardSegment3 WAVEFORM OutputTestSetup { 0: SET RG TO INV_HIGH; + SET RG_CLOCKS TO _RG_HIGH; SET VRD_F TO 17.0; SET SW TO INV_HIGH; + SET SW_CLOCKS TO _SW_HIGH; .+10ms: SET NOP TO HIGH; SET TG TO _TG_CLOCK_LOW, FAST; .+10ms: SET NOP TO HIGH; From 5d96921f5ba8529374b6c8f4236004f5ea9426da Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 25 Jun 2025 14:18:42 -0700 Subject: [PATCH 110/194] add missing SCI2 OG definitions --- src/deimos/deimos.mod | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 218749f..ffefa71 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -130,12 +130,12 @@ SLOT 10 lvbias { LVLC 11 [-4.0,0] "LastGateB FCS 1"; LVLC 12 [-4.0,0] "LastGateA FCS 2"; LVLC 13 [-4.0,0] "LastGateB FCS 2"; - LVLC 14 [00.0,0]; - LVLC 15 [-6.0,0] "FCS Summing Well - Low"; - LVLC 16 [5.0,0] "FCS Summing Well - High"; + LVLC 14 [3.3,0] "SCI E Output Gate 2" ; + LVLC 15 [3.3,0] "SCI F Output Gate 2"; + LVLC 16 [0.0,0] ; LVLC 17 [00.0,0]; - LVLC 18 [0.0,0] "FCS reset gate - Low"; - LVLC 19 [12.0,0] "FCS reset gate - High"; + LVLC 18 [0.0,0] ; + LVLC 19 [0.0,0] ; LVLC 20 [00.0,0]; LVLC 21 [00.0,0]; LVLC 22 [00.0,0] "Video offset FCS"; From 6367b48f5a9d0ed50ed8e3c44f55b4e35077a20f Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 25 Jun 2025 18:18:42 -0700 Subject: [PATCH 111/194] missing SW and RG defines --- src/deimos/deimos.signals | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index a08a0f3..64695c5 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -105,15 +105,11 @@ #define PD_OE_IN 12 : 1 //new VIB assignment #define RG_SCI3 12 : 5 //new VIB assignment - #define RG_SCI4 12 : 6 //new VIB assignment - #define RG_SCI1 12 : 7 //new VIB assignment - #define RG_SCI2 12 : 8 //new VIB assignment #define SW_SCI2 12 : 16 //new VIB redefine - #define SW_SCI1 12 : 15 //new VIB redefine #define SW_SCI3 12 : 14 //new VIB assignment #define SW_SCI4 12 : 13 //new VIB assignment @@ -141,7 +137,7 @@ /* Summing Well Combine */ /*define SW [SW_SCI1, SW_SCI2, SW_SCI3, SW_SCI4] */ -#define SW [SW_SCI1, SW_SCI2] +#define SW [SW_SCI1, SW_SCI2, SW_SCI3, SW_SCI4] /* Science Parallels */ #define SCI_PCLK1 [PCLK_A1_1, PCLK_A1_2, PCLK_B1_1, PCLK_B1_2] From 6edb0f58d1c54c3e779feb98bcb663f4503e0ad7 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 26 Jun 2025 13:21:02 -0700 Subject: [PATCH 112/194] mess with whitespace to make gpp happy --- src/deimos/deimos.signals | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 64695c5..fdcd718 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -111,7 +111,9 @@ #define SW_SCI2 12 : 16 //new VIB redefine #define SW_SCI1 12 : 15 //new VIB redefine + #define SW_SCI3 12 : 14 //new VIB assignment + #define SW_SCI4 12 : 13 //new VIB assignment @@ -133,11 +135,11 @@ #define SCI_SCLK3 SCLK_EF /* Reset Gate Combine */ -#define RG [RG_SCI1, RG_SCI2, RG_SCI3, RG_SCI4] +#define RG [ RG_SCI3 , RG_SCI4 , RG_SCI1 , RG_SCI2] /* Summing Well Combine */ /*define SW [SW_SCI1, SW_SCI2, SW_SCI3, SW_SCI4] */ -#define SW [SW_SCI1, SW_SCI2, SW_SCI3, SW_SCI4] +#define SW [SW_SCI2 , SW_SCI3 , SW_SCI4, SW_SCI1] /* Science Parallels */ #define SCI_PCLK1 [PCLK_A1_1, PCLK_A1_2, PCLK_B1_1, PCLK_B1_2] From c397755a9f1fa861ac2a0574206f4db04bb2fd88 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 27 Jun 2025 17:06:05 -0700 Subject: [PATCH 113/194] enable missing parallels, and proper slew rate for TGA2 line --- src/deimos/deimos.mod | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index ffefa71..1ec79d8 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -8,12 +8,12 @@ deimos_TMP SLOT 1 driverx { - DRVX 1 [PCLK_fast,PCLK_slow,0] "PCLK_B3_2"; - DRVX 2 [PCLK_fast,PCLK_slow,0] "PCLK_A3_2"; - DRVX 3 [PCLK_fast,PCLK_slow,0] "PCLK_B2_2"; - DRVX 4 [PCLK_fast,PCLK_slow,0] "PCLK_A2_2"; - DRVX 5 [PCLK_fast,PCLK_slow,0] "PCLK_B1_2"; - DRVX 6 [PCLK_fast,PCLK_slow,0] "PCLK_A1_2"; + DRVX 1 [PCLK_fast,PCLK_slow,1] "PCLK_B3_2"; + DRVX 2 [PCLK_fast,PCLK_slow,1] "PCLK_A3_2"; + DRVX 3 [PCLK_fast,PCLK_slow,1] "PCLK_B2_2"; + DRVX 4 [PCLK_fast,PCLK_slow,1] "PCLK_A2_2"; + DRVX 5 [PCLK_fast,PCLK_slow,1] "PCLK_B1_2"; + DRVX 6 [PCLK_fast,PCLK_slow,1] "PCLK_A1_2"; DRVX 7 [PCLK_fast,PCLK_slow,1] "PCLK_B1_1"; DRVX 8 [PCLK_fast,PCLK_slow,1] "PCLK_A2_1"; DRVX 9 [PCLK_fast,PCLK_slow,1] "PCLK_A2_1"; @@ -48,7 +48,7 @@ SLOT 3 driverx { DRVX 8 [1,1,0]; DRVX 9 [1,1,0]; DRVX 10 [1,1,0]; - DRVX 11 [1,1,0]; + DRVX 11 [TG_fast,TG_slow,1] "TGA2; DRVX 12 [1,1,0]; } From 63871d103197f27ee2eb0d1f3997118afc12ebc7 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 27 Jun 2025 17:06:35 -0700 Subject: [PATCH 114/194] typo fix --- src/deimos/deimos.mod | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 1ec79d8..e09d272 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -48,7 +48,7 @@ SLOT 3 driverx { DRVX 8 [1,1,0]; DRVX 9 [1,1,0]; DRVX 10 [1,1,0]; - DRVX 11 [TG_fast,TG_slow,1] "TGA2; + DRVX 11 [TG_fast,TG_slow,1] "TGA2"; DRVX 12 [1,1,0]; } From 4b4215b0757e622e2b628bdc660c07f186c0e03c Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 30 Jun 2025 13:06:53 -0700 Subject: [PATCH 115/194] go back to ADM original tap lines for full focal plane operation --- src/deimos/deimos.cds | 3 +-- src/deimos/deimos.mod | 4 ++-- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index df9048e..89468bb 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -35,7 +35,7 @@ SHD1 = 232 SHD2 = 327 //ADM module installed in slot 7 -#define SINGLE_DET_TEST 1 +#define SINGLE_DET_TEST 0 // NOTE tghere is a re-mapping due to the cameralink cable, // that is not accounted for by the current DEIMOS VIB. @@ -79,7 +79,6 @@ TAPLINES=16 #endif - TRIGOUTFORCE=0 TRIGOUTINVERT=0 TRIGOUTLEVEL=0 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index e09d272..d64cb19 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -119,12 +119,12 @@ SLOT 10 lvbias { LVLC 3 [3.00,4] "SCI E Output Gate"; LVLC 4 [3.00,4] "SCI F Output Gate"; LVLC 5 [1.00,5] "SCI Summing Well - Low"; // NB goes through a line driver - LVLC 6 [11.50,5] "SCI Summing Well - High"; // NB goes through a line driver + LVLC 6 [9.0,5] "SCI Summing Well - High"; // NB goes through a line driver LVLC 7 [11.50,5] "SCI Reset Gate - HIGH"; // NB at the moment RG low and high are swapped in the cable by accident! // LVLC 7 [5.00,5] "SCI Reset Gate - Low"; // NB goes through a line driver // LVLC 8 [11.5,5] "SCI Reset Gate - High"; // NB goes through a line driver - LVLC 8 [11.5,5] "SCI Reset Gate - LOW"; //// NB at the moment RG low and high are swapped in the cable by accident! + LVLC 8 [5.5,5] "SCI Reset Gate - LOW"; //// NB at the moment RG low and high are swapped in the cable by accident! LVLC 9 [00.0,0]; LVLC 10 [-4.0,0] "LastGateA FCS 1"; LVLC 11 [-4.0,0] "LastGateB FCS 1"; From 6f3412dcf89094a5df7620280b4a29cc3e867616 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 8 Jul 2025 18:09:04 -0700 Subject: [PATCH 116/194] re-introduce TGA test setup, for testing broken outputs --- src/deimos/deimos.cds | 3 ++- src/deimos/deimos.seq | 27 +++++++++++++++++---------- src/deimos/deimos.waveform | 5 +---- 3 files changed, 20 insertions(+), 15 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 89468bb..8b08223 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -13,7 +13,8 @@ RAWENABLE = _RAW_ENABLE RAWENDLINE = 800 RAWSAMPLES = 5000 //RAWSEL = _RAW_SELECT -RAWSEL = 47 + //NOTE RAWSEL of 11 should be E channel of slot 2 +RAWSEL = 11 RAWSTARTLINE = 0 RAWSTARTPIXEL = 48 SAMPLEMODE = 0 diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 1202b58..faf0feb 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -30,6 +30,9 @@ param abortintegrate = 0 //checked by the integration waiters and they bail out param flush = 1 +param rg_mod_test_mode = 0 + + param llel_coincident = 1 //use coincident llel clocks param llel_seq = 0 //use sequential llel clocks (must be not of llel_coincident) @@ -86,17 +89,7 @@ SEQUENCE ClampTest #endif -#if 0 -SEQUENCE TestBrokenReadout -{ - OutputTestSetup(); - PulseTGA(); - - VRDModulate(); - GOTO TestBrokenReadout(); -} -#endif @@ -106,10 +99,24 @@ SEQUENCE StartSeq { if integrate_enable CheckIntegrate(); if readout_enable CheckReadout(); + if rg_mod_test_mode TestBrokenReadout(); framecount--; GOTO StartSeq(); } + +SEQUENCE TestBrokenReadout +{ + OutputTestSetup(); + PulseTGA(); + + VRDModulate(); + + GOTO TestBrokenReadout(); +} + + + SEQUENCE Flush { FlushSetup(); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 1416eb0..3d9cc99 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -321,8 +321,6 @@ WAVEFORM PulseTGA -#if 0 - WAVEFORM VRDModulate { 0: SET VRD_F TO 14.0; @@ -371,7 +369,6 @@ WAVEFORM VRDModulate .+1us: SET VRD_F TO 14.5; } -#endif WAVEFORM ReadPixels { @@ -559,7 +556,7 @@ WAVEFORM SerialEBackwards WAVEFORM BounceTGTest { - 0: SET TG to _TG_CLOCK_HIGH,SLOW; + 0: SET TG to _TG_CLOCK_HIGH,FAST; .+500: SET TG to _TG_CLOCK_LOW, FAST; .+200: SET NOP to HIGH; 0: SET PIXEL TO HIGH; From 1d26e2900bf7149b120fffc1ab99b842223f94f8 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 15 Jul 2025 15:05:05 -0700 Subject: [PATCH 117/194] correct erroneous current limit on VOD --- src/deimos/deimos.mod | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index d64cb19..6492d09 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -105,7 +105,7 @@ SLOT 9 hvbias { HVLC 22 [17.00,2] "SCI2 F Reset Drain"; HVLC 23 [29.00,1] "SCI2 E Output Drain" ; //TODO: needs re-assignment! HVLC 24 [29.00,1] "SCI2 F Output Drain"; //TODO: needs re-assignment! - HVHC 1 [29.0,2.0,3,1] "SCI E Output Drain"; + HVHC 1 [29.0,7.0,3,1] "SCI E Output Drain"; HVHC 2 [29.0,7.0,3,1] "SCI F Output Drain"; HVHC 3 [24.3,2.0,0,1] "FCS1 Output Drain A"; HVHC 4 [24.3,2.0,0,1] "FCS1 Output Drain B"; From 7fffe3eaac75853e19e12cda60cc46aa14dac896 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 29 Jul 2025 18:37:23 +0100 Subject: [PATCH 118/194] update CDS definitions for current test setup --- src/deimos/deimos.cds | 41 +++++++++++++++++++++-------------------- 1 file changed, 21 insertions(+), 20 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 8b08223..2f20be5 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -17,7 +17,7 @@ RAWSAMPLES = 5000 RAWSEL = 11 RAWSTARTLINE = 0 RAWSTARTPIXEL = 48 -SAMPLEMODE = 0 +SAMPLEMODE = 1 //attempt pixel timing coincident with the nearest ADM samples. That means multiples of 8 //by eye, try 80 to start @@ -36,7 +36,7 @@ SHD1 = 232 SHD2 = 327 //ADM module installed in slot 7 -#define SINGLE_DET_TEST 0 +#define SINGLE_DET_TEST 1 // NOTE tghere is a re-mapping due to the cameralink cable, // that is not accounted for by the current DEIMOS VIB. @@ -52,30 +52,31 @@ SHD2 = 327 #if SINGLE_DET_TEST -TAPLINE0 ="AM45L,-1,100" -TAPLINE1 ="AM44R,1,100" + //detector currently installed in slot 2 +TAPLINE0 ="AM39L,-1,100" +TAPLINE1 ="AM40R,-1,100" TAPLINES=2 FRAMEMODE=0 #else FRAMEMODE=2 -TAPLINE0 ="AM37L,1,100" -TAPLINE1 ="AM38R,1,100" -TAPLINE2 ="AM39L,1,100" -TAPLINE3 ="AM40R,1,100" -TAPLINE4 ="AM41L,1,100" -TAPLINE5 ="AM42R,1,100" -TAPLINE6 ="AM43L,1,100" -TAPLINE7 ="AM44R,1,100" -TAPLINE8 ="AM45L,1,100" -TAPLINE9 ="AM46R,1,100" -TAPLINE10 ="AM47L,1,100" -TAPLINE11 ="AM48R,1,100" -TAPLINE12 ="AM49L,1,100" -TAPLINE13 ="AM50R,1,100" -TAPLINE14 ="AM51L,1,100" -TAPLINE15 ="AM52R,1,100" +TAPLINE0 ="AM37L,-1,100" +TAPLINE1 ="AM38R,-1,100" +TAPLINE2 ="AM39L,-1,100" +TAPLINE3 ="AM40R,-1,100" +TAPLINE4 ="AM41L,-1,100" +TAPLINE5 ="AM42R,-1,100" +TAPLINE6 ="AM43L,-1,100" +TAPLINE7 ="AM44R,-1,100" +TAPLINE8 ="AM45L,-1,100" +TAPLINE9 ="AM46R,-1,100" +TAPLINE10 ="AM47L,-1,100" +TAPLINE11 ="AM48R,-1,100" +TAPLINE12 ="AM49L,-1,100" +TAPLINE13 ="AM50R,-1,100" +TAPLINE14 ="AM51L,-1,100" +TAPLINE15 ="AM52R,-1,100" TAPLINES=16 #endif From 183e40d52b7fbbd6f9132663ddc7d87f9dd37b2d Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 30 Jul 2025 03:28:52 +0100 Subject: [PATCH 119/194] add illumination option and TDI delay option to DEIMOS sequences --- src/deimos/deimos.seq | 28 ++++++++++++++++++++-------- src/deimos/deimos.waveform | 19 +++++++++---------- 2 files changed, 29 insertions(+), 18 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index faf0feb..6b29409 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -28,14 +28,20 @@ param framecount = 1000 //will be set param abortintegrate = 0 //checked by the integration waiters and they bail out if it is set param flush = 1 - +param illum = 0 +param integrate_illum_ms = 0 +param integrate_illum_s = 0 param rg_mod_test_mode = 0 + +param tdi_wait_us = 0 param llel_coincident = 1 //use coincident llel clocks param llel_seq = 0 //use sequential llel clocks (must be not of llel_coincident) + + #if NOISETEST SEQUENCE NoiseTest { setupTGTest(); @@ -136,10 +142,16 @@ SEQUENCE CheckIntegrate SEQUENCE Integrate { - SetupIntegration(); + + if illum OpenShutter(); + if illum Wait1ms(integrate_illum_ms); + if illum Wait1s(integrate_illum_s); + if illum CloseShutter(); Wait1ms(integrate_ms); Wait1s(integrate_s); - TearDownIntegration(); + + + RETURN; } @@ -171,8 +183,6 @@ SEQUENCE FrameReadout //single serial read to flush the register ReadPixels(_AMPREADCOLS); - - //read all image rows and the desired overscan IF llel_seq LineReadout(TOTAL_ROWS); IF llel_coincident LineReadoutCoincident(TOTAL_ROWS); @@ -190,11 +200,10 @@ SEQUENCE Wait1s { RETURN;} SEQUENCE abortintegration { - TearDownIntegration(); + CloseShutter(); GOTO StartSeq(); } - SEQUENCE LineReadout { ParallelForwardNoCoincident(); @@ -202,6 +211,8 @@ SEQUENCE LineReadout //wait here is for the clamp to die down. Put some of it in prescan, but not all Wait1us(50); + if tdi_wait_us Wait1us(tdi_wait_us); + ReadPixels(PIXELS_PER_SEG); ReadPixels(PIXELS_PER_SEG); ReadPixels(PIXELS_PER_SEG); @@ -217,7 +228,8 @@ SEQUENCE LineReadout SEQUENCE LineReadoutCoincident { - //charge assumed must be under I2 at this point, set up in preamble + if tdi_wait_us Wait1us(tdi_wait_us); + //charge assumed must be under I2 at this point, set up in preamble ParallelForwardSegment1(); TransferToSerialRegisterCoincident(); ReadPixels(PIXELS_PER_SEG); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 3d9cc99..95f7ffa 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -167,27 +167,26 @@ WAVEFORM FlushTearDown { } - - - -WAVEFORM SetupIntegration { - 0: - SET SHUTTER TO OPEN; +WAVEFORM OpenShutter +{ + 0: SET SHUTTER to 1; } -WAVEFORM TearDownIntegration { - 0: SET SHUTTER TO CLOSE; +WAVEFORM CloseShutter +{ + 0: SET SHUTTER TO 0; } + WAVEFORM ReadoutBegin { - SET LINE TO HIGH; + 0:SET LINE TO HIGH; SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; } WAVEFORM ReadoutEnd { - SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; + 0: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; } From 662858cd95feda257aaa88613efd3f7398b90f80 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 1 Aug 2025 02:04:52 +0100 Subject: [PATCH 120/194] fix current limits and add future defs for constants once wdl supports floating point constnats --- src/deimos/deimos.mod | 4 ++-- src/deimos/deimos.seq | 8 ++++++++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 6492d09..8f3fc5e 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -105,8 +105,8 @@ SLOT 9 hvbias { HVLC 22 [17.00,2] "SCI2 F Reset Drain"; HVLC 23 [29.00,1] "SCI2 E Output Drain" ; //TODO: needs re-assignment! HVLC 24 [29.00,1] "SCI2 F Output Drain"; //TODO: needs re-assignment! - HVHC 1 [29.0,7.0,3,1] "SCI E Output Drain"; - HVHC 2 [29.0,7.0,3,1] "SCI F Output Drain"; + HVHC 1 [29.0,10.0,3,1] "SCI E Output Drain"; + HVHC 2 [29.0,10.0,3,1] "SCI F Output Drain"; HVHC 3 [24.3,2.0,0,1] "FCS1 Output Drain A"; HVHC 4 [24.3,2.0,0,1] "FCS1 Output Drain B"; HVHC 5 [24.3,2.0,0,1] "FCS2 Output Drain A"; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 6b29409..cdbf069 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -41,6 +41,14 @@ param tdi_wait_us = 0 param llel_seq = 0 //use sequential llel clocks (must be not of llel_coincident) + //NOTE put these here _JUST_ so you can read them out. In order to change them need to recompile WDL (silly I know) + + //const phigh = _PAR_CLOCK_HIGH + //const plow = _PAR_CLOCK_LOW + //const tghigh = _TG_CLOCK_HIGH + //const tglow = _TG_CLOCK_LOW + // const serhigh = _SER_CLOCK_HIGH + //const serlow = _SER_CLOCK_LOW #if NOISETEST SEQUENCE NoiseTest { From ccaa8fe83df62a84330847004fc5c54a1f9c501a Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 1 Aug 2025 19:21:21 +0100 Subject: [PATCH 121/194] add linbin configuration --- src/deimos/deimos.seq | 32 ++++++++++++++++++++++++++------ 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index cdbf069..52e0e98 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -40,7 +40,19 @@ param tdi_wait_us = 0 param llel_coincident = 1 //use coincident llel clocks param llel_seq = 0 //use sequential llel clocks (must be not of llel_coincident) + //NOTE we will only do llel binning for llel_seq + //because it's very tricky to get timing right + // for coincident parallels. For most of the + //purposes you'd do this it will work fine anyway +param llel_bin = 1 + + //NOTE: linbin=1 increments the amount of + //llel bins by 1 each line. This is to obtain + // the Kaye/Greffe/Smith "linearity by incremental //binning" curve, or "linbin" curve +param linbin = 0 + + //NOTE put these here _JUST_ so you can read them out. In order to change them need to recompile WDL (silly I know) //const phigh = _PAR_CLOCK_HIGH @@ -110,7 +122,7 @@ SEQUENCE ClampTest SEQUENCE StartSeq { InitialSetup(); if flush Flush(); - + if integrate_enable CheckIntegrate(); if readout_enable CheckReadout(); if rg_mod_test_mode TestBrokenReadout(); @@ -151,15 +163,18 @@ SEQUENCE CheckIntegrate SEQUENCE Integrate { + //NOTE: open shutter if either TDI wait or + //illumination requested... if illum OpenShutter(); + if tdi_wait_us OpenShutter(); if illum Wait1ms(integrate_illum_ms); if illum Wait1s(integrate_illum_s); + //but only close it if illumination (if + // doing TDI we need to close it later on) if illum CloseShutter(); Wait1ms(integrate_ms); Wait1s(integrate_s); - - RETURN; } @@ -167,12 +182,13 @@ SEQUENCE CheckReadout { if framecount KeepThisFrame(); FrameReadout(); + + //TDI curve stops after readout, turn off the illumination now + if tdi_wait_us CloseShutter(); RETURN; } - - //segment calculations //this does floor arithmetic, so might end up with wrong number //if number cols changes @@ -214,8 +230,12 @@ SEQUENCE abortintegration { SEQUENCE LineReadout { - ParallelForwardNoCoincident(); + ParallelForwardNoCoincident(llel_bin); + //if we're doing a "linbin", increment llel_bin + //by one for each line + if linbin llel_bin++ + //wait here is for the clamp to die down. Put some of it in prescan, but not all Wait1us(50); From fea8d92af40645134219c985979d3387e54db66c Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 1 Aug 2025 20:29:36 +0100 Subject: [PATCH 122/194] attempt to fix linbin wdl generation --- src/deimos/deimos.seq | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 52e0e98..9ce509b 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -55,6 +55,7 @@ param linbin = 0 //NOTE put these here _JUST_ so you can read them out. In order to change them need to recompile WDL (silly I know) + //const phigh = _PAR_CLOCK_HIGH //const plow = _PAR_CLOCK_LOW //const tghigh = _TG_CLOCK_HIGH @@ -228,13 +229,20 @@ SEQUENCE abortintegration { GOTO StartSeq(); } + +SEQUENCE linbinincr { + llel_bin++; + RETURN; +} + + SEQUENCE LineReadout { ParallelForwardNoCoincident(llel_bin); //if we're doing a "linbin", increment llel_bin //by one for each line - if linbin llel_bin++ + if linbin linbinincr(); //wait here is for the clamp to die down. Put some of it in prescan, but not all Wait1us(50); From 53e1337bbda5460586c54015c6cd5c35bf2a316a Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 1 Aug 2025 15:08:22 -0700 Subject: [PATCH 123/194] fix inversion on RG and SW --- src/deimos/deimos.seq | 34 +++++++++++++++------------- src/deimos/deimos.waveform | 46 ++++++++++++++++++++++++++++++-------- 2 files changed, 56 insertions(+), 24 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index faf0feb..759bae3 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -29,6 +29,7 @@ param abortintegrate = 0 //checked by the integration waiters and they bail out param flush = 1 + param rg_mod_test_mode = 0 @@ -36,6 +37,9 @@ param rg_mod_test_mode = 0 param llel_coincident = 1 //use coincident llel clocks param llel_seq = 0 //use sequential llel clocks (must be not of llel_coincident) + + param slow_pix = 0 // use "slow pixel", mainly useful for debugging serial clock feedthroughs + #if NOISETEST SEQUENCE NoiseTest { setupTGTest(); @@ -112,7 +116,7 @@ SEQUENCE TestBrokenReadout VRDModulate(); - GOTO TestBrokenReadout(); + RETURN; } @@ -120,7 +124,7 @@ SEQUENCE TestBrokenReadout SEQUENCE Flush { FlushSetup(); - Wait1s(); + Wait1ms(10); FlushTearDown(); Wait1ms(10); RETURN Flush; @@ -172,10 +176,10 @@ SEQUENCE FrameReadout ReadPixels(_AMPREADCOLS); - //read all image rows and the desired overscan IF llel_seq LineReadout(TOTAL_ROWS); IF llel_coincident LineReadoutCoincident(TOTAL_ROWS); + IF slow_pix LineReadoutSlowPix(TOTAL_ROWS); ReadoutEnd(); RETURN; @@ -195,26 +199,26 @@ SEQUENCE abortintegration { } +SEQUENCE LineReadoutSlowPix +{ + ParallelForwardNoCoincident(); + Wait1us(50); + ReadPixelsSlow(_AMPREADCOLS); + Wait1us(10); + RETURN; +} + SEQUENCE LineReadout { ParallelForwardNoCoincident(); //wait here is for the clamp to die down. Put some of it in prescan, but not all - Wait1us(50); - - ReadPixels(PIXELS_PER_SEG); - ReadPixels(PIXELS_PER_SEG); - ReadPixels(PIXELS_PER_SEG); + Wait1us(5); + ReadPixels(_AMPREADCOLS); //if there are leftover pixels, do them here - #if REMAINDER_PIX - ReadPixels(REMAINDER_PIX); - - #endif - - Wait1us(10); + Wait1us(5); RETURN; } - SEQUENCE LineReadoutCoincident { //charge assumed must be under I2 at this point, set up in preamble diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 3d9cc99..9bed24f 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -35,8 +35,8 @@ #define HIGH 1 #define LOW 0 -#define INV_HIGH 0 //Some signals are inverted. Use this sigil to indicate that -#define INV_LOW 1 +#define INV_HIGH 1 //Some signals are inverted. Use this sigil to indicate that +#define INV_LOW 0 @@ -106,8 +106,8 @@ WAVEFORM RegisterFlush { WAVEFORM InitialSetup {0 : - SET RG TO 0; - SET SW TO 0; + SET RG TO INV_HIGH; + SET SW TO INV_HIGH; SET RG_CLOCKS TO _RG_LOW; SET SW_CLOCKS TO _SW_LOW; @@ -140,8 +140,8 @@ WAVEFORM FlushSetup { SET TG TO _TG_CLOCK_HIGH, FAST; //SET AC_Clamp TO LOW; - SET SW TO 0; - SET RG TO 0; + SET SW TO INV_HIGH; + SET RG TO INV_HIGH; SET SCI_SCLK1 TO _SER_CLOCK_FLUSH, FAST; SET SCI_SCLK2 TO _SER_CLOCK_FLUSH, FAST; SET SCI_SCLK3 TO _SER_CLOCK_FLUSH, FAST; @@ -160,9 +160,9 @@ WAVEFORM FlushTearDown { SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - SET SW TO 1; + SET SW TO INV_LOW; SET SW_CLOCKS to _SW_LOW; - SET RG TO 1; + SET RG TO INV_LOW; SET RG_CLOCKS TO _RG_LOW; } @@ -378,7 +378,6 @@ WAVEFORM ReadPixels .+1: SET PIXEL TO LOW; SET LINE TO LOW; SET FRAME TO LOW; - //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted .+30: SET RG TO INV_LOW; @@ -402,6 +401,35 @@ WAVEFORM ReadPixels } +WAVEFORM ReadPixelsSlow +{ + 0 := PIX_BEGIN + SET PIXEL TO HIGH; + .+1: SET PIXEL TO LOW; + SET LINE TO LOW; + SET FRAME TO LOW; + + SET RG TO INV_HIGH; + .+30: SET RG TO INV_LOW; + + 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + .+15: SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + 30: + SET SW TO INV_HIGH; + .+5 : + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + .+10: SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + + 180: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + .+15: SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + .+15: SET SW TO INV_LOW; + + 180+147: SET NOP TO HIGH; + + +} + + #define PCLK_NOREAD_DELAY //definitions for llel total deferred charge measurement From 7ce004377f4262823649542bf224835c80cbfddd Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Sat, 2 Aug 2025 00:20:42 +0100 Subject: [PATCH 124/194] improvements to frame control loop when linbinning --- src/deimos/deimos.seq | 28 +++++++++++++++++----------- 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 2f2991f..8b1a77d 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -18,18 +18,18 @@ /** System Control Triggers **/ -param readout_enable = 0 //will be pulled externally when we want a frame -param integrate_enable = 0 // to be set externally if we want an integration time +param readout_enable = 1 //will be pulled externally when we want a frame +param integrate_enable = 1 // to be set externally if we want an integration time -param integrate_ms = 50 // will be set externally to choose integration ms +param integrate_ms = 0 // will be set externally to choose integration ms param integrate_s = 0 // will be set externally to choose integration seconds -param framecount = 1000 //will be set +param framecount = 1 //will be set param abortintegrate = 0 //checked by the integration waiters and they bail out if it is set param flush = 1 param illum = 0 -param integrate_illum_ms = 0 +param integrate_illum_ms = 50 param integrate_illum_s = 0 param rg_mod_test_mode = 0 @@ -37,8 +37,8 @@ param rg_mod_test_mode = 0 param tdi_wait_us = 0 - param llel_coincident = 1 //use coincident llel clocks - param llel_seq = 0 //use sequential llel clocks (must be not of llel_coincident) +param llel_coincident = 0 //use coincident llel clocks +param llel_seq = 1 //use sequential llel clocks (must be not of llel_coincident) //NOTE we will only do llel binning for llel_seq //because it's very tricky to get timing right @@ -246,6 +246,12 @@ SEQUENCE LineReadoutSlowPix RETURN; } +SEQUENCE linbinincrcheck +{ + if framecount linbinincr(); + RETURN; +} + SEQUENCE linbinincr { llel_bin++; RETURN; @@ -253,12 +259,12 @@ SEQUENCE linbinincr { SEQUENCE LineReadout -{ - ParallelForwardNoCoincident(llel_bin); - +{ + if framecount ParallelForwardNoCoincident(llel_bin); + if !framecount ParallelForwardNoCoincident(); //if we're doing a "linbin", increment llel_bin //by one for each line - if linbin linbinincr(); + if linbin linbinincrcheck(); //wait here is for the clamp to die down. Put some of it in prescan, but not all Wait1us(50); From 92094d5d4dbe3d1075355b510c87f0925ef17005 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Sat, 2 Aug 2025 01:01:12 +0100 Subject: [PATCH 125/194] re-arrange constants, more convenient linbin --- src/deimos/deimos.seq | 75 ++++++++++++++++++++++--------------------- 1 file changed, 39 insertions(+), 36 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 8b1a77d..b5de1e6 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -18,54 +18,44 @@ /** System Control Triggers **/ -param readout_enable = 1 //will be pulled externally when we want a frame -param integrate_enable = 1 // to be set externally if we want an integration time +param readout_enable = 1 // do readouts (almost always 1) +param integrate_enable = 1 // do integrations (almost always 1) -param integrate_ms = 0 // will be set externally to choose integration ms -param integrate_s = 0 // will be set externally to choose integration seconds +param integrate_ms = 0 // amount of time to integrate in the dark (ms component) +param integrate_s = 0 // amount of time to integrate in the dark (s component) -param framecount = 1 //will be set -param abortintegrate = 0 //checked by the integration waiters and they bail out if it is set +param framecount = 1 // how many frames to read (set to 1 to trigger a readout on next sequence +param abortintegrate = 0 // set to 1 to bail out if in the middle of an integration -param flush = 1 -param illum = 0 -param integrate_illum_ms = 50 -param integrate_illum_s = 0 +param flush = 0 // run the flush sequence between every frame + param illum = 0 //should the light be turned on for integrations + param integrate_illum_ms = 50 //amount of time to integrate with light on (ms component) + param integrate_illum_s = 0 //amount of time to integrate with light on (s component) + param rg_mod_test_mode = 0 //go into special output V_RD modulation mode - EXPERTS ONLY + param tdi_wait_us = 0 // add a TDI wait period to each llel readout in llel_seq mode (for "quickPTC") -param rg_mod_test_mode = 0 - -param tdi_wait_us = 0 - + //=====READOUT MODES -- all are MUTUALLY EXCLUSIVE ---- param llel_coincident = 0 //use coincident llel clocks -param llel_seq = 1 //use sequential llel clocks (must be not of llel_coincident) +param llel_seq = 1 //use sequential (normal) llel clocks +param slow_pix = 0 // use "slow pixel" serials +param linbin = 0 //Kaye/Smith/Greffe "linearity via binning" sequence +param dch_llel = 0 // total deferred charge measurement (llel CTI) +param dch_ser = 0 // total deferred charge measurement (serial CTI) - //NOTE we will only do llel binning for llel_seq - //because it's very tricky to get timing right - // for coincident parallels. For most of the - //purposes you'd do this it will work fine anyway -param llel_bin = 1 - - param slow_pix = 0 // use "slow pixel", mainly useful for debugging serial clock feedthroughs - +//----- END OF READOUT MODES --- +param llel_bin = 1 - //NOTE: linbin=1 increments the amount of - //llel bins by 1 each line. This is to obtain - // the Kaye/Greffe/Smith "linearity by incremental //binning" curve, or "linbin" curve -param linbin = 0 - //NOTE put these here _JUST_ so you can read them out. In order to change them need to recompile WDL (silly I know) + //calculations for linbin... +//number of linbin valuable measurements you'll get +#define LINBIN_MEAS #exec echo " (sqrt(1 + 8 * _IMAGEROWS) -1)/2 " | bc + //number of non measured linbin rows to read out to maintain total same image size +#define LINBIN_NOBIN_ROWS #eval _IMAGEROWS - LINBIN_MEAS - //const phigh = _PAR_CLOCK_HIGH - //const plow = _PAR_CLOCK_LOW - //const tghigh = _TG_CLOCK_HIGH - //const tglow = _TG_CLOCK_LOW - // const serhigh = _SER_CLOCK_HIGH - //const serlow = _SER_CLOCK_LOW - #if NOISETEST SEQUENCE NoiseTest { setupTGTest(); @@ -216,10 +206,13 @@ SEQUENCE FrameReadout //read all image rows and the desired overscan + //note these parameters are ALL mutually exclusive IF llel_seq LineReadout(TOTAL_ROWS); IF llel_coincident LineReadoutCoincident(TOTAL_ROWS); IF slow_pix LineReadoutSlowPix(TOTAL_ROWS); - + IF linbin LineReadout(LINBIN_MEAS); + IF linbin LineReadoutFast(LINBIN_NOBIN_ROWS); + ReadoutEnd(); RETURN; } @@ -258,6 +251,16 @@ SEQUENCE linbinincr { } +SEQUENCE LineReadoutFast +{ + ParallelForwardNoCoincident(); + ReadPixels(_AMPREADCOLS); + #if REMAINDER_PIX + ReadPixels(REMAINDER_PIX); + #endif + RETURN; +} + SEQUENCE LineReadout { if framecount ParallelForwardNoCoincident(llel_bin); From f351aa79fd02d9dccc5562d3718a1fc0b3d1188a Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Sat, 2 Aug 2025 03:20:19 +0100 Subject: [PATCH 126/194] working initial DEIMOS sequencer, with linbin --- src/deimos/deimos.mod | 2 +- src/deimos/deimos.seq | 85 +++++++++++++++++++------------------------ 2 files changed, 38 insertions(+), 49 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 8f3fc5e..b6152c4 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -139,7 +139,7 @@ SLOT 10 lvbias { LVLC 20 [00.0,0]; LVLC 21 [00.0,0]; LVLC 22 [00.0,0] "Video offset FCS"; - LVLC 23 [00.0,0] "Video offset SCI"; + LVLC 23 [0.35,6] "Video offset SCI"; LVLC 24 [00.0,0]; LVHC 1 [0.00,0.0,0,0]; LVHC 2 [0.00,0.0,0,0]; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index b5de1e6..8d4fb1a 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -18,13 +18,10 @@ /** System Control Triggers **/ -param readout_enable = 1 // do readouts (almost always 1) -param integrate_enable = 1 // do integrations (almost always 1) - param integrate_ms = 0 // amount of time to integrate in the dark (ms component) param integrate_s = 0 // amount of time to integrate in the dark (s component) -param framecount = 1 // how many frames to read (set to 1 to trigger a readout on next sequence +param framecount = 0 // how many frames to read (set to 1 to trigger a readout on next sequence param abortintegrate = 0 // set to 1 to bail out if in the middle of an integration param flush = 0 // run the flush sequence between every frame @@ -35,6 +32,8 @@ param flush = 0 // run the flush sequence between every frame param tdi_wait_us = 0 // add a TDI wait period to each llel readout in llel_seq mode (for "quickPTC") +param line_clamp_delay_us = 10 + //=====READOUT MODES -- all are MUTUALLY EXCLUSIVE ---- param llel_coincident = 0 //use coincident llel clocks param llel_seq = 1 //use sequential (normal) llel clocks @@ -47,15 +46,28 @@ param dch_ser = 0 // total deferred charge measurement (serial CTI) //----- END OF READOUT MODES --- param llel_bin = 1 - + //TODO: wide gate integration mode //calculations for linbin... //number of linbin valuable measurements you'll get #define LINBIN_MEAS #exec echo " (sqrt(1 + 8 * _IMAGEROWS) -1)/2 " | bc //number of non measured linbin rows to read out to maintain total same image size -#define LINBIN_NOBIN_ROWS #eval _IMAGEROWS - LINBIN_MEAS +#define LINBIN_NOBIN_ROWS #eval TOTAL_ROWS - LINBIN_MEAS + + +//segment calculations +//this does floor arithmetic, so might end up with wrong number +//if number cols changes +#define PIXELS_PER_SEG #eval _AMPREADCOLS / 3 +#define REMAINDER_PIX #eval _AMPREADCOLS - (PIXELS_PER_SEG * 3) + + +#define TOTAL_ROWS #eval _IMAGEROWS + _PARALLELOVERSCAN + + + #if NOISETEST SEQUENCE NoiseTest { setupTGTest(); @@ -111,17 +123,14 @@ SEQUENCE ClampTest - - SEQUENCE StartSeq { InitialSetup(); - if flush Flush(); - - if integrate_enable CheckIntegrate(); - if readout_enable CheckReadout(); - if rg_mod_test_mode TestBrokenReadout(); - framecount--; - GOTO StartSeq(); + if flush Flush(); + if framecount Integrate(); + if framecount ReadoutKeep(); + if !framecount LineReadoutFast(TOTAL_ROWS); + if rg_mod_test_mode TestBrokenReadout(); + GOTO StartSeq(); } @@ -148,11 +157,6 @@ SEQUENCE Flush -SEQUENCE CheckIntegrate -{ - if framecount Integrate(); - RETURN; -} SEQUENCE Integrate { @@ -160,9 +164,8 @@ SEQUENCE Integrate //NOTE: open shutter if either TDI wait or //illumination requested... if illum OpenShutter(); - if tdi_wait_us OpenShutter(); - if illum Wait1ms(integrate_illum_ms); - if illum Wait1s(integrate_illum_s); + Wait1ms(integrate_illum_ms); + Wait1s(integrate_illum_s); //but only close it if illumination (if // doing TDI we need to close it later on) if illum CloseShutter(); @@ -172,28 +175,16 @@ SEQUENCE Integrate RETURN; } -SEQUENCE CheckReadout +SEQUENCE ReadoutKeep { - if framecount KeepThisFrame(); + KeepThisFrame(); FrameReadout(); - - //TDI curve stops after readout, turn off the illumination now - if tdi_wait_us CloseShutter(); + framecount--; RETURN; } - -//segment calculations -//this does floor arithmetic, so might end up with wrong number -//if number cols changes -#define PIXELS_PER_SEG #eval _AMPREADCOLS / 3 -#define REMAINDER_PIX #eval _AMPREADCOLS - (PIXELS_PER_SEG * 3) - - -#define TOTAL_ROWS #eval _IMAGEROWS + _PARALLELOVERSCAN - SEQUENCE FrameReadout { @@ -202,7 +193,7 @@ SEQUENCE FrameReadout Wait1us(50); //single serial read to flush the register ReadPixels(_AMPREADCOLS); - + if tdi_wait_us OpenShutter(); //read all image rows and the desired overscan @@ -212,7 +203,8 @@ SEQUENCE FrameReadout IF slow_pix LineReadoutSlowPix(TOTAL_ROWS); IF linbin LineReadout(LINBIN_MEAS); IF linbin LineReadoutFast(LINBIN_NOBIN_ROWS); - + + if tdi_wait_us CloseShutter(); ReadoutEnd(); RETURN; } @@ -239,12 +231,12 @@ SEQUENCE LineReadoutSlowPix RETURN; } -SEQUENCE linbinincrcheck -{ +SEQUENCE linbinincrcheck { if framecount linbinincr(); RETURN; } + SEQUENCE linbinincr { llel_bin++; RETURN; @@ -263,14 +255,13 @@ SEQUENCE LineReadoutFast SEQUENCE LineReadout { - if framecount ParallelForwardNoCoincident(llel_bin); - if !framecount ParallelForwardNoCoincident(); + ParallelForwardNoCoincident(llel_bin); //if we're doing a "linbin", increment llel_bin //by one for each line - if linbin linbinincrcheck(); + if linbin linbinincr(); //wait here is for the clamp to die down. Put some of it in prescan, but not all - Wait1us(50); + Wait1us(line_clamp_delay_us); ReadPixels(_AMPREADCOLS); if tdi_wait_us Wait1us(tdi_wait_us); //if there are leftover pixels, do them here @@ -278,8 +269,6 @@ SEQUENCE LineReadout ReadPixels(REMAINDER_PIX); #endif - - Wait1us(10); RETURN; } From ddb35770e7f4b2cc8600a2349380cd4a2b00845a Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Sat, 2 Aug 2025 03:26:59 +0100 Subject: [PATCH 127/194] offset of 0.5 nearly there --- src/deimos/deimos.mod | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index b6152c4..64f5d3e 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -139,7 +139,7 @@ SLOT 10 lvbias { LVLC 20 [00.0,0]; LVLC 21 [00.0,0]; LVLC 22 [00.0,0] "Video offset FCS"; - LVLC 23 [0.35,6] "Video offset SCI"; + LVLC 23 [0.50,6] "Video offset SCI"; LVLC 24 [00.0,0]; LVHC 1 [0.00,0.0,0,0]; LVHC 2 [0.00,0.0,0,0]; From 784cdb00700eaa2c390c134c110ecaa1f566dbda Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 6 Aug 2025 22:42:18 +0100 Subject: [PATCH 128/194] indent at start of line sometimes seems to confuse archon config loader... --- src/deimos/deimos.cds | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 2f20be5..3b62189 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -7,8 +7,8 @@ #include "voltage_timing_parameters.h" BIGBUF = _ARCHON_FRAMEBUFS - LINECOUNT = _LINENUM - PIXELCOUNT = _AMPREADCOLS +LINECOUNT = _LINENUM +PIXELCOUNT = _AMPREADCOLS RAWENABLE = _RAW_ENABLE RAWENDLINE = 800 RAWSAMPLES = 5000 From 49a0c80d0abc6c689058615ca92bc7f8d15cce57 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 01:23:23 +0100 Subject: [PATCH 129/194] implementation of llel TDC measurement --- src/deimos/deimos.seq | 89 ++++++++++++++++++++++++++++++++++++-- src/deimos/deimos.waveform | 69 ++++++++++++++++++++++++++++- 2 files changed, 152 insertions(+), 6 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 8d4fb1a..b37de0c 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -64,9 +64,16 @@ param llel_bin = 1 #define TOTAL_ROWS #eval _IMAGEROWS + _PARALLELOVERSCAN + //calculations for total deferred charge measurements + //number of lines in the TDC segment (including + //one bright line and the rest dark) +#define LLEL_TDC_LINES 20 +#define LLEL_TDC_BININCR 1 + +#define LLEL_TDC_LOOPS #eval TOTAL_ROWS / LLEL_TDC_LINES + #define LLEL_TDC_REMAINDER #eval TOTAL_ROWS % LLEL_TDC_LINES - #if NOISETEST SEQUENCE NoiseTest { @@ -128,12 +135,14 @@ SEQUENCE StartSeq { if flush Flush(); if framecount Integrate(); if framecount ReadoutKeep(); + if !framecount LineReadoutFast(TOTAL_ROWS); if rg_mod_test_mode TestBrokenReadout(); GOTO StartSeq(); } + SEQUENCE TestBrokenReadout { OutputTestSetup(); @@ -178,12 +187,72 @@ SEQUENCE Integrate SEQUENCE ReadoutKeep { KeepThisFrame(); - FrameReadout(); + + //select the readout type + + //"normal" image readout modes + if llel_coincident FrameReadout(); + if llel_seq FrameReadout(); + if slow_pix FrameReadout(); + if linbin FrameReadout(); + if dch_llel FrameReadoutTDCllel(); + framecount--; RETURN; } +SEQUENCE FrameReadoutTDCllel +{ + ReadoutBegin(); + Wait1us(50); + ReadPixels(_AMPREADCOLS); + + //each inner loop call reads out LLEL_TDC_LINES + //lines. The total number of times we need to + //run the inner loop is therefore + // floor(TOTAL_ROWS / LLEL_TDC_LINES) + FrameReadoutTDCllel_Innerloop(LLEL_TDC_LOOPS); + + //and readout an extra TOTAL_ROWS % LLEL_TDC_LINES + //to get the same total number of lines in the + //resulting buffer + LineReadout(LLEL_TDC_REMAINDER); + + RETURN; +} + +SEQUENCE FrameReadoutTDCllel_Innerloop +{ + //the first bunch of times this happens, + //all lines will be bright (from section A) + //but as we exhaust section A, we will end up + //with dark lines from section B coming through + LineReadoutAOnly(LLEL_TDC_LINES); + + //clock Section B forward a number of times, + //this will effectively "bin" into section A + ForwardParallelSectionB(llel_bin); + + //increment linbin by the predefined amount + linbinincr(LLEL_TDC_BININCR); + + RETURN; +} + +SEQUENCE FrameReadoutTDCser +{ + //just increment the number of lines transferred + //into the serial register on each line. + //WAIT, isn't this just a linbin?? + //yes, unless you also do the fancy serial side + //clocking + + + RETURN; +} + + SEQUENCE FrameReadout { @@ -194,8 +263,7 @@ SEQUENCE FrameReadout //single serial read to flush the register ReadPixels(_AMPREADCOLS); if tdi_wait_us OpenShutter(); - - + //read all image rows and the desired overscan //note these parameters are ALL mutually exclusive IF llel_seq LineReadout(TOTAL_ROWS); @@ -292,6 +360,19 @@ SEQUENCE LineReadoutCoincident SEQUENCE LineReadoutAOnly +{ + ForwardParallelSectionANoCoincident(); + + Wait1us(line_clamp_delay_us); + ReadPixels(_AMPREADCOLS); + + #if REMAINDER_PIX + ReadPixels(REMAINDER_PIX); + + RETURN; +} + +SEQUENCE LineReadoutAOnlyCoincident { TransferToSerialRegisterCoincident(); ReadPixels(_SERIALPRESCAN); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index ac79881..5c318dd 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -263,8 +263,6 @@ WAVEFORM ParallelForwardNoCoincident .+50: SET AC_Clamp TO LOW; - - } @@ -428,6 +426,73 @@ WAVEFORM ReadPixelsSlow } +WAVEFORM ForwardParallelSectionANoCoincident +{ + 0: SET NOP TO HIGH; + .+1000:=PHASE3_HIGH + + SET SCI_PCLK3_A TO _PAR_CLOCK_HIGH, FAST; + SET TG TO _TG_CLOCK_HIGH, FAST; + + SET SW TO INV_LOW; + SET SW_CLOCKS TO _SW_LOW; + SET LINE TO HIGH; + + .+1000: SET SCI_PCLK2_A TO _PAR_CLOCK_LOW, FAST; + .+1000: SET SCI_PCLK1_A TO _PAR_CLOCK_HIGH, FAST; + .+1000:=TG_GOES_LOW SET SCI_PCLK3_A TO _PAR_CLOCK_LOW, FAST; + SET TG TO _TG_CLOCK_LOW, FAST; + + .+1000: SET SCI_PCLK2_A TO _PAR_CLOCK_HIGH, FAST; + .+1000: SET SCI_PCLK1_A TO _PAR_CLOCK_LOW, FAST; + + //delay before starting SCLKs + .+1000: SET NOP TO HIGH; + + + //serial receive side + PHASE3_HIGH: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET RG to INV_HIGH; + SET RG_CLOCKS TO _RG_HIGH; + + TG_GOES_LOW+200:=RG_GOES_LOW + SET RG TO INV_LOW; + SET RG_CLOCKS TO _RG_LOW; + .+50: SET AC_Clamp to HIGH; + .+300: + SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + + .+50: SET AC_Clamp TO LOW; + +} + +WAVEFORM ForwardParallelSectionBNoCoincident +{ + 0: SET NOP TO HIGH; + .+1000:=PHASE3_HIGH + + SET SCI_PCLK3_B TO _PAR_CLOCK_HIGH, FAST; + + .+1000: SET SCI_PCLK2_B TO _PAR_CLOCK_LOW, FAST; + .+1000: SET SCI_PCLK1_B TO _PAR_CLOCK_HIGH, FAST; + .+1000:=TG_GOES_LOW SET SCI_PCLK3_B TO _PAR_CLOCK_LOW, FAST; + + .+1000: SET SCI_PCLK2_B TO _PAR_CLOCK_HIGH, FAST; + .+1000: SET SCI_PCLK1_B TO _PAR_CLOCK_LOW, FAST; + + //delay before starting SCLKs + .+1000: SET NOP TO HIGH; + + //no serial receive or TGA, this is purely on the B segment to move into A segment + + +} + + #define PCLK_NOREAD_DELAY From 578069e02aa1fce20d9b95995f7a7108a3670745 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 02:12:45 +0100 Subject: [PATCH 130/194] switch to non-coincident llels in the TDC measurement --- src/deimos/deimos.seq | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index b37de0c..ef9dbd1 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -232,7 +232,7 @@ SEQUENCE FrameReadoutTDCllel_Innerloop //clock Section B forward a number of times, //this will effectively "bin" into section A - ForwardParallelSectionB(llel_bin); + ForwardParallelSectionBNoCoincident(llel_bin); //increment linbin by the predefined amount linbinincr(LLEL_TDC_BININCR); From eded65ad4a61e8ca3674e05d442f8aa123471791 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 04:05:33 +0100 Subject: [PATCH 131/194] implement serial TDC measurement scheme --- src/deimos/deimos.seq | 56 +++++++++++++++--- src/deimos/deimos.waveform | 118 ++++++++++++++++++------------------- 2 files changed, 107 insertions(+), 67 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index ef9dbd1..3c0ee9a 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -45,6 +45,15 @@ param dch_ser = 0 // total deferred charge measurement (serial CTI) //----- END OF READOUT MODES --- param llel_bin = 1 +param ser_bin = 1 + + + //serial CTI measurement configuration modes + //direction 0 means read out towards E, dump + //backwards from F. direction 1 means read + //out towards F, dump backwards from E + param dsch_ser_direction = 0 + //TODO: wide gate integration mode @@ -55,6 +64,8 @@ param llel_bin = 1 #define LINBIN_NOBIN_ROWS #eval TOTAL_ROWS - LINBIN_MEAS + + //segment calculations //this does floor arithmetic, so might end up with wrong number //if number cols changes @@ -68,13 +79,17 @@ param llel_bin = 1 //number of lines in the TDC segment (including //one bright line and the rest dark) -#define LLEL_TDC_LINES 20 +#define LLEL_TDC_LINES 60 #define LLEL_TDC_BININCR 1 #define LLEL_TDC_LOOPS #eval TOTAL_ROWS / LLEL_TDC_LINES #define LLEL_TDC_REMAINDER #eval TOTAL_ROWS % LLEL_TDC_LINES - +#define SER_TDC_LINES 21 +#define SER_TDC_BININCR 1 +#define SER_TDC_LOOPS #eval (_AMPCOLS + _SERIALOVERSCAN) / SER_TDC_LINES +#define SER_TDC_REMAINDER #eval _AMPREADCOLS % SER_TDC_LINES + #if NOISETEST SEQUENCE NoiseTest { setupTGTest(); @@ -242,16 +257,43 @@ SEQUENCE FrameReadoutTDCllel_Innerloop SEQUENCE FrameReadoutTDCser { - //just increment the number of lines transferred - //into the serial register on each line. - //WAIT, isn't this just a linbin?? - //yes, unless you also do the fancy serial side - //clocking + ReadoutBegin(); + Wait1us(50); + ReadPixels(_AMPREADCOLS); + + //each inner loop returns one row, so + //just match total rows for other readout + //sequences + FrameReadoutTDCser_Innerloop(TOTAL_ROWS); + RETURN; +} + +SEQUENCE FrameReadoutTDCser_Innerloop +{ + //load a line + ParallelForwardNoCoincident(); + + //need to readout prescan anyway, nothing doing there + if !dsch_ser_direction ReadPixelsEOnly(_SERIALPRESCAN); + if dsch_ser_direction ReadPixelsFOnly(_SERIALPRESCAN); + + //now readout a number of pixels + if !dsch_ser_direction ReadPixelsEOnly(SER_TDC_LINES); + if dsch_ser_direction ReadPixelsFOnly(SER_TDC_LINES); + //clock the other output backwards into the opposite register half + if !dsch_ser_direction SerialFBackwards(ser_bin); + if dsch_ser_direction SerialEBackwards(ser_bin); + serbinincr(SER_TDC_BININCR); RETURN; } +SEQUENCE serbinincr +{ + ser_bin++; + RETURN; +} SEQUENCE FrameReadout diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 5c318dd..88f070a 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -556,92 +556,90 @@ WAVEFORM Wait10us //readout only clocking the E register (we have stored bright edge in the F for this one) WAVEFORM ReadPixelsEOnly { - //NB using slow slew rate for triangular serial clocking + //NB using slow slew rate for triangular serial clockingdef 0:=PIX_BEGIN - //SW and RG are on LVDS signals + SET PIXEL TO HIGH; + .+1: SET PIXEL TO LOW; + SET LINE TO LOW; + SET FRAME TO LOW; + //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted + .+30: SET RG TO INV_LOW; + //charge STARTS UNDER RPhi2 - PIX_BEGIN+RG_settleT: SET RG to INV_LOW; - SET PIXEL TO HIGH; - .+1:=CDS_RESET_BEGIN SET PIXEL TO LOW; - SET LINE TO LOW; - SET FRAME TO LOW; - //serials COINCIDENT, start moving charge immediately - //when CDS reset begins - SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; - SET SW TO INV_HIGH; - - .+SW_settleT: SET SW TO INV_LOW; - - - - - //now we're in the CDS signal period begin triangular shuffling serials again - CDS_RESET_BEGIN+CDS_RESET_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, SLOW; + //conventional serial clock + 0: SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, FAST; + .+30: + SET SW TO INV_HIGH; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, FAST; + .+150: SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET SW TO INV_LOW; - .+CDS_SIGNAL_LENGTH: SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, SLOW; + //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL + //stay as groups of 8. + .+147: SET NOP TO HIGH; } - -//similarly, read out only clocking the F register WAVEFORM ReadPixelsFOnly { - //NB using slow slew rate for triangular serial clocking + //NB using slow slew rate for triangular serial clockingdef 0:=PIX_BEGIN - //SW and RG are on LVDS signals + SET PIXEL TO HIGH; + .+1: SET PIXEL TO LOW; + SET LINE TO LOW; + SET FRAME TO LOW; + //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted + .+30: SET RG TO INV_LOW; + //charge STARTS UNDER RPhi2 + + //conventional serial clock + 0: SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, FAST; + .+30: + SET SW TO INV_HIGH; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, FAST; + .+150: SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET SW TO INV_LOW; + + //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL + //stay as groups of 8. + .+147: SET NOP TO HIGH; +} - PIX_BEGIN+RG_settleT: SET RG to INV_LOW; - SET PIXEL TO HIGH; - .+1:=CDS_RESET_BEGIN SET PIXEL TO LOW; - SET LINE TO LOW; - SET FRAME TO LOW; - //serials COINCIDENT, start moving charge immediately - //when CDS reset begins - SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; - //...except the summing wells at the output which we pulse just when we - //finish CDS first integration period - CDS_RESET_BEGIN+COINC_SW_DELAY:=SWPULSE_START SET SW TO INV_HIGH; //NOTE: summing well is inverted - SWPULSE_START+SW_settleT: SET SW TO INV_LOW; - //now we're in the CDS signal period begin triangular shuffling serials again - CDS_RESET_BEGIN+CDS_RESET_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, SLOW; - .+CDS_SIGNAL_LENGTH: SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, SLOW; -} //use this to move charge from F register back into E register WAVEFORM SerialFBackwards { - 0: SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, SLOW; - CDS_RESET_BEGIN+CDS_RESET_LENGTH: - SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; + 0: SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + + .+30: SET SCI_SCLK3 to _SER_CLOCK_LOW, FAST; + SET SCI_SCLK2_FONLY to _SER_CLOCK_HIGH, FAST; - .+CDS_SIGNAL_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, SLOW; + .+30: SET SCI_SCLK1_FONLY to _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, FAST; } //use this to move charge from E register back into F register WAVEFORM SerialEBackwards { - 0: SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, SLOW; +0: SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; - CDS_RESET_BEGIN+CDS_RESET_LENGTH: - SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK3 TO _SER_CLOCK_HIGH, SLOW; + .+30: SET SCI_SCLK3 to _SER_CLOCK_LOW, FAST; + SET SCI_SCLK2_EONLY to _SER_CLOCK_HIGH, FAST; - .+CDS_SIGNAL_LENGTH: SET SCI_SCLK3 TO _SER_CLOCK_LOW, SLOW; - SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, SLOW; + .+30: SET SCI_SCLK1_EONLY to _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, FAST; } From 776a961560588951916242fb79778ffa392e91da Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 04:09:55 +0100 Subject: [PATCH 132/194] add missing call in main readout loop for TDC ser --- src/deimos/deimos.seq | 1 + 1 file changed, 1 insertion(+) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 3c0ee9a..f2e72ae 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -211,6 +211,7 @@ SEQUENCE ReadoutKeep if slow_pix FrameReadout(); if linbin FrameReadout(); if dch_llel FrameReadoutTDCllel(); + if dch_ser FrameReadoutTDCser(); framecount--; RETURN; From 9a8631f29492bd7584db342f70a5a6bac7dc87ef Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 04:26:31 +0100 Subject: [PATCH 133/194] fix TDC serial loops, try again --- src/deimos/deimos.seq | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index f2e72ae..02e98e3 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -85,10 +85,10 @@ param ser_bin = 1 #define LLEL_TDC_LOOPS #eval TOTAL_ROWS / LLEL_TDC_LINES #define LLEL_TDC_REMAINDER #eval TOTAL_ROWS % LLEL_TDC_LINES -#define SER_TDC_LINES 21 +#define SER_TDC_COLS 21 #define SER_TDC_BININCR 1 -#define SER_TDC_LOOPS #eval (_AMPCOLS + _SERIALOVERSCAN) / SER_TDC_LINES -#define SER_TDC_REMAINDER #eval _AMPREADCOLS % SER_TDC_LINES +#define SER_TDC_LOOPS #eval (_AMPCOLS + _SERIALOVERSCAN) / SER_TDC_COLS +#define SER_TDC_REMAINDER #eval _AMPREADCOLS % SER_TDC_COLS #if NOISETEST SEQUENCE NoiseTest { @@ -265,22 +265,28 @@ SEQUENCE FrameReadoutTDCser //each inner loop returns one row, so //just match total rows for other readout //sequences - FrameReadoutTDCser_Innerloop(TOTAL_ROWS); + LineReadoutTDCser(TOTAL_ROWS); RETURN; } -SEQUENCE FrameReadoutTDCser_Innerloop +SEQUENCE LineReadoutTDCser { //load a line ParallelForwardNoCoincident(); - //need to readout prescan anyway, nothing doing there if !dsch_ser_direction ReadPixelsEOnly(_SERIALPRESCAN); if dsch_ser_direction ReadPixelsFOnly(_SERIALPRESCAN); + + TDCser_Innerloop(SER_TDC_LOOPS); + ReadPixels(SER_TDC_REMAINDER); + RETURN; +} +SEQUENCE TDCser_Innerloop +{ //now readout a number of pixels - if !dsch_ser_direction ReadPixelsEOnly(SER_TDC_LINES); - if dsch_ser_direction ReadPixelsFOnly(SER_TDC_LINES); + if !dsch_ser_direction ReadPixelsEOnly(SER_TDC_COLS); + if dsch_ser_direction ReadPixelsFOnly(SER_TDC_COLS); //clock the other output backwards into the opposite register half if !dsch_ser_direction SerialFBackwards(ser_bin); @@ -376,10 +382,6 @@ SEQUENCE LineReadout ReadPixels(_AMPREADCOLS); if tdi_wait_us Wait1us(tdi_wait_us); //if there are leftover pixels, do them here - #if REMAINDER_PIX - ReadPixels(REMAINDER_PIX); - - #endif RETURN; } From f7e629eac9cb6a561114aa473d79b4ff1b71fbd4 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 05:05:44 +0100 Subject: [PATCH 134/194] sort out incremental counter stuff --- src/deimos/deimos.seq | 74 +++++++------------------------------------ 1 file changed, 11 insertions(+), 63 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 02e98e3..e26d131 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -272,13 +272,18 @@ SEQUENCE FrameReadoutTDCser SEQUENCE LineReadoutTDCser { //load a line - ParallelForwardNoCoincident(); + ParallelForwardNoCoincident(llel_bin); //need to readout prescan anyway, nothing doing there if !dsch_ser_direction ReadPixelsEOnly(_SERIALPRESCAN); if dsch_ser_direction ReadPixelsFOnly(_SERIALPRESCAN); TDCser_Innerloop(SER_TDC_LOOPS); ReadPixels(SER_TDC_REMAINDER); + + //ser_bin has been incremented a bunch, need to decrement it back to 1 + serbindecr(ser_bin); //now it's 0 + serbinincr(); //now it's 1 + RETURN; } @@ -302,6 +307,11 @@ SEQUENCE serbinincr RETURN; } +SEQUENCE serbindecr +{ + ser_bin--; + RETURN; +} SEQUENCE FrameReadout { @@ -434,65 +444,3 @@ SEQUENCE LineReadoutAOnlyCoincident RETURN ; } -SEQUENCE ParallelDCMeasReadout -{ - ReadoutBegin(); - //single line read to flush the register - ReadPixels(_AMPREADCOLS); - - //dump the 'A' image section - LineReadoutAOnly(_SECTION_A_ROWS); - ParallelDCLineLoop(LLEL_TDC_LOOPS); - RETURN; - -} - -SEQUENCE ParallelDCLineLoop -{ - //now we have a bunch of charge in B section, A section is empty - //go forward on B clocks only, this gets a bright line into section A - //multiple forwards of section B bins charge into section A - ForwardParallelSectionB(LLEL_TDC_BINS); - - //then forward for the number of line spacings - LineReadoutAOnly(LLEL_TDC_LINE_SPACING); - RETURN; -} - - -SEQUENCE SerialDCMeasReadoutE -{ - ReadoutBegin(); - //single line read to flush the register - ReadPixels(_AMPREADCOLS); - - //run the serial DC line loop - - RETURN; -} - -SEQUENCE SerialDCLineLoopE -{ - //first we dump a number of lines into the serial register (to build uBp the charge size) - ForwardParallelAll(SER_TDC_LLEL_BINS); - - //now empty the E side of the register - ReadPixelsEOnly(_AMPCOLS); - - //read out pixels from E only - the number read out is the spacing - ReadPixelsEOnly(SER_TDC_ROW_SPACING); - - - RETURN; - -} - -SEQUENCE SerialDCRowLoopE -{ - //back clock F the defined number of times this should get a bright line into E - SerialFBackwards(SER_TDC_SER_BINS); - //read out the pixels from E register only - NO NEED TO - ReadPixelsEOnly(SER_TDC_ROW_SPACING); - - RETURN; -} From e692d9ca23932a45b6534500b0cd7c2f9b3981d8 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 06:36:08 +0100 Subject: [PATCH 135/194] add extra dump sequence for serial TDC measurement --- src/deimos/deimos.seq | 10 ++++--- src/deimos/deimos.waveform | 53 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 60 insertions(+), 3 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index e26d131..a844a15 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -90,6 +90,8 @@ param ser_bin = 1 #define SER_TDC_LOOPS #eval (_AMPCOLS + _SERIALOVERSCAN) / SER_TDC_COLS #define SER_TDC_REMAINDER #eval _AMPREADCOLS % SER_TDC_COLS +#define SER_COLS_LEFTOVER #eval (_AMPCOLS - SER_TDC_LOOPS) + #if NOISETEST SEQUENCE NoiseTest { setupTGTest(); @@ -280,6 +282,10 @@ SEQUENCE LineReadoutTDCser TDCser_Innerloop(SER_TDC_LOOPS); ReadPixels(SER_TDC_REMAINDER); + //need to dump out the rest of the pixels on the opposite side amplifier + if !dsch_ser_direction DumpPixelsFOnly(SER_COLS_LEFTOVER); + if dsch_ser_direction DumpPixelsEOnly(SER_COLS_LEFTOVER); + //ser_bin has been incremented a bunch, need to decrement it back to 1 serbindecr(ser_bin); //now it's 0 serbinincr(); //now it's 1 @@ -380,6 +386,7 @@ SEQUENCE LineReadoutFast RETURN; } + SEQUENCE LineReadout { ParallelForwardNoCoincident(llel_bin); @@ -421,9 +428,6 @@ SEQUENCE LineReadoutAOnly Wait1us(line_clamp_delay_us); ReadPixels(_AMPREADCOLS); - #if REMAINDER_PIX - ReadPixels(REMAINDER_PIX); - RETURN; } diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 88f070a..a80d201 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -398,6 +398,8 @@ WAVEFORM ReadPixels } + + WAVEFORM ReadPixelsSlow { 0 := PIX_BEGIN @@ -613,6 +615,57 @@ WAVEFORM ReadPixelsFOnly } +//readout only clocking the E register (we have stored bright edge in the F for this one) +WAVEFORM DumpPixelsEOnly +{ + //NB using slow slew rate for triangular serial clockingdef + 0:=PIX_BEGIN + //reset pulse at the start of the pixel + SET RG TO INV_HIGH; //NOTE reset gate is inverted + .+31: SET RG TO INV_LOW; + //charge STARTS UNDER RPhi2 + + //conventional serial clock + 0: SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, FAST; + .+30: + SET SW TO INV_HIGH; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, FAST; + .+150: SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET SW TO INV_LOW; + + //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL + //stay as groups of 8. + .+147: SET NOP TO HIGH; +} + + +WAVEFORM DumpPixelsFOnly +{ + //NB using slow slew rate for triangular serial clockingdef + 0:=PIX_BEGIN + //reset pulse at the start of the pixel + SET RG TO INV_HIGH; //NOTE reset gate is inverted + .+31: SET RG TO INV_LOW; + //charge STARTS UNDER RPhi2 + + //conventional serial clock + 0: SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, FAST; + .+30: + SET SW TO INV_HIGH; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, FAST; + .+150: SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET SW TO INV_LOW; + + //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL + //stay as groups of 8. + .+147: SET NOP TO HIGH; +} From dc78db78121ca9776ced8a2d9628bb54204e10fe Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 06:50:52 +0100 Subject: [PATCH 136/194] add readouts to make buffer sizes match --- src/deimos/deimos.seq | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index a844a15..067bd1e 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -283,8 +283,8 @@ SEQUENCE LineReadoutTDCser ReadPixels(SER_TDC_REMAINDER); //need to dump out the rest of the pixels on the opposite side amplifier - if !dsch_ser_direction DumpPixelsFOnly(SER_COLS_LEFTOVER); - if dsch_ser_direction DumpPixelsEOnly(SER_COLS_LEFTOVER); + if !dsch_ser_direction ReadPixelsFOnly(SER_COLS_LEFTOVER); + if dsch_ser_direction ReadPixelsEOnly(SER_COLS_LEFTOVER); //ser_bin has been incremented a bunch, need to decrement it back to 1 serbindecr(ser_bin); //now it's 0 From c7194d3faa32ff2632a1a7f36846116fc5c5a0b6 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 06:57:50 +0100 Subject: [PATCH 137/194] extra dump sequence I think is needed --- src/deimos/deimos.seq | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 067bd1e..b148083 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -278,6 +278,9 @@ SEQUENCE LineReadoutTDCser //need to readout prescan anyway, nothing doing there if !dsch_ser_direction ReadPixelsEOnly(_SERIALPRESCAN); if dsch_ser_direction ReadPixelsFOnly(_SERIALPRESCAN); + + if !dsch_ser_direction DumpPixelsEOnly(_AMPCOLS); + if dsch_ser_direction DumpPixelsFOnly(_AMPCOLS) TDCser_Innerloop(SER_TDC_LOOPS); ReadPixels(SER_TDC_REMAINDER); From 2c104365c50d83ed384b03ce87cb172da3d0765c Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 07:07:46 +0100 Subject: [PATCH 138/194] another attempt at correct dump sequence for serial TDC --- src/deimos/deimos.seq | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index b148083..d1f09ef 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -286,8 +286,10 @@ SEQUENCE LineReadoutTDCser ReadPixels(SER_TDC_REMAINDER); //need to dump out the rest of the pixels on the opposite side amplifier - if !dsch_ser_direction ReadPixelsFOnly(SER_COLS_LEFTOVER); - if dsch_ser_direction ReadPixelsEOnly(SER_COLS_LEFTOVER); + if !dsch_ser_direction DumpPixelsFOnly(SER_COLS_LEFTOVER); + if dsch_ser_direction DumpPixelsEOnly(SER_COLS_LEFTOVER); + + //ser_bin has been incremented a bunch, need to decrement it back to 1 serbindecr(ser_bin); //now it's 0 From 94e499c5fa52c2afba8c6ab12477a6ef602fc505 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 08:45:49 +0100 Subject: [PATCH 139/194] incorrect read direction in llel TDC --- src/deimos/deimos.seq | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index d1f09ef..979b629 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -280,10 +280,12 @@ SEQUENCE LineReadoutTDCser if dsch_ser_direction ReadPixelsFOnly(_SERIALPRESCAN); if !dsch_ser_direction DumpPixelsEOnly(_AMPCOLS); - if dsch_ser_direction DumpPixelsFOnly(_AMPCOLS) + if dsch_ser_direction DumpPixelsFOnly(_AMPCOLS); TDCser_Innerloop(SER_TDC_LOOPS); - ReadPixels(SER_TDC_REMAINDER); + if !dsch_ser_direction ReadPixelsEOnly(SER_TDC_REMAINDER); + if dsch_ser_direction ReadPixelsEOnly(SER_TDC_REMAINDER); + //need to dump out the rest of the pixels on the opposite side amplifier if !dsch_ser_direction DumpPixelsFOnly(SER_COLS_LEFTOVER); From f301196f11428020cc04a28a8c24bb67c525ff98 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 7 Aug 2025 12:21:26 +0100 Subject: [PATCH 140/194] FINALLY working serial TDC images... yes --- src/deimos/deimos.seq | 64 ++++++++++++++++++++++----------- src/deimos/deimos.waveform | 72 +++++++++++++++++++++++++++++++++++--- 2 files changed, 112 insertions(+), 24 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 979b629..9b96347 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -21,7 +21,7 @@ param integrate_ms = 0 // amount of time to integrate in the dark (ms component) param integrate_s = 0 // amount of time to integrate in the dark (s component) -param framecount = 0 // how many frames to read (set to 1 to trigger a readout on next sequence +param framecount = 1 // how many frames to read (set to 1 to trigger a readout on next sequence param abortintegrate = 0 // set to 1 to bail out if in the middle of an integration param flush = 0 // run the flush sequence between every frame @@ -88,9 +88,10 @@ param ser_bin = 1 #define SER_TDC_COLS 21 #define SER_TDC_BININCR 1 #define SER_TDC_LOOPS #eval (_AMPCOLS + _SERIALOVERSCAN) / SER_TDC_COLS -#define SER_TDC_REMAINDER #eval _AMPREADCOLS % SER_TDC_COLS +#define SER_TDC_REMAINDER #eval (_AMPCOLS + _SERIALOVERSCAN) % SER_TDC_COLS -#define SER_COLS_LEFTOVER #eval (_AMPCOLS - SER_TDC_LOOPS) +#define SER_COLS_LEFTOVER #eval (_AMPCOLS +_SERIALOVERSCAN - SER_TDC_LOOPS) +#define SER_TDC_DUMPCOLS #eval (_SERIALPRESCAN + _AMPCOLS) #if NOISETEST SEQUENCE NoiseTest { @@ -181,8 +182,21 @@ SEQUENCE Flush RETURN Flush; } +SEQUENCE EvacuateE +{ + EvacuateEStart(); + Wait1ms(); + EvacuateEFinish(); + RETURN; +} - +SEQUENCE EvacuateF +{ + EvacuateFStart(); + Wait1ms(); + EvacuateFFinish(); + RETURN; +} SEQUENCE Integrate { @@ -236,7 +250,8 @@ SEQUENCE FrameReadoutTDCllel //to get the same total number of lines in the //resulting buffer LineReadout(LLEL_TDC_REMAINDER); - + + ReadoutEnd(); RETURN; } @@ -268,6 +283,8 @@ SEQUENCE FrameReadoutTDCser //just match total rows for other readout //sequences LineReadoutTDCser(TOTAL_ROWS); + + ReadoutEnd(); RETURN; } @@ -275,23 +292,29 @@ SEQUENCE LineReadoutTDCser { //load a line ParallelForwardNoCoincident(llel_bin); - //need to readout prescan anyway, nothing doing there - if !dsch_ser_direction ReadPixelsEOnly(_SERIALPRESCAN); - if dsch_ser_direction ReadPixelsFOnly(_SERIALPRESCAN); - if !dsch_ser_direction DumpPixelsEOnly(_AMPCOLS); - if dsch_ser_direction DumpPixelsFOnly(_AMPCOLS); - + Wait1us(line_clamp_delay_us); + + //do the TDC measurement TDCser_Innerloop(SER_TDC_LOOPS); - if !dsch_ser_direction ReadPixelsEOnly(SER_TDC_REMAINDER); - if dsch_ser_direction ReadPixelsEOnly(SER_TDC_REMAINDER); + //dump our half of the register in front of TDC lines + if !dsch_ser_direction DumpPixelsEOnly(SER_TDC_REMAINDER); + if dsch_ser_direction DumpPixelsFOnly(SER_TDC_REMAINDER); - //need to dump out the rest of the pixels on the opposite side amplifier - if !dsch_ser_direction DumpPixelsFOnly(SER_COLS_LEFTOVER); - if dsch_ser_direction DumpPixelsEOnly(SER_COLS_LEFTOVER); + //read a whole row + if !dsch_ser_direction ReadPixelsEOnly(_AMPREADCOLS); + if dsch_ser_direction ReadPixelsFOnly(_AMPREADCOLS); + + + //now evacuate the other side of the register + //evacuate our entire half of the register + if !dsch_ser_direction EvacuateF(); + if dsch_ser_direction EvacuateE(); + + //ser_bin has been incremented a bunch, need to decrement it back to 1 serbindecr(ser_bin); //now it's 0 @@ -300,11 +323,12 @@ SEQUENCE LineReadoutTDCser RETURN; } + SEQUENCE TDCser_Innerloop -{ + { //now readout a number of pixels - if !dsch_ser_direction ReadPixelsEOnly(SER_TDC_COLS); - if dsch_ser_direction ReadPixelsFOnly(SER_TDC_COLS); + if !dsch_ser_direction DumpPixelsEOnly(SER_TDC_COLS); + if dsch_ser_direction DumpPixelsFOnly(SER_TDC_COLS); //clock the other output backwards into the opposite register half if !dsch_ser_direction SerialFBackwards(ser_bin); @@ -312,7 +336,7 @@ SEQUENCE TDCser_Innerloop serbinincr(SER_TDC_BININCR); RETURN; -} +} SEQUENCE serbinincr { diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index a80d201..0d58422 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -672,21 +672,37 @@ WAVEFORM DumpPixelsFOnly //use this to move charge from F register back into E register WAVEFORM SerialFBackwards { - 0: SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + //first, set the E side to receive + //in the beggining, everything is under SCI_SCLK1_EONLY + //so we move everything to be under number 2 + 0: SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, FAST; + + .+30: SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_RCV, FAST; .+30: SET SCI_SCLK3 to _SER_CLOCK_LOW, FAST; SET SCI_SCLK2_FONLY to _SER_CLOCK_HIGH, FAST; .+30: SET SCI_SCLK1_FONLY to _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, FAST; + + //and now move the charge under E back again + .+30: SET SCI_SCLK2_EONLY to _SER_CLOCK_LOW, FAST; + SET SCI_SCLK1_EONLY to _SER_CLOCK_HIGH, FAST; } //use this to move charge from E register back into F register WAVEFORM SerialEBackwards { -0: SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + //first, set the F side to receive + //in the beggining, everything is under SCI_SCLK1_EONLY + //so we move everything to be under number 2 + 0: SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, FAST; + + .+30: SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_RCV, FAST; .+30: SET SCI_SCLK3 to _SER_CLOCK_LOW, FAST; SET SCI_SCLK2_EONLY to _SER_CLOCK_HIGH, FAST; @@ -694,6 +710,54 @@ WAVEFORM SerialEBackwards .+30: SET SCI_SCLK1_EONLY to _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, FAST; + //and now move the charge under E back again + .+30: SET SCI_SCLK2_FONLY to _SER_CLOCK_LOW, FAST; + SET SCI_SCLK1_FONLY to _SER_CLOCK_HIGH, FAST; + +} + + +WAVEFORM EvacuateFFinish +{ + 0: + SET SW TO INV_LOW; + SET RG TO INV_LOW; + .+2000: + SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, FAST; + .+500: SET NOP TO HIGH; +} + +WAVEFORM EvacuateFStart +{ + 0: SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, FAST; + SET SW TO INV_HIGH; + SET RG TO INV_HIGH; +} + + +WAVEFORM EvacuateEFinish +{ + 0: + SET SW TO INV_LOW; + SET RG TO INV_LOW; + .+2000: + SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, FAST; + .+500: SET NOP TO HIGH; +} + +WAVEFORM EvacuateEStart +{ + 0: SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, FAST; + SET SW TO INV_HIGH; + SET RG TO INV_HIGH; } From ef2cb70c32aa5fc96b2cf974d0696347f3d4b6ff Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Sun, 10 Aug 2025 01:04:01 +0100 Subject: [PATCH 141/194] extend CDS a little bit --- src/deimos/deimos.waveform | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 0d58422..9c27f4a 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -377,7 +377,7 @@ WAVEFORM ReadPixels SET FRAME TO LOW; //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - .+30: SET RG TO INV_LOW; + .+40: SET RG TO INV_LOW; //charge STARTS UNDER RPhi2 //conventional serial clock @@ -389,11 +389,11 @@ WAVEFORM ReadPixels SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; .+150: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - SET SW TO INV_LOW; + .+30: SET SW TO INV_LOW; //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+147: SET NOP TO HIGH; + .+117: SET NOP TO HIGH; } @@ -566,7 +566,7 @@ WAVEFORM ReadPixelsEOnly SET FRAME TO LOW; //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - .+30: SET RG TO INV_LOW; + .+40: SET RG TO INV_LOW; //charge STARTS UNDER RPhi2 //conventional serial clock @@ -578,11 +578,11 @@ WAVEFORM ReadPixelsEOnly SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, FAST; .+150: SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - SET SW TO INV_LOW; + .+30: SET SW TO INV_LOW; //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+147: SET NOP TO HIGH; + .+117: SET NOP TO HIGH; } WAVEFORM ReadPixelsFOnly @@ -595,7 +595,7 @@ WAVEFORM ReadPixelsFOnly SET FRAME TO LOW; //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - .+30: SET RG TO INV_LOW; + .+40: SET RG TO INV_LOW; //charge STARTS UNDER RPhi2 //conventional serial clock @@ -607,11 +607,11 @@ WAVEFORM ReadPixelsFOnly SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, FAST; .+150: SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - SET SW TO INV_LOW; + .+30: SET SW TO INV_LOW; //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+147: SET NOP TO HIGH; + .+117: SET NOP TO HIGH; } From 894bbeff6ebfbee693fb46d150935bda0a008fa7 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 12 Aug 2025 12:54:46 +0100 Subject: [PATCH 142/194] attempt to get faster feedback on pulling framecount --- src/deimos/deimos.seq | 37 +++++++++++++++++++++++++++++-------- src/deimos/deimos.waveform | 28 ++++++++++++++++++++++++++++ 2 files changed, 57 insertions(+), 8 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 9b96347..c8fd5e8 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -21,7 +21,7 @@ param integrate_ms = 0 // amount of time to integrate in the dark (ms component) param integrate_s = 0 // amount of time to integrate in the dark (s component) -param framecount = 1 // how many frames to read (set to 1 to trigger a readout on next sequence +param framecount = 0 // how many frames to read (set to 1 to trigger a readout on next sequence param abortintegrate = 0 // set to 1 to bail out if in the middle of an integration param flush = 0 // run the flush sequence between every frame @@ -218,7 +218,12 @@ SEQUENCE Integrate SEQUENCE ReadoutKeep { KeepThisFrame(); + //read one "dummy" line to get the frame + //into the buffers (i.e. visible) + ReadoutBegin(); + ReadPixels(_AMPREADCOLS); + //select the readout type //"normal" image readout modes @@ -252,6 +257,11 @@ SEQUENCE FrameReadoutTDCllel LineReadout(LLEL_TDC_REMAINDER); ReadoutEnd(); + + //reset linbin + linbindecr(llel_bin); + linbinincr(); + RETURN; } @@ -314,8 +324,6 @@ SEQUENCE LineReadoutTDCser if !dsch_ser_direction EvacuateF(); if dsch_ser_direction EvacuateE(); - - //ser_bin has been incremented a bunch, need to decrement it back to 1 serbindecr(ser_bin); //now it's 0 serbinincr(); //now it's 1 @@ -354,10 +362,9 @@ SEQUENCE FrameReadout { //Readout begin does half a llel transfer, so wait while that settles doewn - ReadoutBegin(); Wait1us(50); //single serial read to flush the register - ReadPixels(_AMPREADCOLS); + DumpPixels(_AMPREADCOLS); if tdi_wait_us OpenShutter(); //read all image rows and the desired overscan @@ -370,6 +377,12 @@ SEQUENCE FrameReadout if tdi_wait_us CloseShutter(); ReadoutEnd(); + + //reset llel_bin value + if linbin linbindecr(llel_bin); + if linbin linbinincr(); + + RETURN; } @@ -406,14 +419,22 @@ SEQUENCE linbinincr { RETURN; } +SEQUENCE linbindecr { + llel_bin--; + RETURN; +} + SEQUENCE LineReadoutFast { ParallelForwardNoCoincident(); ReadPixels(_AMPREADCOLS); - #if REMAINDER_PIX - ReadPixels(REMAINDER_PIX); - #endif + RETURN; +} + +SEQUENCE LineDump +{ + DumpPixels(_AMPREADCOLS); RETURN; } diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 9c27f4a..f7d2ef7 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -614,6 +614,34 @@ WAVEFORM ReadPixelsFOnly .+117: SET NOP TO HIGH; } +WAVEFORM DumpPixels +{ + //NB using slow slew rate for triangular serial clockingdef + 0:=PIX_BEGIN + //reset pulse at the start of the pixel + SET RG TO INV_HIGH; //NOTE reset gate is inverted + .+31: SET RG TO INV_LOW; + //charge STARTS UNDER RPhi2 + + //conventional serial clock + 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + .+30: + SET SW TO INV_HIGH; + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + .+150: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET SW TO INV_LOW; + + //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL + //stay as groups of 8. + .+147: SET NOP TO HIGH; +} + + + + //readout only clocking the E register (we have stored bright edge in the F for this one) WAVEFORM DumpPixelsEOnly From faa70e7df904f9d2c94c0542230f7675ac871f98 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 12 Aug 2025 13:07:29 +0100 Subject: [PATCH 143/194] more optimisation of readout sequence for speed o software I think --- src/deimos/deimos.seq | 26 ++++++++++++++++---------- src/deimos/deimos.waveform | 1 + 2 files changed, 17 insertions(+), 10 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index c8fd5e8..b2a5bb9 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -151,15 +151,20 @@ SEQUENCE ClampTest SEQUENCE StartSeq { InitialSetup(); if flush Flush(); - if framecount Integrate(); - if framecount ReadoutKeep(); - + if framecount IntegrateAndReadout(); if !framecount LineReadoutFast(TOTAL_ROWS); if rg_mod_test_mode TestBrokenReadout(); GOTO StartSeq(); } +SEQUENCE IntegrateAndReadout +{ + Integrate(); + ReadoutKeep(); + RETURN; +} + SEQUENCE TestBrokenReadout { @@ -200,7 +205,12 @@ SEQUENCE EvacuateF SEQUENCE Integrate { - + KeepThisFrame(); + //NOTE: do ONE line of readout now, + //to get the buffer locked + //so we can see it's moving from outside + ReadPixels(_AMPREADCOLS); + //NOTE: open shutter if either TDI wait or //illumination requested... if illum OpenShutter(); @@ -217,13 +227,10 @@ SEQUENCE Integrate SEQUENCE ReadoutKeep { - KeepThisFrame(); //read one "dummy" line to get the frame //into the buffers (i.e. visible) ReadoutBegin(); - ReadPixels(_AMPREADCOLS); - //select the readout type //"normal" image readout modes @@ -241,9 +248,9 @@ SEQUENCE ReadoutKeep SEQUENCE FrameReadoutTDCllel { - ReadoutBegin(); + Wait1us(50); - ReadPixels(_AMPREADCOLS); + DumpPixels(_AMPREADCOLS); //each inner loop call reads out LLEL_TDC_LINES //lines. The total number of times we need to @@ -285,7 +292,6 @@ SEQUENCE FrameReadoutTDCllel_Innerloop SEQUENCE FrameReadoutTDCser { - ReadoutBegin(); Wait1us(50); ReadPixels(_AMPREADCOLS); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index f7d2ef7..a2cdd80 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -69,6 +69,7 @@ WAVEFORM Wait1ms { WAVEFORM KeepThisFrame { 0: SET FRAME TO HIGH; + 1: SET LINE TO HIGH; } From 4930bca858ecc1fe5e748cf0161725d3a2427918 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 27 Aug 2025 13:39:11 +0100 Subject: [PATCH 144/194] =?UTF-8?q?try=20changing=20SW=20relative=20to=20R?= =?UTF-8?q?G=20timing,=20changes=20signal=20level=20somehow=20but=20otherw?= =?UTF-8?q?ise=20no=20effect=C2=A3?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/deimos/deimos.waveform | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index a2cdd80..bff4d98 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -384,17 +384,17 @@ WAVEFORM ReadPixels //conventional serial clock 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - .+30: + .+60: //was +30 SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; - .+150: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + .+130: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; //was +150 SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; .+30: SET SW TO INV_LOW; //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+117: SET NOP TO HIGH; + .+107: SET NOP TO HIGH; // was +107 } @@ -573,17 +573,17 @@ WAVEFORM ReadPixelsEOnly //conventional serial clock 0: SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, FAST; - .+30: + .+60: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, FAST; - .+150: SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, FAST; + .+130: SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; .+30: SET SW TO INV_LOW; //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+117: SET NOP TO HIGH; + .+107: SET NOP TO HIGH; } WAVEFORM ReadPixelsFOnly @@ -602,17 +602,17 @@ WAVEFORM ReadPixelsFOnly //conventional serial clock 0: SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, FAST; - .+30: + .+60: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, FAST; - .+150: SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, FAST; + .+130: SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; .+30: SET SW TO INV_LOW; //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+117: SET NOP TO HIGH; + .+107: SET NOP TO HIGH; } WAVEFORM DumpPixels From c102ca2a8c2de03f37707608ea311655e5f6613f Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Sat, 30 Aug 2025 01:31:24 +0100 Subject: [PATCH 145/194] working parameters for PTC usw --- src/deimos/deimos.cds | 6 +++--- src/deimos/deimos.seq | 3 --- src/deimos/deimos.waveform | 12 ++++++------ src/deimos/voltage_timing_parameters.h | 8 ++++---- 4 files changed, 13 insertions(+), 16 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 3b62189..6563a88 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -30,9 +30,9 @@ SAMPLEMODE = 1 // first sample number must be in the series 8*n -SHP1 = 80 -SHP2 = 183 -SHD1 = 232 +SHP1 = 136 +SHP2 = 175 +SHD1 = 272 SHD2 = 327 //ADM module installed in slot 7 diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index b2a5bb9..e540b59 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -322,9 +322,6 @@ SEQUENCE LineReadoutTDCser if !dsch_ser_direction ReadPixelsEOnly(_AMPREADCOLS); if dsch_ser_direction ReadPixelsFOnly(_AMPREADCOLS); - - - //now evacuate the other side of the register //evacuate our entire half of the register if !dsch_ser_direction EvacuateF(); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index bff4d98..e714e75 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -383,14 +383,14 @@ WAVEFORM ReadPixels //conventional serial clock 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - .+60: //was +30 + .+13: SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + .+47: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; - .+130: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; //was +150 - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - .+30: SET SW TO INV_LOW; + .+13: SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + .+117: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; //was +150 + .+13: SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + .+17: SET SW TO INV_LOW; //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 93db086..bda7af5 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -4,15 +4,15 @@ * evaluations relative to FSS should be implemented if variability is required /*/ -#define _PAR_CLOCK_HIGH 8.0 /* [ 8.00, 14.0] */ +#define _PAR_CLOCK_HIGH 10.0 /* [ 8.00, 14.0] */ #define _PAR_CLOCK_LOW 0.0 /* [-0.50, 0.50] */ -#define _TG_CLOCK_HIGH 9.0 /* [ 8.00, 14.0] */ +#define _TG_CLOCK_HIGH 10.5 /* [ 8.00, 14.0] */ #define _TG_CLOCK_LOW 0.0 /* [-0.50, 0.50] */ -#define _SER_CLOCK_HIGH 9.0 /* [ 8.00, 14.0] */ +#define _SER_CLOCK_HIGH 12.0 /* [ 8.00, 14.0] */ #define _SER_CLOCK_LOW 1.0 /* [-0.50, 1.50] */ -#define _SER_CLOCK_RCV 10.0 /* Higher than serial clock high */ +#define _SER_CLOCK_RCV 12.5 /* Higher than serial clock high */ #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ From 8565bccd14f05fd65cb187224214c0c5568847c0 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Sat, 30 Aug 2025 01:35:09 +0100 Subject: [PATCH 146/194] test if dumping with reset gate left open works --- src/deimos/deimos.waveform | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index e714e75..b49aa35 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -621,7 +621,7 @@ WAVEFORM DumpPixels 0:=PIX_BEGIN //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - .+31: SET RG TO INV_LOW; + // .+31: SET RG TO INV_LOW; //charge STARTS UNDER RPhi2 //conventional serial clock @@ -637,7 +637,9 @@ WAVEFORM DumpPixels //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+147: SET NOP TO HIGH; + .+116: SET RG TO INV_LOW; //subtract 31 to leave + //tota, time equal after 31 RG dleay + .+31: SET NOP TO HIGH; } @@ -651,7 +653,6 @@ WAVEFORM DumpPixelsEOnly 0:=PIX_BEGIN //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - .+31: SET RG TO INV_LOW; //charge STARTS UNDER RPhi2 //conventional serial clock @@ -667,7 +668,8 @@ WAVEFORM DumpPixelsEOnly //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+147: SET NOP TO HIGH; + .+116: SET RG TO INV_LOW; + .+31: SET NOP TO HIGH; } @@ -677,7 +679,6 @@ WAVEFORM DumpPixelsFOnly 0:=PIX_BEGIN //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - .+31: SET RG TO INV_LOW; //charge STARTS UNDER RPhi2 //conventional serial clock @@ -693,7 +694,8 @@ WAVEFORM DumpPixelsFOnly //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+147: SET NOP TO HIGH; + .+116: SET RG TO INV_LOW; + .+31: SET NOP TO HIGH; } From 7c7bf0900c509478c5262900702f3aeed573e592 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 2 Sep 2025 21:54:03 +0100 Subject: [PATCH 147/194] minor tidying up --- src/deimos/deimos.seq | 82 +++++++++++++++++++++++++++++++++++--- src/deimos/deimos.waveform | 7 ++++ 2 files changed, 83 insertions(+), 6 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index e540b59..13d9ca8 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -54,6 +54,11 @@ param ser_bin = 1 //out towards F, dump backwards from E param dsch_ser_direction = 0 + //serial CTI should we dump the bright columns? + param dsch_ser_dump_bcs = 0 + + + //TODO: wide gate integration mode @@ -86,12 +91,14 @@ param ser_bin = 1 #define LLEL_TDC_REMAINDER #eval TOTAL_ROWS % LLEL_TDC_LINES #define SER_TDC_COLS 21 +#define SER_TDC_COLSm1 #eval SER_TDC_COLS -1 + #define SER_TDC_BININCR 1 #define SER_TDC_LOOPS #eval (_AMPCOLS + _SERIALOVERSCAN) / SER_TDC_COLS #define SER_TDC_REMAINDER #eval (_AMPCOLS + _SERIALOVERSCAN) % SER_TDC_COLS -#define SER_COLS_LEFTOVER #eval (_AMPCOLS +_SERIALOVERSCAN - SER_TDC_LOOPS) -#define SER_TDC_DUMPCOLS #eval (_SERIALPRESCAN + _AMPCOLS) + + #if NOISETEST SEQUENCE NoiseTest { @@ -318,22 +325,84 @@ SEQUENCE LineReadoutTDCser if !dsch_ser_direction DumpPixelsEOnly(SER_TDC_REMAINDER); if dsch_ser_direction DumpPixelsFOnly(SER_TDC_REMAINDER); - //read a whole row - if !dsch_ser_direction ReadPixelsEOnly(_AMPREADCOLS); - if dsch_ser_direction ReadPixelsFOnly(_AMPREADCOLS); + if !dsch_ser_dump_bcs TDCser_ReadoutLoop(); + if dsch_ser_dump_bcs TDCser_ReadoutLoopDumpBright(); + //ser_bin has been incremented a bunch, need to decrement it back to 1 //now evacuate the other side of the register //evacuate our entire half of the register if !dsch_ser_direction EvacuateF(); if dsch_ser_direction EvacuateE(); + - //ser_bin has been incremented a bunch, need to decrement it back to 1 serbindecr(ser_bin); //now it's 0 serbinincr(); //now it's 1 RETURN; } +SEQUENCE TDCser_ReadoutLoopDumpBright +{ + //need to know how many to read ahead of the first + //reading out the prescan puts the first bright line + //at the output + if !dsch_ser_direction ReadPixelsEOnly(_SERIALPRESCAN); + if dsch_ser_direction ReadPixelsFOnly(_SERIALPRESCAN); + + //run the inner loop the same number of times as you + //did to generate the lines + TDCser_ReadoutLoopDumpBright_Inner(SER_TDC_LOOPS); + + if !dsch_ser_direction ReadPixelsEOnly(SER_TDC_REMAINDER); + if dsch_ser_direction ReadPixelsFOnly(SER_TDC_REMAINDER); + + RETURN; +} + +SEQUENCE TDCser_ReadoutLoop +{ + + //read a whole row + if !dsch_ser_direction ReadPixelsEOnly(_AMPREADCOLS); + if dsch_ser_direction ReadPixelsFOnly(_AMPREADCOLS); + + + RETURN; +} + + + +SEQUENCE TDCser_ReadoutLoopDumpBright_Inner +{ + //at the point of this sequence being called, + //bright line is next to be read out. So, instead, + //we'll dump it + + //manually tag a pixel, it should end up just being reset + + trigpix(); + if !dsch_ser_direction DumpPixelsEOnly(); + if dsch_ser_direction DumpPixelsFOnly(); + + //now we need to do a real readout on SER_TDC_COLS-1 + if !dsch_ser_direction ReadPixelsEOnly(SER_TDC_COLSm1); + if dsch_ser_direction ReadPixelsFOnly(SER_TDC_COLSm1); + + RETURN; +} + + +SEQUENCE TDCser_ReadoutLoop +{ + + //read a whole row + if !dsch_ser_direction ReadPixelsEOnly(_AMPREADCOLS); + if dsch_ser_direction ReadPixelsFOnly(_AMPREADCOLS); + + + RETURN; +} + SEQUENCE TDCser_Innerloop { @@ -503,3 +572,4 @@ SEQUENCE LineReadoutAOnlyCoincident RETURN ; } + diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index b49aa35..cfe3b15 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -643,6 +643,13 @@ WAVEFORM DumpPixels } +WAVEFORM trigpix +{ + 0: SET PIXEL TO HIGH; + .+1: SET PIXEL TO LOW; + SET LINE TO LOW; + SET FRAME TO LOW; +} From 6175617e927220e73c6a4f67e16d3ed3ffef256a Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 16 Sep 2025 17:34:19 -0700 Subject: [PATCH 148/194] starting on CTI tweaks --- src/deimos/deimos.cds | 13 ++++--- src/deimos/deimos.mod | 10 ++--- src/deimos/deimos.waveform | 54 +++++++++++++------------- src/deimos/voltage_timing_parameters.h | 6 +-- 4 files changed, 42 insertions(+), 41 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 6563a88..ad33e47 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -16,7 +16,10 @@ RAWSAMPLES = 5000 //NOTE RAWSEL of 11 should be E channel of slot 2 RAWSEL = 11 RAWSTARTLINE = 0 -RAWSTARTPIXEL = 48 + //to view the last prescan and start of the line + //RAWSTARTPIXEL = 48 + //to view the end of the line + RAWSTARTPIXEL = 1071 SAMPLEMODE = 1 //attempt pixel timing coincident with the nearest ADM samples. That means multiples of 8 @@ -30,10 +33,10 @@ SAMPLEMODE = 1 // first sample number must be in the series 8*n -SHP1 = 136 -SHP2 = 175 -SHD1 = 272 -SHD2 = 327 +SHP1 = 200 +SHP2 = 343 +SHD1 = 432 +SHD2 = 527 //ADM module installed in slot 7 #define SINGLE_DET_TEST 1 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 64f5d3e..b55e5c0 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -82,7 +82,7 @@ SLOT 4 xvbias { SLOT 9 hvbias { HVLC 1 [0.00,0]; - HVLC 2 [20.0,1] "SCI Guard Drain"; + HVLC 2 [20.7,1] "SCI Guard Drain"; HVLC 3 [0.00,0]; HVLC 4 [0.00,0]; HVLC 5 [17.0,2] "SCI E Reset Drain"; @@ -116,13 +116,13 @@ SLOT 9 hvbias { SLOT 10 lvbias { LVLC 1 [3.3,6] "LVDS Receiver Output Enable"; LVLC 2 [00.0,0]; - LVLC 3 [3.00,4] "SCI E Output Gate"; - LVLC 4 [3.00,4] "SCI F Output Gate"; + LVLC 3 [2.95,4] "SCI E Output Gate"; + LVLC 4 [2.95,4] "SCI F Output Gate"; LVLC 5 [1.00,5] "SCI Summing Well - Low"; // NB goes through a line driver - LVLC 6 [9.0,5] "SCI Summing Well - High"; // NB goes through a line driver + LVLC 6 [11.0,5] "SCI Summing Well - High"; // NB goes through a line driver LVLC 7 [11.50,5] "SCI Reset Gate - HIGH"; // NB at the moment RG low and high are swapped in the cable by accident! -// LVLC 7 [5.00,5] "SCI Reset Gate - Low"; // NB goes through a line driver +// LVLC 7 [5.50,5] "SCI Reset Gate - Low"; // NB goes through a line driver // LVLC 8 [11.5,5] "SCI Reset Gate - High"; // NB goes through a line driver LVLC 8 [5.5,5] "SCI Reset Gate - LOW"; //// NB at the moment RG low and high are swapped in the cable by accident! LVLC 9 [00.0,0]; diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index cfe3b15..1fcc456 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -258,8 +258,8 @@ WAVEFORM ParallelForwardNoCoincident SET RG_CLOCKS TO _RG_LOW; .+50: SET AC_Clamp to HIGH; .+300: - SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; .+50: SET AC_Clamp TO LOW; @@ -378,25 +378,23 @@ WAVEFORM ReadPixels SET FRAME TO LOW; //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - .+40: SET RG TO INV_LOW; - //charge STARTS UNDER RPhi2 + .+60: SET RG TO INV_LOW; + //charge STARTS UNDER SCI_SCLK2 NOW //conventional serial clock + //this is redundant on the first pixel 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; - .+13: SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - .+47: + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + .+40: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; - .+13: SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; - .+117: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; //was +150 - .+13: SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - .+17: SET SW TO INV_LOW; - - //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL - //stay as groups of 8. - .+107: SET NOP TO HIGH; // was +107 - + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + .+300: SET SW TO INV_LOW; + + .+200: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; //was +150 + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + .+60: SET NOP TO HIGH; } @@ -410,7 +408,7 @@ WAVEFORM ReadPixelsSlow SET FRAME TO LOW; SET RG TO INV_HIGH; - .+30: SET RG TO INV_LOW; + .+60: SET RG TO INV_LOW; 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; .+15: SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; @@ -567,23 +565,23 @@ WAVEFORM ReadPixelsEOnly SET FRAME TO LOW; //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - .+40: SET RG TO INV_LOW; + .+60: SET RG TO INV_LOW; //charge STARTS UNDER RPhi2 //conventional serial clock 0: SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, FAST; - .+60: + .+40: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, FAST; - .+130: SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - .+30: SET SW TO INV_LOW; + .+300: SET SW TO INV_LOW; //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+107: SET NOP TO HIGH; + .+200: SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + .+60: SET NOP TO HIGH; } WAVEFORM ReadPixelsFOnly @@ -596,23 +594,23 @@ WAVEFORM ReadPixelsFOnly SET FRAME TO LOW; //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - .+40: SET RG TO INV_LOW; + .+60: SET RG TO INV_LOW; //charge STARTS UNDER RPhi2 //conventional serial clock 0: SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, FAST; - .+60: + .+40: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, FAST; - .+130: SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - .+30: SET SW TO INV_LOW; + .+300: SET SW TO INV_LOW; //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+107: SET NOP TO HIGH; + .+130: SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + .+80: SET NOP TO HIGH; } WAVEFORM DumpPixels diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index bda7af5..e58259b 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -10,9 +10,9 @@ #define _TG_CLOCK_HIGH 10.5 /* [ 8.00, 14.0] */ #define _TG_CLOCK_LOW 0.0 /* [-0.50, 0.50] */ -#define _SER_CLOCK_HIGH 12.0 /* [ 8.00, 14.0] */ +#define _SER_CLOCK_HIGH 11.0 /* [ 8.00, 14.0] */ #define _SER_CLOCK_LOW 1.0 /* [-0.50, 1.50] */ -#define _SER_CLOCK_RCV 12.5 /* Higher than serial clock high */ +#define _SER_CLOCK_RCV 11.5 /* Higher than serial clock high */ #define _RESET_DRAIN 17 /* [ 15.0, 20.0] */ #define _OUTPUT_DRAIN 29 /* [ 27.0, 32.0] */ @@ -110,7 +110,7 @@ //e2v says need on average 90ns rise time for a serial clock -#define SCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / 0.09" | bc) +#define SCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / 0.4" | bc) //NOTE: waveforms currently use serial "slow" slew rate for triangular waveform // serial "FAST" is for immediate changes (like e.g. resetting serial register) From 48ae3ff1f75feee0056654330f4e421573dc2d6b Mon Sep 17 00:00:00 2001 From: Dan Date: Wed, 17 Sep 2025 00:58:24 -0700 Subject: [PATCH 149/194] fix dump sequences to be matching to read sequences again (fix dump TDC serial bug) --- src/deimos/deimos.seq | 14 +--------- src/deimos/deimos.waveform | 53 +++++++++++++++++++------------------- 2 files changed, 28 insertions(+), 39 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 13d9ca8..6cfcbc6 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -300,7 +300,7 @@ SEQUENCE FrameReadoutTDCllel_Innerloop SEQUENCE FrameReadoutTDCser { Wait1us(50); - ReadPixels(_AMPREADCOLS); + DumpPixels(_AMPREADCOLS); //each inner loop returns one row, so //just match total rows for other readout @@ -391,18 +391,6 @@ SEQUENCE TDCser_ReadoutLoopDumpBright_Inner RETURN; } - -SEQUENCE TDCser_ReadoutLoop -{ - - //read a whole row - if !dsch_ser_direction ReadPixelsEOnly(_AMPREADCOLS); - if dsch_ser_direction ReadPixelsFOnly(_AMPREADCOLS); - - - RETURN; -} - SEQUENCE TDCser_Innerloop { diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 1fcc456..9b897da 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -615,29 +615,28 @@ WAVEFORM ReadPixelsFOnly WAVEFORM DumpPixels { - //NB using slow slew rate for triangular serial clockingdef + //NB using slow slew rate for triangular serial clockingdef 0:=PIX_BEGIN //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted - // .+31: SET RG TO INV_LOW; - //charge STARTS UNDER RPhi2 + .+60: SET RG TO INV_LOW; + //charge STARTS UNDER SCI_SCLK2 NOW //conventional serial clock + //this is redundant on the first pixel 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - .+30: + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + .+40: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; - .+150: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - SET SW TO INV_LOW; + .+300: SET SW TO INV_LOW; - //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL - //stay as groups of 8. - .+116: SET RG TO INV_LOW; //subtract 31 to leave - //tota, time equal after 31 RG dleay - .+31: SET NOP TO HIGH; + .+200: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; //was +150 + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET RG TO INV_LOW; + + .+60: SET NOP TO HIGH; } @@ -654,7 +653,7 @@ WAVEFORM trigpix //readout only clocking the E register (we have stored bright edge in the F for this one) WAVEFORM DumpPixelsEOnly { - //NB using slow slew rate for triangular serial clockingdef + //NB using slow slew rate for triangular serial clockingdef 0:=PIX_BEGIN //reset pulse at the start of the pixel SET RG TO INV_HIGH; //NOTE reset gate is inverted @@ -663,18 +662,20 @@ WAVEFORM DumpPixelsEOnly //conventional serial clock 0: SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, FAST; - .+30: + .+40: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, FAST; - .+150: SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - SET SW TO INV_LOW; + .+300: SET SW TO INV_LOW; //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+116: SET RG TO INV_LOW; - .+31: SET NOP TO HIGH; + .+200: SET SCI_SCLK1_EONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET RG TO INV_LOW; + .+60: SET NOP TO HIGH; + + } @@ -689,18 +690,18 @@ WAVEFORM DumpPixelsFOnly //conventional serial clock 0: SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, FAST; - .+30: + .+40: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, FAST; - .+150: SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - SET SW TO INV_LOW; + .+300: SET SW TO INV_LOW; //NOTE: set this up so it's a multiple of ADM ssample times that way they ALL //stay as groups of 8. - .+116: SET RG TO INV_LOW; - .+31: SET NOP TO HIGH; + .+130: SET SCI_SCLK1_FONLY TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET RG TO INV_LOW; + .+80: SET NOP TO HIGH; } From 2c8c199c2bda2c4d481aeab36bf21fd388bded05 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 19 Sep 2025 13:11:33 -0700 Subject: [PATCH 150/194] fix summing well, adjust some timings etc. CTI fixed, or at least massively improved --- src/deimos/deimos.cds | 12 ++++++------ src/deimos/deimos.mod | 8 ++++---- src/deimos/deimos.waveform | 4 ++++ 3 files changed, 14 insertions(+), 10 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index ad33e47..7bccdc8 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -11,7 +11,7 @@ LINECOUNT = _LINENUM PIXELCOUNT = _AMPREADCOLS RAWENABLE = _RAW_ENABLE RAWENDLINE = 800 -RAWSAMPLES = 5000 +RAWSAMPLES = 20000 //RAWSEL = _RAW_SELECT //NOTE RAWSEL of 11 should be E channel of slot 2 RAWSEL = 11 @@ -19,7 +19,7 @@ RAWSTARTLINE = 0 //to view the last prescan and start of the line //RAWSTARTPIXEL = 48 //to view the end of the line - RAWSTARTPIXEL = 1071 + RAWSTARTPIXEL = 1061 SAMPLEMODE = 1 //attempt pixel timing coincident with the nearest ADM samples. That means multiples of 8 @@ -33,10 +33,10 @@ SAMPLEMODE = 1 // first sample number must be in the series 8*n -SHP1 = 200 -SHP2 = 343 -SHD1 = 432 -SHD2 = 527 +SHP1 = 120 +SHP2 = 320 +SHD1 = 400 +SHD2 = 575 //ADM module installed in slot 7 #define SINGLE_DET_TEST 1 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index b55e5c0..3beddd0 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -116,10 +116,10 @@ SLOT 9 hvbias { SLOT 10 lvbias { LVLC 1 [3.3,6] "LVDS Receiver Output Enable"; LVLC 2 [00.0,0]; - LVLC 3 [2.95,4] "SCI E Output Gate"; - LVLC 4 [2.95,4] "SCI F Output Gate"; - LVLC 5 [1.00,5] "SCI Summing Well - Low"; // NB goes through a line driver - LVLC 6 [11.0,5] "SCI Summing Well - High"; // NB goes through a line driver + LVLC 3 [4.0,4] "SCI E Output Gate"; + LVLC 4 [4.0,4] "SCI F Output Gate"; + LVLC 5 [1.5,5] "SCI Summing Well - Low"; // NB goes through a line driver + LVLC 6 [11.5,5] "SCI Summing Well - High"; // NB goes through a line driver LVLC 7 [11.50,5] "SCI Reset Gate - HIGH"; // NB at the moment RG low and high are swapped in the cable by accident! // LVLC 7 [5.50,5] "SCI Reset Gate - Low"; // NB goes through a line driver diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 9b897da..4b8494f 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -256,6 +256,8 @@ WAVEFORM ParallelForwardNoCoincident TG_GOES_LOW+200:=RG_GOES_LOW SET RG TO INV_LOW; SET RG_CLOCKS TO _RG_LOW; + SET SW TO INV_HIGH; + SET SW_CLOCKS TO INV_HIGH; .+50: SET AC_Clamp to HIGH; .+300: SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; @@ -461,6 +463,8 @@ WAVEFORM ForwardParallelSectionANoCoincident TG_GOES_LOW+200:=RG_GOES_LOW SET RG TO INV_LOW; SET RG_CLOCKS TO _RG_LOW; + SET SW TO INV_HIGH; + SET SW_CLOCKS TO INV_HIGH; .+50: SET AC_Clamp to HIGH; .+300: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; From 1a9dd15542f13f71ad30393f045c9f7ce20078cc Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 1 Oct 2025 12:47:51 -0700 Subject: [PATCH 151/194] DEIMOS best known values for CTI so far --- src/deimos/deimos.cds | 6 +++--- src/deimos/deimos.mod | 26 +++++++++++++++----------- src/deimos/deimos.seq | 10 ++++++++++ src/deimos/deimos.waveform | 19 +++++++++++++++---- src/deimos/voltage_timing_parameters.h | 2 +- 5 files changed, 44 insertions(+), 19 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 7bccdc8..da2e536 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -14,7 +14,7 @@ RAWENDLINE = 800 RAWSAMPLES = 20000 //RAWSEL = _RAW_SELECT //NOTE RAWSEL of 11 should be E channel of slot 2 -RAWSEL = 11 +RAWSEL = 11plt.c RAWSTARTLINE = 0 //to view the last prescan and start of the line //RAWSTARTPIXEL = 48 @@ -34,8 +34,8 @@ SAMPLEMODE = 1 SHP1 = 120 -SHP2 = 320 -SHD1 = 400 +SHP2 = 303 +SHD1 = 448 SHD2 = 575 //ADM module installed in slot 7 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 3beddd0..f8704a9 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -7,6 +7,7 @@ deimos_TMP + SLOT 1 driverx { DRVX 1 [PCLK_fast,PCLK_slow,1] "PCLK_B3_2"; DRVX 2 [PCLK_fast,PCLK_slow,1] "PCLK_A3_2"; @@ -52,6 +53,7 @@ SLOT 3 driverx { DRVX 12 [1,1,0]; } + SLOT 4 xvbias { PBIAS 1 0 [0,0]; PBIAS 2 0 [0,0]; @@ -63,6 +65,8 @@ SLOT 4 xvbias { NBIAS 4 0 [0,-0]; } + + /* SLOT 7 ADM */ /****** Bias Power Up Order ******/ @@ -82,11 +86,11 @@ SLOT 4 xvbias { SLOT 9 hvbias { HVLC 1 [0.00,0]; - HVLC 2 [20.7,1] "SCI Guard Drain"; + HVLC 2 [24.0,1] "SCI Guard Drain"; HVLC 3 [0.00,0]; HVLC 4 [0.00,0]; - HVLC 5 [17.0,2] "SCI E Reset Drain"; - HVLC 6 [17.0,2] "SCI F Reset Drain"; + HVLC 5 [17.5,2] "SCI E Reset Drain"; + HVLC 6 [17.5,2] "SCI F Reset Drain"; HVLC 7 [0.00,0]; HVLC 8 [14.00,0] "FCS1 Reset Drain A"; HVLC 9 [14.00,0] "FCS1 Reset Drain B"; @@ -103,10 +107,10 @@ SLOT 9 hvbias { HVLC 20 [0.00,0]; HVLC 21 [17.00,2] "SCI2 E Reset Drain"; HVLC 22 [17.00,2] "SCI2 F Reset Drain"; - HVLC 23 [29.00,1] "SCI2 E Output Drain" ; //TODO: needs re-assignment! - HVLC 24 [29.00,1] "SCI2 F Output Drain"; //TODO: needs re-assignment! - HVHC 1 [29.0,10.0,3,1] "SCI E Output Drain"; - HVHC 2 [29.0,10.0,3,1] "SCI F Output Drain"; + HVLC 23 [29.30,1] "SCI2 E Output Drain" ; //TODO: needs re-assignment! + HVLC 24 [29.30,1] "SCI2 F Output Drain"; //TODO: needs re-assignment! + HVHC 1 [29.3,10.0,3,1] "SCI E Output Drain"; + HVHC 2 [29.3,10.0,3,1] "SCI F Output Drain"; HVHC 3 [24.3,2.0,0,1] "FCS1 Output Drain A"; HVHC 4 [24.3,2.0,0,1] "FCS1 Output Drain B"; HVHC 5 [24.3,2.0,0,1] "FCS2 Output Drain A"; @@ -116,10 +120,10 @@ SLOT 9 hvbias { SLOT 10 lvbias { LVLC 1 [3.3,6] "LVDS Receiver Output Enable"; LVLC 2 [00.0,0]; - LVLC 3 [4.0,4] "SCI E Output Gate"; - LVLC 4 [4.0,4] "SCI F Output Gate"; - LVLC 5 [1.5,5] "SCI Summing Well - Low"; // NB goes through a line driver - LVLC 6 [11.5,5] "SCI Summing Well - High"; // NB goes through a line driver + LVLC 3 [3.0,4] "SCI E Output Gate"; + LVLC 4 [3.0,4] "SCI F Output Gate"; + LVLC 5 [2.0,5] "SCI Summing Well - Low"; // NB goes through a line driver + LVLC 6 [11.0,5] "SCI Summing Well - High"; // NB goes through a line driver LVLC 7 [11.50,5] "SCI Reset Gate - HIGH"; // NB at the moment RG low and high are swapped in the cable by accident! // LVLC 7 [5.50,5] "SCI Reset Gate - Low"; // NB goes through a line driver diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 6cfcbc6..f2debab 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -16,6 +16,12 @@ */ +/** testing constant values **/ + + + + + /** System Control Triggers **/ param integrate_ms = 0 // amount of time to integrate in the dark (ms component) @@ -57,6 +63,10 @@ param ser_bin = 1 //serial CTI should we dump the bright columns? param dsch_ser_dump_bcs = 0 + + const llel_high_level = _PAR_CLOCK_HIGH + const llel_low_level = _PAR_CLOCK_LOW +const llel_tri_slew = P_TRI_SLEW_RATE diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 4b8494f..8cca3f0 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -52,6 +52,15 @@ WAVEFORM SerialRecieving { /* ARCHON Timing Control */ /*****************************************/ + + const test_const1 = 12.0 + +WAVEFORM test_run_const +{ + 0: SET SCI_PCLK1 TO test_const1,FAST; +} + + WAVEFORM Wait1us { 0: SET NOP TO HIGH; .+1us: RETURN; @@ -121,7 +130,7 @@ WAVEFORM InitialSetup SET AC_Clamp to LOW; SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; - SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; + SET SCI_PCLK2 TO llel_high_level, FAST; SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; .+10000: @@ -370,6 +379,8 @@ WAVEFORM VRDModulate } + + WAVEFORM ReadPixels { //NB using slow slew rate for triangular serial clockingdef @@ -387,7 +398,7 @@ WAVEFORM ReadPixels //this is redundant on the first pixel 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; - .+40: + .+60: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; @@ -575,7 +586,7 @@ WAVEFORM ReadPixelsEOnly //conventional serial clock 0: SET SCI_SCLK2_EONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1_EONLY TO _SER_CLOCK_LOW, FAST; - .+40: + .+60: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2_EONLY TO _SER_CLOCK_LOW, FAST; @@ -604,7 +615,7 @@ WAVEFORM ReadPixelsFOnly //conventional serial clock 0: SET SCI_SCLK2_FONLY TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK1_FONLY TO _SER_CLOCK_LOW, FAST; - .+40: + .+60: SET SW TO INV_HIGH; SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; SET SCI_SCLK2_FONLY TO _SER_CLOCK_LOW, FAST; diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index e58259b..539cc79 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -110,7 +110,7 @@ //e2v says need on average 90ns rise time for a serial clock -#define SCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / 0.4" | bc) +#define SCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / 0.2" | bc) //NOTE: waveforms currently use serial "slow" slew rate for triangular waveform // serial "FAST" is for immediate changes (like e.g. resetting serial register) From 2a84054718408afae112ba055e156ebb4bc22471 Mon Sep 17 00:00:00 2001 From: Dan Date: Thu, 2 Oct 2025 02:17:11 -0700 Subject: [PATCH 152/194] normal serial binned images support we hope --- src/deimos/deimos.seq | 22 +++++++++++++++++++- src/deimos/deimos.waveform | 41 ++++++++++++++++++++++++++++++-------- 2 files changed, 54 insertions(+), 9 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index f2debab..b7214fb 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -52,6 +52,8 @@ param dch_ser = 0 // total deferred charge measurement (serial CTI) //----- END OF READOUT MODES --- param llel_bin = 1 param ser_bin = 1 +param enable_ser_bin = 0 + //serial CTI measurement configuration modes @@ -518,12 +520,30 @@ SEQUENCE LineReadout //wait here is for the clamp to die down. Put some of it in prescan, but not all Wait1us(line_clamp_delay_us); - ReadPixels(_AMPREADCOLS); + + if enable_ser_bin SerBinReadPixels(_AMPREADCOLS); + if !enable_ser_bin ReadPixels(_AMPREADCOLS); if tdi_wait_us Wait1us(tdi_wait_us); //if there are leftover pixels, do them here RETURN; } +SEQUENCE SerBinReadPixels +{ + PrepSerBin(); + //decrement ser_bin by one that's how much extra forward serials we need + serbindecr(); + //extra serial forwards + SerialBinForwards(ser_bin); + //do a normal pixel read + ReadPixels(); + //reset serial bin variable to original value + serbinincr(); + +} + + + SEQUENCE LineReadoutCoincident { if tdi_wait_us Wait1us(tdi_wait_us); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 8cca3f0..d913614 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -53,13 +53,6 @@ WAVEFORM SerialRecieving { /*****************************************/ - const test_const1 = 12.0 - -WAVEFORM test_run_const -{ - 0: SET SCI_PCLK1 TO test_const1,FAST; -} - WAVEFORM Wait1us { 0: SET NOP TO HIGH; @@ -130,7 +123,7 @@ WAVEFORM InitialSetup SET AC_Clamp to LOW; SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; - SET SCI_PCLK2 TO llel_high_level, FAST; + SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; .+10000: @@ -628,6 +621,38 @@ WAVEFORM ReadPixelsFOnly .+80: SET NOP TO HIGH; } + +WAVEFORM PrepSerBin +{ + 0: SET RG TO INV_HIGH; + .+40: SET SW TO INV_HIGH; + .+20: SET RG TO INV_LOW; + +} + +WAVEFORM SerialBinForwards +{ + + 0: SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + .+40: + SET SCI_SCLK3 TO _SER_CLOCK_HIGH, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; + + .+40: + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; + + .+40: + SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; + + .+40: + SET NOP TO HIGH; + +} + + WAVEFORM DumpPixels { //NB using slow slew rate for triangular serial clockingdef From 923bfb16df03c8be403543b0a5748244c9b38c49 Mon Sep 17 00:00:00 2001 From: Dan Date: Thu, 2 Oct 2025 06:52:40 -0700 Subject: [PATCH 153/194] slight change to serial binning --- src/deimos/deimos.seq | 12 ++++++++---- src/deimos/deimos.waveform | 1 + 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index b7214fb..5e44138 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -66,9 +66,9 @@ param enable_ser_bin = 0 param dsch_ser_dump_bcs = 0 - const llel_high_level = _PAR_CLOCK_HIGH - const llel_low_level = _PAR_CLOCK_LOW -const llel_tri_slew = P_TRI_SLEW_RATE + // const llel_high_level = _PAR_CLOCK_HIGH + //const llel_low_level = _PAR_CLOCK_LOW + //const llel_tri_slew = P_TRI_SLEW_RATE @@ -521,7 +521,9 @@ SEQUENCE LineReadout //wait here is for the clamp to die down. Put some of it in prescan, but not all Wait1us(line_clamp_delay_us); - if enable_ser_bin SerBinReadPixels(_AMPREADCOLS); + if enable_ser_bin ReadPixels(_SERIALPRESCAN); + if enable_ser_bin SerBinReadPixels(_AMPCOLS); + if enable_ser_bin ReadPixels(_SERIALOVERSCAN); if !enable_ser_bin ReadPixels(_AMPREADCOLS); if tdi_wait_us Wait1us(tdi_wait_us); //if there are leftover pixels, do them here @@ -540,6 +542,8 @@ SEQUENCE SerBinReadPixels //reset serial bin variable to original value serbinincr(); + RETURN; + } diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index d913614..168f8c6 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -624,6 +624,7 @@ WAVEFORM ReadPixelsFOnly WAVEFORM PrepSerBin { + 0: SET RG TO INV_HIGH; .+40: SET SW TO INV_HIGH; .+20: SET RG TO INV_LOW; From 2444e36fa5bf360e4436a506ecc124363bb29e8d Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 29 Oct 2025 10:42:43 -0700 Subject: [PATCH 154/194] start filling in FCS parameters --- src/deimos/deimos.seq | 28 ++++++++++++++++++++++++-- src/deimos/voltage_timing_parameters.h | 19 +++++++++++++++++ 2 files changed, 45 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 5e44138..b39535a 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -24,6 +24,9 @@ /** System Control Triggers **/ + +param engmode = 0 //run in the engineering mode + param integrate_ms = 0 // amount of time to integrate in the dark (ms component) param integrate_s = 0 // amount of time to integrate in the dark (s component) @@ -166,14 +169,35 @@ SEQUENCE ClampTest #endif +SEQUENCE StartSeqSummitMode { + if engmode StartSeqEngMode(); + + + GOTO StartSeqSummitMode(); + +} + +SEQUENCE SummitModeSciFCSFlush { + + +} + +SEQUENCE SummitModeFCSFlush { + +} + +SEQUENCE SummitModeSciReadout { + +} + -SEQUENCE StartSeq { +SEQUENCE StartSeqEngMode { InitialSetup(); if flush Flush(); if framecount IntegrateAndReadout(); if !framecount LineReadoutFast(TOTAL_ROWS); if rg_mod_test_mode TestBrokenReadout(); - GOTO StartSeq(); + GOTO StartSeqEngMode(); } diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 539cc79..5cd8041 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -125,3 +125,22 @@ #define NOISETEST 0 #define CLAMPTEST 0 #define RESETTEST 0 + + +//FCS related voltage definitions + +#define _PAR_CLOCK_HIGH_FCS 2 +#define _PAR_CLOCK_LOW_FCS -7 +#define _MPP_CLOCK_HIGH_FCS 5 +#define _MPP_CLOCK_LOW_FCS -8 +#define _SER_CLOCK_HIGH_FCS 5 +#define _SER_CLOCK_LOW_FCS -7 +#define _RG_LOW_FCS 0 +#define _RG_HIGH_FCS 12 +#define _SW_LOW_FCS -6 +#define _SW_HIGH_FCS 5 + +#define _RESET_DRAIN_FCS 14.0 +#define _OUTPUT_DRAIN_FCS 24.3 +#define _LASTGATE_FCS -4.0 +#define _DUMP_DRAIN_FCS 14.0 From 34ef9fdcb2b26bc0ec0a5d11a5070a78e5918fc2 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 29 Oct 2025 12:43:49 -0700 Subject: [PATCH 155/194] add FCS array parameters to def file --- src/deimos/deimos.def | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 82fd66d..e31606e 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -118,3 +118,12 @@ For now we are just entering a slew time manually, then calculating the rate to make sure we hit the intended voltage at the top of the triangle waveform **/ + + +// FCS array parameters +#define _FCS_A_ROWS 2048 +#define _FCS_B_ROWS 2048 +#define _FCS_ROWS #eval _FCS_A_ROWS + _FCS_B_ROWS +#define _FCS_PRESCAN 25 +#define _FCS_AMPCOLS 1024 +#define _FCS_OVERSCAN 20 From 72c79240e304f63206b7caae19a15332fe24446b Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 29 Oct 2025 17:10:45 -0700 Subject: [PATCH 156/194] start on FCS readout waveform segments --- src/deimos/deimos.mod | 8 ++--- src/deimos/deimos.signals | 4 +++ src/deimos/deimos.waveform | 44 ++++++++++++++++++++++++++ src/deimos/voltage_timing_parameters.h | 8 +++++ 4 files changed, 60 insertions(+), 4 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index f8704a9..5738bf5 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -45,10 +45,10 @@ SLOT 3 driverx { DRVX 4 [SCLK_fast,SCLK_slow,1] "Serial E1"; DRVX 5 [SCLK_fast,SCLK_slow,1] "Serial F2"; DRVX 6 [SCLK_fast,SCLK_slow,1] "Serial F1"; - DRVX 7 [1,1,0]; - DRVX 8 [1,1,0]; - DRVX 9 [1,1,0]; - DRVX 10 [1,1,0]; + DRVX 7 [1,1,0] "FCS PPhase3U"; + DRVX 8 [1,1,0] "FCS PPhase3L"; + DRVX 9 [1,1,0] "FCS PPhase2"; + DRVX 10 [1,1,0] "FCS PPhase1"; DRVX 11 [TG_fast,TG_slow,1] "TGA2"; DRVX 12 [1,1,0]; } diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index fdcd718..654a57d 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -167,3 +167,7 @@ #define SCI_SCLK2_EONLY SCLK_E1 #define SCI_SCLK2_FONLY SCLK_F1 +//FCS readout +#define FCS_P3 [FCS_P3U, FCS_P3L] +#define FCS_S2 [FCS1_S2L, FCS2_S2L] +#define FCS_S3 [FCS1_S3L, FCS2_S3L] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 168f8c6..388b38f 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -906,6 +906,50 @@ WAVEFORM setupTGTest } +WAVEFORM FCSParallelForward +{ + 0: SET FCS_P3 to _MPP_CLOCK_HIGH_FCS, FAST; + + .+1000: SET FCS_P2 to _PAR_CLOCK_LOW_FCS, FAST; + + .+1000: SET FCS_P1 to _PAR_CLOCK_HIGH_FCS, FAST; + + .+1000: SET FCS_P3 to _MPP_CLOCK_LOW_FCS, FAST; + + .+1000: set FCS_P2 to _PAR_CLOCK_HIGH_FCS, FAST; + + .+1000: set FCS_P1 to _PAR_CLOCK_LOW_FCS, FAST; + +} + + +#define FCS_SER_STEP 30 + + +WAVEFORM FCSSplitReadout +{ + //readout strobes and reset gate + 0:=FCS_PIX_BEGIN + SET PIXEL TO HIGH; + .+1: SET PIXEL TO LOW; + SET LINE TO LOW; + SET FRAME TO LOW; + + SET FCS_RG TO INV_HIGH; + .+2*FCS_SER_STEP: SET FCS_RG TO INV_LOW; + + + //serial clocking + 0: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_LOW_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; + SET FCS_SW TO INV_HIGH; + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS, FAST; + SET FCS_SW TO INV_LOW; + +} diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 5cd8041..f801738 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -104,17 +104,25 @@ #define PCLK_slow P_TRI_SLEW_RATE +#define PCLK_slow_FCS PCLK_SLOW + + //e2v says need on average 1.us rise time, for "normal" clocking calculate PCLK_fast that way #define PCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / 1.5" | bc) +#define PCLK_fast_FCS PCLK_fast + //e2v says need on average 90ns rise time for a serial clock #define SCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / 0.2" | bc) +#define SCLK_fast_FCS SCLK_fast + //NOTE: waveforms currently use serial "slow" slew rate for triangular waveform // serial "FAST" is for immediate changes (like e.g. resetting serial register) #define SCLK_slow S_TRI_SLEW_RATE //nominal value for now +#define SCLK_slow_FCS SCLK_slow //transfer gate uses only one slew rate From 9414471d1e106755601a5cc242ec1b4943a3ed6f Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 30 Oct 2025 11:40:37 -0700 Subject: [PATCH 157/194] FCS waveform definitions --- src/deimos/deimos.seq | 10 +++++++++- src/deimos/deimos.waveform | 28 ++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index b39535a..894442b 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -26,6 +26,7 @@ /** System Control Triggers **/ param engmode = 0 //run in the engineering mode +param engmode_fcs = 0 //run in the FCS engineering mode param integrate_ms = 0 // amount of time to integrate in the dark (ms component) param integrate_s = 0 // amount of time to integrate in the dark (s component) @@ -171,7 +172,7 @@ SEQUENCE ClampTest SEQUENCE StartSeqSummitMode { if engmode StartSeqEngMode(); - + if engmode_fcs StartSeqEngModeFCS(); GOTO StartSeqSummitMode(); @@ -191,6 +192,13 @@ SEQUENCE SummitModeSciReadout { } +SEQUENCE StartSeqEngModeFCS { + + + GOTO StartSeqEngModeFCS(); +} + + SEQUENCE StartSeqEngMode { InitialSetup(); if flush Flush(); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 388b38f..96def41 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -131,7 +131,29 @@ WAVEFORM InitialSetup } +WAVEFORM InitialSetupFCS +{ +0 : + SET RG TO INV_HIGH; + SET SW TO INV_HIGH; + SET RG_CLOCKS TO _RG_LOW; + SET SW_CLOCKS TO _SW_LOW; + + //disable the pin drivers + SET PD_OE_IN TO 1; + + SET AC_Clamp to HIGH; + + .+1000: + SET AC_Clamp to LOW; + SET FCS_P3 TO _MPP_CLOCK_LOW_FCS, FAST; + SET FCS_P2 TO _PAR_CLOCK_HIGH_FCS, FAST; + SET FCS_P1 TO _PAR_CLOCK_HIGH_FCS, FAST; + + .+10000: + SET NOP TO HIGH; +} @@ -951,6 +973,12 @@ WAVEFORM FCSSplitReadout } +WAVEFORM FCSParallelForwards +{ + 0: + +} + From 07fb096affb06f41d3c16f9ec6f4a03b78a5e4e7 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 6 Nov 2025 15:03:44 -0800 Subject: [PATCH 158/194] define more summit mode loops --- src/deimos/deimos.seq | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 894442b..a34fc11 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -169,20 +169,31 @@ SEQUENCE ClampTest #endif - -SEQUENCE StartSeqSummitMode { +//gets called once at timing reset +SEQUENCE Boot { if engmode StartSeqEngMode(); if engmode_fcs StartSeqEngModeFCS(); + StartSeqSummitMode(); + +} + + + +//Summit mode run loop - idle both FCS and science focal plane +SEQUENCE StartSeqSummitMode { GOTO StartSeqSummitMode(); } +//summit mode FCS and SCI idle (i.e. quiescent mode) +//this sequence should flush a single line SEQUENCE SummitModeSciFCSFlush { } +//summit mode FCS idle only (i.e. integrating on SCI focal plane) SEQUENCE SummitModeFCSFlush { } @@ -192,6 +203,10 @@ SEQUENCE SummitModeSciReadout { } +SEQUENCE SummitModeFCSReadout { + +} + SEQUENCE StartSeqEngModeFCS { From 2e02596eb4804c2557a1f485c4030ac7327816f1 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 6 Nov 2025 17:21:19 -0800 Subject: [PATCH 159/194] flesh out running mode sequence operations --- src/deimos/deimos.seq | 60 ++++++++++++++++++++++++++++++++++--------- 1 file changed, 48 insertions(+), 12 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index a34fc11..d92840d 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -19,8 +19,12 @@ /** testing constant values **/ - - +/** parameters interfaced with camerad in summit mode **/ +param FcsExpTimeSec = 0 //FCS exposure time (seconds) +param FcsExpTimeMSec = 0 // FCS exposure time (milliseconds) +param SciStart = 0 // trigger to start a science exposure +param FcsStart = 0 // trigger to start an FCS exposure +param SciStop = 0 //trigger to end a science exposure and start readout /** System Control Triggers **/ @@ -173,43 +177,74 @@ SEQUENCE ClampTest SEQUENCE Boot { if engmode StartSeqEngMode(); if engmode_fcs StartSeqEngModeFCS(); + StartSeqSummitMode(); } -//Summit mode run loop - idle both FCS and science focal plane +//Summit mode initial setup both FCS and science focal plane SEQUENCE StartSeqSummitMode { - + InitialSetup(); + InitialSetupFCS(); GOTO StartSeqSummitMode(); - } -//summit mode FCS and SCI idle (i.e. quiescent mode) -//this sequence should flush a single line -SEQUENCE SummitModeSciFCSFlush { +SEQUENCE SummitModeIdle { + //flush a line from both FCS and SCI planes + SummitModeSciFCSLineFlush(); + IF SciStart SummitModeSciIntegrate(); + GOTO SummitModeIdle(); +} +SEQUENCE SummitModeSciIntegrate { + //the absence of science mode flushing means science is integrating + SummitModeFCSLineFlush(); + //if we're asked for an FCS readout, do that. + IF FcsStart SummitModeFCSIntegrate(); + IF SciStop SummitModeSciReadout(); + GOTO SummitModeSciIntegrate(); } -//summit mode FCS idle only (i.e. integrating on SCI focal plane) -SEQUENCE SummitModeFCSFlush { +SEQUENCE SummitModeFCSIntegrate +{ + KeepThisFrame(); + Wait1ms(FcsExpTimeMSec); + Wait1s(FcsExpTimeSec); + SummitModeFCSReadout(); + RETURN; } + SEQUENCE SummitModeSciReadout { + //very similar to eng mode FrameReadout, except + //only two possible modes (sequential or coincident) + //also no trigger out operation, no TDI, no linbin. + ReadoutBegin(); + Wait1us(50); + DumpPixels(_AMPREADCOLS); + if llel_seq LineReadout(TOTAL_ROWS); + if llel_coincident LineReadoutCoincident(TOTAL_ROWS); + + ReadoutEnd(); + //this one doesn't RETURN... after a summit mode science readout we go back + //to idling + GOTO SummitModeIdle(); } SEQUENCE SummitModeFCSReadout { + + RETURN; } SEQUENCE StartSeqEngModeFCS { - - + InitialSetupFCS(); GOTO StartSeqEngModeFCS(); } @@ -312,6 +347,7 @@ SEQUENCE ReadoutKeep } + SEQUENCE FrameReadoutTDCllel { From 819076195475511f7fc871f7d2eecafb1bc0038a Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 7 Nov 2025 16:31:31 -0800 Subject: [PATCH 160/194] more functions for summit mode --- src/deimos/deimos.seq | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index d92840d..1916946 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -46,6 +46,11 @@ param flush = 0 // run the flush sequence between every frame param tdi_wait_us = 0 // add a TDI wait period to each llel readout in llel_seq mode (for "quickPTC") + //internal summit mode state parameters + param summit_sci_is_flushing = 1 + param summit_fcs_is_flushing = 1 + + param line_clamp_delay_us = 10 //=====READOUT MODES -- all are MUTUALLY EXCLUSIVE ---- @@ -188,33 +193,34 @@ SEQUENCE Boot { SEQUENCE StartSeqSummitMode { InitialSetup(); InitialSetupFCS(); - GOTO StartSeqSummitMode(); + SummitModeLoop(); } -SEQUENCE SummitModeIdle { +SEQUENCE SummitModeLoop { //flush a line from both FCS and SCI planes - SummitModeSciFCSLineFlush(); - IF SciStart SummitModeSciIntegrate(); + IF SciStart SummitModeSciIntegrateStart(); + IF FcsStart SummitModeFcsIntegrate(); - GOTO SummitModeIdle(); + GOTO SummitModeLoop(); } -SEQUENCE SummitModeSciIntegrate { - //the absence of science mode flushing means science is integrating - SummitModeFCSLineFlush(); - //if we're asked for an FCS readout, do that. - IF FcsStart SummitModeFCSIntegrate(); - IF SciStop SummitModeSciReadout(); - GOTO SummitModeSciIntegrate(); +SEQUENCE SummitModeLineFlush { + IF summit_sci_is_flushing SummitScienceLineFlush(); + IF !summit_sci_is_flushing SummitWaitScienceLineFlush(); + IF summit_fcs_is_flushing SummitFCSLineFlush(); + IF !summit_fcs_is_flushing SummitWaitFCSLineFlush(); } + SEQUENCE SummitModeFCSIntegrate { + summit_fcs_is_flushing--; KeepThisFrame(); Wait1ms(FcsExpTimeMSec); Wait1s(FcsExpTimeSec); SummitModeFCSReadout(); + summit_fcs_is_flushing++ RETURN; } @@ -233,7 +239,7 @@ SEQUENCE SummitModeSciReadout { ReadoutEnd(); //this one doesn't RETURN... after a summit mode science readout we go back //to idling - GOTO SummitModeIdle(); + GOTO SummitModeLoop(); } From 41bff72f2fcc98ff7f75a2365b22450fcb8aa801 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 10 Nov 2025 15:10:08 -0800 Subject: [PATCH 161/194] more work on core DEIMOS summit mode loops --- src/deimos/deimos.seq | 65 ++++++++++++++++------------- src/deimos/deimos.waveform | 84 -------------------------------------- 2 files changed, 37 insertions(+), 112 deletions(-) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 1916946..666ff97 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -25,7 +25,7 @@ param FcsExpTimeMSec = 0 // FCS exposure time (milliseconds) param SciStart = 0 // trigger to start a science exposure param FcsStart = 0 // trigger to start an FCS exposure param SciStop = 0 //trigger to end a science exposure and start readout - +param SciDump = 0 //trigger to end a science exposure and start dump sequence /** System Control Triggers **/ @@ -47,9 +47,7 @@ param flush = 0 // run the flush sequence between every frame //internal summit mode state parameters - param summit_sci_is_flushing = 1 - param summit_fcs_is_flushing = 1 - + param summit_sci_is_integrating = 0 param line_clamp_delay_us = 10 @@ -194,33 +192,47 @@ SEQUENCE StartSeqSummitMode { InitialSetup(); InitialSetupFCS(); SummitModeLoop(); + RETURN; } SEQUENCE SummitModeLoop { - //flush a line from both FCS and SCI planes - IF SciStart SummitModeSciIntegrateStart(); - IF FcsStart SummitModeFcsIntegrate(); - + IF !summit_sci_is_integrating SummitModeAllLineFlush(); + IF summit_sci_is_integrating SummitModeFCSLineFlush(); + IF SciStart SummitModeSciIntegrate(); + IF FcsStart SummitModeFCSIntegrate(); + IF SciStop SummitModeSciReadout(); + IF SciDump SummitModeSciDump(); GOTO SummitModeLoop(); } -SEQUENCE SummitModeLineFlush { - IF summit_sci_is_flushing SummitScienceLineFlush(); - IF !summit_sci_is_flushing SummitWaitScienceLineFlush(); - IF summit_fcs_is_flushing SummitFCSLineFlush(); - IF !summit_fcs_is_flushing SummitWaitFCSLineFlush(); + +SEQUENCE SummitModeAllLineFlush { + ParallelForwardNoCoincident(); + SummitModeFCSLineFlush(); + RETURN; +} + +SEQUENCE SummitModeFCSLineFlush { + FCSParallelForward(); + + RETURN; } +SEQUENCE SummitModeSciIntegrate +{ + IF SciStart SciStart--; + summit_sci_is_integrating++; + RETURN; +} SEQUENCE SummitModeFCSIntegrate { - summit_fcs_is_flushing--; + IF FcsStart FcsStart--; KeepThisFrame(); Wait1ms(FcsExpTimeMSec); Wait1s(FcsExpTimeSec); SummitModeFCSReadout(); - summit_fcs_is_flushing++ RETURN; } @@ -229,6 +241,8 @@ SEQUENCE SummitModeSciReadout { //very similar to eng mode FrameReadout, except //only two possible modes (sequential or coincident) //also no trigger out operation, no TDI, no linbin. + IF summit_sci_is_integrating summit_sci_is_integrating--; + IF SciStop SciStop--; ReadoutBegin(); Wait1us(50); @@ -237,9 +251,14 @@ SEQUENCE SummitModeSciReadout { if llel_coincident LineReadoutCoincident(TOTAL_ROWS); ReadoutEnd(); - //this one doesn't RETURN... after a summit mode science readout we go back - //to idling - GOTO SummitModeLoop(); + RETURN; +} + +SEQUENCE SummitModeSciDump { + IF summit_sci_is_integrating summit_sci_is_integrating--; + IF SciDump SciDump--; + + RETURN; } @@ -284,16 +303,6 @@ SEQUENCE TestBrokenReadout } - -SEQUENCE Flush -{ - FlushSetup(); - Wait1ms(10); - FlushTearDown(); - Wait1ms(10); - RETURN Flush; -} - SEQUENCE EvacuateE { EvacuateEStart(); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 96def41..dcd9d77 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -88,24 +88,6 @@ WAVEFORM KeepThisFrame { #define _SER_CLOCK_FLUSH 10.0 -WAVEFORM LineFlush { - 0: SET SCI_PCLK1 TO _PAR_CLOCK_FLUSH_HIGH, FAST; - SET SCI_PCLK2 TO _PAR_CLOCK_FLUSH_HIGH, FAST; - SET SCI_PCLK3 TO _PAR_CLOCK_FLUSH_LOW, FAST; - .+1000: SET NOP TO HIGH; -} - - -WAVEFORM RegisterFlush { - 0: SET SCI_SCLK1 TO _SER_CLOCK_FLUSH, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_FLUSH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_FLUSH, FAST; - .+1000: - SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_HIGH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; -} - WAVEFORM InitialSetup {0 : @@ -155,43 +137,6 @@ WAVEFORM InitialSetupFCS SET NOP TO HIGH; } - - -WAVEFORM FlushSetup { - 0: - SET SCI_PCLK3 TO _PAR_CLOCK_FLUSH, FAST; - SET SCI_PCLK2 TO _PAR_CLOCK_FLUSH, FAST; - SET SCI_PCLK1 TO _PAR_CLOCK_FLUSH, FAST; - - SET TG TO _TG_CLOCK_HIGH, FAST; - //SET AC_Clamp TO LOW; - SET SW TO INV_HIGH; - SET RG TO INV_HIGH; - SET SCI_SCLK1 TO _SER_CLOCK_FLUSH, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_FLUSH, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_FLUSH, FAST; - -} - -WAVEFORM FlushTearDown { - 0: SET NOP TO HIGH; - SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; - SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; - SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; - - SET TG TO _TG_CLOCK_LOW, FAST; - - SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - - SET SW TO INV_LOW; - SET SW_CLOCKS to _SW_LOW; - SET RG TO INV_LOW; - SET RG_CLOCKS TO _RG_LOW; - -} - WAVEFORM OpenShutter { 0: SET SHUTTER to 1; @@ -240,8 +185,6 @@ WAVEFORM TransferToSerialRegisterCoincident SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; .+50: SET AC_Clamp to LOW; - - } @@ -289,7 +232,6 @@ WAVEFORM ParallelForwardNoCoincident SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; .+50: SET AC_Clamp TO LOW; - } @@ -888,7 +830,6 @@ WAVEFORM ClampTestInner WAVEFORM ClampOn { 0: SET AC_Clamp TO HIGH; - } Waveform ClampOff @@ -931,17 +872,11 @@ WAVEFORM setupTGTest WAVEFORM FCSParallelForward { 0: SET FCS_P3 to _MPP_CLOCK_HIGH_FCS, FAST; - .+1000: SET FCS_P2 to _PAR_CLOCK_LOW_FCS, FAST; - .+1000: SET FCS_P1 to _PAR_CLOCK_HIGH_FCS, FAST; - .+1000: SET FCS_P3 to _MPP_CLOCK_LOW_FCS, FAST; - .+1000: set FCS_P2 to _PAR_CLOCK_HIGH_FCS, FAST; - .+1000: set FCS_P1 to _PAR_CLOCK_LOW_FCS, FAST; - } @@ -972,22 +907,3 @@ WAVEFORM FCSSplitReadout SET FCS_SW TO INV_LOW; } - -WAVEFORM FCSParallelForwards -{ - 0: - -} - - - - - -/* -WAVEFORM wPixel { - 0: SET PIXEL TO HIGH; - .+TICK: SET PIXEL TO LOW; - SET FRAME TO LOW; - SET LINE TO LOW; -} -*/ From 9bbf267adba59d3074633a9cd0715c1a52bb72fc Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 13 Nov 2025 16:09:09 -0800 Subject: [PATCH 162/194] ready to test initial summit mode sequencing --- src/deimos/deimos.def | 4 +-- src/deimos/deimos.seq | 52 +++++++++++++++++++++++--------------- src/deimos/deimos.signals | 4 +++ src/deimos/deimos.waveform | 6 ++--- 4 files changed, 40 insertions(+), 26 deletions(-) diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index e31606e..48e217e 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -112,8 +112,6 @@ - - /** basic constants to assist in somewhat automating slew rate for triange clocking. For now we are just entering a slew time manually, then calculating the rate to make sure we hit the intended voltage at the top of the triangle waveform **/ @@ -127,3 +125,5 @@ #define _FCS_PRESCAN 25 #define _FCS_AMPCOLS 1024 #define _FCS_OVERSCAN 20 + +#define _FCS_TOTAL_COLS #eval _FCS_PRESCAN + _FCS_AMPCOLS + _FCS_OVERSCAN diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 666ff97..d655bb6 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -1,3 +1,4 @@ + /* -*- C -*- */ /** --------------------------------------------------------------------------- * @file deimos.seq @@ -25,7 +26,6 @@ param FcsExpTimeMSec = 0 // FCS exposure time (milliseconds) param SciStart = 0 // trigger to start a science exposure param FcsStart = 0 // trigger to start an FCS exposure param SciStop = 0 //trigger to end a science exposure and start readout -param SciDump = 0 //trigger to end a science exposure and start dump sequence /** System Control Triggers **/ @@ -38,7 +38,6 @@ param integrate_s = 0 // amount of time to integrate in the dark (s component) param framecount = 0 // how many frames to read (set to 1 to trigger a readout on next sequence param abortintegrate = 0 // set to 1 to bail out if in the middle of an integration -param flush = 0 // run the flush sequence between every frame param illum = 0 //should the light be turned on for integrations param integrate_illum_ms = 50 //amount of time to integrate with light on (ms component) param integrate_illum_s = 0 //amount of time to integrate with light on (s component) @@ -181,8 +180,7 @@ SEQUENCE Boot { if engmode StartSeqEngMode(); if engmode_fcs StartSeqEngModeFCS(); - StartSeqSummitMode(); - + GOTO StartSeqSummitMode(); } @@ -196,12 +194,10 @@ SEQUENCE StartSeqSummitMode { } SEQUENCE SummitModeLoop { - IF !summit_sci_is_integrating SummitModeAllLineFlush(); - IF summit_sci_is_integrating SummitModeFCSLineFlush(); + SummitModeFCSLineFlush(); IF SciStart SummitModeSciIntegrate(); IF FcsStart SummitModeFCSIntegrate(); IF SciStop SummitModeSciReadout(); - IF SciDump SummitModeSciDump(); GOTO SummitModeLoop(); } @@ -214,14 +210,20 @@ SEQUENCE SummitModeAllLineFlush { SEQUENCE SummitModeFCSLineFlush { FCSParallelForward(); - RETURN; } SEQUENCE SummitModeSciIntegrate { IF SciStart SciStart--; - summit_sci_is_integrating++; + //do a dump sequence before starting integration + OpenShutter(); + SummitModeSciDump(); + CloseShutter(); + //set parallels to appropriate static gates here + + //TODO: should we emit some kind of signal here? + IF !summit_sci_is_integrating summit_sci_is_integrating++; RETURN; } @@ -230,8 +232,10 @@ SEQUENCE SummitModeFCSIntegrate { IF FcsStart FcsStart--; KeepThisFrame(); + OpenShutter(); Wait1ms(FcsExpTimeMSec); Wait1s(FcsExpTimeSec); + CloseShutter(); SummitModeFCSReadout(); RETURN; } @@ -255,28 +259,40 @@ SEQUENCE SummitModeSciReadout { } SEQUENCE SummitModeSciDump { - IF summit_sci_is_integrating summit_sci_is_integrating--; - IF SciDump SciDump--; - + EvacuateEStart(); + EvacuateFStart(); + ParallelForwardNoCoincident(TOTAL_ROWS); + Wait1us(50); + DumpPixels(_AMPREADCOLS); RETURN; } SEQUENCE SummitModeFCSReadout { + Wait1us(50); + //TODO: faster FCS readout with windowing + FCSLineReadout(_FCS_ROWS); + RETURN; +} - +SEQUENCE FCSLineReadout { + FCSParallelForward(); + Wait1us(line_clamp_delay_us); + FCSSplitReadout(_FCS_TOTAL_COLS); RETURN; } + SEQUENCE StartSeqEngModeFCS { InitialSetupFCS(); + if framecount SummitModeFCSIntegrate(); + GOTO StartSeqEngModeFCS(); } SEQUENCE StartSeqEngMode { InitialSetup(); - if flush Flush(); if framecount IntegrateAndReadout(); if !framecount LineReadoutFast(TOTAL_ROWS); if rg_mod_test_mode TestBrokenReadout(); @@ -566,7 +582,7 @@ SEQUENCE Wait1s { SEQUENCE abortintegration { CloseShutter(); - GOTO StartSeq(); + GOTO Boot(); } SEQUENCE LineReadoutSlowPix @@ -602,12 +618,6 @@ SEQUENCE LineReadoutFast RETURN; } -SEQUENCE LineDump -{ - DumpPixels(_AMPREADCOLS); - RETURN; -} - SEQUENCE LineReadout { diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 654a57d..2cdd396 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -80,12 +80,16 @@ #define SCI_RGBACKUP2 2 : 1 //new VIB assignment #define SCI_SWBACKUP1 2 : 2 //new VIB assignment #define FCS2_S2L 2 : 3 //new VIB assignment + #define FCS1_S2L 2 : 4 //new VIB assignment #define FCS2_S3L 2 : 5 //new VIB assignmet + #define FCS_S1 2 : 6 //new VIB assignment #define SCI_SWBACKUP2 2 : 7 //new VIB assignment + #define FCS_RG 2 : 8 //new VIB assignment #define FCS_SW 2 : 9 //new VIB assignment + #define FCS1_S3L 2 : 10 //new VIB assignment #define Spare1 2 : 11 //new VIB assignment #define Spare2 2 : 12 //new VIB assignment diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index dcd9d77..310f8fd 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -881,7 +881,7 @@ WAVEFORM FCSParallelForward #define FCS_SER_STEP 30 - +#define FCS_SIG_DELAY 60 WAVEFORM FCSSplitReadout { @@ -891,8 +891,7 @@ WAVEFORM FCSSplitReadout .+1: SET PIXEL TO LOW; SET LINE TO LOW; SET FRAME TO LOW; - - SET FCS_RG TO INV_HIGH; + SET FCS_RG TO INV_HIGH; //NOTE: FCS_RG sigil not working for some reason?? .+2*FCS_SER_STEP: SET FCS_RG TO INV_LOW; @@ -905,5 +904,6 @@ WAVEFORM FCSSplitReadout .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS, FAST; SET FCS_SW TO INV_LOW; + .+FCS_SIG_DELAY: SET NOP TO HIGH; } From ea80f6f915d132bd592b5d642731c5022e257f8f Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 18 Nov 2025 12:40:15 -0800 Subject: [PATCH 163/194] add FCS CDS definitions --- src/deimos/deimos.cds | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index da2e536..f70e906 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -72,14 +72,14 @@ TAPLINE4 ="AM41L,-1,100" TAPLINE5 ="AM42R,-1,100" TAPLINE6 ="AM43L,-1,100" TAPLINE7 ="AM44R,-1,100" -TAPLINE8 ="AM45L,-1,100" -TAPLINE9 ="AM46R,-1,100" -TAPLINE10 ="AM47L,-1,100" -TAPLINE11 ="AM48R,-1,100" -TAPLINE12 ="AM49L,-1,100" -TAPLINE13 ="AM50R,-1,100" -TAPLINE14 ="AM51L,-1,100" -TAPLINE15 ="AM52R,-1,100" +TAPLINE8 ="AM47L,-1,100" +TAPLINE9 ="AM48R,-1,100" +TAPLINE10 ="AM49L,-1,100" +TAPLINE11 ="AM50R,-1,100" +TAPLINE12 ="AM51L,-1,100" +TAPLINE13 ="AM52R,-1,100" +TAPLINE14 ="AM53L,-1,100" +TAPLINE15 ="AM54R,-1,100" TAPLINES=16 #endif @@ -88,3 +88,12 @@ TRIGOUTFORCE=0 TRIGOUTINVERT=0 TRIGOUTLEVEL=0 TRIGOUTPOWER=1 + + +//FCS R is pair 9, FCS L is pair 10 +#ifdef FCS_CDS +TAPLINES=2 +FRAMEMODE=0 +TAPLINE0 ="AM45L,-1,100" +TAPLINE1 ="AM46R,-1,100" +#endif From ced51341569e354decfa1478a2455983d3edf2ff Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 18 Nov 2025 13:53:47 -0800 Subject: [PATCH 164/194] redefine CDS to FCS engineering mode --- src/deimos/deimos.cds | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index f70e906..b3d576b 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -39,7 +39,7 @@ SHD1 = 448 SHD2 = 575 //ADM module installed in slot 7 -#define SINGLE_DET_TEST 1 +#define FCS_CDS 1 // NOTE tghere is a re-mapping due to the cameralink cable, // that is not accounted for by the current DEIMOS VIB. @@ -61,6 +61,11 @@ TAPLINE1 ="AM40R,-1,100" TAPLINES=2 FRAMEMODE=0 +#elifdef FCS_CDS +TAPLINES=2 +FRAMEMODE=0 +TAPLINE0 ="AM45L,-1,100" +TAPLINE1 ="AM46R,-1,100" #else FRAMEMODE=2 @@ -88,12 +93,3 @@ TRIGOUTFORCE=0 TRIGOUTINVERT=0 TRIGOUTLEVEL=0 TRIGOUTPOWER=1 - - -//FCS R is pair 9, FCS L is pair 10 -#ifdef FCS_CDS -TAPLINES=2 -FRAMEMODE=0 -TAPLINE0 ="AM45L,-1,100" -TAPLINE1 ="AM46R,-1,100" -#endif From 582cc56dbf20c477e4b831c26f3e7cebb1174548 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 19 Nov 2025 13:57:41 -0800 Subject: [PATCH 165/194] DEIMOS summit ACF v0.0.1 for software team test --- src/deimos/deimos.acf | 2102 ++++++++++++++++++++++++ src/deimos/deimos.cds | 66 +- src/deimos/deimos.mod | 30 +- src/deimos/deimos.modes | 25 + src/deimos/deimos.seq | 51 +- src/deimos/deimos.signals | 1 + src/deimos/deimos.waveform | 46 +- src/deimos/voltage_timing_parameters.h | 9 +- 8 files changed, 2260 insertions(+), 70 deletions(-) create mode 100644 src/deimos/deimos.acf diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf new file mode 100644 index 0000000..f20fde8 --- /dev/null +++ b/src/deimos/deimos.acf @@ -0,0 +1,2102 @@ +[CONFIG] + BIGBUF = 0 +RAWSTARTLINE = 0 + RAWSTARTPIXEL = 1061 +SAMPLEMODE = 1 +RAWENABLE = 1 +RAWENDLINE = 800 +RAWSAMPLES = 20000 + TAPLINE0 ="AM39L,-1,100" +TAPLINE1 ="AM40R,-1,100" +TAPLINES=2 +FRAMEMODE=0 +BIGBUF = 0 +LINECOUNT = 4125 +PIXELCOUNT = 1094 + RAWSEL = 11 +RAWSTARTLINE = 0 +SHP1 = 120 +SHP2 = 303 +SHD1 = 448 +SHD2 = 575 +TAPLINES=2 +FRAMEMODE=0 +TAPLINE0 ="AM45L,-1,100" +TAPLINE1 ="AM46R,-1,100" +RAWSEL=49 +TRIGOUTFORCE=0 +TRIGOUTINVERT=0 +TRIGOUTLEVEL=0 +TRIGOUTPOWER=1 +PARAMETER0="FcsExpTimeSec=0" +PARAMETER1="FcsExpTimeMSec=0" +PARAMETER2="SciStart=0" +PARAMETER3="FcsStart=0" +PARAMETER4="SciStop=0" +PARAMETER5="engmode=0" +PARAMETER6="engmode_fcs=0" +PARAMETER7="integrate_ms=0" +PARAMETER8="integrate_s=0" +PARAMETER9="framecount=0" +PARAMETER10="abortintegrate=0" +PARAMETER11="illum=0" +PARAMETER12="integrate_illum_ms=50" +PARAMETER13="integrate_illum_s=0" +PARAMETER14="rg_mod_test_mode=0" +PARAMETER15="tdi_wait_us=0" +PARAMETER16="summit_sci_is_integrating=0" +PARAMETER17="line_clamp_delay_us=10" +PARAMETER18="llel_coincident=0" +PARAMETER19="llel_seq=1" +PARAMETER20="slow_pix=0" +PARAMETER21="linbin=0" +PARAMETER22="dch_llel=0" +PARAMETER23="dch_ser=0" +PARAMETER24="llel_bin=1" +PARAMETER25="ser_bin=1" +PARAMETER26="enable_ser_bin=0" +PARAMETER27="dsch_ser_direction=0" +PARAMETER28="dsch_ser_dump_bcs=0" +PARAMETERS=29 +LINE0=StartSeqSummitMode: +LINE1="STATE000; CALL InitialSetup" +LINE2="STATE000; CALL InitialSetupFCS" +LINE3="STATE000; CALL SummitModeLoop" +LINE4="STATE000; RETURN StartSeqSummitMode" +LINE5=SummitModeLoop: +LINE6="STATE000; if engmode CALL StartSeqEngMode" +LINE7="STATE000; if engmode_fcs CALL StartSeqEngModeFCS" +LINE8="STATE000; CALL SummitModeFCSLineFlush" +LINE9="STATE000; IF SciStart CALL SummitModeSciIntegrate" +LINE10="STATE000; IF FcsStart CALL SummitModeFCSIntegrate" +LINE11="STATE000; IF SciStop CALL SummitModeSciReadout" +LINE12="STATE000; GOTO SummitModeLoop" +LINE13=SummitModeAllLineFlush: +LINE14="STATE000; CALL ParallelForwardNoCoincident" +LINE15="STATE000; CALL SummitModeFCSLineFlush" +LINE16="STATE000; RETURN SummitModeAllLineFlush" +LINE17=SummitModeFCSLineFlush: +LINE18="STATE000; CALL FCSParallelForward" +LINE19="STATE000; CALL DumpPixelsFCS(1069)" +LINE20="STATE000; RETURN SummitModeFCSLineFlush" +LINE21=SummitModeSciIntegrate: +LINE22="STATE000; SciStart--" +LINE23="STATE000; CALL OpenShutter" +LINE24="STATE000; CALL SummitModeSciDump" +LINE25="STATE000; CALL CloseShutter" +LINE26="STATE000; summit_sci_is_integrating++" +LINE27="STATE000; RETURN SummitModeSciIntegrate" +LINE28=SummitModeFCSIntegrate: +LINE29="STATE000; FcsStart--" +LINE30="STATE000; CALL KeepThisFrame" +LINE31="STATE000; CALL OpenShutter" +LINE32="STATE000; CALL Wait1ms(FcsExpTimeMSec)" +LINE33="STATE000; CALL Wait1s(FcsExpTimeSec)" +LINE34="STATE000; CALL CloseShutter" +LINE35="STATE000; CALL SummitModeFCSReadout" +LINE36="STATE000; RETURN SummitModeFCSIntegrate" +LINE37=SummitModeSciReadout: +LINE38="STATE000; summit_sci_is_integrating--" +LINE39="STATE000; SciStop--" +LINE40="STATE000; CALL ReadoutBegin" +LINE41="STATE000; CALL Wait1us(50)" +LINE42="STATE000; CALL DumpPixels(1094)" +LINE43="STATE000; if llel_seq CALL LineReadout(4124)" +LINE44="STATE000; if llel_coincident CALL LineReadoutCoincident(4124)" +LINE45="STATE000; CALL ReadoutEnd" +LINE46="STATE000; RETURN SummitModeSciReadout" +LINE47=SummitModeSciDump: +LINE48="STATE000; CALL EvacuateEStart" +LINE49="STATE000; CALL EvacuateFStart" +LINE50="STATE000; CALL ParallelForwardNoCoincident(4124)" +LINE51="STATE000; CALL Wait1us(50)" +LINE52="STATE000; CALL DumpPixels(1094)" +LINE53="STATE000; RETURN SummitModeSciDump" +LINE54=SummitModeFCSReadout: +LINE55="STATE000; CALL Wait1us(50)" +LINE56="STATE000; CALL FCSLineReadout(4096)" +LINE57="STATE000; RETURN SummitModeFCSReadout" +LINE58=FCSLineReadout: +LINE59="STATE000; CALL FCSParallelForward" +LINE60="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE61="STATE000; CALL FCSSplitReadout(1069)" +LINE62="STATE000; RETURN FCSLineReadout" +LINE63=StartSeqEngModeFCS: +LINE64="STATE000; if framecount CALL SummitModeFCSIntegrate" +LINE65="STATE000; if !framecount CALL SummitModeFCSLineFlush(4096)" +LINE66="STATE000; GOTO StartSeqEngModeFCS" +LINE67=StartSeqEngMode: +LINE68="STATE000; if framecount CALL IntegrateAndReadout" +LINE69="STATE000; if !framecount CALL LineReadoutFast(4124)" +LINE70="STATE000; if rg_mod_test_mode CALL TestBrokenReadout" +LINE71="STATE000; GOTO StartSeqEngMode" +LINE72=IntegrateAndReadout: +LINE73="STATE000; CALL Integrate" +LINE74="STATE000; CALL ReadoutKeep" +LINE75="STATE000; RETURN IntegrateAndReadout" +LINE76=TestBrokenReadout: +LINE77="STATE000; CALL OutputTestSetup" +LINE78="STATE000; CALL PulseTGA" +LINE79="STATE000; CALL VRDModulate" +LINE80="STATE000; RETURN TestBrokenReadout" +LINE81=EvacuateE: +LINE82="STATE000; CALL EvacuateEStart" +LINE83="STATE000; CALL Wait1ms" +LINE84="STATE000; CALL EvacuateEFinish" +LINE85="STATE000; RETURN EvacuateE" +LINE86=EvacuateF: +LINE87="STATE000; CALL EvacuateFStart" +LINE88="STATE000; CALL Wait1ms" +LINE89="STATE000; CALL EvacuateFFinish" +LINE90="STATE000; RETURN EvacuateF" +LINE91=Integrate: +LINE92="STATE000; CALL KeepThisFrame" +LINE93="STATE000; CALL ReadPixels(1094)" +LINE94="STATE000; if illum CALL OpenShutter" +LINE95="STATE000; CALL Wait1ms(integrate_illum_ms)" +LINE96="STATE000; CALL Wait1s(integrate_illum_s)" +LINE97="STATE000; if illum CALL CloseShutter" +LINE98="STATE000; CALL Wait1ms(integrate_ms)" +LINE99="STATE000; CALL Wait1s(integrate_s)" +LINE100="STATE000; RETURN Integrate" +LINE101=ReadoutKeep: +LINE102="STATE000; CALL ReadoutBegin" +LINE103="STATE000; if llel_coincident CALL FrameReadout" +LINE104="STATE000; if llel_seq CALL FrameReadout" +LINE105="STATE000; if slow_pix CALL FrameReadout" +LINE106="STATE000; if linbin CALL FrameReadout" +LINE107="STATE000; if dch_llel CALL FrameReadoutTDCllel" +LINE108="STATE000; if dch_ser CALL FrameReadoutTDCser" +LINE109="STATE000; framecount--" +LINE110="STATE000; RETURN ReadoutKeep" +LINE111=FrameReadoutTDCllel: +LINE112="STATE000; CALL Wait1us(50)" +LINE113="STATE000; CALL DumpPixels(1094)" +LINE114="STATE000; CALL FrameReadoutTDCllel_Innerloop(68)" +LINE115="STATE000; CALL LineReadout(44)" +LINE116="STATE000; CALL ReadoutEnd" +LINE117="STATE000; CALL linbindecr(llel_bin)" +LINE118="STATE000; CALL linbinincr" +LINE119="STATE000; RETURN FrameReadoutTDCllel" +LINE120=FrameReadoutTDCllel_Innerloop: +LINE121="STATE000; CALL LineReadoutAOnly(60)" +LINE122="STATE000; CALL ForwardParallelSectionBNoCoincident(llel_bin)" +LINE123="STATE000; CALL linbinincr(1)" +LINE124="STATE000; RETURN FrameReadoutTDCllel_Innerloop" +LINE125=FrameReadoutTDCser: +LINE126="STATE000; CALL Wait1us(50)" +LINE127="STATE000; CALL DumpPixels(1094)" +LINE128="STATE000; CALL LineReadoutTDCser(4124)" +LINE129="STATE000; CALL ReadoutEnd" +LINE130="STATE000; RETURN FrameReadoutTDCser" +LINE131=LineReadoutTDCser: +LINE132="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE133="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE134="STATE000; CALL TDCser_Innerloop(49)" +LINE135="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(15)" +LINE136="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(15)" +LINE137="STATE000; if !dsch_ser_dump_bcs CALL TDCser_ReadoutLoop" +LINE138="STATE000; if dsch_ser_dump_bcs CALL TDCser_ReadoutLoopDumpBright" +LINE139="STATE000; if !dsch_ser_direction CALL EvacuateF" +LINE140="STATE000; if dsch_ser_direction CALL EvacuateE" +LINE141="STATE000; CALL serbindecr(ser_bin)" +LINE142="STATE000; CALL serbinincr" +LINE143="STATE000; RETURN LineReadoutTDCser" +LINE144=TDCser_ReadoutLoopDumpBright: +LINE145="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(50)" +LINE146="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(50)" +LINE147="STATE000; CALL TDCser_ReadoutLoopDumpBright_Inner(49)" +LINE148="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(15)" +LINE149="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(15)" +LINE150="STATE000; RETURN TDCser_ReadoutLoopDumpBright" +LINE151=TDCser_ReadoutLoop: +LINE152="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(1094)" +LINE153="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(1094)" +LINE154="STATE000; RETURN TDCser_ReadoutLoop" +LINE155=TDCser_ReadoutLoopDumpBright_Inner: +LINE156="STATE000; CALL trigpix" +LINE157="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly" +LINE158="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly" +LINE159="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(20)" +LINE160="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(20)" +LINE161="STATE000; RETURN TDCser_ReadoutLoopDumpBright_Inner" +LINE162=TDCser_Innerloop: +LINE163="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(21)" +LINE164="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(21)" +LINE165="STATE000; if !dsch_ser_direction CALL SerialFBackwards(ser_bin)" +LINE166="STATE000; if dsch_ser_direction CALL SerialEBackwards(ser_bin)" +LINE167="STATE000; CALL serbinincr(1)" +LINE168="STATE000; RETURN TDCser_Innerloop" +LINE169=serbinincr: +LINE170="STATE000; ser_bin++" +LINE171="STATE000; RETURN serbinincr" +LINE172=serbindecr: +LINE173="STATE000; ser_bin--" +LINE174="STATE000; RETURN serbindecr" +LINE175=FrameReadout: +LINE176="STATE000; CALL Wait1us(50)" +LINE177="STATE000; CALL DumpPixels(1094)" +LINE178="STATE000; if tdi_wait_us CALL OpenShutter" +LINE179="STATE000; IF llel_seq CALL LineReadout(4124)" +LINE180="STATE000; IF llel_coincident CALL LineReadoutCoincident(4124)" +LINE181="STATE000; IF slow_pix CALL LineReadoutSlowPix(4124)" +LINE182="STATE000; IF linbin CALL LineReadout(90)" +LINE183="STATE000; IF linbin CALL LineReadoutFast(4034)" +LINE184="STATE000; if tdi_wait_us CALL CloseShutter" +LINE185="STATE000; CALL ReadoutEnd" +LINE186="STATE000; if linbin CALL linbindecr(llel_bin)" +LINE187="STATE000; if linbin CALL linbinincr" +LINE188="STATE000; RETURN FrameReadout" +LINE189=Wait1s: +LINE190="STATE000; if abortintegrate CALL abortintegration" +LINE191="STATE000; CALL Wait1ms(1000)" +LINE192="STATE000; RETURN Wait1s" +LINE193=abortintegration: +LINE194="STATE000; CALL CloseShutter" +LINE195="STATE000; GOTO StartSeqSummitMode" +LINE196=LineReadoutSlowPix: +LINE197="STATE000; CALL ParallelForwardNoCoincident" +LINE198="STATE000; CALL Wait1us(50)" +LINE199="STATE000; CALL ReadPixelsSlow(1094)" +LINE200="STATE000; CALL Wait1us(10)" +LINE201="STATE000; RETURN LineReadoutSlowPix" +LINE202=linbinincrcheck: +LINE203="STATE000; if framecount CALL linbinincr" +LINE204="STATE000; RETURN linbinincrcheck" +LINE205=linbinincr: +LINE206="STATE000; llel_bin++" +LINE207="STATE000; RETURN linbinincr" +LINE208=linbindecr: +LINE209="STATE000; llel_bin--" +LINE210="STATE000; RETURN linbindecr" +LINE211=LineReadoutFast: +LINE212="STATE000; CALL ParallelForwardNoCoincident" +LINE213="STATE000; CALL ReadPixels(1094)" +LINE214="STATE000; RETURN LineReadoutFast" +LINE215=LineReadout: +LINE216="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE217="STATE000; if linbin CALL linbinincr" +LINE218="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE219="STATE000; if enable_ser_bin CALL ReadPixels(50)" +LINE220="STATE000; if enable_ser_bin CALL SerBinReadPixels(1024)" +LINE221="STATE000; if enable_ser_bin CALL ReadPixels(20)" +LINE222="STATE000; if !enable_ser_bin CALL ReadPixels(1094)" +LINE223="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE224="STATE000; RETURN LineReadout" +LINE225=SerBinReadPixels: +LINE226="STATE000; CALL PrepSerBin" +LINE227="STATE000; CALL serbindecr" +LINE228="STATE000; CALL SerialBinForwards(ser_bin)" +LINE229="STATE000; CALL ReadPixels" +LINE230="STATE000; CALL serbinincr" +LINE231="STATE000; RETURN SerBinReadPixels" +LINE232=LineReadoutCoincident: +LINE233="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE234="STATE000; CALL ParallelForwardSegment1" +LINE235="STATE000; CALL TransferToSerialRegisterCoincident" +LINE236="STATE000; CALL ReadPixels(364)" +LINE237="STATE000; CALL ParallelForwardSegment2" +LINE238="STATE000; CALL ReadPixels(364)" +LINE239="STATE000; CALL ParallelForwardSegment3" +LINE240="STATE000; CALL ReadPixels(364) CALL ReadPixels(2)" +LINE241="STATE000; RETURN LineReadoutCoincident" +LINE242=LineReadoutAOnly: +LINE243="STATE000; CALL ForwardParallelSectionANoCoincident" +LINE244="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE245="STATE000; CALL ReadPixels(1094)" +LINE246="STATE000; RETURN LineReadoutAOnly" +LINE247=LineReadoutAOnlyCoincident: +LINE248="STATE000; CALL TransferToSerialRegisterCoincident" +LINE249="STATE000; CALL ReadPixels(50)" +LINE250="STATE000; CALL ParallelForwardSectionASegment1" +LINE251="STATE000; CALL ReadPixels(364)" +LINE252="STATE000; CALL ParallelForwardSectionASegment2" +LINE253="STATE000; CALL ReadPixels(364)" +LINE254="STATE000; CALL ParallelForwardSectionASegment3" +LINE255="STATE000; CALL ReadPixels(364)" +LINE256="STATE000; CALL ReadPixels(2)" +LINE257="STATE000; RETURN LineReadoutAOnlyCoincident" +LINE258=Wait1us: +LINE259="STATE001; STATE000(98)" +LINE260="STATE000; RETURN Wait1us" +LINE261=Wait1ms: +LINE262="STATE001; STATE000(99998)" +LINE263="STATE000; RETURN Wait1ms" +LINE264=KeepThisFrame: +LINE265="STATE002;" +LINE266="STATE003; RETURN KeepThisFrame" +LINE267=InitialSetup: +LINE268="STATE004; STATE000(999)" +LINE269="STATE005; STATE000(9999)" +LINE270="STATE001; RETURN InitialSetup" +LINE271=InitialSetupFCS: +LINE272="STATE004; STATE000(999)" +LINE273="STATE006; STATE000(9999)" +LINE274="STATE001; RETURN InitialSetupFCS" +LINE275=OpenShutter: +LINE276="STATE007; RETURN OpenShutter" +LINE277=CloseShutter: +LINE278="STATE008; RETURN CloseShutter" +LINE279=ReadoutBegin: +LINE280="STATE009; RETURN ReadoutBegin" +LINE281=ReadoutEnd: +LINE282="STATE010; RETURN ReadoutEnd" +LINE283=TransferToSerialRegisterCoincident: +LINE284="STATE011; STATE000(999)" +LINE285="STATE012; STATE000(49)" +LINE286="STATE013; STATE000(49)" +LINE287="STATE014; RETURN TransferToSerialRegisterCoincident" +LINE288=ParallelForwardNoCoincident: +LINE289="STATE001; STATE000(999)" +LINE290="STATE015; STATE000(999)" +LINE291="STATE016; STATE000(999)" +LINE292="STATE017; STATE000(999)" +LINE293="STATE018; STATE000(199)" +LINE294="STATE019; STATE000(49)" +LINE295="STATE020; STATE000(299)" +LINE296="STATE021; STATE000(49)" +LINE297="STATE014; STATE000(399)" +LINE298="STATE022; STATE000(999)" +LINE299="STATE023; STATE000(999)" +LINE300="STATE001; RETURN ParallelForwardNoCoincident" +LINE301=ParallelForwardSegment1: +LINE302="STATE024; RETURN ParallelForwardSegment1" +LINE303=ParallelForwardSegment2: +LINE304="STATE025; RETURN ParallelForwardSegment2" +LINE305=ParallelForwardSegment3: +LINE306="STATE026; RETURN ParallelForwardSegment3" +LINE307=OutputTestSetup: +LINE308="STATE027; STATE000(999999)" +LINE309="STATE028; STATE000(999999)" +LINE310="STATE029; RETURN OutputTestSetup" +LINE311=PulseTGA: +LINE312="STATE030; STATE000(2499)" +LINE313="STATE031; STATE000(2499)" +LINE314="STATE032; RETURN PulseTGA" +LINE315=VRDModulate: +LINE316="STATE033; STATE000(999999)" +LINE317="STATE034; STATE000(99)" +LINE318="STATE032; STATE000(99)" +LINE319="STATE035; STATE000(999999)" +LINE320="STATE034; STATE000(99)" +LINE321="STATE032; STATE000(99)" +LINE322="STATE036; STATE000(999999)" +LINE323="STATE034; STATE000(99)" +LINE324="STATE032; STATE000(99)" +LINE325="STATE037; STATE000(999999)" +LINE326="STATE034; STATE000(99)" +LINE327="STATE032; STATE000(99)" +LINE328="STATE038; STATE000(999999)" +LINE329="STATE034; STATE000(99)" +LINE330="STATE032; STATE000(99)" +LINE331="STATE039; STATE000(999999)" +LINE332="STATE034; STATE000(99)" +LINE333="STATE032; STATE000(99)" +LINE334="STATE040; STATE000(999999)" +LINE335="STATE034; STATE000(99)" +LINE336="STATE032; STATE000(99)" +LINE337="STATE039; STATE000(999999)" +LINE338="STATE034; STATE000(99)" +LINE339="STATE032; STATE000(99)" +LINE340="STATE038; STATE000(999999)" +LINE341="STATE034; STATE000(99)" +LINE342="STATE032; STATE000(99)" +LINE343="STATE037; STATE000(999999)" +LINE344="STATE034; STATE000(99)" +LINE345="STATE032; STATE000(99)" +LINE346="STATE036; STATE000(999999)" +LINE347="STATE034; STATE000(99)" +LINE348="STATE032; STATE000(99)" +LINE349="STATE035; RETURN VRDModulate" +LINE350=ReadPixels: +LINE351="STATE041;" +LINE352="STATE042; STATE000(58)" +LINE353="STATE043;" +LINE354="STATE032; STATE000(298)" +LINE355="STATE044; STATE000(199)" +LINE356="STATE045; STATE000(59)" +LINE357="STATE001; RETURN ReadPixels" +LINE358=ReadPixelsSlow: +LINE359="STATE046;" +LINE360="STATE042; STATE000(13)" +LINE361="STATE047; STATE000(14)" +LINE362="STATE048; STATE000(4)" +LINE363="STATE049; STATE000(9)" +LINE364="STATE050; STATE000(15)" +LINE365="STATE032; STATE000(118)" +LINE366="STATE051; STATE000(14)" +LINE367="STATE052; STATE000(14)" +LINE368="STATE044; STATE000(116)" +LINE369="STATE001; RETURN ReadPixelsSlow" +LINE370=ForwardParallelSectionANoCoincident: +LINE371="STATE001; STATE000(999)" +LINE372="STATE053; STATE000(999)" +LINE373="STATE054; STATE000(999)" +LINE374="STATE055; STATE000(999)" +LINE375="STATE056; STATE000(199)" +LINE376="STATE019; STATE000(49)" +LINE377="STATE020; STATE000(299)" +LINE378="STATE057; STATE000(49)" +LINE379="STATE014; STATE000(399)" +LINE380="STATE058; STATE000(999)" +LINE381="STATE059; STATE000(999)" +LINE382="STATE001; RETURN ForwardParallelSectionANoCoincident" +LINE383=ForwardParallelSectionBNoCoincident: +LINE384="STATE001; STATE000(999)" +LINE385="STATE060; STATE000(999)" +LINE386="STATE061; STATE000(999)" +LINE387="STATE062; STATE000(999)" +LINE388="STATE063; STATE000(999)" +LINE389="STATE064; STATE000(999)" +LINE390="STATE065; STATE000(999)" +LINE391="STATE001; RETURN ForwardParallelSectionBNoCoincident" +LINE392=ForwardParallelSectionA: +LINE393="STATE066; STATE000(364665)" +LINE394="STATE067; STATE000(364666)" +LINE395="STATE068; RETURN ForwardParallelSectionA" +LINE396=ForwardParallelSectionB: +LINE397="STATE069; STATE000(364665)" +LINE398="STATE070; STATE000(364666)" +LINE399="STATE071; RETURN ForwardParallelSectionB" +LINE400=ForwardParallelAll: +LINE401="STATE025; STATE000(364665)" +LINE402="STATE026; STATE000(364666)" +LINE403="STATE024; RETURN ForwardParallelAll" +LINE404=ParallelForwardSectionASegment1: +LINE405="STATE066; RETURN ParallelForwardSectionASegment1" +LINE406=ParallelForwardSectionASegment2: +LINE407="STATE067; RETURN ParallelForwardSectionASegment2" +LINE408=ParallelForwardSectionASegment3: +LINE409="STATE068; RETURN ParallelForwardSectionASegment3" +LINE410=Wait10us: +LINE411="STATE000; STATE000(999)" +LINE412="STATE001; RETURN Wait10us" +LINE413=ReadPixelsEOnly: +LINE414="STATE072;" +LINE415="STATE042; STATE000(58)" +LINE416="STATE073;" +LINE417="STATE032; STATE000(298)" +LINE418="STATE044; STATE000(199)" +LINE419="STATE074; STATE000(59)" +LINE420="STATE001; RETURN ReadPixelsEOnly" +LINE421=ReadPixelsFOnly: +LINE422="STATE075;" +LINE423="STATE042; STATE000(58)" +LINE424="STATE076;" +LINE425="STATE032; STATE000(298)" +LINE426="STATE044; STATE000(129)" +LINE427="STATE077; STATE000(79)" +LINE428="STATE001; RETURN ReadPixelsFOnly" +LINE429=PrepSerBin: +LINE430="STATE034; STATE000(39)" +LINE431="STATE048; STATE000(19)" +LINE432="STATE032; RETURN PrepSerBin" +LINE433=SerialBinForwards: +LINE434="STATE078; STATE000(39)" +LINE435="STATE079; STATE000(39)" +LINE436="STATE045; STATE000(39)" +LINE437="STATE078; STATE000(39)" +LINE438="STATE001; RETURN SerialBinForwards" +LINE439=DumpPixels: +LINE440="STATE080; STATE000(39)" +LINE441="STATE043; STATE000(19)" +LINE442="STATE032; STATE000(279)" +LINE443="STATE044; STATE000(199)" +LINE444="STATE081; STATE000(59)" +LINE445="STATE001; RETURN DumpPixels" +LINE446=trigpix: +LINE447="STATE082;" +LINE448="STATE083; RETURN trigpix" +LINE449=DumpPixelsEOnly: +LINE450="STATE084; STATE000(39)" +LINE451="STATE073; STATE000(299)" +LINE452="STATE044; STATE000(199)" +LINE453="STATE085; STATE000(59)" +LINE454="STATE001; RETURN DumpPixelsEOnly" +LINE455=DumpPixelsFOnly: +LINE456="STATE086; STATE000(39)" +LINE457="STATE076; STATE000(299)" +LINE458="STATE044; STATE000(129)" +LINE459="STATE087; STATE000(79)" +LINE460="STATE001; RETURN DumpPixelsFOnly" +LINE461=SerialFBackwards: +LINE462="STATE088; STATE000(29)" +LINE463="STATE089; STATE000(29)" +LINE464="STATE090; STATE000(29)" +LINE465="STATE091; STATE000(29)" +LINE466="STATE092; RETURN SerialFBackwards" +LINE467=SerialEBackwards: +LINE468="STATE093; STATE000(29)" +LINE469="STATE094; STATE000(29)" +LINE470="STATE095; STATE000(29)" +LINE471="STATE092; STATE000(29)" +LINE472="STATE091; RETURN SerialEBackwards" +LINE473=EvacuateFFinish: +LINE474="STATE096; STATE000(1999)" +LINE475="STATE097; STATE000(499)" +LINE476="STATE001; RETURN EvacuateFFinish" +LINE477=EvacuateFStart: +LINE478="STATE098; RETURN EvacuateFStart" +LINE479=EvacuateEFinish: +LINE480="STATE096; STATE000(1999)" +LINE481="STATE099; STATE000(499)" +LINE482="STATE001; RETURN EvacuateEFinish" +LINE483=EvacuateEStart: +LINE484="STATE100; RETURN EvacuateEStart" +LINE485=BounceTGTest: +LINE486="STATE101;" +LINE487="STATE083; STATE000(498)" +LINE488="STATE031; STATE000(199)" +LINE489="STATE001; RETURN BounceTGTest" +LINE490=ClampTestInner: +LINE491="STATE101;" +LINE492="STATE083; STATE000(98)" +LINE493="STATE031; STATE000(99)" +LINE494="STATE001; RETURN ClampTestInner" +LINE495=ClampOn: +LINE496="STATE020; RETURN ClampOn" +LINE497=ClampOnFCS: +LINE498="STATE102; RETURN ClampOnFCS" +LINE499=ClampOff: +LINE500="STATE014; RETURN ClampOff" +LINE501=ClampOffFCS: +LINE502="STATE103; RETURN ClampOffFCS" +LINE503=ClampTestLineStart: +LINE504="STATE003; RETURN ClampTestLineStart" +LINE505=TGTestLineStart: +LINE506="STATE104; STATE000(99)" +LINE507="STATE014; RETURN TGTestLineStart" +LINE508=setupTGTest: +LINE509="STATE105; RETURN setupTGTest" +LINE510=FCSParallelForward: +LINE511="STATE106; STATE000(999)" +LINE512="STATE107; STATE000(999)" +LINE513="STATE108; STATE000(999)" +LINE514="STATE109; STATE000(999)" +LINE515="STATE110; STATE000(999)" +LINE516="STATE111; STATE000(999)" +LINE517="STATE001; RETURN FCSParallelForward" +LINE518=FCSSplitReadout: +LINE519="STATE112;" +LINE520="STATE113; STATE000(28)" +LINE521="STATE114; STATE000(29)" +LINE522="STATE115;" +LINE523="STATE116; STATE000(28)" +LINE524="STATE117; STATE000(29)" +LINE525="STATE118; STATE000(29)" +LINE526="STATE119; STATE000(59)" +LINE527="STATE001; RETURN FCSSplitReadout" +LINE528=DumpPixelsFCS: +LINE529="STATE120; STATE000(29)" +LINE530="STATE114; STATE000(29)" +LINE531="STATE121; STATE000(29)" +LINE532="STATE117; STATE000(29)" +LINE533="STATE118; STATE000(29)" +LINE534="STATE122; STATE000(29)" +LINE535="STATE116; RETURN DumpPixelsFCS" +LINES=536 +MOD1\FASTSLEWRATE1=6.6666 +MOD1\SLOWSLEWRATE1=0.0303 +MOD1\LABEL1=PCLK_B3_2 +MOD1\ENABLE2=1 +MOD1\FASTSLEWRATE2=6.6666 +MOD1\SLOWSLEWRATE2=0.0303 +MOD1\LABEL2=PCLK_A3_2 +MOD1\ENABLE3=1 +MOD1\FASTSLEWRATE3=6.6666 +MOD1\SLOWSLEWRATE3=0.0303 +MOD1\LABEL3=PCLK_B2_2 +MOD1\ENABLE4=1 +MOD1\FASTSLEWRATE4=6.6666 +MOD1\SLOWSLEWRATE4=0.0303 +MOD1\LABEL4=PCLK_A2_2 +MOD1\ENABLE5=1 +MOD1\FASTSLEWRATE5=6.6666 +MOD1\SLOWSLEWRATE5=0.0303 +MOD1\LABEL5=PCLK_B1_2 +MOD1\ENABLE6=1 +MOD1\FASTSLEWRATE6=6.6666 +MOD1\SLOWSLEWRATE6=0.0303 +MOD1\LABEL6=PCLK_A1_2 +MOD1\ENABLE7=1 +MOD1\FASTSLEWRATE7=6.6666 +MOD1\SLOWSLEWRATE7=0.0303 +MOD1\LABEL7=PCLK_B1_1 +MOD1\ENABLE8=1 +MOD1\FASTSLEWRATE8=6.6666 +MOD1\SLOWSLEWRATE8=0.0303 +MOD1\LABEL8=PCLK_A2_1 +MOD1\ENABLE9=1 +MOD1\FASTSLEWRATE9=6.6666 +MOD1\SLOWSLEWRATE9=0.0303 +MOD1\LABEL9=PCLK_A2_1 +MOD1\ENABLE10=1 +MOD1\FASTSLEWRATE10=6.6666 +MOD1\SLOWSLEWRATE10=0.0303 +MOD1\LABEL10=PCLK_B2_1 +MOD1\ENABLE11=1 +MOD1\FASTSLEWRATE11=6.6666 +MOD1\SLOWSLEWRATE11=0.0303 +MOD1\LABEL11=PCLK_A3_1 +MOD1\ENABLE12=1 +MOD1\FASTSLEWRATE12=6.6666 +MOD1\SLOWSLEWRATE12=0.0303 +MOD1\LABEL12=PCLK_B3_1 +MOD2\ENABLE1=1 +MOD2\FASTSLEWRATE1=1 +MOD2\SLOWSLEWRATE1=1 +MOD2\LABEL1=SCI_RGBACKUP2 +MOD2\ENABLE2=1 +MOD2\FASTSLEWRATE2=1 +MOD2\SLOWSLEWRATE2=1 +MOD2\LABEL2=SCI_SWBACKUP1 +MOD2\ENABLE3=1 +MOD2\FASTSLEWRATE3=50.0000 +MOD2\SLOWSLEWRATE3=3.0030 +MOD2\LABEL3=FCS2_S2L +MOD2\ENABLE4=1 +MOD2\FASTSLEWRATE4=50.0000 +MOD2\SLOWSLEWRATE4=3.0030 +MOD2\LABEL4=FCS1_S2L +MOD2\ENABLE5=1 +MOD2\FASTSLEWRATE5=50.0000 +MOD2\SLOWSLEWRATE5=3.0030 +MOD2\LABEL5=FCS2_S3L +MOD2\ENABLE6=1 +MOD2\FASTSLEWRATE6=50.0000 +MOD2\SLOWSLEWRATE6=3.0030 +MOD2\LABEL6=FCS_S1 +MOD2\ENABLE7=1 +MOD2\FASTSLEWRATE7=1 +MOD2\SLOWSLEWRATE7=1 +MOD2\LABEL7=SCI_SWBACKUP2 +MOD2\ENABLE8=1 +MOD2\FASTSLEWRATE8=50.0000 +MOD2\SLOWSLEWRATE8=3.0030 +MOD2\LABEL8=FCS_RG +MOD2\ENABLE9=1 +MOD2\FASTSLEWRATE9=50.0000 +MOD2\SLOWSLEWRATE9=3.0030 +MOD2\LABEL9=FCS_SW +MOD2\ENABLE10=1 +MOD2\FASTSLEWRATE10=50.0000 +MOD2\SLOWSLEWRATE10=3.0030 +MOD2\LABEL10=FCS1_S3L +MOD2\ENABLE11=0 +MOD2\FASTSLEWRATE11=1 +MOD2\SLOWSLEWRATE11=1 +MOD2\LABEL11=Spare1 +MOD2\ENABLE12=0 +MOD2\FASTSLEWRATE12=1 +MOD2\SLOWSLEWRATE12=1 +MOD2\LABEL12=Spare2 +MOD3\ENABLE1=1 +MOD3\FASTSLEWRATE1=6.6666 +MOD3\SLOWSLEWRATE1=12 +MOD3\LABEL1=TGA1 +MOD3\ENABLE2=1 +MOD3\FASTSLEWRATE2=50.0000 +MOD3\SLOWSLEWRATE2=3.0030 +MOD3\LABEL2=Serial EF +MOD3\ENABLE3=1 +MOD3\FASTSLEWRATE3=50.0000 +MOD3\SLOWSLEWRATE3=3.0030 +MOD3\LABEL3=Serial E2 +MOD3\ENABLE4=1 +MOD3\FASTSLEWRATE4=50.0000 +MOD3\SLOWSLEWRATE4=3.0030 +MOD3\LABEL4=Serial E1 +MOD3\ENABLE5=1 +MOD3\FASTSLEWRATE5=50.0000 +MOD3\SLOWSLEWRATE5=3.0030 +MOD3\LABEL5=Serial F2 +MOD3\ENABLE6=1 +MOD3\FASTSLEWRATE6=50.0000 +MOD3\SLOWSLEWRATE6=3.0030 +MOD3\LABEL6=Serial F1 +MOD3\ENABLE7=1 +MOD3\FASTSLEWRATE7=6.6666 +MOD3\SLOWSLEWRATE7=0.0303 +MOD3\LABEL7=FCS PPhase3U +MOD3\ENABLE8=1 +MOD3\FASTSLEWRATE8=6.6666 +MOD3\SLOWSLEWRATE8=0.0303 +MOD3\LABEL8=FCS PPhase3L +MOD3\ENABLE9=1 +MOD3\FASTSLEWRATE9=6.6666 +MOD3\SLOWSLEWRATE9=0.0303 +MOD3\LABEL9=FCS PPhase2 +MOD3\ENABLE10=1 +MOD3\FASTSLEWRATE10=6.6666 +MOD3\SLOWSLEWRATE10=0.0303 +MOD3\LABEL10=FCS PPhase1 +MOD3\ENABLE11=1 +MOD3\FASTSLEWRATE11=6.6666 +MOD3\SLOWSLEWRATE11=12 +MOD3\LABEL11=TGA2 +MOD3\ENABLE12=0 +MOD3\FASTSLEWRATE12=1 +MOD3\SLOWSLEWRATE12=1 +MOD9\HVLC_V1=0.00 +MOD9\HVLC_ORDER1=0 +MOD9\HVLC_V2=24.0 +MOD9\HVLC_ORDER2=1 +MOD9\HVLC_LABEL2=SCI Guard Drain +MOD9\HVLC_V3=0.00 +MOD9\HVLC_ORDER3=0 +MOD9\HVLC_V4=0.00 +MOD9\HVLC_ORDER4=0 +MOD9\HVLC_V5=17.5 +MOD9\HVLC_ORDER5=2 +MOD9\HVLC_LABEL5=SCI E Reset Drain +MOD9\HVLC_V6=17.5 +MOD9\HVLC_ORDER6=2 +MOD9\HVLC_LABEL6=SCI F Reset Drain +MOD9\HVLC_V7=0.00 +MOD9\HVLC_ORDER7=0 +MOD9\HVLC_V8=14.00 +MOD9\HVLC_ORDER8=0 +MOD9\HVLC_LABEL8=FCS1 Reset Drain A +MOD9\HVLC_V9=14.00 +MOD9\HVLC_ORDER9=0 +MOD9\HVLC_LABEL9=FCS1 Reset Drain B +MOD9\HVLC_V10=14.00 +MOD9\HVLC_ORDER10=0 +MOD9\HVLC_LABEL10=FCS2 Reset Drain A +MOD9\HVLC_V11=14.00 +MOD9\HVLC_ORDER11=0 +MOD9\HVLC_LABEL11=FCS2 Reset Drain B +MOD9\HVLC_V12=13.00 +MOD9\HVLC_ORDER12=1 +MOD9\HVLC_LABEL12=FCS Overflow Drain +MOD9\HVLC_V13=0.00 +MOD9\HVLC_ORDER13=0 +MOD9\HVLC_V14=0.00 +MOD9\HVLC_ORDER14=0 +MOD9\HVLC_V15=0.00 +MOD9\HVLC_ORDER15=0 +MOD9\HVLC_V16=0.00 +MOD9\HVLC_ORDER16=0 +MOD9\HVLC_V17=0.00 +MOD9\HVLC_ORDER17=0 +MOD9\HVLC_V18=0.00 +MOD9\HVLC_ORDER18=0 +MOD9\HVLC_V19=0.00 +MOD9\HVLC_ORDER19=0 +MOD9\HVLC_V20=0.00 +MOD9\HVLC_ORDER20=0 +MOD9\HVLC_V21=17.00 +MOD9\HVLC_ORDER21=2 +MOD9\HVLC_LABEL21=SCI2 E Reset Drain +MOD9\HVLC_V22=17.00 +MOD9\HVLC_ORDER22=2 +MOD9\HVLC_LABEL22=SCI2 F Reset Drain +MOD9\HVLC_V23=29.30 +MOD9\HVLC_ORDER23=1 +MOD9\HVLC_LABEL23=SCI2 E Output Drain +MOD9\HVLC_V24=29.30 +MOD9\HVLC_ORDER24=1 +MOD9\HVLC_LABEL24=SCI2 F Output Drain +MOD9\HVHC_ENABLE1=1 +MOD9\HVHC_V1=29.3 +MOD9\HVHC_IL1=10.0 +MOD9\HVHC_ORDER1=3 +MOD9\HVHC_LABEL1=SCI E Output Drain +MOD9\HVHC_ENABLE2=1 +MOD9\HVHC_V2=29.3 +MOD9\HVHC_IL2=10.0 +MOD9\HVHC_ORDER2=3 +MOD9\HVHC_LABEL2=SCI F Output Drain +MOD9\HVHC_ENABLE3=1 +MOD9\HVHC_V3=24.3 +MOD9\HVHC_IL3=4.0 +MOD9\HVHC_ORDER3=0 +MOD9\HVHC_LABEL3=FCS1 Output Drain A +MOD9\HVHC_ENABLE4=1 +MOD9\HVHC_V4=24.3 +MOD9\HVHC_IL4=4.0 +MOD9\HVHC_ORDER4=0 +MOD9\HVHC_LABEL4=FCS1 Output Drain B +MOD9\HVHC_ENABLE5=1 +MOD9\HVHC_V5=24.3 +MOD9\HVHC_IL5=4.0 +MOD9\HVHC_ORDER5=0 +MOD9\HVHC_LABEL5=FCS2 Output Drain A +MOD9\HVHC_ENABLE6=1 +MOD9\HVHC_V6=24.3 +MOD9\HVHC_IL6=4.0 +MOD9\HVHC_ORDER6=0 +MOD9\HVHC_LABEL6=FCS2 Output Drain B +MOD10\LVLC_V1=3.3 +MOD10\LVLC_ORDER1=6 +MOD10\LVLC_LABEL1=LVDS Receiver Output Enable +MOD10\LVLC_V2=0.0 +MOD10\LVLC_ORDER2=0 +MOD10\LVLC_V3=3.0 +MOD10\LVLC_ORDER3=4 +MOD10\LVLC_LABEL3=SCI E Output Gate +MOD10\LVLC_V4=3.0 +MOD10\LVLC_ORDER4=4 +MOD10\LVLC_LABEL4=SCI F Output Gate +MOD10\LVLC_V5=2.0 +MOD10\LVLC_ORDER5=5 +MOD10\LVLC_LABEL5=SCI Summing Well - Low +MOD10\LVLC_V6=11.0 +MOD10\LVLC_ORDER6=5 +MOD10\LVLC_LABEL6=SCI Summing Well - High +MOD10\LVLC_V7=11.5 +MOD10\LVLC_ORDER7=5 +MOD10\LVLC_LABEL7=SCI Reset Gate - HIGH +MOD10\LVLC_V8=5.5 +MOD10\LVLC_ORDER8=5 +MOD10\LVLC_LABEL8=SCI Reset Gate - LOW +MOD10\LVLC_V9=0.0 +MOD10\LVLC_ORDER9=0 +MOD10\LVLC_V10=-4.0 +MOD10\LVLC_ORDER10=0 +MOD10\LVLC_LABEL10=LastGateA FCS 1 +MOD10\LVLC_V11=-4.0 +MOD10\LVLC_ORDER11=0 +MOD10\LVLC_LABEL11=LastGateB FCS 1 +MOD10\LVLC_V12=-4.0 +MOD10\LVLC_ORDER12=0 +MOD10\LVLC_LABEL12=LastGateA FCS 2 +MOD10\LVLC_V13=-4.0 +MOD10\LVLC_ORDER13=0 +MOD10\LVLC_LABEL13=LastGateB FCS 2 +MOD10\LVLC_V14=3.3 +MOD10\LVLC_ORDER14=0 +MOD10\LVLC_LABEL14=SCI E Output Gate 2 +MOD10\LVLC_V15=3.3 +MOD10\LVLC_ORDER15=0 +MOD10\LVLC_LABEL15=SCI F Output Gate 2 +MOD10\LVLC_V16=0.0 +MOD10\LVLC_ORDER16=0 +MOD10\LVLC_V17=0.0 +MOD10\LVLC_ORDER17=0 +MOD10\LVLC_V18=0.0 +MOD10\LVLC_ORDER18=0 +MOD10\LVLC_V19=0.0 +MOD10\LVLC_ORDER19=0 +MOD10\LVLC_V20=0.0 +MOD10\LVLC_ORDER20=0 +MOD10\LVLC_V21=0.0 +MOD10\LVLC_ORDER21=0 +MOD10\LVLC_V22=0.0 +MOD10\LVLC_ORDER22=0 +MOD10\LVLC_LABEL22=Video offset FCS +MOD10\LVLC_V23=0.5 +MOD10\LVLC_ORDER23=6 +MOD10\LVLC_LABEL23=Video offset SCI +MOD10\LVLC_V24=0.0 +MOD10\LVLC_ORDER24=0 +MOD10\LVHC_ENABLE1=0 +MOD10\LVHC_V1=0.0 +MOD10\LVHC_IL1=0.0 +MOD10\LVHC_ORDER1=0 +MOD10\LVHC_ENABLE2=0 +MOD10\LVHC_V2=0.0 +MOD10\LVHC_IL2=0.0 +MOD10\LVHC_ORDER2=0 +MOD10\LVHC_ENABLE3=0 +MOD10\LVHC_V3=0.0 +MOD10\LVHC_IL3=0.0 +MOD10\LVHC_ORDER3=0 +MOD10\LVHC_ENABLE4=0 +MOD10\LVHC_V4=0.0 +MOD10\LVHC_IL4=0.0 +MOD10\LVHC_ORDER4=0 +MOD10\LVHC_ENABLE5=0 +MOD10\LVHC_V5=0.0 +MOD10\LVHC_IL5=0.0 +MOD10\LVHC_ORDER5=0 +MOD10\LVHC_ENABLE6=0 +MOD10\LVHC_V6=0.0 +MOD10\LVHC_IL6=0.0 +MOD10\LVHC_ORDER6=0 +MOD10\DIO_SOURCE1=0 +MOD10\DIO_DIR12=0 +MOD10\DIO_SOURCE2=0 +MOD10\DIO_SOURCE3=0 +MOD10\DIO_DIR34=0 +MOD10\DIO_SOURCE4=0 +MOD10\DIO_SOURCE5=0 +MOD10\DIO_DIR56=0 +MOD10\DIO_SOURCE6=0 +MOD10\DIO_SOURCE7=0 +MOD10\DIO_DIR78=0 +MOD10\DIO_SOURCE8=0 +MOD12\DIO_SOURCE1=0 +MOD12\DIO_DIR1=0 +MOD12\DIO_SOURCE2=0 +MOD12\DIO_DIR2=0 +MOD12\DIO_SOURCE3=0 +MOD12\DIO_DIR3=0 +MOD12\DIO_SOURCE4=0 +MOD12\DIO_DIR4=0 +MOD12\DIO_POWER=0 +MOD4\XVP_V1=0 +MOD4\XVP_ORDER1=0 +MOD4\XVP_ENABLE1=0 +MOD4\XVP_V2=0 +MOD4\XVP_ORDER2=0 +MOD4\XVP_ENABLE2=0 +MOD4\XVP_V3=0 +MOD4\XVP_ORDER3=0 +MOD4\XVP_ENABLE3=0 +MOD4\XVP_V4=0 +MOD4\XVP_ORDER4=0 +MOD4\XVP_ENABLE4=0 +MOD4\XVN_V1=-0 +MOD4\XVN_ORDER1=0 +MOD4\XVN_ENABLE1=1 +MOD4\XVN_LABEL1=SCI Backside +MOD4\XVN_V2=-0 +MOD4\XVN_ORDER2=0 +MOD4\XVN_ENABLE2=0 +MOD4\XVN_V3=-0 +MOD4\XVN_ORDER3=0 +MOD4\XVN_ENABLE3=0 +MOD4\XVN_V4=-0 +MOD4\XVN_ORDER4=0 +MOD4\XVN_ENABLE4=0 +STATE0\NAME=STATE000 +STATE0\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE0\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE0\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE0\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE0\MOD4="0,1,0,0,1,0" +STATE0\CONTROL="0,3F" +STATE0\MOD9="0,1,0" +STATE0\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE1\NAME=STATE001 +STATE1\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE1\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE1\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE1\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE1\MOD4="0,1,0,0,1,0" +STATE1\CONTROL="0,3F" +STATE1\MOD9="0,1,0" +STATE1\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE2\NAME=STATE002 +STATE2\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE2\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE2\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE2\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE2\MOD4="0,1,0,0,1,0" +STATE2\CONTROL="2,3D" +STATE2\MOD9="0,1,0" +STATE2\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE3\NAME=STATE003 +STATE3\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE3\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE3\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE3\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE3\MOD4="0,1,0,0,1,0" +STATE3\CONTROL="4,3B" +STATE3\MOD9="0,1,0" +STATE3\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE4\NAME=STATE004 +STATE4\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE4\MOD2="5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE4\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE4\MOD12="1,0,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE4\MOD4="0,1,0,0,1,0" +STATE4\CONTROL="0,3F" +STATE4\MOD9="0,1,0" +STATE4\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE5\NAME=STATE005 +STATE5\MOD1="0,1,0,0,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,0,1,0,0,1,0" +STATE5\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE5\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE5\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE5\MOD4="0,1,0,0,1,0" +STATE5\CONTROL="0,3F" +STATE5\MOD9="0,1,0" +STATE5\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE6\NAME=STATE006 +STATE6\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE6\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE6\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,2,1,0,2,1,0,,1,1,,1,1" +STATE6\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE6\MOD4="0,1,0,0,1,0" +STATE6\CONTROL="0,3F" +STATE6\MOD9="0,1,0" +STATE6\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE7\NAME=STATE007 +STATE7\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE7\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE7\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE7\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE7\MOD4="0,1,0,0,1,0" +STATE7\CONTROL="1,3E" +STATE7\MOD9="0,1,0" +STATE7\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE8\NAME=STATE008 +STATE8\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE8\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE8\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE8\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE8\MOD4="0,1,0,0,1,0" +STATE8\CONTROL="0,3E" +STATE8\MOD9="0,1,0" +STATE8\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE9\NAME=STATE009 +STATE9\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE9\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE9\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE9\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE9\MOD4="0,1,0,0,1,0" +STATE9\CONTROL="4,3B" +STATE9\MOD9="0,1,0" +STATE9\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE10\NAME=STATE010 +STATE10\MOD1=",1,1,,1,1,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,,1,1,,1,1" +STATE10\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE10\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE10\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE10\MOD4="0,1,0,0,1,0" +STATE10\CONTROL="0,3F" +STATE10\MOD9="0,1,0" +STATE10\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE11\NAME=STATE011 +STATE11\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE11\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE11\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE11\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE11\MOD4="0,1,0,0,1,0" +STATE11\CONTROL="4,3B" +STATE11\MOD9="0,1,0" +STATE11\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE12\NAME=STATE012 +STATE12\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE12\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE12\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE12\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE12\MOD4="0,1,0,0,1,0" +STATE12\CONTROL="0,3F" +STATE12\MOD9="0,1,0" +STATE12\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE13\NAME=STATE013 +STATE13\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE13\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE13\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE13\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE13\MOD4="0,1,0,0,1,0" +STATE13\CONTROL="0,3F" +STATE13\MOD9="0,1,0" +STATE13\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE14\NAME=STATE014 +STATE14\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE14\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE14\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE14\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE14\MOD4="0,1,0,0,1,0" +STATE14\CONTROL="0,3F" +STATE14\MOD9="0,1,0" +STATE14\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE15\NAME=STATE015 +STATE15\MOD1="10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0" +STATE15\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE15\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE15\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE15\MOD4="0,1,0,0,1,0" +STATE15\CONTROL="4,3B" +STATE15\MOD9="0,1,0" +STATE15\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE16\NAME=STATE016 +STATE16\MOD1=",1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1" +STATE16\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE16\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE16\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE16\MOD4="0,1,0,0,1,0" +STATE16\CONTROL="0,3F" +STATE16\MOD9="0,1,0" +STATE16\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE17\NAME=STATE017 +STATE17\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1" +STATE17\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE17\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE17\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE17\MOD4="0,1,0,0,1,0" +STATE17\CONTROL="0,3F" +STATE17\MOD9="0,1,0" +STATE17\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE18\NAME=STATE018 +STATE18\MOD1="0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0" +STATE18\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE18\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE18\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE18\MOD4="0,1,0,0,1,0" +STATE18\CONTROL="0,3F" +STATE18\MOD9="0,1,0" +STATE18\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE19\NAME=STATE019 +STATE19\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE19\MOD2="5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE19\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE19\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE19\MOD4="0,1,0,0,1,0" +STATE19\CONTROL="0,3F" +STATE19\MOD9="0,1,0" +STATE19\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE20\NAME=STATE020 +STATE20\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE20\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE20\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE20\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE20\MOD4="0,1,0,0,1,0" +STATE20\CONTROL="0,3F" +STATE20\MOD9="0,1,0" +STATE20\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE21\NAME=STATE021 +STATE21\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE21\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE21\MOD3=",1,1,1,1,0,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE21\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE21\MOD4="0,1,0,0,1,0" +STATE21\CONTROL="0,3F" +STATE21\MOD9="0,1,0" +STATE21\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE22\NAME=STATE022 +STATE22\MOD1=",1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1" +STATE22\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE22\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE22\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE22\MOD4="0,1,0,0,1,0" +STATE22\CONTROL="0,3F" +STATE22\MOD9="0,1,0" +STATE22\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE23\NAME=STATE023 +STATE23\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE23\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE23\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE23\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE23\MOD4="0,1,0,0,1,0" +STATE23\CONTROL="0,3F" +STATE23\MOD9="0,1,0" +STATE23\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE24\NAME=STATE024 +STATE24\MOD1="10,0,0,10,0,0,0,0,0,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,0,0,0,10,0,0,10,0,0" +STATE24\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE24\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE24\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE24\MOD4="0,1,0,0,1,0" +STATE24\CONTROL="0,3F" +STATE24\MOD9="0,1,0" +STATE24\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE25\NAME=STATE025 +STATE25\MOD1="0,0,0,0,0,0,,1,1,,1,1,10,0,0,10,0,0,10,0,0,10,0,0,,1,1,,1,1,0,0,0,0,0,0" +STATE25\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE25\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE25\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE25\MOD4="0,1,0,0,1,0" +STATE25\CONTROL="0,3F" +STATE25\MOD9="0,1,0" +STATE25\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE26\NAME=STATE026 +STATE26\MOD1=",1,1,,1,1,10,0,0,10,0,0,0,0,0,0,0,0,0,0,0,0,0,0,10,0,0,10,0,0,,1,1,,1,1" +STATE26\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE26\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE26\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE26\MOD4="0,1,0,0,1,0" +STATE26\CONTROL="0,3F" +STATE26\MOD9="0,1,0" +STATE26\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE27\NAME=STATE027 +STATE27\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE27\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE27\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE27\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE27\MOD4="0,1,0,0,1,0" +STATE27\CONTROL="0,3F" +STATE27\MOD9="1,6,17" +STATE27\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE28\NAME=STATE028 +STATE28\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE28\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE28\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE28\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE28\MOD4="0,1,0,0,1,0" +STATE28\CONTROL="0,3F" +STATE28\MOD9="0,1,0" +STATE28\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE29\NAME=STATE029 +STATE29\MOD1="10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0" +STATE29\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE29\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE29\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE29\MOD4="0,1,0,0,1,0" +STATE29\CONTROL="0,3F" +STATE29\MOD9="0,1,0" +STATE29\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE30\NAME=STATE030 +STATE30\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE30\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE30\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE30\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE30\MOD4="0,1,0,0,1,0" +STATE30\CONTROL="0,3F" +STATE30\MOD9="0,1,0" +STATE30\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE31\NAME=STATE031 +STATE31\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE31\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE31\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE31\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE31\MOD4="0,1,0,0,1,0" +STATE31\CONTROL="0,3F" +STATE31\MOD9="0,1,0" +STATE31\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE32\NAME=STATE032 +STATE32\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE32\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE32\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE32\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE32\MOD4="0,1,0,0,1,0" +STATE32\CONTROL="0,3F" +STATE32\MOD9="0,1,0" +STATE32\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE33\NAME=STATE033 +STATE33\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE33\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE33\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE33\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE33\MOD4="0,1,0,0,1,0" +STATE33\CONTROL="0,3F" +STATE33\MOD9="1,6,14" +STATE33\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE34\NAME=STATE034 +STATE34\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE34\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE34\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE34\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE34\MOD4="0,1,0,0,1,0" +STATE34\CONTROL="0,3F" +STATE34\MOD9="0,1,0" +STATE34\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE35\NAME=STATE035 +STATE35\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE35\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE35\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE35\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE35\MOD4="0,1,0,0,1,0" +STATE35\CONTROL="0,3F" +STATE35\MOD9="1,6,14.5" +STATE35\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE36\NAME=STATE036 +STATE36\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE36\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE36\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE36\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE36\MOD4="0,1,0,0,1,0" +STATE36\CONTROL="0,3F" +STATE36\MOD9="1,6,15" +STATE36\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE37\NAME=STATE037 +STATE37\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE37\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE37\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE37\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE37\MOD4="0,1,0,0,1,0" +STATE37\CONTROL="0,3F" +STATE37\MOD9="1,6,15.5" +STATE37\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE38\NAME=STATE038 +STATE38\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE38\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE38\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE38\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE38\MOD4="0,1,0,0,1,0" +STATE38\CONTROL="0,3F" +STATE38\MOD9="1,6,16" +STATE38\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE39\NAME=STATE039 +STATE39\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE39\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE39\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE39\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE39\MOD4="0,1,0,0,1,0" +STATE39\CONTROL="0,3F" +STATE39\MOD9="1,6,16.5" +STATE39\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE40\NAME=STATE040 +STATE40\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE40\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE40\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE40\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE40\MOD4="0,1,0,0,1,0" +STATE40\CONTROL="0,3F" +STATE40\MOD9="1,6,17" +STATE40\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE41\NAME=STATE041 +STATE41\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE41\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE41\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE41\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE41\MOD4="0,1,0,0,1,0" +STATE41\CONTROL="8,37" +STATE41\MOD9="0,1,0" +STATE41\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE42\NAME=STATE042 +STATE42\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE42\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE42\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE42\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE42\MOD4="0,1,0,0,1,0" +STATE42\CONTROL="0,31" +STATE42\MOD9="0,1,0" +STATE42\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE43\NAME=STATE043 +STATE43\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE43\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE43\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE43\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE43\MOD4="0,1,0,0,1,0" +STATE43\CONTROL="0,3F" +STATE43\MOD9="0,1,0" +STATE43\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE44\NAME=STATE044 +STATE44\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE44\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE44\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE44\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE44\MOD4="0,1,0,0,1,0" +STATE44\CONTROL="0,3F" +STATE44\MOD9="0,1,0" +STATE44\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE45\NAME=STATE045 +STATE45\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE45\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE45\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE45\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE45\MOD4="0,1,0,0,1,0" +STATE45\CONTROL="0,3F" +STATE45\MOD9="0,1,0" +STATE45\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE46\NAME=STATE046 +STATE46\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE46\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE46\MOD3=",1,1,,1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE46\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE46\MOD4="0,1,0,0,1,0" +STATE46\CONTROL="8,37" +STATE46\MOD9="0,1,0" +STATE46\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE47\NAME=STATE047 +STATE47\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE47\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE47\MOD3=",1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE47\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE47\MOD4="0,1,0,0,1,0" +STATE47\CONTROL="0,3F" +STATE47\MOD9="0,1,0" +STATE47\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE48\NAME=STATE048 +STATE48\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE48\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE48\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE48\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE48\MOD4="0,1,0,0,1,0" +STATE48\CONTROL="0,3F" +STATE48\MOD9="0,1,0" +STATE48\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE49\NAME=STATE049 +STATE49\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE49\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE49\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE49\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE49\MOD4="0,1,0,0,1,0" +STATE49\CONTROL="0,3F" +STATE49\MOD9="0,1,0" +STATE49\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE50\NAME=STATE050 +STATE50\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE50\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE50\MOD3=",1,1,,1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE50\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE50\MOD4="0,1,0,0,1,0" +STATE50\CONTROL="0,3F" +STATE50\MOD9="0,1,0" +STATE50\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE51\NAME=STATE051 +STATE51\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE51\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE51\MOD3=",1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE51\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE51\MOD4="0,1,0,0,1,0" +STATE51\CONTROL="0,3F" +STATE51\MOD9="0,1,0" +STATE51\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE52\NAME=STATE052 +STATE52\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE52\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE52\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE52\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE52\MOD4="0,1,0,0,1,0" +STATE52\CONTROL="0,3F" +STATE52\MOD9="0,1,0" +STATE52\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE53\NAME=STATE053 +STATE53\MOD1=",1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1" +STATE53\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE53\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE53\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE53\MOD4="0,1,0,0,1,0" +STATE53\CONTROL="4,3B" +STATE53\MOD9="0,1,0" +STATE53\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE54\NAME=STATE054 +STATE54\MOD1=",1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1" +STATE54\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE54\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE54\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE54\MOD4="0,1,0,0,1,0" +STATE54\CONTROL="0,3F" +STATE54\MOD9="0,1,0" +STATE54\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE55\NAME=STATE055 +STATE55\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE55\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE55\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE55\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE55\MOD4="0,1,0,0,1,0" +STATE55\CONTROL="0,3F" +STATE55\MOD9="0,1,0" +STATE55\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE56\NAME=STATE056 +STATE56\MOD1=",1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE56\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE56\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE56\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE56\MOD4="0,1,0,0,1,0" +STATE56\CONTROL="0,3F" +STATE56\MOD9="0,1,0" +STATE56\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE57\NAME=STATE057 +STATE57\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE57\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE57\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE57\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE57\MOD4="0,1,0,0,1,0" +STATE57\CONTROL="0,3F" +STATE57\MOD9="0,1,0" +STATE57\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE58\NAME=STATE058 +STATE58\MOD1=",1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1" +STATE58\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE58\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE58\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE58\MOD4="0,1,0,0,1,0" +STATE58\CONTROL="0,3F" +STATE58\MOD9="0,1,0" +STATE58\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE59\NAME=STATE059 +STATE59\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE59\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE59\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE59\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE59\MOD4="0,1,0,0,1,0" +STATE59\CONTROL="0,3F" +STATE59\MOD9="0,1,0" +STATE59\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE60\NAME=STATE060 +STATE60\MOD1="10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0" +STATE60\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE60\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE60\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE60\MOD4="0,1,0,0,1,0" +STATE60\CONTROL="0,3F" +STATE60\MOD9="0,1,0" +STATE60\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE61\NAME=STATE061 +STATE61\MOD1=",1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1" +STATE61\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE61\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE61\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE61\MOD4="0,1,0,0,1,0" +STATE61\CONTROL="0,3F" +STATE61\MOD9="0,1,0" +STATE61\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE62\NAME=STATE062 +STATE62\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1" +STATE62\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE62\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE62\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE62\MOD4="0,1,0,0,1,0" +STATE62\CONTROL="0,3F" +STATE62\MOD9="0,1,0" +STATE62\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE63\NAME=STATE063 +STATE63\MOD1="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0" +STATE63\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE63\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE63\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE63\MOD4="0,1,0,0,1,0" +STATE63\CONTROL="0,3F" +STATE63\MOD9="0,1,0" +STATE63\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE64\NAME=STATE064 +STATE64\MOD1=",1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1" +STATE64\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE64\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE64\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE64\MOD4="0,1,0,0,1,0" +STATE64\CONTROL="0,3F" +STATE64\MOD9="0,1,0" +STATE64\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE65\NAME=STATE065 +STATE65\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE65\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE65\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE65\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE65\MOD4="0,1,0,0,1,0" +STATE65\CONTROL="0,3F" +STATE65\MOD9="0,1,0" +STATE65\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE66\NAME=STATE066 +STATE66\MOD1=",1,1,0,0,0,,1,1,,1,1,,1,1,10,0,0,10,0,0,,1,1,,1,1,,1,1,0,0,0,,1,1" +STATE66\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE66\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE66\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE66\MOD4="0,1,0,0,1,0" +STATE66\CONTROL="0,3F" +STATE66\MOD9="0,1,0" +STATE66\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE67\NAME=STATE067 +STATE67\MOD1=",1,1,,1,1,,1,1,10,0,0,,1,1,0,0,0,0,0,0,,1,1,10,0,0,,1,1,,1,1,,1,1" +STATE67\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE67\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE67\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE67\MOD4="0,1,0,0,1,0" +STATE67\CONTROL="0,3F" +STATE67\MOD9="0,1,0" +STATE67\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE68\NAME=STATE068 +STATE68\MOD1=",1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1" +STATE68\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE68\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE68\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE68\MOD4="0,1,0,0,1,0" +STATE68\CONTROL="0,3F" +STATE68\MOD9="0,1,0" +STATE68\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE69\NAME=STATE069 +STATE69\MOD1="0,0,0,,1,1,,1,1,,1,1,10,0,0,,1,1,,1,1,10,0,0,,1,1,,1,1,,1,1,0,0,0" +STATE69\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE69\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE69\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE69\MOD4="0,1,0,0,1,0" +STATE69\CONTROL="0,3F" +STATE69\MOD9="0,1,0" +STATE69\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE70\NAME=STATE070 +STATE70\MOD1=",1,1,,1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1,,1,1" +STATE70\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE70\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE70\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE70\MOD4="0,1,0,0,1,0" +STATE70\CONTROL="0,3F" +STATE70\MOD9="0,1,0" +STATE70\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE71\NAME=STATE071 +STATE71\MOD1="10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0" +STATE71\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE71\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE71\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE71\MOD4="0,1,0,0,1,0" +STATE71\CONTROL="0,3F" +STATE71\MOD9="0,1,0" +STATE71\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE72\NAME=STATE072 +STATE72\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE72\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE72\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE72\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE72\MOD4="0,1,0,0,1,0" +STATE72\CONTROL="8,37" +STATE72\MOD9="0,1,0" +STATE72\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE73\NAME=STATE073 +STATE73\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE73\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE73\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE73\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE73\MOD4="0,1,0,0,1,0" +STATE73\CONTROL="0,3F" +STATE73\MOD9="0,1,0" +STATE73\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE74\NAME=STATE074 +STATE74\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE74\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE74\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE74\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE74\MOD4="0,1,0,0,1,0" +STATE74\CONTROL="0,3F" +STATE74\MOD9="0,1,0" +STATE74\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE75\NAME=STATE075 +STATE75\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE75\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE75\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE75\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE75\MOD4="0,1,0,0,1,0" +STATE75\CONTROL="8,37" +STATE75\MOD9="0,1,0" +STATE75\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE76\NAME=STATE076 +STATE76\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE76\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE76\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE76\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE76\MOD4="0,1,0,0,1,0" +STATE76\CONTROL="0,3F" +STATE76\MOD9="0,1,0" +STATE76\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE77\NAME=STATE077 +STATE77\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE77\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE77\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE77\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE77\MOD4="0,1,0,0,1,0" +STATE77\CONTROL="0,3F" +STATE77\MOD9="0,1,0" +STATE77\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE78\NAME=STATE078 +STATE78\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE78\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE78\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE78\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE78\MOD4="0,1,0,0,1,0" +STATE78\CONTROL="0,3F" +STATE78\MOD9="0,1,0" +STATE78\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE79\NAME=STATE079 +STATE79\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE79\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE79\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE79\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE79\MOD4="0,1,0,0,1,0" +STATE79\CONTROL="0,3F" +STATE79\MOD9="0,1,0" +STATE79\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE80\NAME=STATE080 +STATE80\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE80\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE80\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE80\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE80\MOD4="0,1,0,0,1,0" +STATE80\CONTROL="0,3F" +STATE80\MOD9="0,1,0" +STATE80\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE81\NAME=STATE081 +STATE81\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE81\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE81\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE81\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE81\MOD4="0,1,0,0,1,0" +STATE81\CONTROL="0,3F" +STATE81\MOD9="0,1,0" +STATE81\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE82\NAME=STATE082 +STATE82\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE82\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE82\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE82\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE82\MOD4="0,1,0,0,1,0" +STATE82\CONTROL="8,37" +STATE82\MOD9="0,1,0" +STATE82\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE83\NAME=STATE083 +STATE83\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE83\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE83\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE83\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE83\MOD4="0,1,0,0,1,0" +STATE83\CONTROL="0,31" +STATE83\MOD9="0,1,0" +STATE83\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE84\NAME=STATE084 +STATE84\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE84\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE84\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE84\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE84\MOD4="0,1,0,0,1,0" +STATE84\CONTROL="0,3F" +STATE84\MOD9="0,1,0" +STATE84\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE85\NAME=STATE085 +STATE85\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE85\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE85\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE85\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE85\MOD4="0,1,0,0,1,0" +STATE85\CONTROL="0,3F" +STATE85\MOD9="0,1,0" +STATE85\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE86\NAME=STATE086 +STATE86\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE86\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE86\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE86\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE86\MOD4="0,1,0,0,1,0" +STATE86\CONTROL="0,3F" +STATE86\MOD9="0,1,0" +STATE86\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE87\NAME=STATE087 +STATE87\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE87\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE87\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE87\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE87\MOD4="0,1,0,0,1,0" +STATE87\CONTROL="0,3F" +STATE87\MOD9="0,1,0" +STATE87\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE88\NAME=STATE088 +STATE88\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE88\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE88\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE88\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE88\MOD4="0,1,0,0,1,0" +STATE88\CONTROL="0,3F" +STATE88\MOD9="0,1,0" +STATE88\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE89\NAME=STATE089 +STATE89\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE89\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE89\MOD3=",1,1,11.5,1,0,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE89\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE89\MOD4="0,1,0,0,1,0" +STATE89\CONTROL="0,3F" +STATE89\MOD9="0,1,0" +STATE89\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE90\NAME=STATE090 +STATE90\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE90\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE90\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE90\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE90\MOD4="0,1,0,0,1,0" +STATE90\CONTROL="0,3F" +STATE90\MOD9="0,1,0" +STATE90\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE91\NAME=STATE091 +STATE91\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE91\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE91\MOD3=",1,1,,1,1,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE91\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE91\MOD4="0,1,0,0,1,0" +STATE91\CONTROL="0,3F" +STATE91\MOD9="0,1,0" +STATE91\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE92\NAME=STATE092 +STATE92\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE92\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE92\MOD3=",1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE92\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE92\MOD4="0,1,0,0,1,0" +STATE92\CONTROL="0,3F" +STATE92\MOD9="0,1,0" +STATE92\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE93\NAME=STATE093 +STATE93\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE93\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE93\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE93\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE93\MOD4="0,1,0,0,1,0" +STATE93\CONTROL="0,3F" +STATE93\MOD9="0,1,0" +STATE93\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE94\NAME=STATE094 +STATE94\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE94\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE94\MOD3=",1,1,11.5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE94\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE94\MOD4="0,1,0,0,1,0" +STATE94\CONTROL="0,3F" +STATE94\MOD9="0,1,0" +STATE94\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE95\NAME=STATE095 +STATE95\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE95\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE95\MOD3=",1,1,1,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE95\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE95\MOD4="0,1,0,0,1,0" +STATE95\CONTROL="0,3F" +STATE95\MOD9="0,1,0" +STATE95\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE96\NAME=STATE096 +STATE96\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE96\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE96\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE96\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE96\MOD4="0,1,0,0,1,0" +STATE96\CONTROL="0,3F" +STATE96\MOD9="0,1,0" +STATE96\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE97\NAME=STATE097 +STATE97\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE97\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE97\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE97\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE97\MOD4="0,1,0,0,1,0" +STATE97\CONTROL="0,3F" +STATE97\MOD9="0,1,0" +STATE97\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE98\NAME=STATE098 +STATE98\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE98\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE98\MOD3=",1,1,11,1,0,,1,1,,1,1,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE98\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE98\MOD4="0,1,0,0,1,0" +STATE98\CONTROL="0,3F" +STATE98\MOD9="0,1,0" +STATE98\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE99\NAME=STATE099 +STATE99\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE99\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE99\MOD3=",1,1,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE99\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE99\MOD4="0,1,0,0,1,0" +STATE99\CONTROL="0,3F" +STATE99\MOD9="0,1,0" +STATE99\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE100\NAME=STATE100 +STATE100\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE100\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE100\MOD3=",1,1,11,1,0,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE100\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE100\MOD4="0,1,0,0,1,0" +STATE100\CONTROL="0,3F" +STATE100\MOD9="0,1,0" +STATE100\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE101\NAME=STATE101 +STATE101\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE101\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE101\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE101\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE101\MOD4="0,1,0,0,1,0" +STATE101\CONTROL="8,37" +STATE101\MOD9="0,1,0" +STATE101\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE102\NAME=STATE102 +STATE102\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE102\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE102\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE102\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE102\MOD4="0,1,0,0,1,0" +STATE102\CONTROL="0,3F" +STATE102\MOD9="0,1,0" +STATE102\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE103\NAME=STATE103 +STATE103\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE103\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE103\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE103\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE103\MOD4="0,1,0,0,1,0" +STATE103\CONTROL="0,3F" +STATE103\MOD9="0,1,0" +STATE103\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE104\NAME=STATE104 +STATE104\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE104\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE104\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE104\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE104\MOD4="0,1,0,0,1,0" +STATE104\CONTROL="4,3B" +STATE104\MOD9="0,1,0" +STATE104\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE105\NAME=STATE105 +STATE105\MOD1="0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0" +STATE105\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE105\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE105\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE105\MOD4="0,1,0,0,1,0" +STATE105\CONTROL="2,3D" +STATE105\MOD9="0,1,0" +STATE105\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE106\NAME=STATE106 +STATE106\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE106\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE106\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1" +STATE106\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE106\MOD4="0,1,0,0,1,0" +STATE106\CONTROL="0,3F" +STATE106\MOD9="0,1,0" +STATE106\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE107\NAME=STATE107 +STATE107\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE107\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE107\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1" +STATE107\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE107\MOD4="0,1,0,0,1,0" +STATE107\CONTROL="0,3F" +STATE107\MOD9="0,1,0" +STATE107\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE108\NAME=STATE108 +STATE108\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE108\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE108\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1" +STATE108\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE108\MOD4="0,1,0,0,1,0" +STATE108\CONTROL="0,3F" +STATE108\MOD9="0,1,0" +STATE108\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE109\NAME=STATE109 +STATE109\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE109\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE109\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,,1,1,,1,1,,1,1,,1,1" +STATE109\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE109\MOD4="0,1,0,0,1,0" +STATE109\CONTROL="0,3F" +STATE109\MOD9="0,1,0" +STATE109\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE110\NAME=STATE110 +STATE110\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE110\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE110\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1" +STATE110\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE110\MOD4="0,1,0,0,1,0" +STATE110\CONTROL="0,3F" +STATE110\MOD9="0,1,0" +STATE110\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE111\NAME=STATE111 +STATE111\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE111\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE111\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1" +STATE111\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE111\MOD4="0,1,0,0,1,0" +STATE111\CONTROL="0,3F" +STATE111\MOD9="0,1,0" +STATE111\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE112\NAME=STATE112 +STATE112\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE112\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE112\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE112\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE112\MOD4="0,1,0,0,1,0" +STATE112\CONTROL="8,37" +STATE112\MOD9="0,1,0" +STATE112\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE113\NAME=STATE113 +STATE113\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE113\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE113\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE113\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE113\MOD4="0,1,0,0,1,0" +STATE113\CONTROL="0,31" +STATE113\MOD9="0,1,0" +STATE113\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE114\NAME=STATE114 +STATE114\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE114\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE114\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE114\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE114\MOD4="0,1,0,0,1,0" +STATE114\CONTROL="0,3F" +STATE114\MOD9="0,1,0" +STATE114\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE115\NAME=STATE115 +STATE115\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE115\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1" +STATE115\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE115\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE115\MOD4="0,1,0,0,1,0" +STATE115\CONTROL="0,3F" +STATE115\MOD9="0,1,0" +STATE115\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE116\NAME=STATE116 +STATE116\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE116\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE116\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE116\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE116\MOD4="0,1,0,0,1,0" +STATE116\CONTROL="0,3F" +STATE116\MOD9="0,1,0" +STATE116\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE117\NAME=STATE117 +STATE117\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE117\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE117\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE117\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE117\MOD4="0,1,0,0,1,0" +STATE117\CONTROL="0,3F" +STATE117\MOD9="0,1,0" +STATE117\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE118\NAME=STATE118 +STATE118\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE118\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE118\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE118\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE118\MOD4="0,1,0,0,1,0" +STATE118\CONTROL="0,3F" +STATE118\MOD9="0,1,0" +STATE118\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE119\NAME=STATE119 +STATE119\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE119\MOD2=",1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1" +STATE119\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE119\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE119\MOD4="0,1,0,0,1,0" +STATE119\CONTROL="0,3F" +STATE119\MOD9="0,1,0" +STATE119\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE120\NAME=STATE120 +STATE120\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE120\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE120\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE120\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE120\MOD4="0,1,0,0,1,0" +STATE120\CONTROL="0,3F" +STATE120\MOD9="0,1,0" +STATE120\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE121\NAME=STATE121 +STATE121\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE121\MOD2=",1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1" +STATE121\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE121\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE121\MOD4="0,1,0,0,1,0" +STATE121\CONTROL="0,3F" +STATE121\MOD9="0,1,0" +STATE121\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE122\NAME=STATE122 +STATE122\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE122\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1" +STATE122\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE122\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE122\MOD4="0,1,0,0,1,0" +STATE122\CONTROL="0,3F" +STATE122\MOD9="0,1,0" +STATE122\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATES=123 +[SYSTEM]BACKPLANE_ID=0000000000000000 +BACKPLANE_REV=0 +BACKPLANE_TYPE=1 +BACKPLANE_VERSION=0.0.0 +MOD1_ID=0000000000000000 +MOD1_REV=0 +MOD1_VERSION=0.0.0 +MOD1_TYPE=16 +MOD2_ID=0000000000000000 +MOD2_REV=0 +MOD2_VERSION=0.0.0 +MOD2_TYPE=16 +MOD3_ID=0000000000000000 +MOD3_REV=0 +MOD3_VERSION=0.0.0 +MOD3_TYPE=16 +MOD4_ID=0000000000000000 +MOD4_REV=0 +MOD4_VERSION=0.0.0 +MOD4_TYPE=12 +MOD9_ID=0000000000000000 +MOD9_REV=0 +MOD9_VERSION=0.0.0 +MOD9_TYPE=4 +MOD10_ID=0000000000000000 +MOD10_REV=0 +MOD10_VERSION=0.0.0 +MOD10_TYPE=3 +MOD12_ID=0000000000000000 +MOD12_REV=0 +MOD12_VERSION=0.0.0 +MOD12_TYPE=10 diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index b3d576b..66b4395 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -6,21 +6,6 @@ #include "voltage_timing_parameters.h" -BIGBUF = _ARCHON_FRAMEBUFS -LINECOUNT = _LINENUM -PIXELCOUNT = _AMPREADCOLS -RAWENABLE = _RAW_ENABLE -RAWENDLINE = 800 -RAWSAMPLES = 20000 - //RAWSEL = _RAW_SELECT - //NOTE RAWSEL of 11 should be E channel of slot 2 -RAWSEL = 11plt.c -RAWSTARTLINE = 0 - //to view the last prescan and start of the line - //RAWSTARTPIXEL = 48 - //to view the end of the line - RAWSTARTPIXEL = 1061 -SAMPLEMODE = 1 //attempt pixel timing coincident with the nearest ADM samples. That means multiples of 8 //by eye, try 80 to start @@ -31,12 +16,17 @@ SAMPLEMODE = 1 // last sample number must fit the series 8*n-1 // first sample number must be in the series 8*n +BIGBUF = _ARCHON_FRAMEBUFS +RAWSTARTLINE = 0 + //to view the last prescan and start of the line + //RAWSTARTPIXEL = 48 + //to view the end of the line + RAWSTARTPIXEL = 1061 +SAMPLEMODE = 1 +RAWENABLE = _RAW_ENABLE +RAWENDLINE = 800 +RAWSAMPLES = 20000 - -SHP1 = 120 -SHP2 = 303 -SHD1 = 448 -SHD2 = 575 //ADM module installed in slot 7 #define FCS_CDS 1 @@ -61,11 +51,32 @@ TAPLINE1 ="AM40R,-1,100" TAPLINES=2 FRAMEMODE=0 +BIGBUF = _ARCHON_FRAMEBUFS +LINECOUNT = _LINENUM +PIXELCOUNT = _AMPREADCOLS + //RAWSEL = _RAW_SELECT + //NOTE RAWSEL of 11 should be E channel of slot 2 +RAWSEL = 11 +RAWSTARTLINE = 0 + //to view the last prescan and start of the line + //RAWSTARTPIXEL = 48 + //to view the end of the line + +SHP1 = 120 +SHP2 = 303 +SHD1 = 448 +SHD2 = 575 + + + #elifdef FCS_CDS TAPLINES=2 FRAMEMODE=0 TAPLINE0 ="AM45L,-1,100" TAPLINE1 ="AM46R,-1,100" + +RAWSEL=49 + //RAWSEL=50 #else FRAMEMODE=2 @@ -87,6 +98,21 @@ TAPLINE14 ="AM53L,-1,100" TAPLINE15 ="AM54R,-1,100" TAPLINES=16 + + +LINECOUNT = _LINENUM +PIXELCOUNT = _AMPREADCOLS + //RAWSEL = _RAW_SELECT + //NOTE RAWSEL of 11 should be E channel of slot 2 +RAWSEL = 11 + +SHP1 = 120 +SHP2 = 303 +SHD1 = 448 +SHD2 = 575 + + + #endif TRIGOUTFORCE=0 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 5738bf5..7b85298 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -26,14 +26,14 @@ SLOT 1 driverx { SLOT 2 driverx { DRVX 1 [1,1,1] "SCI_RGBACKUP2"; DRVX 2 [1,1,1] "SCI_SWBACKUP1"; - DRVX 3 [1,1,1] "FCS2_S2L"; - DRVX 4 [1,1,1] "FCS1_S2L"; - DRVX 5 [1,1,1] "FCS2_S3L"; - DRVX 6 [1,1,1] "FCS_S1"; + DRVX 3 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS2_S2L"; + DRVX 4 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS1_S2L"; + DRVX 5 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS2_S3L"; + DRVX 6 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS_S1"; DRVX 7 [1,1,1] "SCI_SWBACKUP2"; - DRVX 8 [1,1,1] "FCS_RG"; - DRVX 9 [1,1,1] "FCS_SW"; - DRVX 10 [1,1,1] "FCS1_S3L"; + DRVX 8 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS_RG"; + DRVX 9 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS_SW"; + DRVX 10 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS1_S3L"; DRVX 11 [1,1,0] "Spare1"; DRVX 12 [1,1,0] "Spare2"; } @@ -45,10 +45,10 @@ SLOT 3 driverx { DRVX 4 [SCLK_fast,SCLK_slow,1] "Serial E1"; DRVX 5 [SCLK_fast,SCLK_slow,1] "Serial F2"; DRVX 6 [SCLK_fast,SCLK_slow,1] "Serial F1"; - DRVX 7 [1,1,0] "FCS PPhase3U"; - DRVX 8 [1,1,0] "FCS PPhase3L"; - DRVX 9 [1,1,0] "FCS PPhase2"; - DRVX 10 [1,1,0] "FCS PPhase1"; + DRVX 7 [PCLK_fast_FCS,PCLK_slow_FCS,1] "FCS PPhase3U"; + DRVX 8 [PCLK_fast_FCS,PCLK_slow_FCS,1] "FCS PPhase3L"; + DRVX 9 [PCLK_fast_FCS,PCLK_slow_FCS,1] "FCS PPhase2"; + DRVX 10 [PCLK_fast_FCS,PCLK_slow_FCS,1] "FCS PPhase1"; DRVX 11 [TG_fast,TG_slow,1] "TGA2"; DRVX 12 [1,1,0]; } @@ -111,10 +111,10 @@ SLOT 9 hvbias { HVLC 24 [29.30,1] "SCI2 F Output Drain"; //TODO: needs re-assignment! HVHC 1 [29.3,10.0,3,1] "SCI E Output Drain"; HVHC 2 [29.3,10.0,3,1] "SCI F Output Drain"; - HVHC 3 [24.3,2.0,0,1] "FCS1 Output Drain A"; - HVHC 4 [24.3,2.0,0,1] "FCS1 Output Drain B"; - HVHC 5 [24.3,2.0,0,1] "FCS2 Output Drain A"; - HVHC 6 [24.3,2.0,0,1] "FCS2 Output Drain B"; + HVHC 3 [24.3,4.0,0,1] "FCS1 Output Drain A"; + HVHC 4 [24.3,4.0,0,1] "FCS1 Output Drain B"; + HVHC 5 [24.3,4.0,0,1] "FCS2 Output Drain A"; + HVHC 6 [24.3,4.0,0,1] "FCS2 Output Drain B"; } SLOT 10 lvbias { diff --git a/src/deimos/deimos.modes b/src/deimos/deimos.modes index f4c0ed0..b0e9f30 100644 --- a/src/deimos/deimos.modes +++ b/src/deimos/deimos.modes @@ -1 +1,26 @@ [MODE_DEFAULT] +ACF:TAPLINES=16 +ACF:TAPLINE0 ="AM37L,-1,100" +ACF:TAPLINE1 ="AM38R,-1,100" +ACF:TAPLINE2 ="AM39L,-1,100" +ACF:TAPLINE3 ="AM40R,-1,100" +ACF:TAPLINE4 ="AM41L,-1,100" +ACF:TAPLINE5 ="AM42R,-1,100" +ACF:TAPLINE6 ="AM43L,-1,100" +ACF:TAPLINE7 ="AM44R,-1,100" +ACF:TAPLINE8 ="AM47L,-1,100" +ACF:TAPLINE9 ="AM48R,-1,100" +ACF:TAPLINE10 ="AM49L,-1,100" +ACF:TAPLINE11 ="AM50R,-1,100" +ACF:TAPLINE12 ="AM51L,-1,100" +ACF:TAPLINE13 ="AM52R,-1,100" +ACF:TAPLINE14 ="AM53L,-1,100" +ACF:TAPLINE15 ="AM54R,-1,100" +ACF:FRAMEMODE=2 + + +[MODE_FCS] +ACF:TAPLINES=2 +ACF:TAPLINE0 ="AM45L,-1,100" +ACF:TAPLINE1 ="AM46R,-1,100" +ACF:FRAMEMODE=0 diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index d655bb6..6100ea8 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -22,9 +22,13 @@ /** parameters interfaced with camerad in summit mode **/ param FcsExpTimeSec = 0 //FCS exposure time (seconds) + param FcsExpTimeMSec = 0 // FCS exposure time (milliseconds) + param SciStart = 0 // trigger to start a science exposure + param FcsStart = 0 // trigger to start an FCS exposure + param SciStop = 0 //trigger to end a science exposure and start readout /** System Control Triggers **/ @@ -38,15 +42,15 @@ param integrate_s = 0 // amount of time to integrate in the dark (s component) param framecount = 0 // how many frames to read (set to 1 to trigger a readout on next sequence param abortintegrate = 0 // set to 1 to bail out if in the middle of an integration - param illum = 0 //should the light be turned on for integrations - param integrate_illum_ms = 50 //amount of time to integrate with light on (ms component) - param integrate_illum_s = 0 //amount of time to integrate with light on (s component) - param rg_mod_test_mode = 0 //go into special output V_RD modulation mode - EXPERTS ONLY - param tdi_wait_us = 0 // add a TDI wait period to each llel readout in llel_seq mode (for "quickPTC") +param illum = 0 //should the light be turned on for integrations +param integrate_illum_ms = 50 //amount of time to integrate with light on (ms component) +param integrate_illum_s = 0 //amount of time to integrate with light on (s component) +param rg_mod_test_mode = 0 //go into special output V_RD modulation mode - EXPERTS ONLY +param tdi_wait_us = 0 // add a TDI wait period to each llel readout in llel_seq mode (for "quickPTC") //internal summit mode state parameters - param summit_sci_is_integrating = 0 +param summit_sci_is_integrating = 0 param line_clamp_delay_us = 10 @@ -175,17 +179,6 @@ SEQUENCE ClampTest #endif -//gets called once at timing reset -SEQUENCE Boot { - if engmode StartSeqEngMode(); - if engmode_fcs StartSeqEngModeFCS(); - - GOTO StartSeqSummitMode(); -} - - - -//Summit mode initial setup both FCS and science focal plane SEQUENCE StartSeqSummitMode { InitialSetup(); InitialSetupFCS(); @@ -194,6 +187,8 @@ SEQUENCE StartSeqSummitMode { } SEQUENCE SummitModeLoop { + if engmode StartSeqEngMode(); + if engmode_fcs StartSeqEngModeFCS(); SummitModeFCSLineFlush(); IF SciStart SummitModeSciIntegrate(); IF FcsStart SummitModeFCSIntegrate(); @@ -210,12 +205,15 @@ SEQUENCE SummitModeAllLineFlush { SEQUENCE SummitModeFCSLineFlush { FCSParallelForward(); + DumpPixelsFCS(_FCS_TOTAL_COLS); RETURN; } SEQUENCE SummitModeSciIntegrate { - IF SciStart SciStart--; + //IF SciStart SciStart-- - NOTE do not uncomment before wdl issue #36 fixed + //this will generate illegal statements otherwise + SciStart--; //do a dump sequence before starting integration OpenShutter(); SummitModeSciDump(); @@ -223,14 +221,15 @@ SEQUENCE SummitModeSciIntegrate //set parallels to appropriate static gates here //TODO: should we emit some kind of signal here? - IF !summit_sci_is_integrating summit_sci_is_integrating++; + summit_sci_is_integrating++; RETURN; } SEQUENCE SummitModeFCSIntegrate { - IF FcsStart FcsStart--; + //IF FcsStart FCSStart--; + FcsStart--; KeepThisFrame(); OpenShutter(); Wait1ms(FcsExpTimeMSec); @@ -245,8 +244,10 @@ SEQUENCE SummitModeSciReadout { //very similar to eng mode FrameReadout, except //only two possible modes (sequential or coincident) //also no trigger out operation, no TDI, no linbin. - IF summit_sci_is_integrating summit_sci_is_integrating--; - IF SciStop SciStop--; + //IF summit_sci_is_integrating summit_sci_is_integrating--; + summit_sci_is_integrating--; + //IF SciStop SciStop--; + SciStop--; ReadoutBegin(); Wait1us(50); @@ -271,6 +272,7 @@ SEQUENCE SummitModeSciDump { SEQUENCE SummitModeFCSReadout { Wait1us(50); //TODO: faster FCS readout with windowing + FCSLineReadout(_FCS_ROWS); RETURN; } @@ -284,15 +286,14 @@ SEQUENCE FCSLineReadout { SEQUENCE StartSeqEngModeFCS { - InitialSetupFCS(); if framecount SummitModeFCSIntegrate(); + if !framecount SummitModeFCSLineFlush(_FCS_ROWS); GOTO StartSeqEngModeFCS(); } SEQUENCE StartSeqEngMode { - InitialSetup(); if framecount IntegrateAndReadout(); if !framecount LineReadoutFast(TOTAL_ROWS); if rg_mod_test_mode TestBrokenReadout(); @@ -582,7 +583,7 @@ SEQUENCE Wait1s { SEQUENCE abortintegration { CloseShutter(); - GOTO Boot(); + GOTO StartSeqSummitMode(); } SEQUENCE LineReadoutSlowPix diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 2cdd396..7d7cc89 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -104,6 +104,7 @@ /**** LVDS Driver Signal definitions ****/ #define AC_Clamp 12 : 12 +#define AC_Clamp_FCS 12 : 11 /* NOP Definition - NEEDS TO BE UNUSED */ #define NOP 12 : 2 //new VIB redefine #define PD_OE_IN 12 : 1 //new VIB assignment diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 310f8fd..0a090c6 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -618,6 +618,8 @@ WAVEFORM SerialBinForwards } + + WAVEFORM DumpPixels { //NB using slow slew rate for triangular serial clockingdef @@ -832,11 +834,24 @@ WAVEFORM ClampOn 0: SET AC_Clamp TO HIGH; } +WAVEFORM ClampOnFCS +{ + 0: SET AC_Clamp_FCS TO HIGH; +} + + Waveform ClampOff { 0: SET AC_Clamp to LOW; } +WAVEFORM ClampOffFCS +{ + 0: SET AC_Clamp_FCS TO LOW; +} + + + WAVEFORM ClampTestLineStart { 0: SET LINE TO HIGH; @@ -871,12 +886,15 @@ WAVEFORM setupTGTest WAVEFORM FCSParallelForward { - 0: SET FCS_P3 to _MPP_CLOCK_HIGH_FCS, FAST; + 0: SET AC_Clamp_FCS TO HIGH; + SET FCS_P3 to _MPP_CLOCK_HIGH_FCS, FAST; .+1000: SET FCS_P2 to _PAR_CLOCK_LOW_FCS, FAST; .+1000: SET FCS_P1 to _PAR_CLOCK_HIGH_FCS, FAST; .+1000: SET FCS_P3 to _MPP_CLOCK_LOW_FCS, FAST; .+1000: set FCS_P2 to _PAR_CLOCK_HIGH_FCS, FAST; .+1000: set FCS_P1 to _PAR_CLOCK_LOW_FCS, FAST; + SET AC_Clamp_FCS TO LOW; + .+1000: SET NOP TO HIGH; } @@ -891,19 +909,35 @@ WAVEFORM FCSSplitReadout .+1: SET PIXEL TO LOW; SET LINE TO LOW; SET FRAME TO LOW; - SET FCS_RG TO INV_HIGH; //NOTE: FCS_RG sigil not working for some reason?? - .+2*FCS_SER_STEP: SET FCS_RG TO INV_LOW; - + SET FCS_RG TO _RG_HIGH_FCS; + .+2*FCS_SER_STEP: SET FCS_RG TO _RG_LOW_FCS; //serial clocking 0: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_LOW_FCS, FAST; .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; - SET FCS_SW TO INV_HIGH; + SET FCS_SW TO _SW_HIGH_FCS; .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS, FAST; - SET FCS_SW TO INV_LOW; + SET FCS_SW TO _SW_LOW_FCS; .+FCS_SIG_DELAY: SET NOP TO HIGH; } + +WAVEFORM DumpPixelsFCS +{ + 0:=FCS_DUMP_BEGIN + SET FCS_RG TO _RG_HIGH_FCS; + 0: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_LOW_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; + SET FCS_SW TO _SW_LOW_FCS; + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS, FAST; + SET FCS_SW TO _SW_HIGH_FCS; + .+FCS_SER_STEP: SET FCS_RG TO _RG_LOW_FCS; + +} + diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index f801738..a004725 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -104,7 +104,7 @@ #define PCLK_slow P_TRI_SLEW_RATE -#define PCLK_slow_FCS PCLK_SLOW +#define PCLK_slow_FCS PCLK_slow //e2v says need on average 1.us rise time, for "normal" clocking calculate PCLK_fast that way @@ -112,17 +112,18 @@ #define PCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / 1.5" | bc) -#define PCLK_fast_FCS PCLK_fast +#defeval PCLK_fast_FCS PCLK_fast //e2v says need on average 90ns rise time for a serial clock #define SCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / 0.2" | bc) -#define SCLK_fast_FCS SCLK_fast +#defeval SCLK_fast_FCS SCLK_fast //NOTE: waveforms currently use serial "slow" slew rate for triangular waveform // serial "FAST" is for immediate changes (like e.g. resetting serial register) #define SCLK_slow S_TRI_SLEW_RATE //nominal value for now -#define SCLK_slow_FCS SCLK_slow + +#defeval SCLK_slow_FCS SCLK_slow //transfer gate uses only one slew rate From 385dbf446cb9eaac2f32c2525e0f8e3efd71e537 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 20 Nov 2025 15:36:05 -0800 Subject: [PATCH 166/194] first (somewhat) working readout of FCS detectors, clock them backwards.... TODO: add option for that in params --- src/deimos/deimos.cds | 15 ++++-- src/deimos/deimos.def | 6 ++- src/deimos/deimos.mod | 28 +++++----- src/deimos/deimos.seq | 15 +++++- src/deimos/deimos.waveform | 74 +++++++++++++++----------- src/deimos/voltage_timing_parameters.h | 22 ++++---- 6 files changed, 98 insertions(+), 62 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 66b4395..c1d933c 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -72,11 +72,20 @@ SHD2 = 575 #elifdef FCS_CDS TAPLINES=2 FRAMEMODE=0 -TAPLINE0 ="AM45L,-1,100" -TAPLINE1 ="AM46R,-1,100" +TAPLINE0 ="AM45L,1,100" +TAPLINE1 ="AM46R,1,100" RAWSEL=49 - //RAWSEL=50 +LINECOUNT = _FCS_LINENUM +PIXELCOUNT = _FCS_TOTAL_COLS + +SHP1 = 10 +SHP2 = 20 +SHD1 = 30 +SHD2 = 40 + +RAWSTARTPIXEL=23 + #else FRAMEMODE=2 diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 48e217e..4425bc3 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -71,6 +71,7 @@ + /** --------------------------------------------------------------------------- * CDS-Deinterlace options */ @@ -112,7 +113,7 @@ -/** basic constants to assist in somewhat automating slew rate for triange clocking. +/** basic constants to assist in somewhat automating slew rate for triangle clocking. For now we are just entering a slew time manually, then calculating the rate to make sure we hit the intended voltage at the top of the triangle waveform **/ @@ -125,5 +126,8 @@ #define _FCS_PRESCAN 25 #define _FCS_AMPCOLS 1024 #define _FCS_OVERSCAN 20 +#define _FCS_LLEL_OVERSCAN 20 #define _FCS_TOTAL_COLS #eval _FCS_PRESCAN + _FCS_AMPCOLS + _FCS_OVERSCAN + +#define _FCS_LINENUM #eval _FCS_ROWS + _FCS_LLEL_OVERSCAN diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 7b85298..a40e816 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -92,10 +92,10 @@ SLOT 9 hvbias { HVLC 5 [17.5,2] "SCI E Reset Drain"; HVLC 6 [17.5,2] "SCI F Reset Drain"; HVLC 7 [0.00,0]; - HVLC 8 [14.00,0] "FCS1 Reset Drain A"; - HVLC 9 [14.00,0] "FCS1 Reset Drain B"; - HVLC 10 [14.00,0] "FCS2 Reset Drain A"; - HVLC 11 [14.00,0] "FCS2 Reset Drain B"; + HVLC 8 [14.00,2] "FCS1 Reset Drain A"; + HVLC 9 [14.00,2] "FCS1 Reset Drain B"; + HVLC 10 [14.00,2] "FCS2 Reset Drain A"; + HVLC 11 [14.00,2] "FCS2 Reset Drain B"; HVLC 12 [13.00,1] "FCS Overflow Drain"; //TODO: what voltage? HVLC 13 [0.00,0]; HVLC 14 [0.00,0]; @@ -107,14 +107,14 @@ SLOT 9 hvbias { HVLC 20 [0.00,0]; HVLC 21 [17.00,2] "SCI2 E Reset Drain"; HVLC 22 [17.00,2] "SCI2 F Reset Drain"; - HVLC 23 [29.30,1] "SCI2 E Output Drain" ; //TODO: needs re-assignment! - HVLC 24 [29.30,1] "SCI2 F Output Drain"; //TODO: needs re-assignment! + HVLC 23 [29.30,3] "SCI2 E Output Drain" ; //TODO: needs re-assignment! + HVLC 24 [29.30,3] "SCI2 F Output Drain"; //TODO: needs re-assignment! HVHC 1 [29.3,10.0,3,1] "SCI E Output Drain"; HVHC 2 [29.3,10.0,3,1] "SCI F Output Drain"; - HVHC 3 [24.3,4.0,0,1] "FCS1 Output Drain A"; - HVHC 4 [24.3,4.0,0,1] "FCS1 Output Drain B"; - HVHC 5 [24.3,4.0,0,1] "FCS2 Output Drain A"; - HVHC 6 [24.3,4.0,0,1] "FCS2 Output Drain B"; + HVHC 3 [24.3,4.0,3,1] "FCS1 Output Drain A"; + HVHC 4 [24.3,4.0,3,1] "FCS1 Output Drain B"; + HVHC 5 [24.3,4.0,3,1] "FCS2 Output Drain A"; + HVHC 6 [24.3,4.0,3,1] "FCS2 Output Drain B"; } SLOT 10 lvbias { @@ -130,10 +130,10 @@ SLOT 10 lvbias { // LVLC 8 [11.5,5] "SCI Reset Gate - High"; // NB goes through a line driver LVLC 8 [5.5,5] "SCI Reset Gate - LOW"; //// NB at the moment RG low and high are swapped in the cable by accident! LVLC 9 [00.0,0]; - LVLC 10 [-4.0,0] "LastGateA FCS 1"; - LVLC 11 [-4.0,0] "LastGateB FCS 1"; - LVLC 12 [-4.0,0] "LastGateA FCS 2"; - LVLC 13 [-4.0,0] "LastGateB FCS 2"; + LVLC 10 [-4.0,4] "LastGateA FCS 1"; + LVLC 11 [-4.0,4] "LastGateB FCS 1"; + LVLC 12 [-4.0,4] "LastGateA FCS 2"; + LVLC 13 [-4.0,4] "LastGateB FCS 2"; LVLC 14 [3.3,0] "SCI E Output Gate 2" ; LVLC 15 [3.3,0] "SCI F Output Gate 2"; LVLC 16 [0.0,0] ; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 6100ea8..c323659 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -84,6 +84,8 @@ param enable_ser_bin = 0 //const llel_low_level = _PAR_CLOCK_LOW //const llel_tri_slew = P_TRI_SLEW_RATE + + //TODO: wide gate integration mode @@ -274,6 +276,7 @@ SEQUENCE SummitModeFCSReadout { //TODO: faster FCS readout with windowing FCSLineReadout(_FCS_ROWS); + FCSLineReadout(_FCS_LLEL_OVERSCAN); RETURN; } @@ -286,12 +289,19 @@ SEQUENCE FCSLineReadout { SEQUENCE StartSeqEngModeFCS { - if framecount SummitModeFCSIntegrate(); + if framecount EngModeFCSIntegrateandReadout(); if !framecount SummitModeFCSLineFlush(_FCS_ROWS); GOTO StartSeqEngModeFCS(); } +SEQUENCE EngModeFCSIntegrateandReadout { + SummitModeFCSIntegrate(); + framecount--; + RETURN; +} + + SEQUENCE StartSeqEngMode { if framecount IntegrateAndReadout(); @@ -579,7 +589,8 @@ SEQUENCE FrameReadout SEQUENCE Wait1s { if abortintegrate abortintegration(); Wait1ms(1000); - RETURN;} + RETURN; +} SEQUENCE abortintegration { CloseShutter(); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 0a090c6..b80f90d 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -27,6 +27,8 @@ #include voltage_timing_parameters.h + + /*****************************************/ /* LOGIC STATES */ /*****************************************/ @@ -116,27 +118,32 @@ WAVEFORM InitialSetup WAVEFORM InitialSetupFCS { 0 : - SET RG TO INV_HIGH; - SET SW TO INV_HIGH; - SET RG_CLOCKS TO _RG_LOW; - SET SW_CLOCKS TO _SW_LOW; - + SET FCS_RG TO _RG_LOW_FCS, FAST; + SET FCS_SW TO _SW_LOW_FCS, FAST; + + //disable the pin drivers SET PD_OE_IN TO 1; - SET AC_Clamp to HIGH; + SET AC_Clamp_FCS to HIGH; .+1000: - SET AC_Clamp to LOW; + SET AC_Clamp_FCS to LOW; SET FCS_P3 TO _MPP_CLOCK_LOW_FCS, FAST; SET FCS_P2 TO _PAR_CLOCK_HIGH_FCS, FAST; SET FCS_P1 TO _PAR_CLOCK_HIGH_FCS, FAST; + + SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; + SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; + SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; .+10000: SET NOP TO HIGH; } + + WAVEFORM OpenShutter { 0: SET SHUTTER to 1; @@ -883,23 +890,27 @@ WAVEFORM setupTGTest } +#define FCS_PAR_STEP 500 WAVEFORM FCSParallelForward { 0: SET AC_Clamp_FCS TO HIGH; - SET FCS_P3 to _MPP_CLOCK_HIGH_FCS, FAST; - .+1000: SET FCS_P2 to _PAR_CLOCK_LOW_FCS, FAST; - .+1000: SET FCS_P1 to _PAR_CLOCK_HIGH_FCS, FAST; - .+1000: SET FCS_P3 to _MPP_CLOCK_LOW_FCS, FAST; - .+1000: set FCS_P2 to _PAR_CLOCK_HIGH_FCS, FAST; - .+1000: set FCS_P1 to _PAR_CLOCK_LOW_FCS, FAST; + SET LINE TO HIGH; + SET FCS_P1 to _PAR_CLOCK_LOW_FCS, FAST; + .+FCS_PAR_STEP: SET FCS_P3 to _MPP_CLOCK_HIGH_FCS, FAST; + .+FCS_PAR_STEP: SET FCS_P2 to _PAR_CLOCK_LOW_FCS, FAST; + .+FCS_PAR_STEP: SET FCS_P1 to _PAR_CLOCK_HIGH_FCS, FAST; + .+FCS_PAR_STEP: SET FCS_P3 to _MPP_CLOCK_LOW_FCS, FAST; + .+FCS_PAR_STEP: set FCS_P2 to _PAR_CLOCK_HIGH_FCS, FAST; + .+FCS_PAR_STEP: set FCS_P1 to _PAR_CLOCK_LOW_FCS, FAST; SET AC_Clamp_FCS TO LOW; .+1000: SET NOP TO HIGH; } -#define FCS_SER_STEP 30 -#define FCS_SIG_DELAY 60 +#define FCS_SER_STEP 240 +#define FCS_SIG_DELAY 480 +#define FCS_RST_DELAY 80 WAVEFORM FCSSplitReadout { @@ -909,18 +920,17 @@ WAVEFORM FCSSplitReadout .+1: SET PIXEL TO LOW; SET LINE TO LOW; SET FRAME TO LOW; - SET FCS_RG TO _RG_HIGH_FCS; - .+2*FCS_SER_STEP: SET FCS_RG TO _RG_LOW_FCS; - + SET FCS_RG TO _RG_HIGH_FCS, FAST; //serial clocking - 0: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; + SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; - SET FCS_SW TO _SW_HIGH_FCS; - .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; + SET FCS_SW TO _SW_HIGH_FCS, FAST; + SET FCS_RG TO _RG_LOW_FCS, FAST; .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS, FAST; - SET FCS_SW TO _SW_LOW_FCS; + .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; + SET FCS_SW TO _SW_LOW_FCS, FAST; .+FCS_SIG_DELAY: SET NOP TO HIGH; } @@ -928,16 +938,16 @@ WAVEFORM FCSSplitReadout WAVEFORM DumpPixelsFCS { 0:=FCS_DUMP_BEGIN - SET FCS_RG TO _RG_HIGH_FCS; - 0: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; + SET FCS_RG TO _RG_HIGH_FCS, FAST; + SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; - SET FCS_SW TO _SW_LOW_FCS; - .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; + SET FCS_SW TO _SW_LOW_FCS, FAST; .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS, FAST; - SET FCS_SW TO _SW_HIGH_FCS; - .+FCS_SER_STEP: SET FCS_RG TO _RG_LOW_FCS; + .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; + SET FCS_SW TO _SW_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_RG TO _RG_LOW_FCS, FAST; } diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index a004725..509b32f 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -138,16 +138,18 @@ //FCS related voltage definitions -#define _PAR_CLOCK_HIGH_FCS 2 -#define _PAR_CLOCK_LOW_FCS -7 -#define _MPP_CLOCK_HIGH_FCS 5 -#define _MPP_CLOCK_LOW_FCS -8 -#define _SER_CLOCK_HIGH_FCS 5 -#define _SER_CLOCK_LOW_FCS -7 -#define _RG_LOW_FCS 0 -#define _RG_HIGH_FCS 12 -#define _SW_LOW_FCS -6 -#define _SW_HIGH_FCS 5 +#define _PAR_CLOCK_HIGH_FCS 2.0 +#define _PAR_CLOCK_LOW_FCS -10.0 +#define _MPP_CLOCK_HIGH_FCS 5.0 +#define _MPP_CLOCK_LOW_FCS -8.0 +#define _SER_CLOCK_HIGH_FCS 5.0 +#define _SER_CLOCK_LOW_FCS -7.0 + +#define _RG_LOW_FCS 0.0 +#define _RG_HIGH_FCS 12.0 + +#define _SW_LOW_FCS -6.0 +#define _SW_HIGH_FCS 5.0 #define _RESET_DRAIN_FCS 14.0 #define _OUTPUT_DRAIN_FCS 24.3 From 5410073c3008fa69ee4ecf786b88aaba7bc6de80 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 1 Dec 2025 14:54:22 -0800 Subject: [PATCH 167/194] managed to appease the WDL modegen gods finally. --- src/deimos/deimos.acf | 1491 +++++++++++++++++++------------------ src/deimos/deimos.cds | 68 +- src/deimos/deimos.modes | 30 +- src/deimos/deimos.signals | 5 + 4 files changed, 811 insertions(+), 783 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index f20fde8..f8ec8f1 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -6,24 +6,31 @@ SAMPLEMODE = 1 RAWENABLE = 1 RAWENDLINE = 800 RAWSAMPLES = 20000 - TAPLINE0 ="AM39L,-1,100" -TAPLINE1 ="AM40R,-1,100" -TAPLINES=2 FRAMEMODE=0 -BIGBUF = 0 +TAPLINE0="AM37L,-1,100" +TAPLINE1="AM38R,-1,100" +TAPLINE2="AM39L,-1,100" +TAPLINE3="AM40R,-1,100" +TAPLINE4="AM41L,-1,100" +TAPLINE5="AM42R,-1,100" +TAPLINE6="AM43L,-1,100" +TAPLINE7="AM44R,-1,100" +TAPLINE8="AM47L,-1,100" +TAPLINE9="AM48R,-1,100" +TAPLINE10="AM49L,-1,100" +TAPLINE11="AM50R,-1,100" +TAPLINE12="AM51L,-1,100" +TAPLINE13="AM52R,-1,100" +TAPLINE14="AM53L,-1,100" +TAPLINE15="AM54R,-1,100" +TAPLINES=16 LINECOUNT = 4125 PIXELCOUNT = 1094 RAWSEL = 11 -RAWSTARTLINE = 0 SHP1 = 120 SHP2 = 303 SHD1 = 448 SHD2 = 575 -TAPLINES=2 -FRAMEMODE=0 -TAPLINE0 ="AM45L,-1,100" -TAPLINE1 ="AM46R,-1,100" -RAWSEL=49 TRIGOUTFORCE=0 TRIGOUTINVERT=0 TRIGOUTLEVEL=0 @@ -115,486 +122,491 @@ LINE53="STATE000; RETURN SummitModeSciDump" LINE54=SummitModeFCSReadout: LINE55="STATE000; CALL Wait1us(50)" LINE56="STATE000; CALL FCSLineReadout(4096)" -LINE57="STATE000; RETURN SummitModeFCSReadout" -LINE58=FCSLineReadout: -LINE59="STATE000; CALL FCSParallelForward" -LINE60="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE61="STATE000; CALL FCSSplitReadout(1069)" -LINE62="STATE000; RETURN FCSLineReadout" -LINE63=StartSeqEngModeFCS: -LINE64="STATE000; if framecount CALL SummitModeFCSIntegrate" -LINE65="STATE000; if !framecount CALL SummitModeFCSLineFlush(4096)" -LINE66="STATE000; GOTO StartSeqEngModeFCS" -LINE67=StartSeqEngMode: -LINE68="STATE000; if framecount CALL IntegrateAndReadout" -LINE69="STATE000; if !framecount CALL LineReadoutFast(4124)" -LINE70="STATE000; if rg_mod_test_mode CALL TestBrokenReadout" -LINE71="STATE000; GOTO StartSeqEngMode" -LINE72=IntegrateAndReadout: -LINE73="STATE000; CALL Integrate" -LINE74="STATE000; CALL ReadoutKeep" -LINE75="STATE000; RETURN IntegrateAndReadout" -LINE76=TestBrokenReadout: -LINE77="STATE000; CALL OutputTestSetup" -LINE78="STATE000; CALL PulseTGA" -LINE79="STATE000; CALL VRDModulate" -LINE80="STATE000; RETURN TestBrokenReadout" -LINE81=EvacuateE: -LINE82="STATE000; CALL EvacuateEStart" -LINE83="STATE000; CALL Wait1ms" -LINE84="STATE000; CALL EvacuateEFinish" -LINE85="STATE000; RETURN EvacuateE" -LINE86=EvacuateF: -LINE87="STATE000; CALL EvacuateFStart" +LINE57="STATE000; CALL FCSLineReadout(20)" +LINE58="STATE000; RETURN SummitModeFCSReadout" +LINE59=FCSLineReadout: +LINE60="STATE000; CALL FCSParallelForward" +LINE61="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE62="STATE000; CALL FCSSplitReadout(1069)" +LINE63="STATE000; RETURN FCSLineReadout" +LINE64=StartSeqEngModeFCS: +LINE65="STATE000; if framecount CALL EngModeFCSIntegrateandReadout" +LINE66="STATE000; if !framecount CALL SummitModeFCSLineFlush(4096)" +LINE67="STATE000; GOTO StartSeqEngModeFCS" +LINE68=EngModeFCSIntegrateandReadout: +LINE69="STATE000; CALL SummitModeFCSIntegrate" +LINE70="STATE000; framecount--" +LINE71="STATE000; RETURN EngModeFCSIntegrateandReadout" +LINE72=StartSeqEngMode: +LINE73="STATE000; if framecount CALL IntegrateAndReadout" +LINE74="STATE000; if !framecount CALL LineReadoutFast(4124)" +LINE75="STATE000; if rg_mod_test_mode CALL TestBrokenReadout" +LINE76="STATE000; GOTO StartSeqEngMode" +LINE77=IntegrateAndReadout: +LINE78="STATE000; CALL Integrate" +LINE79="STATE000; CALL ReadoutKeep" +LINE80="STATE000; RETURN IntegrateAndReadout" +LINE81=TestBrokenReadout: +LINE82="STATE000; CALL OutputTestSetup" +LINE83="STATE000; CALL PulseTGA" +LINE84="STATE000; CALL VRDModulate" +LINE85="STATE000; RETURN TestBrokenReadout" +LINE86=EvacuateE: +LINE87="STATE000; CALL EvacuateEStart" LINE88="STATE000; CALL Wait1ms" -LINE89="STATE000; CALL EvacuateFFinish" -LINE90="STATE000; RETURN EvacuateF" -LINE91=Integrate: -LINE92="STATE000; CALL KeepThisFrame" -LINE93="STATE000; CALL ReadPixels(1094)" -LINE94="STATE000; if illum CALL OpenShutter" -LINE95="STATE000; CALL Wait1ms(integrate_illum_ms)" -LINE96="STATE000; CALL Wait1s(integrate_illum_s)" -LINE97="STATE000; if illum CALL CloseShutter" -LINE98="STATE000; CALL Wait1ms(integrate_ms)" -LINE99="STATE000; CALL Wait1s(integrate_s)" -LINE100="STATE000; RETURN Integrate" -LINE101=ReadoutKeep: -LINE102="STATE000; CALL ReadoutBegin" -LINE103="STATE000; if llel_coincident CALL FrameReadout" -LINE104="STATE000; if llel_seq CALL FrameReadout" -LINE105="STATE000; if slow_pix CALL FrameReadout" -LINE106="STATE000; if linbin CALL FrameReadout" -LINE107="STATE000; if dch_llel CALL FrameReadoutTDCllel" -LINE108="STATE000; if dch_ser CALL FrameReadoutTDCser" -LINE109="STATE000; framecount--" -LINE110="STATE000; RETURN ReadoutKeep" -LINE111=FrameReadoutTDCllel: -LINE112="STATE000; CALL Wait1us(50)" -LINE113="STATE000; CALL DumpPixels(1094)" -LINE114="STATE000; CALL FrameReadoutTDCllel_Innerloop(68)" -LINE115="STATE000; CALL LineReadout(44)" -LINE116="STATE000; CALL ReadoutEnd" -LINE117="STATE000; CALL linbindecr(llel_bin)" -LINE118="STATE000; CALL linbinincr" -LINE119="STATE000; RETURN FrameReadoutTDCllel" -LINE120=FrameReadoutTDCllel_Innerloop: -LINE121="STATE000; CALL LineReadoutAOnly(60)" -LINE122="STATE000; CALL ForwardParallelSectionBNoCoincident(llel_bin)" -LINE123="STATE000; CALL linbinincr(1)" -LINE124="STATE000; RETURN FrameReadoutTDCllel_Innerloop" -LINE125=FrameReadoutTDCser: -LINE126="STATE000; CALL Wait1us(50)" -LINE127="STATE000; CALL DumpPixels(1094)" -LINE128="STATE000; CALL LineReadoutTDCser(4124)" -LINE129="STATE000; CALL ReadoutEnd" -LINE130="STATE000; RETURN FrameReadoutTDCser" -LINE131=LineReadoutTDCser: -LINE132="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" -LINE133="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE134="STATE000; CALL TDCser_Innerloop(49)" -LINE135="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(15)" -LINE136="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(15)" -LINE137="STATE000; if !dsch_ser_dump_bcs CALL TDCser_ReadoutLoop" -LINE138="STATE000; if dsch_ser_dump_bcs CALL TDCser_ReadoutLoopDumpBright" -LINE139="STATE000; if !dsch_ser_direction CALL EvacuateF" -LINE140="STATE000; if dsch_ser_direction CALL EvacuateE" -LINE141="STATE000; CALL serbindecr(ser_bin)" -LINE142="STATE000; CALL serbinincr" -LINE143="STATE000; RETURN LineReadoutTDCser" -LINE144=TDCser_ReadoutLoopDumpBright: -LINE145="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(50)" -LINE146="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(50)" -LINE147="STATE000; CALL TDCser_ReadoutLoopDumpBright_Inner(49)" -LINE148="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(15)" -LINE149="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(15)" -LINE150="STATE000; RETURN TDCser_ReadoutLoopDumpBright" -LINE151=TDCser_ReadoutLoop: -LINE152="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(1094)" -LINE153="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(1094)" -LINE154="STATE000; RETURN TDCser_ReadoutLoop" -LINE155=TDCser_ReadoutLoopDumpBright_Inner: -LINE156="STATE000; CALL trigpix" -LINE157="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly" -LINE158="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly" -LINE159="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(20)" -LINE160="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(20)" -LINE161="STATE000; RETURN TDCser_ReadoutLoopDumpBright_Inner" -LINE162=TDCser_Innerloop: -LINE163="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(21)" -LINE164="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(21)" -LINE165="STATE000; if !dsch_ser_direction CALL SerialFBackwards(ser_bin)" -LINE166="STATE000; if dsch_ser_direction CALL SerialEBackwards(ser_bin)" -LINE167="STATE000; CALL serbinincr(1)" -LINE168="STATE000; RETURN TDCser_Innerloop" -LINE169=serbinincr: -LINE170="STATE000; ser_bin++" -LINE171="STATE000; RETURN serbinincr" -LINE172=serbindecr: -LINE173="STATE000; ser_bin--" -LINE174="STATE000; RETURN serbindecr" -LINE175=FrameReadout: -LINE176="STATE000; CALL Wait1us(50)" -LINE177="STATE000; CALL DumpPixels(1094)" -LINE178="STATE000; if tdi_wait_us CALL OpenShutter" -LINE179="STATE000; IF llel_seq CALL LineReadout(4124)" -LINE180="STATE000; IF llel_coincident CALL LineReadoutCoincident(4124)" -LINE181="STATE000; IF slow_pix CALL LineReadoutSlowPix(4124)" -LINE182="STATE000; IF linbin CALL LineReadout(90)" -LINE183="STATE000; IF linbin CALL LineReadoutFast(4034)" -LINE184="STATE000; if tdi_wait_us CALL CloseShutter" -LINE185="STATE000; CALL ReadoutEnd" -LINE186="STATE000; if linbin CALL linbindecr(llel_bin)" -LINE187="STATE000; if linbin CALL linbinincr" -LINE188="STATE000; RETURN FrameReadout" -LINE189=Wait1s: -LINE190="STATE000; if abortintegrate CALL abortintegration" -LINE191="STATE000; CALL Wait1ms(1000)" -LINE192="STATE000; RETURN Wait1s" -LINE193=abortintegration: -LINE194="STATE000; CALL CloseShutter" -LINE195="STATE000; GOTO StartSeqSummitMode" -LINE196=LineReadoutSlowPix: -LINE197="STATE000; CALL ParallelForwardNoCoincident" -LINE198="STATE000; CALL Wait1us(50)" -LINE199="STATE000; CALL ReadPixelsSlow(1094)" -LINE200="STATE000; CALL Wait1us(10)" -LINE201="STATE000; RETURN LineReadoutSlowPix" -LINE202=linbinincrcheck: -LINE203="STATE000; if framecount CALL linbinincr" -LINE204="STATE000; RETURN linbinincrcheck" -LINE205=linbinincr: -LINE206="STATE000; llel_bin++" -LINE207="STATE000; RETURN linbinincr" -LINE208=linbindecr: -LINE209="STATE000; llel_bin--" -LINE210="STATE000; RETURN linbindecr" -LINE211=LineReadoutFast: -LINE212="STATE000; CALL ParallelForwardNoCoincident" -LINE213="STATE000; CALL ReadPixels(1094)" -LINE214="STATE000; RETURN LineReadoutFast" -LINE215=LineReadout: -LINE216="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" -LINE217="STATE000; if linbin CALL linbinincr" -LINE218="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE219="STATE000; if enable_ser_bin CALL ReadPixels(50)" -LINE220="STATE000; if enable_ser_bin CALL SerBinReadPixels(1024)" -LINE221="STATE000; if enable_ser_bin CALL ReadPixels(20)" -LINE222="STATE000; if !enable_ser_bin CALL ReadPixels(1094)" -LINE223="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" -LINE224="STATE000; RETURN LineReadout" -LINE225=SerBinReadPixels: -LINE226="STATE000; CALL PrepSerBin" -LINE227="STATE000; CALL serbindecr" -LINE228="STATE000; CALL SerialBinForwards(ser_bin)" -LINE229="STATE000; CALL ReadPixels" -LINE230="STATE000; CALL serbinincr" -LINE231="STATE000; RETURN SerBinReadPixels" -LINE232=LineReadoutCoincident: -LINE233="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" -LINE234="STATE000; CALL ParallelForwardSegment1" -LINE235="STATE000; CALL TransferToSerialRegisterCoincident" -LINE236="STATE000; CALL ReadPixels(364)" -LINE237="STATE000; CALL ParallelForwardSegment2" -LINE238="STATE000; CALL ReadPixels(364)" -LINE239="STATE000; CALL ParallelForwardSegment3" -LINE240="STATE000; CALL ReadPixels(364) CALL ReadPixels(2)" -LINE241="STATE000; RETURN LineReadoutCoincident" -LINE242=LineReadoutAOnly: -LINE243="STATE000; CALL ForwardParallelSectionANoCoincident" -LINE244="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE245="STATE000; CALL ReadPixels(1094)" -LINE246="STATE000; RETURN LineReadoutAOnly" -LINE247=LineReadoutAOnlyCoincident: -LINE248="STATE000; CALL TransferToSerialRegisterCoincident" -LINE249="STATE000; CALL ReadPixels(50)" -LINE250="STATE000; CALL ParallelForwardSectionASegment1" -LINE251="STATE000; CALL ReadPixels(364)" -LINE252="STATE000; CALL ParallelForwardSectionASegment2" -LINE253="STATE000; CALL ReadPixels(364)" -LINE254="STATE000; CALL ParallelForwardSectionASegment3" -LINE255="STATE000; CALL ReadPixels(364)" -LINE256="STATE000; CALL ReadPixels(2)" -LINE257="STATE000; RETURN LineReadoutAOnlyCoincident" -LINE258=Wait1us: -LINE259="STATE001; STATE000(98)" -LINE260="STATE000; RETURN Wait1us" -LINE261=Wait1ms: -LINE262="STATE001; STATE000(99998)" -LINE263="STATE000; RETURN Wait1ms" -LINE264=KeepThisFrame: -LINE265="STATE002;" -LINE266="STATE003; RETURN KeepThisFrame" -LINE267=InitialSetup: -LINE268="STATE004; STATE000(999)" -LINE269="STATE005; STATE000(9999)" -LINE270="STATE001; RETURN InitialSetup" -LINE271=InitialSetupFCS: -LINE272="STATE004; STATE000(999)" -LINE273="STATE006; STATE000(9999)" -LINE274="STATE001; RETURN InitialSetupFCS" -LINE275=OpenShutter: -LINE276="STATE007; RETURN OpenShutter" -LINE277=CloseShutter: -LINE278="STATE008; RETURN CloseShutter" -LINE279=ReadoutBegin: -LINE280="STATE009; RETURN ReadoutBegin" -LINE281=ReadoutEnd: -LINE282="STATE010; RETURN ReadoutEnd" -LINE283=TransferToSerialRegisterCoincident: -LINE284="STATE011; STATE000(999)" -LINE285="STATE012; STATE000(49)" -LINE286="STATE013; STATE000(49)" -LINE287="STATE014; RETURN TransferToSerialRegisterCoincident" -LINE288=ParallelForwardNoCoincident: -LINE289="STATE001; STATE000(999)" -LINE290="STATE015; STATE000(999)" -LINE291="STATE016; STATE000(999)" -LINE292="STATE017; STATE000(999)" -LINE293="STATE018; STATE000(199)" -LINE294="STATE019; STATE000(49)" -LINE295="STATE020; STATE000(299)" -LINE296="STATE021; STATE000(49)" -LINE297="STATE014; STATE000(399)" -LINE298="STATE022; STATE000(999)" -LINE299="STATE023; STATE000(999)" -LINE300="STATE001; RETURN ParallelForwardNoCoincident" -LINE301=ParallelForwardSegment1: -LINE302="STATE024; RETURN ParallelForwardSegment1" -LINE303=ParallelForwardSegment2: -LINE304="STATE025; RETURN ParallelForwardSegment2" -LINE305=ParallelForwardSegment3: -LINE306="STATE026; RETURN ParallelForwardSegment3" -LINE307=OutputTestSetup: -LINE308="STATE027; STATE000(999999)" -LINE309="STATE028; STATE000(999999)" -LINE310="STATE029; RETURN OutputTestSetup" -LINE311=PulseTGA: -LINE312="STATE030; STATE000(2499)" -LINE313="STATE031; STATE000(2499)" -LINE314="STATE032; RETURN PulseTGA" -LINE315=VRDModulate: -LINE316="STATE033; STATE000(999999)" -LINE317="STATE034; STATE000(99)" -LINE318="STATE032; STATE000(99)" -LINE319="STATE035; STATE000(999999)" -LINE320="STATE034; STATE000(99)" -LINE321="STATE032; STATE000(99)" -LINE322="STATE036; STATE000(999999)" -LINE323="STATE034; STATE000(99)" -LINE324="STATE032; STATE000(99)" -LINE325="STATE037; STATE000(999999)" -LINE326="STATE034; STATE000(99)" -LINE327="STATE032; STATE000(99)" -LINE328="STATE038; STATE000(999999)" -LINE329="STATE034; STATE000(99)" -LINE330="STATE032; STATE000(99)" -LINE331="STATE039; STATE000(999999)" -LINE332="STATE034; STATE000(99)" -LINE333="STATE032; STATE000(99)" -LINE334="STATE040; STATE000(999999)" -LINE335="STATE034; STATE000(99)" -LINE336="STATE032; STATE000(99)" -LINE337="STATE039; STATE000(999999)" -LINE338="STATE034; STATE000(99)" -LINE339="STATE032; STATE000(99)" -LINE340="STATE038; STATE000(999999)" -LINE341="STATE034; STATE000(99)" -LINE342="STATE032; STATE000(99)" -LINE343="STATE037; STATE000(999999)" -LINE344="STATE034; STATE000(99)" -LINE345="STATE032; STATE000(99)" -LINE346="STATE036; STATE000(999999)" -LINE347="STATE034; STATE000(99)" -LINE348="STATE032; STATE000(99)" -LINE349="STATE035; RETURN VRDModulate" -LINE350=ReadPixels: -LINE351="STATE041;" -LINE352="STATE042; STATE000(58)" -LINE353="STATE043;" -LINE354="STATE032; STATE000(298)" -LINE355="STATE044; STATE000(199)" -LINE356="STATE045; STATE000(59)" -LINE357="STATE001; RETURN ReadPixels" -LINE358=ReadPixelsSlow: -LINE359="STATE046;" -LINE360="STATE042; STATE000(13)" -LINE361="STATE047; STATE000(14)" -LINE362="STATE048; STATE000(4)" -LINE363="STATE049; STATE000(9)" -LINE364="STATE050; STATE000(15)" -LINE365="STATE032; STATE000(118)" -LINE366="STATE051; STATE000(14)" -LINE367="STATE052; STATE000(14)" -LINE368="STATE044; STATE000(116)" -LINE369="STATE001; RETURN ReadPixelsSlow" -LINE370=ForwardParallelSectionANoCoincident: -LINE371="STATE001; STATE000(999)" -LINE372="STATE053; STATE000(999)" -LINE373="STATE054; STATE000(999)" -LINE374="STATE055; STATE000(999)" -LINE375="STATE056; STATE000(199)" -LINE376="STATE019; STATE000(49)" -LINE377="STATE020; STATE000(299)" -LINE378="STATE057; STATE000(49)" -LINE379="STATE014; STATE000(399)" -LINE380="STATE058; STATE000(999)" -LINE381="STATE059; STATE000(999)" -LINE382="STATE001; RETURN ForwardParallelSectionANoCoincident" -LINE383=ForwardParallelSectionBNoCoincident: -LINE384="STATE001; STATE000(999)" -LINE385="STATE060; STATE000(999)" -LINE386="STATE061; STATE000(999)" -LINE387="STATE062; STATE000(999)" -LINE388="STATE063; STATE000(999)" -LINE389="STATE064; STATE000(999)" -LINE390="STATE065; STATE000(999)" -LINE391="STATE001; RETURN ForwardParallelSectionBNoCoincident" -LINE392=ForwardParallelSectionA: -LINE393="STATE066; STATE000(364665)" -LINE394="STATE067; STATE000(364666)" -LINE395="STATE068; RETURN ForwardParallelSectionA" -LINE396=ForwardParallelSectionB: -LINE397="STATE069; STATE000(364665)" -LINE398="STATE070; STATE000(364666)" -LINE399="STATE071; RETURN ForwardParallelSectionB" -LINE400=ForwardParallelAll: -LINE401="STATE025; STATE000(364665)" -LINE402="STATE026; STATE000(364666)" -LINE403="STATE024; RETURN ForwardParallelAll" -LINE404=ParallelForwardSectionASegment1: -LINE405="STATE066; RETURN ParallelForwardSectionASegment1" -LINE406=ParallelForwardSectionASegment2: -LINE407="STATE067; RETURN ParallelForwardSectionASegment2" -LINE408=ParallelForwardSectionASegment3: -LINE409="STATE068; RETURN ParallelForwardSectionASegment3" -LINE410=Wait10us: -LINE411="STATE000; STATE000(999)" -LINE412="STATE001; RETURN Wait10us" -LINE413=ReadPixelsEOnly: -LINE414="STATE072;" -LINE415="STATE042; STATE000(58)" -LINE416="STATE073;" -LINE417="STATE032; STATE000(298)" -LINE418="STATE044; STATE000(199)" -LINE419="STATE074; STATE000(59)" -LINE420="STATE001; RETURN ReadPixelsEOnly" -LINE421=ReadPixelsFOnly: -LINE422="STATE075;" -LINE423="STATE042; STATE000(58)" -LINE424="STATE076;" -LINE425="STATE032; STATE000(298)" -LINE426="STATE044; STATE000(129)" -LINE427="STATE077; STATE000(79)" -LINE428="STATE001; RETURN ReadPixelsFOnly" -LINE429=PrepSerBin: -LINE430="STATE034; STATE000(39)" -LINE431="STATE048; STATE000(19)" -LINE432="STATE032; RETURN PrepSerBin" -LINE433=SerialBinForwards: -LINE434="STATE078; STATE000(39)" -LINE435="STATE079; STATE000(39)" -LINE436="STATE045; STATE000(39)" -LINE437="STATE078; STATE000(39)" -LINE438="STATE001; RETURN SerialBinForwards" -LINE439=DumpPixels: +LINE89="STATE000; CALL EvacuateEFinish" +LINE90="STATE000; RETURN EvacuateE" +LINE91=EvacuateF: +LINE92="STATE000; CALL EvacuateFStart" +LINE93="STATE000; CALL Wait1ms" +LINE94="STATE000; CALL EvacuateFFinish" +LINE95="STATE000; RETURN EvacuateF" +LINE96=Integrate: +LINE97="STATE000; CALL KeepThisFrame" +LINE98="STATE000; CALL ReadPixels(1094)" +LINE99="STATE000; if illum CALL OpenShutter" +LINE100="STATE000; CALL Wait1ms(integrate_illum_ms)" +LINE101="STATE000; CALL Wait1s(integrate_illum_s)" +LINE102="STATE000; if illum CALL CloseShutter" +LINE103="STATE000; CALL Wait1ms(integrate_ms)" +LINE104="STATE000; CALL Wait1s(integrate_s)" +LINE105="STATE000; RETURN Integrate" +LINE106=ReadoutKeep: +LINE107="STATE000; CALL ReadoutBegin" +LINE108="STATE000; if llel_coincident CALL FrameReadout" +LINE109="STATE000; if llel_seq CALL FrameReadout" +LINE110="STATE000; if slow_pix CALL FrameReadout" +LINE111="STATE000; if linbin CALL FrameReadout" +LINE112="STATE000; if dch_llel CALL FrameReadoutTDCllel" +LINE113="STATE000; if dch_ser CALL FrameReadoutTDCser" +LINE114="STATE000; framecount--" +LINE115="STATE000; RETURN ReadoutKeep" +LINE116=FrameReadoutTDCllel: +LINE117="STATE000; CALL Wait1us(50)" +LINE118="STATE000; CALL DumpPixels(1094)" +LINE119="STATE000; CALL FrameReadoutTDCllel_Innerloop(68)" +LINE120="STATE000; CALL LineReadout(44)" +LINE121="STATE000; CALL ReadoutEnd" +LINE122="STATE000; CALL linbindecr(llel_bin)" +LINE123="STATE000; CALL linbinincr" +LINE124="STATE000; RETURN FrameReadoutTDCllel" +LINE125=FrameReadoutTDCllel_Innerloop: +LINE126="STATE000; CALL LineReadoutAOnly(60)" +LINE127="STATE000; CALL ForwardParallelSectionBNoCoincident(llel_bin)" +LINE128="STATE000; CALL linbinincr(1)" +LINE129="STATE000; RETURN FrameReadoutTDCllel_Innerloop" +LINE130=FrameReadoutTDCser: +LINE131="STATE000; CALL Wait1us(50)" +LINE132="STATE000; CALL DumpPixels(1094)" +LINE133="STATE000; CALL LineReadoutTDCser(4124)" +LINE134="STATE000; CALL ReadoutEnd" +LINE135="STATE000; RETURN FrameReadoutTDCser" +LINE136=LineReadoutTDCser: +LINE137="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE138="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE139="STATE000; CALL TDCser_Innerloop(49)" +LINE140="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(15)" +LINE141="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(15)" +LINE142="STATE000; if !dsch_ser_dump_bcs CALL TDCser_ReadoutLoop" +LINE143="STATE000; if dsch_ser_dump_bcs CALL TDCser_ReadoutLoopDumpBright" +LINE144="STATE000; if !dsch_ser_direction CALL EvacuateF" +LINE145="STATE000; if dsch_ser_direction CALL EvacuateE" +LINE146="STATE000; CALL serbindecr(ser_bin)" +LINE147="STATE000; CALL serbinincr" +LINE148="STATE000; RETURN LineReadoutTDCser" +LINE149=TDCser_ReadoutLoopDumpBright: +LINE150="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(50)" +LINE151="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(50)" +LINE152="STATE000; CALL TDCser_ReadoutLoopDumpBright_Inner(49)" +LINE153="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(15)" +LINE154="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(15)" +LINE155="STATE000; RETURN TDCser_ReadoutLoopDumpBright" +LINE156=TDCser_ReadoutLoop: +LINE157="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(1094)" +LINE158="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(1094)" +LINE159="STATE000; RETURN TDCser_ReadoutLoop" +LINE160=TDCser_ReadoutLoopDumpBright_Inner: +LINE161="STATE000; CALL trigpix" +LINE162="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly" +LINE163="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly" +LINE164="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(20)" +LINE165="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(20)" +LINE166="STATE000; RETURN TDCser_ReadoutLoopDumpBright_Inner" +LINE167=TDCser_Innerloop: +LINE168="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(21)" +LINE169="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(21)" +LINE170="STATE000; if !dsch_ser_direction CALL SerialFBackwards(ser_bin)" +LINE171="STATE000; if dsch_ser_direction CALL SerialEBackwards(ser_bin)" +LINE172="STATE000; CALL serbinincr(1)" +LINE173="STATE000; RETURN TDCser_Innerloop" +LINE174=serbinincr: +LINE175="STATE000; ser_bin++" +LINE176="STATE000; RETURN serbinincr" +LINE177=serbindecr: +LINE178="STATE000; ser_bin--" +LINE179="STATE000; RETURN serbindecr" +LINE180=FrameReadout: +LINE181="STATE000; CALL Wait1us(50)" +LINE182="STATE000; CALL DumpPixels(1094)" +LINE183="STATE000; if tdi_wait_us CALL OpenShutter" +LINE184="STATE000; IF llel_seq CALL LineReadout(4124)" +LINE185="STATE000; IF llel_coincident CALL LineReadoutCoincident(4124)" +LINE186="STATE000; IF slow_pix CALL LineReadoutSlowPix(4124)" +LINE187="STATE000; IF linbin CALL LineReadout(90)" +LINE188="STATE000; IF linbin CALL LineReadoutFast(4034)" +LINE189="STATE000; if tdi_wait_us CALL CloseShutter" +LINE190="STATE000; CALL ReadoutEnd" +LINE191="STATE000; if linbin CALL linbindecr(llel_bin)" +LINE192="STATE000; if linbin CALL linbinincr" +LINE193="STATE000; RETURN FrameReadout" +LINE194=Wait1s: +LINE195="STATE000; if abortintegrate CALL abortintegration" +LINE196="STATE000; CALL Wait1ms(1000)" +LINE197="STATE000; RETURN Wait1s" +LINE198=abortintegration: +LINE199="STATE000; CALL CloseShutter" +LINE200="STATE000; GOTO StartSeqSummitMode" +LINE201=LineReadoutSlowPix: +LINE202="STATE000; CALL ParallelForwardNoCoincident" +LINE203="STATE000; CALL Wait1us(50)" +LINE204="STATE000; CALL ReadPixelsSlow(1094)" +LINE205="STATE000; CALL Wait1us(10)" +LINE206="STATE000; RETURN LineReadoutSlowPix" +LINE207=linbinincrcheck: +LINE208="STATE000; if framecount CALL linbinincr" +LINE209="STATE000; RETURN linbinincrcheck" +LINE210=linbinincr: +LINE211="STATE000; llel_bin++" +LINE212="STATE000; RETURN linbinincr" +LINE213=linbindecr: +LINE214="STATE000; llel_bin--" +LINE215="STATE000; RETURN linbindecr" +LINE216=LineReadoutFast: +LINE217="STATE000; CALL ParallelForwardNoCoincident" +LINE218="STATE000; CALL ReadPixels(1094)" +LINE219="STATE000; RETURN LineReadoutFast" +LINE220=LineReadout: +LINE221="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE222="STATE000; if linbin CALL linbinincr" +LINE223="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE224="STATE000; if enable_ser_bin CALL ReadPixels(50)" +LINE225="STATE000; if enable_ser_bin CALL SerBinReadPixels(1024)" +LINE226="STATE000; if enable_ser_bin CALL ReadPixels(20)" +LINE227="STATE000; if !enable_ser_bin CALL ReadPixels(1094)" +LINE228="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE229="STATE000; RETURN LineReadout" +LINE230=SerBinReadPixels: +LINE231="STATE000; CALL PrepSerBin" +LINE232="STATE000; CALL serbindecr" +LINE233="STATE000; CALL SerialBinForwards(ser_bin)" +LINE234="STATE000; CALL ReadPixels" +LINE235="STATE000; CALL serbinincr" +LINE236="STATE000; RETURN SerBinReadPixels" +LINE237=LineReadoutCoincident: +LINE238="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE239="STATE000; CALL ParallelForwardSegment1" +LINE240="STATE000; CALL TransferToSerialRegisterCoincident" +LINE241="STATE000; CALL ReadPixels(364)" +LINE242="STATE000; CALL ParallelForwardSegment2" +LINE243="STATE000; CALL ReadPixels(364)" +LINE244="STATE000; CALL ParallelForwardSegment3" +LINE245="STATE000; CALL ReadPixels(364) CALL ReadPixels(2)" +LINE246="STATE000; RETURN LineReadoutCoincident" +LINE247=LineReadoutAOnly: +LINE248="STATE000; CALL ForwardParallelSectionANoCoincident" +LINE249="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE250="STATE000; CALL ReadPixels(1094)" +LINE251="STATE000; RETURN LineReadoutAOnly" +LINE252=LineReadoutAOnlyCoincident: +LINE253="STATE000; CALL TransferToSerialRegisterCoincident" +LINE254="STATE000; CALL ReadPixels(50)" +LINE255="STATE000; CALL ParallelForwardSectionASegment1" +LINE256="STATE000; CALL ReadPixels(364)" +LINE257="STATE000; CALL ParallelForwardSectionASegment2" +LINE258="STATE000; CALL ReadPixels(364)" +LINE259="STATE000; CALL ParallelForwardSectionASegment3" +LINE260="STATE000; CALL ReadPixels(364)" +LINE261="STATE000; CALL ReadPixels(2)" +LINE262="STATE000; RETURN LineReadoutAOnlyCoincident" +LINE263=Wait1us: +LINE264="STATE001; STATE000(98)" +LINE265="STATE000; RETURN Wait1us" +LINE266=Wait1ms: +LINE267="STATE001; STATE000(99998)" +LINE268="STATE000; RETURN Wait1ms" +LINE269=KeepThisFrame: +LINE270="STATE002;" +LINE271="STATE003; RETURN KeepThisFrame" +LINE272=InitialSetup: +LINE273="STATE004; STATE000(999)" +LINE274="STATE005; STATE000(9999)" +LINE275="STATE001; RETURN InitialSetup" +LINE276=InitialSetupFCS: +LINE277="STATE006; STATE000(999)" +LINE278="STATE007; STATE000(9999)" +LINE279="STATE001; RETURN InitialSetupFCS" +LINE280=OpenShutter: +LINE281="STATE008; RETURN OpenShutter" +LINE282=CloseShutter: +LINE283="STATE009; RETURN CloseShutter" +LINE284=ReadoutBegin: +LINE285="STATE010; RETURN ReadoutBegin" +LINE286=ReadoutEnd: +LINE287="STATE011; RETURN ReadoutEnd" +LINE288=TransferToSerialRegisterCoincident: +LINE289="STATE012; STATE000(999)" +LINE290="STATE013; STATE000(49)" +LINE291="STATE014; STATE000(49)" +LINE292="STATE015; RETURN TransferToSerialRegisterCoincident" +LINE293=ParallelForwardNoCoincident: +LINE294="STATE001; STATE000(999)" +LINE295="STATE016; STATE000(999)" +LINE296="STATE017; STATE000(999)" +LINE297="STATE018; STATE000(999)" +LINE298="STATE019; STATE000(199)" +LINE299="STATE020; STATE000(49)" +LINE300="STATE021; STATE000(299)" +LINE301="STATE022; STATE000(49)" +LINE302="STATE015; STATE000(399)" +LINE303="STATE023; STATE000(999)" +LINE304="STATE024; STATE000(999)" +LINE305="STATE001; RETURN ParallelForwardNoCoincident" +LINE306=ParallelForwardSegment1: +LINE307="STATE025; RETURN ParallelForwardSegment1" +LINE308=ParallelForwardSegment2: +LINE309="STATE026; RETURN ParallelForwardSegment2" +LINE310=ParallelForwardSegment3: +LINE311="STATE027; RETURN ParallelForwardSegment3" +LINE312=OutputTestSetup: +LINE313="STATE028; STATE000(999999)" +LINE314="STATE029; STATE000(999999)" +LINE315="STATE030; RETURN OutputTestSetup" +LINE316=PulseTGA: +LINE317="STATE031; STATE000(2499)" +LINE318="STATE032; STATE000(2499)" +LINE319="STATE033; RETURN PulseTGA" +LINE320=VRDModulate: +LINE321="STATE034; STATE000(999999)" +LINE322="STATE035; STATE000(99)" +LINE323="STATE033; STATE000(99)" +LINE324="STATE036; STATE000(999999)" +LINE325="STATE035; STATE000(99)" +LINE326="STATE033; STATE000(99)" +LINE327="STATE037; STATE000(999999)" +LINE328="STATE035; STATE000(99)" +LINE329="STATE033; STATE000(99)" +LINE330="STATE038; STATE000(999999)" +LINE331="STATE035; STATE000(99)" +LINE332="STATE033; STATE000(99)" +LINE333="STATE039; STATE000(999999)" +LINE334="STATE035; STATE000(99)" +LINE335="STATE033; STATE000(99)" +LINE336="STATE040; STATE000(999999)" +LINE337="STATE035; STATE000(99)" +LINE338="STATE033; STATE000(99)" +LINE339="STATE041; STATE000(999999)" +LINE340="STATE035; STATE000(99)" +LINE341="STATE033; STATE000(99)" +LINE342="STATE040; STATE000(999999)" +LINE343="STATE035; STATE000(99)" +LINE344="STATE033; STATE000(99)" +LINE345="STATE039; STATE000(999999)" +LINE346="STATE035; STATE000(99)" +LINE347="STATE033; STATE000(99)" +LINE348="STATE038; STATE000(999999)" +LINE349="STATE035; STATE000(99)" +LINE350="STATE033; STATE000(99)" +LINE351="STATE037; STATE000(999999)" +LINE352="STATE035; STATE000(99)" +LINE353="STATE033; STATE000(99)" +LINE354="STATE036; RETURN VRDModulate" +LINE355=ReadPixels: +LINE356="STATE042;" +LINE357="STATE043; STATE000(58)" +LINE358="STATE044;" +LINE359="STATE033; STATE000(298)" +LINE360="STATE045; STATE000(199)" +LINE361="STATE046; STATE000(59)" +LINE362="STATE001; RETURN ReadPixels" +LINE363=ReadPixelsSlow: +LINE364="STATE047;" +LINE365="STATE043; STATE000(13)" +LINE366="STATE048; STATE000(14)" +LINE367="STATE049; STATE000(4)" +LINE368="STATE050; STATE000(9)" +LINE369="STATE051; STATE000(15)" +LINE370="STATE033; STATE000(118)" +LINE371="STATE052; STATE000(14)" +LINE372="STATE053; STATE000(14)" +LINE373="STATE045; STATE000(116)" +LINE374="STATE001; RETURN ReadPixelsSlow" +LINE375=ForwardParallelSectionANoCoincident: +LINE376="STATE001; STATE000(999)" +LINE377="STATE054; STATE000(999)" +LINE378="STATE055; STATE000(999)" +LINE379="STATE056; STATE000(999)" +LINE380="STATE057; STATE000(199)" +LINE381="STATE020; STATE000(49)" +LINE382="STATE021; STATE000(299)" +LINE383="STATE058; STATE000(49)" +LINE384="STATE015; STATE000(399)" +LINE385="STATE059; STATE000(999)" +LINE386="STATE060; STATE000(999)" +LINE387="STATE001; RETURN ForwardParallelSectionANoCoincident" +LINE388=ForwardParallelSectionBNoCoincident: +LINE389="STATE001; STATE000(999)" +LINE390="STATE061; STATE000(999)" +LINE391="STATE062; STATE000(999)" +LINE392="STATE063; STATE000(999)" +LINE393="STATE064; STATE000(999)" +LINE394="STATE065; STATE000(999)" +LINE395="STATE066; STATE000(999)" +LINE396="STATE001; RETURN ForwardParallelSectionBNoCoincident" +LINE397=ForwardParallelSectionA: +LINE398="STATE067; STATE000(364665)" +LINE399="STATE068; STATE000(364666)" +LINE400="STATE069; RETURN ForwardParallelSectionA" +LINE401=ForwardParallelSectionB: +LINE402="STATE070; STATE000(364665)" +LINE403="STATE071; STATE000(364666)" +LINE404="STATE072; RETURN ForwardParallelSectionB" +LINE405=ForwardParallelAll: +LINE406="STATE026; STATE000(364665)" +LINE407="STATE027; STATE000(364666)" +LINE408="STATE025; RETURN ForwardParallelAll" +LINE409=ParallelForwardSectionASegment1: +LINE410="STATE067; RETURN ParallelForwardSectionASegment1" +LINE411=ParallelForwardSectionASegment2: +LINE412="STATE068; RETURN ParallelForwardSectionASegment2" +LINE413=ParallelForwardSectionASegment3: +LINE414="STATE069; RETURN ParallelForwardSectionASegment3" +LINE415=Wait10us: +LINE416="STATE000; STATE000(999)" +LINE417="STATE001; RETURN Wait10us" +LINE418=ReadPixelsEOnly: +LINE419="STATE073;" +LINE420="STATE043; STATE000(58)" +LINE421="STATE074;" +LINE422="STATE033; STATE000(298)" +LINE423="STATE045; STATE000(199)" +LINE424="STATE075; STATE000(59)" +LINE425="STATE001; RETURN ReadPixelsEOnly" +LINE426=ReadPixelsFOnly: +LINE427="STATE076;" +LINE428="STATE043; STATE000(58)" +LINE429="STATE077;" +LINE430="STATE033; STATE000(298)" +LINE431="STATE045; STATE000(129)" +LINE432="STATE078; STATE000(79)" +LINE433="STATE001; RETURN ReadPixelsFOnly" +LINE434=PrepSerBin: +LINE435="STATE035; STATE000(39)" +LINE436="STATE049; STATE000(19)" +LINE437="STATE033; RETURN PrepSerBin" +LINE438=SerialBinForwards: +LINE439="STATE079; STATE000(39)" LINE440="STATE080; STATE000(39)" -LINE441="STATE043; STATE000(19)" -LINE442="STATE032; STATE000(279)" -LINE443="STATE044; STATE000(199)" -LINE444="STATE081; STATE000(59)" -LINE445="STATE001; RETURN DumpPixels" -LINE446=trigpix: -LINE447="STATE082;" -LINE448="STATE083; RETURN trigpix" -LINE449=DumpPixelsEOnly: -LINE450="STATE084; STATE000(39)" -LINE451="STATE073; STATE000(299)" -LINE452="STATE044; STATE000(199)" -LINE453="STATE085; STATE000(59)" -LINE454="STATE001; RETURN DumpPixelsEOnly" -LINE455=DumpPixelsFOnly: -LINE456="STATE086; STATE000(39)" -LINE457="STATE076; STATE000(299)" -LINE458="STATE044; STATE000(129)" -LINE459="STATE087; STATE000(79)" -LINE460="STATE001; RETURN DumpPixelsFOnly" -LINE461=SerialFBackwards: -LINE462="STATE088; STATE000(29)" -LINE463="STATE089; STATE000(29)" -LINE464="STATE090; STATE000(29)" -LINE465="STATE091; STATE000(29)" -LINE466="STATE092; RETURN SerialFBackwards" -LINE467=SerialEBackwards: -LINE468="STATE093; STATE000(29)" -LINE469="STATE094; STATE000(29)" -LINE470="STATE095; STATE000(29)" -LINE471="STATE092; STATE000(29)" -LINE472="STATE091; RETURN SerialEBackwards" -LINE473=EvacuateFFinish: -LINE474="STATE096; STATE000(1999)" -LINE475="STATE097; STATE000(499)" -LINE476="STATE001; RETURN EvacuateFFinish" -LINE477=EvacuateFStart: -LINE478="STATE098; RETURN EvacuateFStart" -LINE479=EvacuateEFinish: -LINE480="STATE096; STATE000(1999)" -LINE481="STATE099; STATE000(499)" -LINE482="STATE001; RETURN EvacuateEFinish" -LINE483=EvacuateEStart: -LINE484="STATE100; RETURN EvacuateEStart" -LINE485=BounceTGTest: -LINE486="STATE101;" -LINE487="STATE083; STATE000(498)" -LINE488="STATE031; STATE000(199)" -LINE489="STATE001; RETURN BounceTGTest" -LINE490=ClampTestInner: -LINE491="STATE101;" -LINE492="STATE083; STATE000(98)" -LINE493="STATE031; STATE000(99)" -LINE494="STATE001; RETURN ClampTestInner" -LINE495=ClampOn: -LINE496="STATE020; RETURN ClampOn" -LINE497=ClampOnFCS: -LINE498="STATE102; RETURN ClampOnFCS" -LINE499=ClampOff: -LINE500="STATE014; RETURN ClampOff" -LINE501=ClampOffFCS: -LINE502="STATE103; RETURN ClampOffFCS" -LINE503=ClampTestLineStart: -LINE504="STATE003; RETURN ClampTestLineStart" -LINE505=TGTestLineStart: -LINE506="STATE104; STATE000(99)" -LINE507="STATE014; RETURN TGTestLineStart" -LINE508=setupTGTest: -LINE509="STATE105; RETURN setupTGTest" -LINE510=FCSParallelForward: -LINE511="STATE106; STATE000(999)" -LINE512="STATE107; STATE000(999)" -LINE513="STATE108; STATE000(999)" -LINE514="STATE109; STATE000(999)" -LINE515="STATE110; STATE000(999)" -LINE516="STATE111; STATE000(999)" -LINE517="STATE001; RETURN FCSParallelForward" -LINE518=FCSSplitReadout: -LINE519="STATE112;" -LINE520="STATE113; STATE000(28)" -LINE521="STATE114; STATE000(29)" -LINE522="STATE115;" -LINE523="STATE116; STATE000(28)" -LINE524="STATE117; STATE000(29)" -LINE525="STATE118; STATE000(29)" -LINE526="STATE119; STATE000(59)" -LINE527="STATE001; RETURN FCSSplitReadout" -LINE528=DumpPixelsFCS: -LINE529="STATE120; STATE000(29)" -LINE530="STATE114; STATE000(29)" -LINE531="STATE121; STATE000(29)" -LINE532="STATE117; STATE000(29)" -LINE533="STATE118; STATE000(29)" -LINE534="STATE122; STATE000(29)" -LINE535="STATE116; RETURN DumpPixelsFCS" -LINES=536 +LINE441="STATE046; STATE000(39)" +LINE442="STATE079; STATE000(39)" +LINE443="STATE001; RETURN SerialBinForwards" +LINE444=DumpPixels: +LINE445="STATE081; STATE000(39)" +LINE446="STATE044; STATE000(19)" +LINE447="STATE033; STATE000(279)" +LINE448="STATE045; STATE000(199)" +LINE449="STATE082; STATE000(59)" +LINE450="STATE001; RETURN DumpPixels" +LINE451=trigpix: +LINE452="STATE083;" +LINE453="STATE084; RETURN trigpix" +LINE454=DumpPixelsEOnly: +LINE455="STATE085; STATE000(39)" +LINE456="STATE074; STATE000(299)" +LINE457="STATE045; STATE000(199)" +LINE458="STATE086; STATE000(59)" +LINE459="STATE001; RETURN DumpPixelsEOnly" +LINE460=DumpPixelsFOnly: +LINE461="STATE087; STATE000(39)" +LINE462="STATE077; STATE000(299)" +LINE463="STATE045; STATE000(129)" +LINE464="STATE088; STATE000(79)" +LINE465="STATE001; RETURN DumpPixelsFOnly" +LINE466=SerialFBackwards: +LINE467="STATE089; STATE000(29)" +LINE468="STATE090; STATE000(29)" +LINE469="STATE091; STATE000(29)" +LINE470="STATE092; STATE000(29)" +LINE471="STATE093; RETURN SerialFBackwards" +LINE472=SerialEBackwards: +LINE473="STATE094; STATE000(29)" +LINE474="STATE095; STATE000(29)" +LINE475="STATE096; STATE000(29)" +LINE476="STATE093; STATE000(29)" +LINE477="STATE092; RETURN SerialEBackwards" +LINE478=EvacuateFFinish: +LINE479="STATE097; STATE000(1999)" +LINE480="STATE098; STATE000(499)" +LINE481="STATE001; RETURN EvacuateFFinish" +LINE482=EvacuateFStart: +LINE483="STATE099; RETURN EvacuateFStart" +LINE484=EvacuateEFinish: +LINE485="STATE097; STATE000(1999)" +LINE486="STATE100; STATE000(499)" +LINE487="STATE001; RETURN EvacuateEFinish" +LINE488=EvacuateEStart: +LINE489="STATE101; RETURN EvacuateEStart" +LINE490=BounceTGTest: +LINE491="STATE102;" +LINE492="STATE084; STATE000(498)" +LINE493="STATE032; STATE000(199)" +LINE494="STATE001; RETURN BounceTGTest" +LINE495=ClampTestInner: +LINE496="STATE102;" +LINE497="STATE084; STATE000(98)" +LINE498="STATE032; STATE000(99)" +LINE499="STATE001; RETURN ClampTestInner" +LINE500=ClampOn: +LINE501="STATE021; RETURN ClampOn" +LINE502=ClampOnFCS: +LINE503="STATE103; RETURN ClampOnFCS" +LINE504=ClampOff: +LINE505="STATE015; RETURN ClampOff" +LINE506=ClampOffFCS: +LINE507="STATE104; RETURN ClampOffFCS" +LINE508=ClampTestLineStart: +LINE509="STATE003; RETURN ClampTestLineStart" +LINE510=TGTestLineStart: +LINE511="STATE105; STATE000(99)" +LINE512="STATE015; RETURN TGTestLineStart" +LINE513=setupTGTest: +LINE514="STATE106; RETURN setupTGTest" +LINE515=FCSParallelForward: +LINE516="STATE107; STATE000(499)" +LINE517="STATE108; STATE000(499)" +LINE518="STATE109; STATE000(499)" +LINE519="STATE110; STATE000(499)" +LINE520="STATE111; STATE000(499)" +LINE521="STATE112; STATE000(499)" +LINE522="STATE113; STATE000(999)" +LINE523="STATE001; RETURN FCSParallelForward" +LINE524=FCSSplitReadout: +LINE525="STATE083;" +LINE526="STATE114; STATE000(239)" +LINE527="STATE115; STATE000(239)" +LINE528="STATE116; STATE000(239)" +LINE529="STATE117; STATE000(239)" +LINE530="STATE118; STATE000(239)" +LINE531="STATE119; STATE000(479)" +LINE532="STATE001; RETURN FCSSplitReadout" +LINE533=DumpPixelsFCS: +LINE534="STATE120; STATE000(239)" +LINE535="STATE115; STATE000(239)" +LINE536="STATE121; STATE000(239)" +LINE537="STATE117; STATE000(239)" +LINE538="STATE118; STATE000(239)" +LINE539="STATE122; STATE000(239)" +LINE540="STATE123; RETURN DumpPixelsFCS" +LINES=541 MOD1\FASTSLEWRATE1=6.6666 MOD1\SLOWSLEWRATE1=0.0303 MOD1\LABEL1=PCLK_B3_2 @@ -755,16 +767,16 @@ MOD9\HVLC_LABEL6=SCI F Reset Drain MOD9\HVLC_V7=0.00 MOD9\HVLC_ORDER7=0 MOD9\HVLC_V8=14.00 -MOD9\HVLC_ORDER8=0 +MOD9\HVLC_ORDER8=2 MOD9\HVLC_LABEL8=FCS1 Reset Drain A MOD9\HVLC_V9=14.00 -MOD9\HVLC_ORDER9=0 +MOD9\HVLC_ORDER9=2 MOD9\HVLC_LABEL9=FCS1 Reset Drain B MOD9\HVLC_V10=14.00 -MOD9\HVLC_ORDER10=0 +MOD9\HVLC_ORDER10=2 MOD9\HVLC_LABEL10=FCS2 Reset Drain A MOD9\HVLC_V11=14.00 -MOD9\HVLC_ORDER11=0 +MOD9\HVLC_ORDER11=2 MOD9\HVLC_LABEL11=FCS2 Reset Drain B MOD9\HVLC_V12=13.00 MOD9\HVLC_ORDER12=1 @@ -792,10 +804,10 @@ MOD9\HVLC_V22=17.00 MOD9\HVLC_ORDER22=2 MOD9\HVLC_LABEL22=SCI2 F Reset Drain MOD9\HVLC_V23=29.30 -MOD9\HVLC_ORDER23=1 +MOD9\HVLC_ORDER23=3 MOD9\HVLC_LABEL23=SCI2 E Output Drain MOD9\HVLC_V24=29.30 -MOD9\HVLC_ORDER24=1 +MOD9\HVLC_ORDER24=3 MOD9\HVLC_LABEL24=SCI2 F Output Drain MOD9\HVHC_ENABLE1=1 MOD9\HVHC_V1=29.3 @@ -810,22 +822,22 @@ MOD9\HVHC_LABEL2=SCI F Output Drain MOD9\HVHC_ENABLE3=1 MOD9\HVHC_V3=24.3 MOD9\HVHC_IL3=4.0 -MOD9\HVHC_ORDER3=0 +MOD9\HVHC_ORDER3=3 MOD9\HVHC_LABEL3=FCS1 Output Drain A MOD9\HVHC_ENABLE4=1 MOD9\HVHC_V4=24.3 MOD9\HVHC_IL4=4.0 -MOD9\HVHC_ORDER4=0 +MOD9\HVHC_ORDER4=3 MOD9\HVHC_LABEL4=FCS1 Output Drain B MOD9\HVHC_ENABLE5=1 MOD9\HVHC_V5=24.3 MOD9\HVHC_IL5=4.0 -MOD9\HVHC_ORDER5=0 +MOD9\HVHC_ORDER5=3 MOD9\HVHC_LABEL5=FCS2 Output Drain A MOD9\HVHC_ENABLE6=1 MOD9\HVHC_V6=24.3 MOD9\HVHC_IL6=4.0 -MOD9\HVHC_ORDER6=0 +MOD9\HVHC_ORDER6=3 MOD9\HVHC_LABEL6=FCS2 Output Drain B MOD10\LVLC_V1=3.3 MOD10\LVLC_ORDER1=6 @@ -853,16 +865,16 @@ MOD10\LVLC_LABEL8=SCI Reset Gate - LOW MOD10\LVLC_V9=0.0 MOD10\LVLC_ORDER9=0 MOD10\LVLC_V10=-4.0 -MOD10\LVLC_ORDER10=0 +MOD10\LVLC_ORDER10=4 MOD10\LVLC_LABEL10=LastGateA FCS 1 MOD10\LVLC_V11=-4.0 -MOD10\LVLC_ORDER11=0 +MOD10\LVLC_ORDER11=4 MOD10\LVLC_LABEL11=LastGateB FCS 1 MOD10\LVLC_V12=-4.0 -MOD10\LVLC_ORDER12=0 +MOD10\LVLC_ORDER12=4 MOD10\LVLC_LABEL12=LastGateA FCS 2 MOD10\LVLC_V13=-4.0 -MOD10\LVLC_ORDER13=0 +MOD10\LVLC_ORDER13=4 MOD10\LVLC_LABEL13=LastGateB FCS 2 MOD10\LVLC_V14=3.3 MOD10\LVLC_ORDER14=0 @@ -1016,20 +1028,20 @@ STATE5\MOD9="0,1,0" STATE5\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE6\NAME=STATE006 STATE6\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE6\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE6\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,2,1,0,2,1,0,,1,1,,1,1" -STATE6\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE6\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,-6,1,0,,1,1,,1,1,,1,1" +STATE6\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE6\MOD12="1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE6\MOD4="0,1,0,0,1,0" STATE6\CONTROL="0,3F" STATE6\MOD9="0,1,0" STATE6\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE7\NAME=STATE007 STATE7\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE7\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE7\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE7\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE7\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE7\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,2,1,0,2,1,0,,1,1,,1,1" +STATE7\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE7\MOD4="0,1,0,0,1,0" -STATE7\CONTROL="1,3E" +STATE7\CONTROL="0,3F" STATE7\MOD9="0,1,0" STATE7\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE8\NAME=STATE008 @@ -1038,50 +1050,50 @@ STATE8\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE8\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE8\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE8\MOD4="0,1,0,0,1,0" -STATE8\CONTROL="0,3E" +STATE8\CONTROL="1,3E" STATE8\MOD9="0,1,0" STATE8\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE9\NAME=STATE009 -STATE9\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE9\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE9\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE9\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE9\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE9\MOD4="0,1,0,0,1,0" -STATE9\CONTROL="4,3B" +STATE9\CONTROL="0,3E" STATE9\MOD9="0,1,0" STATE9\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE10\NAME=STATE010 -STATE10\MOD1=",1,1,,1,1,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,,1,1,,1,1" +STATE10\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1" STATE10\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE10\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE10\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE10\MOD4="0,1,0,0,1,0" -STATE10\CONTROL="0,3F" +STATE10\CONTROL="4,3B" STATE10\MOD9="0,1,0" STATE10\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE11\NAME=STATE011 -STATE11\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE11\MOD1=",1,1,,1,1,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,,1,1,,1,1" STATE11\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE11\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" -STATE11\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE11\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE11\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE11\MOD4="0,1,0,0,1,0" -STATE11\CONTROL="4,3B" +STATE11\CONTROL="0,3F" STATE11\MOD9="0,1,0" STATE11\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE12\NAME=STATE012 STATE12\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE12\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE12\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" -STATE12\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE12\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE12\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE12\MOD4="0,1,0,0,1,0" -STATE12\CONTROL="0,3F" +STATE12\CONTROL="4,3B" STATE12\MOD9="0,1,0" STATE12\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE13\NAME=STATE013 STATE13\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE13\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE13\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE13\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE13\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE13\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE13\MOD4="0,1,0,0,1,0" STATE13\CONTROL="0,3F" STATE13\MOD9="0,1,0" @@ -1089,32 +1101,32 @@ STATE13\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE14\NAME=STATE014 STATE14\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE14\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE14\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE14\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE14\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE14\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE14\MOD4="0,1,0,0,1,0" STATE14\CONTROL="0,3F" STATE14\MOD9="0,1,0" STATE14\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE15\NAME=STATE015 -STATE15\MOD1="10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0" -STATE15\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE15\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" -STATE15\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE15\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE15\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE15\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE15\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE15\MOD4="0,1,0,0,1,0" -STATE15\CONTROL="4,3B" +STATE15\CONTROL="0,3F" STATE15\MOD9="0,1,0" STATE15\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE16\NAME=STATE016 -STATE16\MOD1=",1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1" -STATE16\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE16\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE16\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE16\MOD1="10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0" +STATE16\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE16\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE16\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE16\MOD4="0,1,0,0,1,0" -STATE16\CONTROL="0,3F" +STATE16\CONTROL="4,3B" STATE16\MOD9="0,1,0" STATE16\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE17\NAME=STATE017 -STATE17\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1" +STATE17\MOD1=",1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1" STATE17\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE17\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE17\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1123,28 +1135,28 @@ STATE17\CONTROL="0,3F" STATE17\MOD9="0,1,0" STATE17\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE18\NAME=STATE018 -STATE18\MOD1="0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0" +STATE18\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1" STATE18\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE18\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE18\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE18\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE18\MOD4="0,1,0,0,1,0" STATE18\CONTROL="0,3F" STATE18\MOD9="0,1,0" STATE18\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE19\NAME=STATE019 -STATE19\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE19\MOD2="5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE19\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE19\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE19\MOD1="0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0" +STATE19\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE19\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE19\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE19\MOD4="0,1,0,0,1,0" STATE19\CONTROL="0,3F" STATE19\MOD9="0,1,0" STATE19\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE20\NAME=STATE020 STATE20\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE20\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE20\MOD2="5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE20\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE20\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE20\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE20\MOD4="0,1,0,0,1,0" STATE20\CONTROL="0,3F" STATE20\MOD9="0,1,0" @@ -1152,23 +1164,23 @@ STATE20\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE21\NAME=STATE021 STATE21\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE21\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE21\MOD3=",1,1,1,1,0,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE21\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE21\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE21\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE21\MOD4="0,1,0,0,1,0" STATE21\CONTROL="0,3F" STATE21\MOD9="0,1,0" STATE21\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE22\NAME=STATE022 -STATE22\MOD1=",1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1" +STATE22\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE22\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE22\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE22\MOD3=",1,1,1,1,0,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE22\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE22\MOD4="0,1,0,0,1,0" STATE22\CONTROL="0,3F" STATE22\MOD9="0,1,0" STATE22\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE23\NAME=STATE023 -STATE23\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE23\MOD1=",1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1" STATE23\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE23\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE23\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1177,7 +1189,7 @@ STATE23\CONTROL="0,3F" STATE23\MOD9="0,1,0" STATE23\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE24\NAME=STATE024 -STATE24\MOD1="10,0,0,10,0,0,0,0,0,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,0,0,0,10,0,0,10,0,0" +STATE24\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1" STATE24\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE24\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE24\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1186,7 +1198,7 @@ STATE24\CONTROL="0,3F" STATE24\MOD9="0,1,0" STATE24\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE25\NAME=STATE025 -STATE25\MOD1="0,0,0,0,0,0,,1,1,,1,1,10,0,0,10,0,0,10,0,0,10,0,0,,1,1,,1,1,0,0,0,0,0,0" +STATE25\MOD1="10,0,0,10,0,0,0,0,0,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,0,0,0,10,0,0,10,0,0" STATE25\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE25\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE25\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1195,7 +1207,7 @@ STATE25\CONTROL="0,3F" STATE25\MOD9="0,1,0" STATE25\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE26\NAME=STATE026 -STATE26\MOD1=",1,1,,1,1,10,0,0,10,0,0,0,0,0,0,0,0,0,0,0,0,0,0,10,0,0,10,0,0,,1,1,,1,1" +STATE26\MOD1="0,0,0,0,0,0,,1,1,,1,1,10,0,0,10,0,0,10,0,0,10,0,0,,1,1,,1,1,0,0,0,0,0,0" STATE26\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE26\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE26\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1204,37 +1216,37 @@ STATE26\CONTROL="0,3F" STATE26\MOD9="0,1,0" STATE26\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE27\NAME=STATE027 -STATE27\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE27\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE27\MOD1=",1,1,,1,1,10,0,0,10,0,0,0,0,0,0,0,0,0,0,0,0,0,0,10,0,0,10,0,0,,1,1,,1,1" +STATE27\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE27\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE27\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE27\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE27\MOD4="0,1,0,0,1,0" STATE27\CONTROL="0,3F" -STATE27\MOD9="1,6,17" +STATE27\MOD9="0,1,0" STATE27\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE28\NAME=STATE028 STATE28\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE28\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE28\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" -STATE28\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE28\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE28\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE28\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE28\MOD4="0,1,0,0,1,0" STATE28\CONTROL="0,3F" -STATE28\MOD9="0,1,0" +STATE28\MOD9="1,6,17" STATE28\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE29\NAME=STATE029 -STATE29\MOD1="10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0" +STATE29\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE29\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE29\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE29\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" STATE29\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE29\MOD4="0,1,0,0,1,0" STATE29\CONTROL="0,3F" STATE29\MOD9="0,1,0" STATE29\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE30\NAME=STATE030 -STATE30\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE30\MOD1="10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0" STATE30\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE30\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" -STATE30\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE30\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE30\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE30\MOD4="0,1,0,0,1,0" STATE30\CONTROL="0,3F" STATE30\MOD9="0,1,0" @@ -1242,7 +1254,7 @@ STATE30\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE31\NAME=STATE031 STATE31\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE31\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE31\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE31\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" STATE31\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE31\MOD4="0,1,0,0,1,0" STATE31\CONTROL="0,3F" @@ -1251,8 +1263,8 @@ STATE31\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE32\NAME=STATE032 STATE32\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE32\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE32\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE32\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE32\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE32\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE32\MOD4="0,1,0,0,1,0" STATE32\CONTROL="0,3F" STATE32\MOD9="0,1,0" @@ -1261,28 +1273,28 @@ STATE33\NAME=STATE033 STATE33\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE33\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE33\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE33\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE33\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE33\MOD4="0,1,0,0,1,0" STATE33\CONTROL="0,3F" -STATE33\MOD9="1,6,14" +STATE33\MOD9="0,1,0" STATE33\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE34\NAME=STATE034 STATE34\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE34\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE34\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE34\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE34\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE34\MOD4="0,1,0,0,1,0" STATE34\CONTROL="0,3F" -STATE34\MOD9="0,1,0" +STATE34\MOD9="1,6,14" STATE34\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE35\NAME=STATE035 STATE35\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE35\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE35\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE35\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE35\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE35\MOD4="0,1,0,0,1,0" STATE35\CONTROL="0,3F" -STATE35\MOD9="1,6,14.5" +STATE35\MOD9="0,1,0" STATE35\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE36\NAME=STATE036 STATE36\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1291,7 +1303,7 @@ STATE36\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE36\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE36\MOD4="0,1,0,0,1,0" STATE36\CONTROL="0,3F" -STATE36\MOD9="1,6,15" +STATE36\MOD9="1,6,14.5" STATE36\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE37\NAME=STATE037 STATE37\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1300,7 +1312,7 @@ STATE37\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE37\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE37\MOD4="0,1,0,0,1,0" STATE37\CONTROL="0,3F" -STATE37\MOD9="1,6,15.5" +STATE37\MOD9="1,6,15" STATE37\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE38\NAME=STATE038 STATE38\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1309,7 +1321,7 @@ STATE38\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE38\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE38\MOD4="0,1,0,0,1,0" STATE38\CONTROL="0,3F" -STATE38\MOD9="1,6,16" +STATE38\MOD9="1,6,15.5" STATE38\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE39\NAME=STATE039 STATE39\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1318,7 +1330,7 @@ STATE39\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE39\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE39\MOD4="0,1,0,0,1,0" STATE39\CONTROL="0,3F" -STATE39\MOD9="1,6,16.5" +STATE39\MOD9="1,6,16" STATE39\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE40\NAME=STATE040 STATE40\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1327,40 +1339,40 @@ STATE40\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE40\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE40\MOD4="0,1,0,0,1,0" STATE40\CONTROL="0,3F" -STATE40\MOD9="1,6,17" +STATE40\MOD9="1,6,16.5" STATE40\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE41\NAME=STATE041 STATE41\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE41\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE41\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE41\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE41\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE41\MOD4="0,1,0,0,1,0" -STATE41\CONTROL="8,37" -STATE41\MOD9="0,1,0" +STATE41\CONTROL="0,3F" +STATE41\MOD9="1,6,17" STATE41\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE42\NAME=STATE042 STATE42\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE42\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE42\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE42\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE42\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE42\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE42\MOD4="0,1,0,0,1,0" -STATE42\CONTROL="0,31" +STATE42\CONTROL="8,37" STATE42\MOD9="0,1,0" STATE42\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE43\NAME=STATE043 STATE43\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE43\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE43\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE43\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE43\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE43\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE43\MOD4="0,1,0,0,1,0" -STATE43\CONTROL="0,3F" +STATE43\CONTROL="0,31" STATE43\MOD9="0,1,0" STATE43\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE44\NAME=STATE044 STATE44\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE44\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE44\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE44\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE44\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE44\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE44\MOD4="0,1,0,0,1,0" STATE44\CONTROL="0,3F" STATE44\MOD9="0,1,0" @@ -1368,8 +1380,8 @@ STATE44\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE45\NAME=STATE045 STATE45\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE45\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE45\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE45\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE45\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE45\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE45\MOD4="0,1,0,0,1,0" STATE45\CONTROL="0,3F" STATE45\MOD9="0,1,0" @@ -1377,26 +1389,26 @@ STATE45\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE46\NAME=STATE046 STATE46\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE46\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE46\MOD3=",1,1,,1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE46\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE46\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE46\MOD4="0,1,0,0,1,0" -STATE46\CONTROL="8,37" +STATE46\CONTROL="0,3F" STATE46\MOD9="0,1,0" STATE46\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE47\NAME=STATE047 STATE47\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE47\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE47\MOD3=",1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE47\MOD3=",1,1,,1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE47\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE47\MOD4="0,1,0,0,1,0" -STATE47\CONTROL="0,3F" +STATE47\CONTROL="8,37" STATE47\MOD9="0,1,0" STATE47\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE48\NAME=STATE048 STATE48\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE48\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE48\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE48\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE48\MOD3=",1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE48\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE48\MOD4="0,1,0,0,1,0" STATE48\CONTROL="0,3F" STATE48\MOD9="0,1,0" @@ -1404,8 +1416,8 @@ STATE48\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE49\NAME=STATE049 STATE49\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE49\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE49\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE49\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE49\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE49\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE49\MOD4="0,1,0,0,1,0" STATE49\CONTROL="0,3F" STATE49\MOD9="0,1,0" @@ -1413,7 +1425,7 @@ STATE49\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE50\NAME=STATE050 STATE50\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE50\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE50\MOD3=",1,1,,1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE50\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE50\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE50\MOD4="0,1,0,0,1,0" STATE50\CONTROL="0,3F" @@ -1422,7 +1434,7 @@ STATE50\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE51\NAME=STATE051 STATE51\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE51\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE51\MOD3=",1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE51\MOD3=",1,1,,1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE51\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE51\MOD4="0,1,0,0,1,0" STATE51\CONTROL="0,3F" @@ -1431,32 +1443,32 @@ STATE51\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE52\NAME=STATE052 STATE52\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE52\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE52\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE52\MOD3=",1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE52\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE52\MOD4="0,1,0,0,1,0" STATE52\CONTROL="0,3F" STATE52\MOD9="0,1,0" STATE52\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE53\NAME=STATE053 -STATE53\MOD1=",1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1" -STATE53\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE53\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" -STATE53\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE53\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE53\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE53\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE53\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE53\MOD4="0,1,0,0,1,0" -STATE53\CONTROL="4,3B" +STATE53\CONTROL="0,3F" STATE53\MOD9="0,1,0" STATE53\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE54\NAME=STATE054 -STATE54\MOD1=",1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1" -STATE54\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE54\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE54\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE54\MOD1=",1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1" +STATE54\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE54\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE54\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE54\MOD4="0,1,0,0,1,0" -STATE54\CONTROL="0,3F" +STATE54\CONTROL="4,3B" STATE54\MOD9="0,1,0" STATE54\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE55\NAME=STATE055 -STATE55\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE55\MOD1=",1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1" STATE55\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE55\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE55\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1465,34 +1477,34 @@ STATE55\CONTROL="0,3F" STATE55\MOD9="0,1,0" STATE55\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE56\NAME=STATE056 -STATE56\MOD1=",1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE56\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" STATE56\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE56\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE56\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE56\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE56\MOD4="0,1,0,0,1,0" STATE56\CONTROL="0,3F" STATE56\MOD9="0,1,0" STATE56\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE57\NAME=STATE057 -STATE57\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE57\MOD1=",1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" STATE57\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE57\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE57\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" STATE57\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE57\MOD4="0,1,0,0,1,0" STATE57\CONTROL="0,3F" STATE57\MOD9="0,1,0" STATE57\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE58\NAME=STATE058 -STATE58\MOD1=",1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1" +STATE58\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE58\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE58\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE58\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE58\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE58\MOD4="0,1,0,0,1,0" STATE58\CONTROL="0,3F" STATE58\MOD9="0,1,0" STATE58\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE59\NAME=STATE059 -STATE59\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE59\MOD1=",1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1" STATE59\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE59\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE59\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1501,7 +1513,7 @@ STATE59\CONTROL="0,3F" STATE59\MOD9="0,1,0" STATE59\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE60\NAME=STATE060 -STATE60\MOD1="10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0" +STATE60\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1510,7 +1522,7 @@ STATE60\CONTROL="0,3F" STATE60\MOD9="0,1,0" STATE60\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE61\NAME=STATE061 -STATE61\MOD1=",1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1" +STATE61\MOD1="10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0" STATE61\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE61\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE61\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1519,7 +1531,7 @@ STATE61\CONTROL="0,3F" STATE61\MOD9="0,1,0" STATE61\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE62\NAME=STATE062 -STATE62\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1" +STATE62\MOD1=",1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1" STATE62\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE62\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE62\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1528,7 +1540,7 @@ STATE62\CONTROL="0,3F" STATE62\MOD9="0,1,0" STATE62\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE63\NAME=STATE063 -STATE63\MOD1="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0" +STATE63\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1" STATE63\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE63\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE63\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1537,7 +1549,7 @@ STATE63\CONTROL="0,3F" STATE63\MOD9="0,1,0" STATE63\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE64\NAME=STATE064 -STATE64\MOD1=",1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1" +STATE64\MOD1="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0" STATE64\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE64\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE64\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1546,7 +1558,7 @@ STATE64\CONTROL="0,3F" STATE64\MOD9="0,1,0" STATE64\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE65\NAME=STATE065 -STATE65\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE65\MOD1=",1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1" STATE65\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE65\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE65\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1555,7 +1567,7 @@ STATE65\CONTROL="0,3F" STATE65\MOD9="0,1,0" STATE65\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE66\NAME=STATE066 -STATE66\MOD1=",1,1,0,0,0,,1,1,,1,1,,1,1,10,0,0,10,0,0,,1,1,,1,1,,1,1,0,0,0,,1,1" +STATE66\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" STATE66\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE66\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE66\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1564,7 +1576,7 @@ STATE66\CONTROL="0,3F" STATE66\MOD9="0,1,0" STATE66\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE67\NAME=STATE067 -STATE67\MOD1=",1,1,,1,1,,1,1,10,0,0,,1,1,0,0,0,0,0,0,,1,1,10,0,0,,1,1,,1,1,,1,1" +STATE67\MOD1=",1,1,0,0,0,,1,1,,1,1,,1,1,10,0,0,10,0,0,,1,1,,1,1,,1,1,0,0,0,,1,1" STATE67\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE67\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE67\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1573,7 +1585,7 @@ STATE67\CONTROL="0,3F" STATE67\MOD9="0,1,0" STATE67\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE68\NAME=STATE068 -STATE68\MOD1=",1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1" +STATE68\MOD1=",1,1,,1,1,,1,1,10,0,0,,1,1,0,0,0,0,0,0,,1,1,10,0,0,,1,1,,1,1,,1,1" STATE68\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE68\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE68\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1582,7 +1594,7 @@ STATE68\CONTROL="0,3F" STATE68\MOD9="0,1,0" STATE68\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE69\NAME=STATE069 -STATE69\MOD1="0,0,0,,1,1,,1,1,,1,1,10,0,0,,1,1,,1,1,10,0,0,,1,1,,1,1,,1,1,0,0,0" +STATE69\MOD1=",1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1" STATE69\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE69\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE69\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1591,7 +1603,7 @@ STATE69\CONTROL="0,3F" STATE69\MOD9="0,1,0" STATE69\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE70\NAME=STATE070 -STATE70\MOD1=",1,1,,1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1,,1,1" +STATE70\MOD1="0,0,0,,1,1,,1,1,,1,1,10,0,0,,1,1,,1,1,10,0,0,,1,1,,1,1,,1,1,0,0,0" STATE70\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE70\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE70\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1600,7 +1612,7 @@ STATE70\CONTROL="0,3F" STATE70\MOD9="0,1,0" STATE70\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE71\NAME=STATE071 -STATE71\MOD1="10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0" +STATE71\MOD1=",1,1,,1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1,,1,1" STATE71\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE71\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE71\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1609,28 +1621,28 @@ STATE71\CONTROL="0,3F" STATE71\MOD9="0,1,0" STATE71\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE72\NAME=STATE072 -STATE72\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE72\MOD1="10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0" STATE72\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE72\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE72\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE72\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE72\MOD4="0,1,0,0,1,0" -STATE72\CONTROL="8,37" +STATE72\CONTROL="0,3F" STATE72\MOD9="0,1,0" STATE72\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE73\NAME=STATE073 STATE73\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE73\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE73\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE73\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE73\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE73\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE73\MOD4="0,1,0,0,1,0" -STATE73\CONTROL="0,3F" +STATE73\CONTROL="8,37" STATE73\MOD9="0,1,0" STATE73\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE74\NAME=STATE074 STATE74\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE74\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE74\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE74\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE74\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE74\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE74\MOD4="0,1,0,0,1,0" STATE74\CONTROL="0,3F" STATE74\MOD9="0,1,0" @@ -1638,26 +1650,26 @@ STATE74\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE75\NAME=STATE075 STATE75\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE75\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE75\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE75\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE75\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE75\MOD4="0,1,0,0,1,0" -STATE75\CONTROL="8,37" +STATE75\CONTROL="0,3F" STATE75\MOD9="0,1,0" STATE75\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE76\NAME=STATE076 STATE76\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE76\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE76\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE76\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE76\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE76\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE76\MOD4="0,1,0,0,1,0" -STATE76\CONTROL="0,3F" +STATE76\CONTROL="8,37" STATE76\MOD9="0,1,0" STATE76\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE77\NAME=STATE077 STATE77\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE77\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE77\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE77\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE77\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE77\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE77\MOD4="0,1,0,0,1,0" STATE77\CONTROL="0,3F" STATE77\MOD9="0,1,0" @@ -1665,7 +1677,7 @@ STATE77\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE78\NAME=STATE078 STATE78\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE78\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE78\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE78\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE78\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE78\MOD4="0,1,0,0,1,0" STATE78\CONTROL="0,3F" @@ -1674,7 +1686,7 @@ STATE78\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE79\NAME=STATE079 STATE79\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE79\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE79\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE79\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE79\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE79\MOD4="0,1,0,0,1,0" STATE79\CONTROL="0,3F" @@ -1683,8 +1695,8 @@ STATE79\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE80\NAME=STATE080 STATE80\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE80\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE80\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE80\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE80\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE80\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE80\MOD4="0,1,0,0,1,0" STATE80\CONTROL="0,3F" STATE80\MOD9="0,1,0" @@ -1692,8 +1704,8 @@ STATE80\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE81\NAME=STATE081 STATE81\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE81\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE81\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE81\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE81\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE81\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE81\MOD4="0,1,0,0,1,0" STATE81\CONTROL="0,3F" STATE81\MOD9="0,1,0" @@ -1701,10 +1713,10 @@ STATE81\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE82\NAME=STATE082 STATE82\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE82\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE82\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE82\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE82\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE82\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE82\MOD4="0,1,0,0,1,0" -STATE82\CONTROL="8,37" +STATE82\CONTROL="0,3F" STATE82\MOD9="0,1,0" STATE82\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE83\NAME=STATE083 @@ -1713,23 +1725,23 @@ STATE83\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE83\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE83\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE83\MOD4="0,1,0,0,1,0" -STATE83\CONTROL="0,31" +STATE83\CONTROL="8,37" STATE83\MOD9="0,1,0" STATE83\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE84\NAME=STATE084 STATE84\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE84\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE84\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE84\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE84\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE84\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE84\MOD4="0,1,0,0,1,0" -STATE84\CONTROL="0,3F" +STATE84\CONTROL="0,31" STATE84\MOD9="0,1,0" STATE84\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE85\NAME=STATE085 STATE85\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE85\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE85\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE85\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE85\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE85\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE85\MOD4="0,1,0,0,1,0" STATE85\CONTROL="0,3F" STATE85\MOD9="0,1,0" @@ -1737,8 +1749,8 @@ STATE85\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE86\NAME=STATE086 STATE86\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE86\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE86\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE86\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE86\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE86\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE86\MOD4="0,1,0,0,1,0" STATE86\CONTROL="0,3F" STATE86\MOD9="0,1,0" @@ -1746,8 +1758,8 @@ STATE86\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE87\NAME=STATE087 STATE87\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE87\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE87\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE87\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE87\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE87\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE87\MOD4="0,1,0,0,1,0" STATE87\CONTROL="0,3F" STATE87\MOD9="0,1,0" @@ -1755,8 +1767,8 @@ STATE87\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE88\NAME=STATE088 STATE88\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE88\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE88\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE88\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE88\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE88\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE88\MOD4="0,1,0,0,1,0" STATE88\CONTROL="0,3F" STATE88\MOD9="0,1,0" @@ -1764,7 +1776,7 @@ STATE88\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE89\NAME=STATE089 STATE89\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE89\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE89\MOD3=",1,1,11.5,1,0,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE89\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE89\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE89\MOD4="0,1,0,0,1,0" STATE89\CONTROL="0,3F" @@ -1773,7 +1785,7 @@ STATE89\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE90\NAME=STATE090 STATE90\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE90\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE90\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE90\MOD3=",1,1,11.5,1,0,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE90\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE90\MOD4="0,1,0,0,1,0" STATE90\CONTROL="0,3F" @@ -1782,7 +1794,7 @@ STATE90\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE91\NAME=STATE091 STATE91\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE91\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE91\MOD3=",1,1,,1,1,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE91\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE91\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE91\MOD4="0,1,0,0,1,0" STATE91\CONTROL="0,3F" @@ -1791,7 +1803,7 @@ STATE91\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE92\NAME=STATE092 STATE92\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE92\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE92\MOD3=",1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE92\MOD3=",1,1,,1,1,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE92\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE92\MOD4="0,1,0,0,1,0" STATE92\CONTROL="0,3F" @@ -1800,7 +1812,7 @@ STATE92\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE93\NAME=STATE093 STATE93\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE93\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE93\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE93\MOD3=",1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE93\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE93\MOD4="0,1,0,0,1,0" STATE93\CONTROL="0,3F" @@ -1809,7 +1821,7 @@ STATE93\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE94\NAME=STATE094 STATE94\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE94\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE94\MOD3=",1,1,11.5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE94\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE94\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE94\MOD4="0,1,0,0,1,0" STATE94\CONTROL="0,3F" @@ -1818,7 +1830,7 @@ STATE94\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE95\NAME=STATE095 STATE95\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE95\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE95\MOD3=",1,1,1,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE95\MOD3=",1,1,11.5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE95\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE95\MOD4="0,1,0,0,1,0" STATE95\CONTROL="0,3F" @@ -1827,8 +1839,8 @@ STATE95\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE96\NAME=STATE096 STATE96\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE96\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE96\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE96\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE96\MOD3=",1,1,1,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE96\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE96\MOD4="0,1,0,0,1,0" STATE96\CONTROL="0,3F" STATE96\MOD9="0,1,0" @@ -1836,8 +1848,8 @@ STATE96\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE97\NAME=STATE097 STATE97\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE97\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE97\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE97\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE97\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE97\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE97\MOD4="0,1,0,0,1,0" STATE97\CONTROL="0,3F" STATE97\MOD9="0,1,0" @@ -1845,8 +1857,8 @@ STATE97\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE98\NAME=STATE098 STATE98\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE98\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE98\MOD3=",1,1,11,1,0,,1,1,,1,1,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE98\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE98\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE98\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE98\MOD4="0,1,0,0,1,0" STATE98\CONTROL="0,3F" STATE98\MOD9="0,1,0" @@ -1854,8 +1866,8 @@ STATE98\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE99\NAME=STATE099 STATE99\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE99\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE99\MOD3=",1,1,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE99\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE99\MOD3=",1,1,11,1,0,,1,1,,1,1,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE99\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE99\MOD4="0,1,0,0,1,0" STATE99\CONTROL="0,3F" STATE99\MOD9="0,1,0" @@ -1863,8 +1875,8 @@ STATE99\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE100\NAME=STATE100 STATE100\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE100\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE100\MOD3=",1,1,11,1,0,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE100\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE100\MOD3=",1,1,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE100\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE100\MOD4="0,1,0,0,1,0" STATE100\CONTROL="0,3F" STATE100\MOD9="0,1,0" @@ -1872,26 +1884,26 @@ STATE100\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE101\NAME=STATE101 STATE101\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE101\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE101\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" -STATE101\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE101\MOD3=",1,1,11,1,0,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE101\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE101\MOD4="0,1,0,0,1,0" -STATE101\CONTROL="8,37" +STATE101\CONTROL="0,3F" STATE101\MOD9="0,1,0" STATE101\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE102\NAME=STATE102 STATE102\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE102\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE102\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE102\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE102\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE102\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE102\MOD4="0,1,0,0,1,0" -STATE102\CONTROL="0,3F" +STATE102\CONTROL="8,37" STATE102\MOD9="0,1,0" STATE102\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE103\NAME=STATE103 STATE103\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE103\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE103\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE103\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE103\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE103\MOD4="0,1,0,0,1,0" STATE103\CONTROL="0,3F" STATE103\MOD9="0,1,0" @@ -1900,42 +1912,42 @@ STATE104\NAME=STATE104 STATE104\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE104\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE104\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE104\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE104\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE104\MOD4="0,1,0,0,1,0" -STATE104\CONTROL="4,3B" +STATE104\CONTROL="0,3F" STATE104\MOD9="0,1,0" STATE104\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE105\NAME=STATE105 -STATE105\MOD1="0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0" +STATE105\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE105\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE105\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE105\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE105\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE105\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE105\MOD4="0,1,0,0,1,0" -STATE105\CONTROL="2,3D" +STATE105\CONTROL="4,3B" STATE105\MOD9="0,1,0" STATE105\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE106\NAME=STATE106 -STATE106\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE106\MOD1="0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0" STATE106\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE106\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1" -STATE106\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE106\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE106\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE106\MOD4="0,1,0,0,1,0" -STATE106\CONTROL="0,3F" +STATE106\CONTROL="2,3D" STATE106\MOD9="0,1,0" STATE106\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE107\NAME=STATE107 STATE107\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE107\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE107\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1" -STATE107\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE107\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" +STATE107\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE107\MOD4="0,1,0,0,1,0" -STATE107\CONTROL="0,3F" +STATE107\CONTROL="4,3B" STATE107\MOD9="0,1,0" STATE107\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE108\NAME=STATE108 STATE108\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE108\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE108\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1" +STATE108\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1" STATE108\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE108\MOD4="0,1,0,0,1,0" STATE108\CONTROL="0,3F" @@ -1944,7 +1956,7 @@ STATE108\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE109\NAME=STATE109 STATE109\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE109\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE109\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,,1,1,,1,1,,1,1,,1,1" +STATE109\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1,,1,1" STATE109\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE109\MOD4="0,1,0,0,1,0" STATE109\CONTROL="0,3F" @@ -1953,7 +1965,7 @@ STATE109\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE110\NAME=STATE110 STATE110\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE110\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE110\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1" +STATE110\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1" STATE110\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE110\MOD4="0,1,0,0,1,0" STATE110\CONTROL="0,3F" @@ -1962,42 +1974,42 @@ STATE110\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE111\NAME=STATE111 STATE111\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE111\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE111\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1" -STATE111\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE111\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,,1,1,,1,1,,1,1,,1,1" +STATE111\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE111\MOD4="0,1,0,0,1,0" STATE111\CONTROL="0,3F" STATE111\MOD9="0,1,0" STATE111\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE112\NAME=STATE112 STATE112\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE112\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE112\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE112\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE112\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1" STATE112\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE112\MOD4="0,1,0,0,1,0" -STATE112\CONTROL="8,37" +STATE112\CONTROL="0,3F" STATE112\MOD9="0,1,0" STATE112\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE113\NAME=STATE113 STATE113\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE113\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE113\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE113\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE113\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" +STATE113\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE113\MOD4="0,1,0,0,1,0" -STATE113\CONTROL="0,31" +STATE113\CONTROL="0,3F" STATE113\MOD9="0,1,0" STATE113\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE114\NAME=STATE114 STATE114\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE114\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE114\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,12,1,0,,1,1,5,1,0,,1,1,,1,1" STATE114\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE114\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE114\MOD4="0,1,0,0,1,0" -STATE114\CONTROL="0,3F" +STATE114\CONTROL="0,31" STATE114\MOD9="0,1,0" STATE114\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE115\NAME=STATE115 STATE115\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE115\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1" +STATE115\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE115\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE115\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE115\MOD4="0,1,0,0,1,0" @@ -2006,7 +2018,7 @@ STATE115\MOD9="0,1,0" STATE115\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE116\NAME=STATE116 STATE116\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE116\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE116\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,0,1,0,5,1,0,,1,1,,1,1,,1,1" STATE116\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE116\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE116\MOD4="0,1,0,0,1,0" @@ -2015,7 +2027,7 @@ STATE116\MOD9="0,1,0" STATE116\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE117\NAME=STATE117 STATE117\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE117\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE117\MOD2=",1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1" STATE117\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE117\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE117\MOD4="0,1,0,0,1,0" @@ -2033,7 +2045,7 @@ STATE118\MOD9="0,1,0" STATE118\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE119\NAME=STATE119 STATE119\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE119\MOD2=",1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1" +STATE119\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1" STATE119\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE119\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE119\MOD4="0,1,0,0,1,0" @@ -2042,7 +2054,7 @@ STATE119\MOD9="0,1,0" STATE119\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE120\NAME=STATE120 STATE120\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE120\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE120\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,12,1,0,,1,1,,1,1,,1,1,,1,1" STATE120\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE120\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE120\MOD4="0,1,0,0,1,0" @@ -2051,7 +2063,7 @@ STATE120\MOD9="0,1,0" STATE120\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE121\NAME=STATE121 STATE121\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE121\MOD2=",1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1" +STATE121\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1" STATE121\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE121\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE121\MOD4="0,1,0,0,1,0" @@ -2060,14 +2072,23 @@ STATE121\MOD9="0,1,0" STATE121\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE122\NAME=STATE122 STATE122\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE122\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1" +STATE122\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1" STATE122\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE122\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE122\MOD4="0,1,0,0,1,0" STATE122\CONTROL="0,3F" STATE122\MOD9="0,1,0" STATE122\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" -STATES=123 +STATE123\NAME=STATE123 +STATE123\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE123\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE123\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE123\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE123\MOD4="0,1,0,0,1,0" +STATE123\CONTROL="0,3F" +STATE123\MOD9="0,1,0" +STATE123\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATES=124 [SYSTEM]BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 BACKPLANE_TYPE=1 @@ -2100,3 +2121,19 @@ MOD12_ID=0000000000000000 MOD12_REV=0 MOD12_VERSION=0.0.0 MOD12_TYPE=10 +[MODE_DEFAULT] +ACF:FRAMEMODE=0 +ACF:TAPLINE0="AM37L,-1,100" +ACF:TAPLINE1="AM38R,-1,100" +ACF:TAPLINES=16 +ARCH:HORI_AMPS=2 +ARCH:NUM_DETECT=8 +ARCH:VERT_AMPS=1 +[MODE_FCS] +ACF:FRAMEMODE=0 +ACF:TAPLINE0="AM45L,-1,100" +ACF:TAPLINE1="AM46R,-1,100" +ACF:TAPLINES=2 +ARCH:HORI_AMPS=1 +ARCH:NUM_DETECT=2 +ARCH:VERT_AMPS=1 diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index c1d933c..5fd6bdb 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -29,7 +29,7 @@ RAWSAMPLES = 20000 //ADM module installed in slot 7 -#define FCS_CDS 1 + // NOTE tghere is a re-mapping due to the cameralink cable, // that is not accounted for by the current DEIMOS VIB. @@ -44,36 +44,34 @@ RAWSAMPLES = 20000 -#if SINGLE_DET_TEST +#if 0 //detector currently installed in slot 2 -TAPLINE0 ="AM39L,-1,100" -TAPLINE1 ="AM40R,-1,100" +TAPLINE0="AM39L,-1,100" +TAPLINE1="AM40R,-1,100" TAPLINES=2 FRAMEMODE=0 -BIGBUF = _ARCHON_FRAMEBUFS -LINECOUNT = _LINENUM -PIXELCOUNT = _AMPREADCOLS +BIGBUF=_ARCHON_FRAMEBUFS +LINECOUNT=_LINENUM +PIXELCOUNT=_AMPREADCOLS //RAWSEL = _RAW_SELECT //NOTE RAWSEL of 11 should be E channel of slot 2 -RAWSEL = 11 -RAWSTARTLINE = 0 +RAWSEL=11 +RAWSTARTLINE=0 //to view the last prescan and start of the line //RAWSTARTPIXEL = 48 //to view the end of the line -SHP1 = 120 -SHP2 = 303 -SHD1 = 448 -SHD2 = 575 - +SHP1=120 +SHP2=303 +SHD1=448 +SHD2=575 - -#elifdef FCS_CDS +#elif 0 TAPLINES=2 FRAMEMODE=0 -TAPLINE0 ="AM45L,1,100" -TAPLINE1 ="AM46R,1,100" +TAPLINE0="AM45L,1,100" +TAPLINE1="AM46R,1,100" RAWSEL=49 LINECOUNT = _FCS_LINENUM @@ -88,23 +86,23 @@ RAWSTARTPIXEL=23 #else -FRAMEMODE=2 -TAPLINE0 ="AM37L,-1,100" -TAPLINE1 ="AM38R,-1,100" -TAPLINE2 ="AM39L,-1,100" -TAPLINE3 ="AM40R,-1,100" -TAPLINE4 ="AM41L,-1,100" -TAPLINE5 ="AM42R,-1,100" -TAPLINE6 ="AM43L,-1,100" -TAPLINE7 ="AM44R,-1,100" -TAPLINE8 ="AM47L,-1,100" -TAPLINE9 ="AM48R,-1,100" -TAPLINE10 ="AM49L,-1,100" -TAPLINE11 ="AM50R,-1,100" -TAPLINE12 ="AM51L,-1,100" -TAPLINE13 ="AM52R,-1,100" -TAPLINE14 ="AM53L,-1,100" -TAPLINE15 ="AM54R,-1,100" +FRAMEMODE=0 +TAPLINE0="AM37L,-1,100" +TAPLINE1="AM38R,-1,100" +TAPLINE2="AM39L,-1,100" +TAPLINE3="AM40R,-1,100" +TAPLINE4="AM41L,-1,100" +TAPLINE5="AM42R,-1,100" +TAPLINE6="AM43L,-1,100" +TAPLINE7="AM44R,-1,100" +TAPLINE8="AM47L,-1,100" +TAPLINE9="AM48R,-1,100" +TAPLINE10="AM49L,-1,100" +TAPLINE11="AM50R,-1,100" +TAPLINE12="AM51L,-1,100" +TAPLINE13="AM52R,-1,100" +TAPLINE14="AM53L,-1,100" +TAPLINE15="AM54R,-1,100" TAPLINES=16 diff --git a/src/deimos/deimos.modes b/src/deimos/deimos.modes index b0e9f30..5bdca96 100644 --- a/src/deimos/deimos.modes +++ b/src/deimos/deimos.modes @@ -1,26 +1,14 @@ [MODE_DEFAULT] -ACF:TAPLINES=16 -ACF:TAPLINE0 ="AM37L,-1,100" -ACF:TAPLINE1 ="AM38R,-1,100" -ACF:TAPLINE2 ="AM39L,-1,100" -ACF:TAPLINE3 ="AM40R,-1,100" -ACF:TAPLINE4 ="AM41L,-1,100" -ACF:TAPLINE5 ="AM42R,-1,100" -ACF:TAPLINE6 ="AM43L,-1,100" -ACF:TAPLINE7 ="AM44R,-1,100" -ACF:TAPLINE8 ="AM47L,-1,100" -ACF:TAPLINE9 ="AM48R,-1,100" -ACF:TAPLINE10 ="AM49L,-1,100" -ACF:TAPLINE11 ="AM50R,-1,100" -ACF:TAPLINE12 ="AM51L,-1,100" -ACF:TAPLINE13 ="AM52R,-1,100" -ACF:TAPLINE14 ="AM53L,-1,100" -ACF:TAPLINE15 ="AM54R,-1,100" -ACF:FRAMEMODE=2 +ARCH:NUM_DETECT=8 +ARCH:HORI_AMPS=2 +ARCH:VERT_AMPS=1 +ACF:FRAMEMODE=0 [MODE_FCS] -ACF:TAPLINES=2 -ACF:TAPLINE0 ="AM45L,-1,100" -ACF:TAPLINE1 ="AM46R,-1,100" +ARCH:NUM_DETECT=2 +ARCH:HORI_AMPS=1 +ARCH:VERT_AMPS=1 +ACF:TAPLINE0="AM45L,-1,100" +ACF:TAPLINE1="AM46R,-1,100" ACF:FRAMEMODE=0 diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 7d7cc89..343217b 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -79,18 +79,23 @@ #define SCI_RGBACKUP2 2 : 1 //new VIB assignment #define SCI_SWBACKUP1 2 : 2 //new VIB assignment + #define FCS2_S2L 2 : 3 //new VIB assignment #define FCS1_S2L 2 : 4 //new VIB assignment + #define FCS2_S3L 2 : 5 //new VIB assignmet #define FCS_S1 2 : 6 //new VIB assignment + #define SCI_SWBACKUP2 2 : 7 //new VIB assignment #define FCS_RG 2 : 8 //new VIB assignment + #define FCS_SW 2 : 9 //new VIB assignment #define FCS1_S3L 2 : 10 //new VIB assignment + #define Spare1 2 : 11 //new VIB assignment #define Spare2 2 : 12 //new VIB assignment From e060a1371bc89962dc9abde7d6497a45da9420fc Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 2 Dec 2025 15:17:58 -0800 Subject: [PATCH 168/194] update bias and clock assignments for new TC / VIB rev 0.4 --- src/deimos/deimos.mod | 57 +++++++++++++++++++-------------------- src/deimos/deimos.signals | 4 +-- 2 files changed, 29 insertions(+), 32 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index a40e816..866558d 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -15,8 +15,8 @@ SLOT 1 driverx { DRVX 4 [PCLK_fast,PCLK_slow,1] "PCLK_A2_2"; DRVX 5 [PCLK_fast,PCLK_slow,1] "PCLK_B1_2"; DRVX 6 [PCLK_fast,PCLK_slow,1] "PCLK_A1_2"; - DRVX 7 [PCLK_fast,PCLK_slow,1] "PCLK_B1_1"; - DRVX 8 [PCLK_fast,PCLK_slow,1] "PCLK_A2_1"; + DRVX 7 [PCLK_fast,PCLK_slow,1] "PCLK_A1_1"; + DRVX 8 [PCLK_fast,PCLK_slow,1] "PCLK_B1_1"; DRVX 9 [PCLK_fast,PCLK_slow,1] "PCLK_A2_1"; DRVX 10 [PCLK_fast,PCLK_slow,1] "PCLK_B2_1"; DRVX 11 [PCLK_fast,PCLK_slow,1] "PCLK_A3_1"; @@ -50,7 +50,7 @@ SLOT 3 driverx { DRVX 9 [PCLK_fast_FCS,PCLK_slow_FCS,1] "FCS PPhase2"; DRVX 10 [PCLK_fast_FCS,PCLK_slow_FCS,1] "FCS PPhase1"; DRVX 11 [TG_fast,TG_slow,1] "TGA2"; - DRVX 12 [1,1,0]; + DRVX 12 [1,1,0] "SCI_RGBACKUP1"; } @@ -86,35 +86,35 @@ SLOT 4 xvbias { SLOT 9 hvbias { HVLC 1 [0.00,0]; - HVLC 2 [24.0,1] "SCI Guard Drain"; - HVLC 3 [0.00,0]; + HVLC 2 [24.0,1] "SCI1 Guard Drain"; + HVLC 3 [24.0,1] "SCI2 Guard drain"; HVLC 4 [0.00,0]; - HVLC 5 [17.5,2] "SCI E Reset Drain"; - HVLC 6 [17.5,2] "SCI F Reset Drain"; + HVLC 5 [17.5,2] "SCI1 E Reset Drain"; + HVLC 6 [17.5,2] "SCI1 F Reset Drain"; HVLC 7 [0.00,0]; HVLC 8 [14.00,2] "FCS1 Reset Drain A"; HVLC 9 [14.00,2] "FCS1 Reset Drain B"; HVLC 10 [14.00,2] "FCS2 Reset Drain A"; HVLC 11 [14.00,2] "FCS2 Reset Drain B"; - HVLC 12 [13.00,1] "FCS Overflow Drain"; //TODO: what voltage? - HVLC 13 [0.00,0]; - HVLC 14 [0.00,0]; - HVLC 15 [0.00,0]; - HVLC 16 [0.00,0]; + HVLC 12 [13.00,1] "FCS Overflow Drain"; + HVLC 13 [24.3,1] "FCS1 Output Drain A"; + HVLC 14 [24.3,1] "FCS1 Output Drain B"; + HVLC 15 [24.3,1] "FCS2 Output Drain A"; + HVLC 16 [24.3,1] "FCS2 Output Drain B"; HVLC 17 [0.00,0]; HVLC 18 [0.00,0]; HVLC 19 [0.00,0]; HVLC 20 [0.00,0]; HVLC 21 [17.00,2] "SCI2 E Reset Drain"; HVLC 22 [17.00,2] "SCI2 F Reset Drain"; - HVLC 23 [29.30,3] "SCI2 E Output Drain" ; //TODO: needs re-assignment! - HVLC 24 [29.30,3] "SCI2 F Output Drain"; //TODO: needs re-assignment! - HVHC 1 [29.3,10.0,3,1] "SCI E Output Drain"; - HVHC 2 [29.3,10.0,3,1] "SCI F Output Drain"; - HVHC 3 [24.3,4.0,3,1] "FCS1 Output Drain A"; - HVHC 4 [24.3,4.0,3,1] "FCS1 Output Drain B"; - HVHC 5 [24.3,4.0,3,1] "FCS2 Output Drain A"; - HVHC 6 [24.3,4.0,3,1] "FCS2 Output Drain B"; + HVLC 23 [0.0,0]; + HVLC 24 [0.0,0]; //TODO: needs re-assignment! + HVHC 1 [29.0,10.0,3,1] "SCI E Output Drain"; + HVHC 2 [29.0,10.0,3,1] "SCI F Output Drain"; + HVHC 3 [29.0,10.0,3,1] "SCI2 E Output Drain"; + HVHC 4 [29.0,10.0,3,1] "SCI2 F Output Drain"; + HVHC 5 [0.0,0.0,0,0]; + HVHC 6 [0.0,0.0,0,0]; } SLOT 10 lvbias { @@ -123,19 +123,16 @@ SLOT 10 lvbias { LVLC 3 [3.0,4] "SCI E Output Gate"; LVLC 4 [3.0,4] "SCI F Output Gate"; LVLC 5 [2.0,5] "SCI Summing Well - Low"; // NB goes through a line driver - LVLC 6 [11.0,5] "SCI Summing Well - High"; // NB goes through a line driver - - LVLC 7 [11.50,5] "SCI Reset Gate - HIGH"; // NB at the moment RG low and high are swapped in the cable by accident! -// LVLC 7 [5.50,5] "SCI Reset Gate - Low"; // NB goes through a line driver - // LVLC 8 [11.5,5] "SCI Reset Gate - High"; // NB goes through a line driver - LVLC 8 [5.5,5] "SCI Reset Gate - LOW"; //// NB at the moment RG low and high are swapped in the cable by accident! - LVLC 9 [00.0,0]; + LVLC 6 [11.0,5] "SCI Summing Well - High"; // NB goes through a line driver + LVLC 7 [5.50,5] "SCI Reset Gate - LOW"; + LVLC 8 [11.5,5] "SCI Reset Gate - HIGH"; + LVLC 9 [00.0,0]; LVLC 10 [-4.0,4] "LastGateA FCS 1"; LVLC 11 [-4.0,4] "LastGateB FCS 1"; LVLC 12 [-4.0,4] "LastGateA FCS 2"; LVLC 13 [-4.0,4] "LastGateB FCS 2"; - LVLC 14 [3.3,0] "SCI E Output Gate 2" ; - LVLC 15 [3.3,0] "SCI F Output Gate 2"; + LVLC 14 [3.0,4] "SCI E Output Gate 2" ; + LVLC 15 [3.0,4] "SCI F Output Gate 2"; LVLC 16 [0.0,0] ; LVLC 17 [00.0,0]; LVLC 18 [0.0,0] ; @@ -144,7 +141,7 @@ SLOT 10 lvbias { LVLC 21 [00.0,0]; LVLC 22 [00.0,0] "Video offset FCS"; LVLC 23 [0.50,6] "Video offset SCI"; - LVLC 24 [00.0,0]; + LVLC 24 [0.50,6] "Video offset SCI2"; LVHC 1 [0.00,0.0,0,0]; LVHC 2 [0.00,0.0,0,0]; LVHC 3 [0.00,0.0,0,0]; diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 343217b..089bf8b 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -100,8 +100,8 @@ #define Spare2 2 : 12 //new VIB assignment -#define RG_CLOCKS [3 : 12, SCI_RGBACKUP2] -#define SW_CLOCKS [SCI_SWBACKUP1, 2 : 7] +#define RG_CLOCKS [SCI_RGBACKUP1, SCI_RGBACKUP2] +#define SW_CLOCKS [SCI_SWBACKUP1, SCI_SWBACKUP2] #define TG [TGA1, TGA2] //new VIB assignment From 4d0c258e65400de058c59222599f69fd2f759752 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 2 Dec 2025 16:41:37 -0800 Subject: [PATCH 169/194] add empty line before this #define, otherwise the preprocessor fails to process it properly (yes, really) --- src/deimos/deimos.signals | 1 + 1 file changed, 1 insertion(+) diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 089bf8b..22c26a1 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -73,6 +73,7 @@ #define FCS_P1 3 : 10 // new VIB assignment #define TGA2 3 : 11 // new VIB assignment + #define SCI_RGBACKUP1 3 : 12 //new VIB assignment //** FCS serials and more backups ** From 5f0d9bf73a4e8d58c2ba878f955414481f86ee7e Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 16 Dec 2025 15:29:12 -0800 Subject: [PATCH 170/194] fix buffer size accounting in different modes --- src/deimos/deimos.acf | 154 +++++++++++++++++++++------------------- src/deimos/deimos.cds | 45 ++++++------ src/deimos/deimos.modes | 8 ++- 3 files changed, 109 insertions(+), 98 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index f8ec8f1..744edf4 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -1,32 +1,33 @@ [CONFIG] BIGBUF = 0 RAWSTARTLINE = 0 - RAWSTARTPIXEL = 1061 + RAWSTARTPIXEL = 1061 SAMPLEMODE = 1 RAWENABLE = 1 RAWENDLINE = 800 RAWSAMPLES = 20000 FRAMEMODE=0 -TAPLINE0="AM37L,-1,100" -TAPLINE1="AM38R,-1,100" -TAPLINE2="AM39L,-1,100" -TAPLINE3="AM40R,-1,100" -TAPLINE4="AM41L,-1,100" -TAPLINE5="AM42R,-1,100" -TAPLINE6="AM43L,-1,100" -TAPLINE7="AM44R,-1,100" -TAPLINE8="AM47L,-1,100" -TAPLINE9="AM48R,-1,100" -TAPLINE10="AM49L,-1,100" -TAPLINE11="AM50R,-1,100" -TAPLINE12="AM51L,-1,100" -TAPLINE13="AM52R,-1,100" -TAPLINE14="AM53L,-1,100" -TAPLINE15="AM54R,-1,100" +TAPLINE0="AM37L,1,100" +TAPLINE1="AM38R,1,100" +TAPLINE2="AM39L,1,100" +TAPLINE3="AM40R,1,100" +TAPLINE4="AM41L,1,100" +TAPLINE5="AM42R,1,100" +TAPLINE6="AM43L,1,100" +TAPLINE7="AM44R,1,100" +TAPLINE8="AM47L,1,100" +TAPLINE9="AM48R,1,100" +TAPLINE10="AM49L,1,100" +TAPLINE11="AM50R,1,100" +TAPLINE12="AM51L,1,100" +TAPLINE13="AM52R,1,100" +TAPLINE14="AM53L,1,100" +TAPLINE15="AM54R,1,100" TAPLINES=16 -LINECOUNT = 4125 -PIXELCOUNT = 1094 - RAWSEL = 11 +LINECOUNT=4125 +PIXELCOUNT=1094 +RAWSEL = 11 + RAWSEL = 11 SHP1 = 120 SHP2 = 303 SHD1 = 448 @@ -633,11 +634,11 @@ MOD1\LABEL6=PCLK_A1_2 MOD1\ENABLE7=1 MOD1\FASTSLEWRATE7=6.6666 MOD1\SLOWSLEWRATE7=0.0303 -MOD1\LABEL7=PCLK_B1_1 +MOD1\LABEL7=PCLK_A1_1 MOD1\ENABLE8=1 MOD1\FASTSLEWRATE8=6.6666 MOD1\SLOWSLEWRATE8=0.0303 -MOD1\LABEL8=PCLK_A2_1 +MOD1\LABEL8=PCLK_B1_1 MOD1\ENABLE9=1 MOD1\FASTSLEWRATE9=6.6666 MOD1\SLOWSLEWRATE9=0.0303 @@ -749,21 +750,23 @@ MOD3\LABEL11=TGA2 MOD3\ENABLE12=0 MOD3\FASTSLEWRATE12=1 MOD3\SLOWSLEWRATE12=1 +MOD3\LABEL12=SCI_RGBACKUP1 MOD9\HVLC_V1=0.00 MOD9\HVLC_ORDER1=0 MOD9\HVLC_V2=24.0 MOD9\HVLC_ORDER2=1 -MOD9\HVLC_LABEL2=SCI Guard Drain -MOD9\HVLC_V3=0.00 -MOD9\HVLC_ORDER3=0 +MOD9\HVLC_LABEL2=SCI1 Guard Drain +MOD9\HVLC_V3=24.0 +MOD9\HVLC_ORDER3=1 +MOD9\HVLC_LABEL3=SCI2 Guard drain MOD9\HVLC_V4=0.00 MOD9\HVLC_ORDER4=0 MOD9\HVLC_V5=17.5 MOD9\HVLC_ORDER5=2 -MOD9\HVLC_LABEL5=SCI E Reset Drain +MOD9\HVLC_LABEL5=SCI1 E Reset Drain MOD9\HVLC_V6=17.5 MOD9\HVLC_ORDER6=2 -MOD9\HVLC_LABEL6=SCI F Reset Drain +MOD9\HVLC_LABEL6=SCI1 F Reset Drain MOD9\HVLC_V7=0.00 MOD9\HVLC_ORDER7=0 MOD9\HVLC_V8=14.00 @@ -781,14 +784,18 @@ MOD9\HVLC_LABEL11=FCS2 Reset Drain B MOD9\HVLC_V12=13.00 MOD9\HVLC_ORDER12=1 MOD9\HVLC_LABEL12=FCS Overflow Drain -MOD9\HVLC_V13=0.00 -MOD9\HVLC_ORDER13=0 -MOD9\HVLC_V14=0.00 -MOD9\HVLC_ORDER14=0 -MOD9\HVLC_V15=0.00 -MOD9\HVLC_ORDER15=0 -MOD9\HVLC_V16=0.00 -MOD9\HVLC_ORDER16=0 +MOD9\HVLC_V13=24.3 +MOD9\HVLC_ORDER13=1 +MOD9\HVLC_LABEL13=FCS1 Output Drain A +MOD9\HVLC_V14=24.3 +MOD9\HVLC_ORDER14=1 +MOD9\HVLC_LABEL14=FCS1 Output Drain B +MOD9\HVLC_V15=24.3 +MOD9\HVLC_ORDER15=1 +MOD9\HVLC_LABEL15=FCS2 Output Drain A +MOD9\HVLC_V16=24.3 +MOD9\HVLC_ORDER16=1 +MOD9\HVLC_LABEL16=FCS2 Output Drain B MOD9\HVLC_V17=0.00 MOD9\HVLC_ORDER17=0 MOD9\HVLC_V18=0.00 @@ -803,42 +810,38 @@ MOD9\HVLC_LABEL21=SCI2 E Reset Drain MOD9\HVLC_V22=17.00 MOD9\HVLC_ORDER22=2 MOD9\HVLC_LABEL22=SCI2 F Reset Drain -MOD9\HVLC_V23=29.30 -MOD9\HVLC_ORDER23=3 -MOD9\HVLC_LABEL23=SCI2 E Output Drain -MOD9\HVLC_V24=29.30 -MOD9\HVLC_ORDER24=3 -MOD9\HVLC_LABEL24=SCI2 F Output Drain +MOD9\HVLC_V23=0.0 +MOD9\HVLC_ORDER23=0 +MOD9\HVLC_V24=0.0 +MOD9\HVLC_ORDER24=0 MOD9\HVHC_ENABLE1=1 -MOD9\HVHC_V1=29.3 +MOD9\HVHC_V1=29.0 MOD9\HVHC_IL1=10.0 MOD9\HVHC_ORDER1=3 MOD9\HVHC_LABEL1=SCI E Output Drain MOD9\HVHC_ENABLE2=1 -MOD9\HVHC_V2=29.3 +MOD9\HVHC_V2=29.0 MOD9\HVHC_IL2=10.0 MOD9\HVHC_ORDER2=3 MOD9\HVHC_LABEL2=SCI F Output Drain MOD9\HVHC_ENABLE3=1 -MOD9\HVHC_V3=24.3 -MOD9\HVHC_IL3=4.0 +MOD9\HVHC_V3=29.0 +MOD9\HVHC_IL3=10.0 MOD9\HVHC_ORDER3=3 -MOD9\HVHC_LABEL3=FCS1 Output Drain A +MOD9\HVHC_LABEL3=SCI2 E Output Drain MOD9\HVHC_ENABLE4=1 -MOD9\HVHC_V4=24.3 -MOD9\HVHC_IL4=4.0 +MOD9\HVHC_V4=29.0 +MOD9\HVHC_IL4=10.0 MOD9\HVHC_ORDER4=3 -MOD9\HVHC_LABEL4=FCS1 Output Drain B -MOD9\HVHC_ENABLE5=1 -MOD9\HVHC_V5=24.3 -MOD9\HVHC_IL5=4.0 -MOD9\HVHC_ORDER5=3 -MOD9\HVHC_LABEL5=FCS2 Output Drain A -MOD9\HVHC_ENABLE6=1 -MOD9\HVHC_V6=24.3 -MOD9\HVHC_IL6=4.0 -MOD9\HVHC_ORDER6=3 -MOD9\HVHC_LABEL6=FCS2 Output Drain B +MOD9\HVHC_LABEL4=SCI2 F Output Drain +MOD9\HVHC_ENABLE5=0 +MOD9\HVHC_V5=0.0 +MOD9\HVHC_IL5=0.0 +MOD9\HVHC_ORDER5=0 +MOD9\HVHC_ENABLE6=0 +MOD9\HVHC_V6=0.0 +MOD9\HVHC_IL6=0.0 +MOD9\HVHC_ORDER6=0 MOD10\LVLC_V1=3.3 MOD10\LVLC_ORDER1=6 MOD10\LVLC_LABEL1=LVDS Receiver Output Enable @@ -856,12 +859,12 @@ MOD10\LVLC_LABEL5=SCI Summing Well - Low MOD10\LVLC_V6=11.0 MOD10\LVLC_ORDER6=5 MOD10\LVLC_LABEL6=SCI Summing Well - High -MOD10\LVLC_V7=11.5 +MOD10\LVLC_V7=5.5 MOD10\LVLC_ORDER7=5 -MOD10\LVLC_LABEL7=SCI Reset Gate - HIGH -MOD10\LVLC_V8=5.5 +MOD10\LVLC_LABEL7=SCI Reset Gate - LOW +MOD10\LVLC_V8=11.5 MOD10\LVLC_ORDER8=5 -MOD10\LVLC_LABEL8=SCI Reset Gate - LOW +MOD10\LVLC_LABEL8=SCI Reset Gate - HIGH MOD10\LVLC_V9=0.0 MOD10\LVLC_ORDER9=0 MOD10\LVLC_V10=-4.0 @@ -876,11 +879,11 @@ MOD10\LVLC_LABEL12=LastGateA FCS 2 MOD10\LVLC_V13=-4.0 MOD10\LVLC_ORDER13=4 MOD10\LVLC_LABEL13=LastGateB FCS 2 -MOD10\LVLC_V14=3.3 -MOD10\LVLC_ORDER14=0 +MOD10\LVLC_V14=3.0 +MOD10\LVLC_ORDER14=4 MOD10\LVLC_LABEL14=SCI E Output Gate 2 -MOD10\LVLC_V15=3.3 -MOD10\LVLC_ORDER15=0 +MOD10\LVLC_V15=3.0 +MOD10\LVLC_ORDER15=4 MOD10\LVLC_LABEL15=SCI F Output Gate 2 MOD10\LVLC_V16=0.0 MOD10\LVLC_ORDER16=0 @@ -900,8 +903,9 @@ MOD10\LVLC_LABEL22=Video offset FCS MOD10\LVLC_V23=0.5 MOD10\LVLC_ORDER23=6 MOD10\LVLC_LABEL23=Video offset SCI -MOD10\LVLC_V24=0.0 -MOD10\LVLC_ORDER24=0 +MOD10\LVLC_V24=0.5 +MOD10\LVLC_ORDER24=6 +MOD10\LVLC_LABEL24=Video offset SCI2 MOD10\LVHC_ENABLE1=0 MOD10\LVHC_V1=0.0 MOD10\LVHC_IL1=0.0 @@ -2123,16 +2127,20 @@ MOD12_VERSION=0.0.0 MOD12_TYPE=10 [MODE_DEFAULT] ACF:FRAMEMODE=0 -ACF:TAPLINE0="AM37L,-1,100" -ACF:TAPLINE1="AM38R,-1,100" +ACF:LINECOUNT=4125 +ACF:PIXELCOUNT=1094 +ACF:TAPLINE0="AM37L,1,100" +ACF:TAPLINE1="AM38R,1,100" ACF:TAPLINES=16 ARCH:HORI_AMPS=2 ARCH:NUM_DETECT=8 ARCH:VERT_AMPS=1 [MODE_FCS] ACF:FRAMEMODE=0 -ACF:TAPLINE0="AM45L,-1,100" -ACF:TAPLINE1="AM46R,-1,100" +ACF:LINECOUNT=4116 +ACF:PIXELCOUNT=1069 +ACF:TAPLINE0="AM45L,1,100" +ACF:TAPLINE1="AM46R,1,100" ACF:TAPLINES=2 ARCH:HORI_AMPS=1 ARCH:NUM_DETECT=2 diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 5fd6bdb..15d2a25 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -21,7 +21,7 @@ RAWSTARTLINE = 0 //to view the last prescan and start of the line //RAWSTARTPIXEL = 48 //to view the end of the line - RAWSTARTPIXEL = 1061 +RAWSTARTPIXEL = 1061 SAMPLEMODE = 1 RAWENABLE = _RAW_ENABLE RAWENDLINE = 800 @@ -46,8 +46,8 @@ RAWSAMPLES = 20000 #if 0 //detector currently installed in slot 2 -TAPLINE0="AM39L,-1,100" -TAPLINE1="AM40R,-1,100" +TAPLINE0="AM39L,1,100" +TAPLINE1="AM40R,1,100" TAPLINES=2 FRAMEMODE=0 @@ -87,29 +87,28 @@ RAWSTARTPIXEL=23 #else FRAMEMODE=0 -TAPLINE0="AM37L,-1,100" -TAPLINE1="AM38R,-1,100" -TAPLINE2="AM39L,-1,100" -TAPLINE3="AM40R,-1,100" -TAPLINE4="AM41L,-1,100" -TAPLINE5="AM42R,-1,100" -TAPLINE6="AM43L,-1,100" -TAPLINE7="AM44R,-1,100" -TAPLINE8="AM47L,-1,100" -TAPLINE9="AM48R,-1,100" -TAPLINE10="AM49L,-1,100" -TAPLINE11="AM50R,-1,100" -TAPLINE12="AM51L,-1,100" -TAPLINE13="AM52R,-1,100" -TAPLINE14="AM53L,-1,100" -TAPLINE15="AM54R,-1,100" +TAPLINE0="AM37L,1,100" +TAPLINE1="AM38R,1,100" +TAPLINE2="AM39L,1,100" +TAPLINE3="AM40R,1,100" +TAPLINE4="AM41L,1,100" +TAPLINE5="AM42R,1,100" +TAPLINE6="AM43L,1,100" +TAPLINE7="AM44R,1,100" +TAPLINE8="AM47L,1,100" +TAPLINE9="AM48R,1,100" +TAPLINE10="AM49L,1,100" +TAPLINE11="AM50R,1,100" +TAPLINE12="AM51L,1,100" +TAPLINE13="AM52R,1,100" +TAPLINE14="AM53L,1,100" +TAPLINE15="AM54R,1,100" TAPLINES=16 - -LINECOUNT = _LINENUM -PIXELCOUNT = _AMPREADCOLS - //RAWSEL = _RAW_SELECT +LINECOUNT=_LINENUM +PIXELCOUNT=_AMPREADCOLS +RAWSEL = _RAW_SELECT //NOTE RAWSEL of 11 should be E channel of slot 2 RAWSEL = 11 diff --git a/src/deimos/deimos.modes b/src/deimos/deimos.modes index 5bdca96..35aad49 100644 --- a/src/deimos/deimos.modes +++ b/src/deimos/deimos.modes @@ -3,12 +3,16 @@ ARCH:NUM_DETECT=8 ARCH:HORI_AMPS=2 ARCH:VERT_AMPS=1 ACF:FRAMEMODE=0 +ACF:PIXELCOUNT=1094 +ACF:LINECOUNT=4125 [MODE_FCS] ARCH:NUM_DETECT=2 ARCH:HORI_AMPS=1 ARCH:VERT_AMPS=1 -ACF:TAPLINE0="AM45L,-1,100" -ACF:TAPLINE1="AM46R,-1,100" +ACF:TAPLINE0="AM45L,1,100" +ACF:TAPLINE1="AM46R,1,100" +ACF:LINECOUNT=4116 +ACF:PIXELCOUNT=1069 ACF:FRAMEMODE=0 From ce18955882c4364855c873e24e29243481fc8daa Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 27 Jan 2026 17:32:30 -0800 Subject: [PATCH 171/194] update pinout of LVXBias and LVDS modules for new TC --- src/deimos/deimos.acf | 95 +++++++++++++++++++++++++------------------ src/deimos/deimos.mod | 43 ++++++++++---------- 2 files changed, 78 insertions(+), 60 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index 744edf4..94b630f 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -853,18 +853,14 @@ MOD10\LVLC_LABEL3=SCI E Output Gate MOD10\LVLC_V4=3.0 MOD10\LVLC_ORDER4=4 MOD10\LVLC_LABEL4=SCI F Output Gate -MOD10\LVLC_V5=2.0 -MOD10\LVLC_ORDER5=5 -MOD10\LVLC_LABEL5=SCI Summing Well - Low -MOD10\LVLC_V6=11.0 -MOD10\LVLC_ORDER6=5 -MOD10\LVLC_LABEL6=SCI Summing Well - High -MOD10\LVLC_V7=5.5 -MOD10\LVLC_ORDER7=5 -MOD10\LVLC_LABEL7=SCI Reset Gate - LOW -MOD10\LVLC_V8=11.5 -MOD10\LVLC_ORDER8=5 -MOD10\LVLC_LABEL8=SCI Reset Gate - HIGH +MOD10\LVLC_V5=0.0 +MOD10\LVLC_ORDER5=0 +MOD10\LVLC_V6=0.0 +MOD10\LVLC_ORDER6=0 +MOD10\LVLC_V7=0.0 +MOD10\LVLC_ORDER7=0 +MOD10\LVLC_V8=0.0 +MOD10\LVLC_ORDER8=0 MOD10\LVLC_V9=0.0 MOD10\LVLC_ORDER9=0 MOD10\LVLC_V10=-4.0 @@ -906,22 +902,26 @@ MOD10\LVLC_LABEL23=Video offset SCI MOD10\LVLC_V24=0.5 MOD10\LVLC_ORDER24=6 MOD10\LVLC_LABEL24=Video offset SCI2 -MOD10\LVHC_ENABLE1=0 -MOD10\LVHC_V1=0.0 -MOD10\LVHC_IL1=0.0 -MOD10\LVHC_ORDER1=0 -MOD10\LVHC_ENABLE2=0 -MOD10\LVHC_V2=0.0 -MOD10\LVHC_IL2=0.0 -MOD10\LVHC_ORDER2=0 -MOD10\LVHC_ENABLE3=0 -MOD10\LVHC_V3=0.0 -MOD10\LVHC_IL3=0.0 -MOD10\LVHC_ORDER3=0 -MOD10\LVHC_ENABLE4=0 -MOD10\LVHC_V4=0.0 -MOD10\LVHC_IL4=0.0 -MOD10\LVHC_ORDER4=0 +MOD10\LVHC_ENABLE1=1 +MOD10\LVHC_V1=2.0 +MOD10\LVHC_IL1=20.0 +MOD10\LVHC_ORDER1=5 +MOD10\LVHC_LABEL1=SCI Summing Well - Low +MOD10\LVHC_ENABLE2=1 +MOD10\LVHC_V2=11.0 +MOD10\LVHC_IL2=20.0 +MOD10\LVHC_ORDER2=5 +MOD10\LVHC_LABEL2=SCI Summing Well - High +MOD10\LVHC_ENABLE3=1 +MOD10\LVHC_V3=5.5 +MOD10\LVHC_IL3=20.0 +MOD10\LVHC_ORDER3=5 +MOD10\LVHC_LABEL3=SCI Reset Gate - Low +MOD10\LVHC_ENABLE4=1 +MOD10\LVHC_V4=12.0 +MOD10\LVHC_IL4=20.0 +MOD10\LVHC_ORDER4=5 +MOD10\LVHC_LABEL4=SCI Reset Gate - High MOD10\LVHC_ENABLE5=0 MOD10\LVHC_V5=0.0 MOD10\LVHC_IL5=0.0 @@ -932,25 +932,42 @@ MOD10\LVHC_IL6=0.0 MOD10\LVHC_ORDER6=0 MOD10\DIO_SOURCE1=0 MOD10\DIO_DIR12=0 +MOD10\DIO_LABEL1=Driver Output Enable (unused) +MOD10\DIO_LABEL1=Driver Output Enable (unused) MOD10\DIO_SOURCE2=0 -MOD10\DIO_SOURCE3=0 -MOD10\DIO_DIR34=0 -MOD10\DIO_SOURCE4=0 +MOD10\DIO_LABEL2=Loopback 1 IN +MOD10\DIO_SOURCE3=2 +MOD10\DIO_DIR34=1 +MOD10\DIO_LABEL3=Loopback 1 OUT +MOD10\DIO_LABEL3=Loopback 1 OUT +MOD10\DIO_SOURCE4=2 +MOD10\DIO_LABEL4=Loopback 2 OUT MOD10\DIO_SOURCE5=0 MOD10\DIO_DIR56=0 +MOD10\DIO_LABEL5=Loopback 2 IN +MOD10\DIO_LABEL5=Loopback 2 IN MOD10\DIO_SOURCE6=0 -MOD10\DIO_SOURCE7=0 -MOD10\DIO_DIR78=0 -MOD10\DIO_SOURCE8=0 +MOD10\DIO_LABEL6=Loopback 3 IN +MOD10\DIO_SOURCE7=2 +MOD10\DIO_DIR78=1 +MOD10\DIO_LABEL7=Loopback 3 OUT +MOD10\DIO_LABEL7=Loopback 3 OUT +MOD10\DIO_SOURCE8=2 +MOD10\DIO_LABEL8=Trig out EXT +MOD10\DIO_POWER=1 MOD12\DIO_SOURCE1=0 MOD12\DIO_DIR1=0 -MOD12\DIO_SOURCE2=0 -MOD12\DIO_DIR2=0 +MOD12\DIO_LABEL1=Loopback 4 IN +MOD12\DIO_SOURCE2=2 +MOD12\DIO_DIR2=1 +MOD12\DIO_LABEL2=Loopback 4 OUT MOD12\DIO_SOURCE3=0 MOD12\DIO_DIR3=0 -MOD12\DIO_SOURCE4=0 -MOD12\DIO_DIR4=0 -MOD12\DIO_POWER=0 +MOD12\DIO_LABEL3=Loopback 5 IN +MOD12\DIO_SOURCE4=2 +MOD12\DIO_DIR4=1 +MOD12\DIO_LABEL4=Loopback 5 OUT +MOD12\DIO_POWER=1 MOD4\XVP_V1=0 MOD4\XVP_ORDER1=0 MOD4\XVP_ENABLE1=0 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 866558d..1f48cb1 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -122,10 +122,10 @@ SLOT 10 lvbias { LVLC 2 [00.0,0]; LVLC 3 [3.0,4] "SCI E Output Gate"; LVLC 4 [3.0,4] "SCI F Output Gate"; - LVLC 5 [2.0,5] "SCI Summing Well - Low"; // NB goes through a line driver - LVLC 6 [11.0,5] "SCI Summing Well - High"; // NB goes through a line driver - LVLC 7 [5.50,5] "SCI Reset Gate - LOW"; - LVLC 8 [11.5,5] "SCI Reset Gate - HIGH"; + LVLC 5 [0.0,0] ; // NB goes through a line driver + LVLC 6 [0.0,0]; // NB goes through a line driver + LVLC 7 [0.0,0]; + LVLC 8 [0.0,0]; LVLC 9 [00.0,0]; LVLC 10 [-4.0,4] "LastGateA FCS 1"; LVLC 11 [-4.0,4] "LastGateB FCS 1"; @@ -142,28 +142,29 @@ SLOT 10 lvbias { LVLC 22 [00.0,0] "Video offset FCS"; LVLC 23 [0.50,6] "Video offset SCI"; LVLC 24 [0.50,6] "Video offset SCI2"; - LVHC 1 [0.00,0.0,0,0]; - LVHC 2 [0.00,0.0,0,0]; - LVHC 3 [0.00,0.0,0,0]; - LVHC 4 [0.00,0.0,0,0]; + LVHC 1 [2.00,20.0,5,1] "SCI Summing Well - Low"; + LVHC 2 [11.00,20.0,5,1] "SCI Summing Well - High"; + LVHC 3 [5.50,20.0,5,1] "SCI Reset Gate - Low"; + LVHC 4 [12.00,20.0,5,1] "SCI Reset Gate - High"; LVHC 5 [0.00,0.0,0,0]; LVHC 6 [0.00,0.0,0,0]; - DIO 1 [0,0]; - DIO 2 [0,0]; - DIO 3 [0,0]; - DIO 4 [0,0]; - DIO 5 [0,0]; - DIO 6 [0,0]; - DIO 7 [0,0]; - DIO 8 [0,0]; + DIO 1 [0,0] "Driver Output Enable (unused)"; + DIO 2 [0,0] "Loopback 1 IN"; + DIO 3 [2,1] "Loopback 1 OUT"; + DIO 4 [2, 1] "Loopback 2 OUT"; + DIO 5 [0,0] "Loopback 2 IN"; + DIO 6 [0, 0] "Loopback 3 IN"; + DIO 7 [2,1] "Loopback 3 OUT"; + DIO 8 [2,1] "Trig out EXT"; + DIOPOWER = 1; } SLOT 12 lvds { - DIO 1 [0,0]; - DIO 2 [0,0]; - DIO 3 [0,0]; - DIO 4 [0,0]; - DIOPOWER = 0; + DIO 1 [0,0] "Loopback 4 IN"; + DIO 2 [2,1] "Loopback 4 OUT"; + DIO 3 [0,0] "Loopback 5 IN"; + DIO 4 [2,1] "Loopback 5 OUT"; + DIOPOWER = 1; } From 495a48d1c733302df52eabc09cdb3c1e236b24c3 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 27 Jan 2026 17:50:37 -0800 Subject: [PATCH 172/194] fix backup clock missing slew rates --- src/deimos/deimos.acf | 439 +++++++++++++------------ src/deimos/deimos.mod | 7 +- src/deimos/deimos.seq | 10 +- src/deimos/deimos.waveform | 30 +- src/deimos/voltage_timing_parameters.h | 4 +- 5 files changed, 254 insertions(+), 236 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index 94b630f..8f1a206 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -447,166 +447,166 @@ LINE377="STATE054; STATE000(999)" LINE378="STATE055; STATE000(999)" LINE379="STATE056; STATE000(999)" LINE380="STATE057; STATE000(199)" -LINE381="STATE020; STATE000(49)" +LINE381="STATE058; STATE000(49)" LINE382="STATE021; STATE000(299)" -LINE383="STATE058; STATE000(49)" +LINE383="STATE059; STATE000(49)" LINE384="STATE015; STATE000(399)" -LINE385="STATE059; STATE000(999)" -LINE386="STATE060; STATE000(999)" +LINE385="STATE060; STATE000(999)" +LINE386="STATE061; STATE000(999)" LINE387="STATE001; RETURN ForwardParallelSectionANoCoincident" LINE388=ForwardParallelSectionBNoCoincident: LINE389="STATE001; STATE000(999)" -LINE390="STATE061; STATE000(999)" -LINE391="STATE062; STATE000(999)" -LINE392="STATE063; STATE000(999)" -LINE393="STATE064; STATE000(999)" -LINE394="STATE065; STATE000(999)" -LINE395="STATE066; STATE000(999)" +LINE390="STATE062; STATE000(999)" +LINE391="STATE063; STATE000(999)" +LINE392="STATE064; STATE000(999)" +LINE393="STATE065; STATE000(999)" +LINE394="STATE066; STATE000(999)" +LINE395="STATE067; STATE000(999)" LINE396="STATE001; RETURN ForwardParallelSectionBNoCoincident" LINE397=ForwardParallelSectionA: -LINE398="STATE067; STATE000(364665)" -LINE399="STATE068; STATE000(364666)" -LINE400="STATE069; RETURN ForwardParallelSectionA" +LINE398="STATE068; STATE000(364665)" +LINE399="STATE069; STATE000(364666)" +LINE400="STATE070; RETURN ForwardParallelSectionA" LINE401=ForwardParallelSectionB: -LINE402="STATE070; STATE000(364665)" -LINE403="STATE071; STATE000(364666)" -LINE404="STATE072; RETURN ForwardParallelSectionB" +LINE402="STATE071; STATE000(364665)" +LINE403="STATE072; STATE000(364666)" +LINE404="STATE073; RETURN ForwardParallelSectionB" LINE405=ForwardParallelAll: LINE406="STATE026; STATE000(364665)" LINE407="STATE027; STATE000(364666)" LINE408="STATE025; RETURN ForwardParallelAll" LINE409=ParallelForwardSectionASegment1: -LINE410="STATE067; RETURN ParallelForwardSectionASegment1" +LINE410="STATE068; RETURN ParallelForwardSectionASegment1" LINE411=ParallelForwardSectionASegment2: -LINE412="STATE068; RETURN ParallelForwardSectionASegment2" +LINE412="STATE069; RETURN ParallelForwardSectionASegment2" LINE413=ParallelForwardSectionASegment3: -LINE414="STATE069; RETURN ParallelForwardSectionASegment3" +LINE414="STATE070; RETURN ParallelForwardSectionASegment3" LINE415=Wait10us: LINE416="STATE000; STATE000(999)" LINE417="STATE001; RETURN Wait10us" LINE418=ReadPixelsEOnly: -LINE419="STATE073;" +LINE419="STATE074;" LINE420="STATE043; STATE000(58)" -LINE421="STATE074;" +LINE421="STATE075;" LINE422="STATE033; STATE000(298)" LINE423="STATE045; STATE000(199)" -LINE424="STATE075; STATE000(59)" +LINE424="STATE076; STATE000(59)" LINE425="STATE001; RETURN ReadPixelsEOnly" LINE426=ReadPixelsFOnly: -LINE427="STATE076;" +LINE427="STATE077;" LINE428="STATE043; STATE000(58)" -LINE429="STATE077;" +LINE429="STATE078;" LINE430="STATE033; STATE000(298)" LINE431="STATE045; STATE000(129)" -LINE432="STATE078; STATE000(79)" +LINE432="STATE079; STATE000(79)" LINE433="STATE001; RETURN ReadPixelsFOnly" LINE434=PrepSerBin: LINE435="STATE035; STATE000(39)" LINE436="STATE049; STATE000(19)" LINE437="STATE033; RETURN PrepSerBin" LINE438=SerialBinForwards: -LINE439="STATE079; STATE000(39)" -LINE440="STATE080; STATE000(39)" +LINE439="STATE080; STATE000(39)" +LINE440="STATE081; STATE000(39)" LINE441="STATE046; STATE000(39)" -LINE442="STATE079; STATE000(39)" +LINE442="STATE080; STATE000(39)" LINE443="STATE001; RETURN SerialBinForwards" LINE444=DumpPixels: -LINE445="STATE081; STATE000(39)" +LINE445="STATE082; STATE000(39)" LINE446="STATE044; STATE000(19)" LINE447="STATE033; STATE000(279)" LINE448="STATE045; STATE000(199)" -LINE449="STATE082; STATE000(59)" +LINE449="STATE083; STATE000(59)" LINE450="STATE001; RETURN DumpPixels" LINE451=trigpix: -LINE452="STATE083;" -LINE453="STATE084; RETURN trigpix" +LINE452="STATE084;" +LINE453="STATE085; RETURN trigpix" LINE454=DumpPixelsEOnly: -LINE455="STATE085; STATE000(39)" -LINE456="STATE074; STATE000(299)" +LINE455="STATE086; STATE000(39)" +LINE456="STATE075; STATE000(299)" LINE457="STATE045; STATE000(199)" -LINE458="STATE086; STATE000(59)" +LINE458="STATE087; STATE000(59)" LINE459="STATE001; RETURN DumpPixelsEOnly" LINE460=DumpPixelsFOnly: -LINE461="STATE087; STATE000(39)" -LINE462="STATE077; STATE000(299)" +LINE461="STATE088; STATE000(39)" +LINE462="STATE078; STATE000(299)" LINE463="STATE045; STATE000(129)" -LINE464="STATE088; STATE000(79)" +LINE464="STATE089; STATE000(79)" LINE465="STATE001; RETURN DumpPixelsFOnly" LINE466=SerialFBackwards: -LINE467="STATE089; STATE000(29)" -LINE468="STATE090; STATE000(29)" -LINE469="STATE091; STATE000(29)" -LINE470="STATE092; STATE000(29)" -LINE471="STATE093; RETURN SerialFBackwards" +LINE467="STATE090; STATE000(29)" +LINE468="STATE091; STATE000(29)" +LINE469="STATE092; STATE000(29)" +LINE470="STATE093; STATE000(29)" +LINE471="STATE094; RETURN SerialFBackwards" LINE472=SerialEBackwards: -LINE473="STATE094; STATE000(29)" -LINE474="STATE095; STATE000(29)" -LINE475="STATE096; STATE000(29)" -LINE476="STATE093; STATE000(29)" -LINE477="STATE092; RETURN SerialEBackwards" +LINE473="STATE095; STATE000(29)" +LINE474="STATE096; STATE000(29)" +LINE475="STATE097; STATE000(29)" +LINE476="STATE094; STATE000(29)" +LINE477="STATE093; RETURN SerialEBackwards" LINE478=EvacuateFFinish: -LINE479="STATE097; STATE000(1999)" -LINE480="STATE098; STATE000(499)" +LINE479="STATE098; STATE000(1999)" +LINE480="STATE099; STATE000(499)" LINE481="STATE001; RETURN EvacuateFFinish" LINE482=EvacuateFStart: -LINE483="STATE099; RETURN EvacuateFStart" +LINE483="STATE100; RETURN EvacuateFStart" LINE484=EvacuateEFinish: -LINE485="STATE097; STATE000(1999)" -LINE486="STATE100; STATE000(499)" +LINE485="STATE098; STATE000(1999)" +LINE486="STATE101; STATE000(499)" LINE487="STATE001; RETURN EvacuateEFinish" LINE488=EvacuateEStart: -LINE489="STATE101; RETURN EvacuateEStart" +LINE489="STATE102; RETURN EvacuateEStart" LINE490=BounceTGTest: -LINE491="STATE102;" -LINE492="STATE084; STATE000(498)" +LINE491="STATE103;" +LINE492="STATE085; STATE000(498)" LINE493="STATE032; STATE000(199)" LINE494="STATE001; RETURN BounceTGTest" LINE495=ClampTestInner: -LINE496="STATE102;" -LINE497="STATE084; STATE000(98)" +LINE496="STATE103;" +LINE497="STATE085; STATE000(98)" LINE498="STATE032; STATE000(99)" LINE499="STATE001; RETURN ClampTestInner" LINE500=ClampOn: LINE501="STATE021; RETURN ClampOn" LINE502=ClampOnFCS: -LINE503="STATE103; RETURN ClampOnFCS" +LINE503="STATE104; RETURN ClampOnFCS" LINE504=ClampOff: LINE505="STATE015; RETURN ClampOff" LINE506=ClampOffFCS: -LINE507="STATE104; RETURN ClampOffFCS" +LINE507="STATE105; RETURN ClampOffFCS" LINE508=ClampTestLineStart: LINE509="STATE003; RETURN ClampTestLineStart" LINE510=TGTestLineStart: -LINE511="STATE105; STATE000(99)" +LINE511="STATE106; STATE000(99)" LINE512="STATE015; RETURN TGTestLineStart" LINE513=setupTGTest: -LINE514="STATE106; RETURN setupTGTest" +LINE514="STATE107; RETURN setupTGTest" LINE515=FCSParallelForward: -LINE516="STATE107; STATE000(499)" -LINE517="STATE108; STATE000(499)" -LINE518="STATE109; STATE000(499)" -LINE519="STATE110; STATE000(499)" -LINE520="STATE111; STATE000(499)" -LINE521="STATE112; STATE000(499)" -LINE522="STATE113; STATE000(999)" +LINE516="STATE108; STATE000(499)" +LINE517="STATE109; STATE000(499)" +LINE518="STATE110; STATE000(499)" +LINE519="STATE111; STATE000(499)" +LINE520="STATE112; STATE000(499)" +LINE521="STATE113; STATE000(499)" +LINE522="STATE114; STATE000(999)" LINE523="STATE001; RETURN FCSParallelForward" LINE524=FCSSplitReadout: -LINE525="STATE083;" -LINE526="STATE114; STATE000(239)" -LINE527="STATE115; STATE000(239)" -LINE528="STATE116; STATE000(239)" -LINE529="STATE117; STATE000(239)" -LINE530="STATE118; STATE000(239)" -LINE531="STATE119; STATE000(479)" +LINE525="STATE084;" +LINE526="STATE115; STATE000(239)" +LINE527="STATE116; STATE000(239)" +LINE528="STATE117; STATE000(239)" +LINE529="STATE118; STATE000(239)" +LINE530="STATE119; STATE000(239)" +LINE531="STATE120; STATE000(479)" LINE532="STATE001; RETURN FCSSplitReadout" LINE533=DumpPixelsFCS: -LINE534="STATE120; STATE000(239)" -LINE535="STATE115; STATE000(239)" -LINE536="STATE121; STATE000(239)" -LINE537="STATE117; STATE000(239)" -LINE538="STATE118; STATE000(239)" -LINE539="STATE122; STATE000(239)" -LINE540="STATE123; RETURN DumpPixelsFCS" +LINE534="STATE121; STATE000(239)" +LINE535="STATE116; STATE000(239)" +LINE536="STATE122; STATE000(239)" +LINE537="STATE118; STATE000(239)" +LINE538="STATE119; STATE000(239)" +LINE539="STATE123; STATE000(239)" +LINE540="STATE124; RETURN DumpPixelsFCS" LINES=541 MOD1\FASTSLEWRATE1=6.6666 MOD1\SLOWSLEWRATE1=0.0303 @@ -656,12 +656,12 @@ MOD1\FASTSLEWRATE12=6.6666 MOD1\SLOWSLEWRATE12=0.0303 MOD1\LABEL12=PCLK_B3_1 MOD2\ENABLE1=1 -MOD2\FASTSLEWRATE1=1 -MOD2\SLOWSLEWRATE1=1 +MOD2\FASTSLEWRATE1=50.0000 +MOD2\SLOWSLEWRATE1=3.0030 MOD2\LABEL1=SCI_RGBACKUP2 MOD2\ENABLE2=1 -MOD2\FASTSLEWRATE2=1 -MOD2\SLOWSLEWRATE2=1 +MOD2\FASTSLEWRATE2=50.0000 +MOD2\SLOWSLEWRATE2=3.0030 MOD2\LABEL2=SCI_SWBACKUP1 MOD2\ENABLE3=1 MOD2\FASTSLEWRATE3=50.0000 @@ -680,8 +680,8 @@ MOD2\FASTSLEWRATE6=50.0000 MOD2\SLOWSLEWRATE6=3.0030 MOD2\LABEL6=FCS_S1 MOD2\ENABLE7=1 -MOD2\FASTSLEWRATE7=1 -MOD2\SLOWSLEWRATE7=1 +MOD2\FASTSLEWRATE7=50.0000 +MOD2\SLOWSLEWRATE7=3.0030 MOD2\LABEL7=SCI_SWBACKUP2 MOD2\ENABLE8=1 MOD2\FASTSLEWRATE8=50.0000 @@ -1031,8 +1031,8 @@ STATE3\MOD9="0,1,0" STATE3\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE4\NAME=STATE004 STATE4\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE4\MOD2="5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE4\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE4\MOD2="5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE4\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" STATE4\MOD12="1,0,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE4\MOD4="0,1,0,0,1,0" STATE4\CONTROL="0,3F" @@ -1103,7 +1103,7 @@ STATE11\MOD9="0,1,0" STATE11\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE12\NAME=STATE012 STATE12\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE12\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE12\MOD2=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" STATE12\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" STATE12\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE12\MOD4="0,1,0,0,1,0" @@ -1112,8 +1112,8 @@ STATE12\MOD9="0,1,0" STATE12\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE13\NAME=STATE013 STATE13\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE13\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE13\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE13\MOD2="5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE13\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,5,1,0" STATE13\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE13\MOD4="0,1,0,0,1,0" STATE13\CONTROL="0,3F" @@ -1139,8 +1139,8 @@ STATE15\MOD9="0,1,0" STATE15\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE16\NAME=STATE016 STATE16\MOD1="10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0" -STATE16\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE16\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE16\MOD2="12,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE16\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,12,1,0" STATE16\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE16\MOD4="0,1,0,0,1,0" STATE16\CONTROL="4,3B" @@ -1175,9 +1175,9 @@ STATE19\MOD9="0,1,0" STATE19\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE20\NAME=STATE020 STATE20\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE20\MOD2="5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE20\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE20\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE20\MOD2="5,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE20\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" +STATE20\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE20\MOD4="0,1,0,0,1,0" STATE20\CONTROL="0,3F" STATE20\MOD9="0,1,0" @@ -1247,8 +1247,8 @@ STATE27\MOD9="0,1,0" STATE27\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE28\NAME=STATE028 STATE28\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE28\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE28\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE28\MOD2="12,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE28\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,12,1,0" STATE28\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE28\MOD4="0,1,0,0,1,0" STATE28\CONTROL="0,3F" @@ -1481,8 +1481,8 @@ STATE53\MOD9="0,1,0" STATE53\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE54\NAME=STATE054 STATE54\MOD1=",1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1" -STATE54\MOD2="12,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE54\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE54\MOD2="12,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE54\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,12,1,0" STATE54\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE54\MOD4="0,1,0,0,1,0" STATE54\CONTROL="4,3B" @@ -1517,24 +1517,24 @@ STATE57\MOD9="0,1,0" STATE57\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE58\NAME=STATE058 STATE58\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE58\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE58\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE58\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE58\MOD2="5,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE58\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" +STATE58\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE58\MOD4="0,1,0,0,1,0" STATE58\CONTROL="0,3F" STATE58\MOD9="0,1,0" STATE58\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE59\NAME=STATE059 -STATE59\MOD1=",1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1" +STATE59\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE59\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE59\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE59\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE59\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE59\MOD4="0,1,0,0,1,0" STATE59\CONTROL="0,3F" STATE59\MOD9="0,1,0" STATE59\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE60\NAME=STATE060 -STATE60\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE60\MOD1=",1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1" STATE60\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1543,7 +1543,7 @@ STATE60\CONTROL="0,3F" STATE60\MOD9="0,1,0" STATE60\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE61\NAME=STATE061 -STATE61\MOD1="10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0" +STATE61\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" STATE61\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE61\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE61\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1552,7 +1552,7 @@ STATE61\CONTROL="0,3F" STATE61\MOD9="0,1,0" STATE61\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE62\NAME=STATE062 -STATE62\MOD1=",1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1" +STATE62\MOD1="10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0" STATE62\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE62\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE62\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1561,7 +1561,7 @@ STATE62\CONTROL="0,3F" STATE62\MOD9="0,1,0" STATE62\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE63\NAME=STATE063 -STATE63\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1" +STATE63\MOD1=",1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1" STATE63\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE63\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE63\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1570,7 +1570,7 @@ STATE63\CONTROL="0,3F" STATE63\MOD9="0,1,0" STATE63\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE64\NAME=STATE064 -STATE64\MOD1="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0" +STATE64\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1" STATE64\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE64\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE64\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1579,7 +1579,7 @@ STATE64\CONTROL="0,3F" STATE64\MOD9="0,1,0" STATE64\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE65\NAME=STATE065 -STATE65\MOD1=",1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1" +STATE65\MOD1="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0" STATE65\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE65\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE65\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1588,7 +1588,7 @@ STATE65\CONTROL="0,3F" STATE65\MOD9="0,1,0" STATE65\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE66\NAME=STATE066 -STATE66\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE66\MOD1=",1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1" STATE66\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE66\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE66\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1597,7 +1597,7 @@ STATE66\CONTROL="0,3F" STATE66\MOD9="0,1,0" STATE66\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE67\NAME=STATE067 -STATE67\MOD1=",1,1,0,0,0,,1,1,,1,1,,1,1,10,0,0,10,0,0,,1,1,,1,1,,1,1,0,0,0,,1,1" +STATE67\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" STATE67\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE67\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE67\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1606,7 +1606,7 @@ STATE67\CONTROL="0,3F" STATE67\MOD9="0,1,0" STATE67\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE68\NAME=STATE068 -STATE68\MOD1=",1,1,,1,1,,1,1,10,0,0,,1,1,0,0,0,0,0,0,,1,1,10,0,0,,1,1,,1,1,,1,1" +STATE68\MOD1=",1,1,0,0,0,,1,1,,1,1,,1,1,10,0,0,10,0,0,,1,1,,1,1,,1,1,0,0,0,,1,1" STATE68\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE68\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE68\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1615,7 +1615,7 @@ STATE68\CONTROL="0,3F" STATE68\MOD9="0,1,0" STATE68\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE69\NAME=STATE069 -STATE69\MOD1=",1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1" +STATE69\MOD1=",1,1,,1,1,,1,1,10,0,0,,1,1,0,0,0,0,0,0,,1,1,10,0,0,,1,1,,1,1,,1,1" STATE69\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE69\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE69\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1624,7 +1624,7 @@ STATE69\CONTROL="0,3F" STATE69\MOD9="0,1,0" STATE69\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE70\NAME=STATE070 -STATE70\MOD1="0,0,0,,1,1,,1,1,,1,1,10,0,0,,1,1,,1,1,10,0,0,,1,1,,1,1,,1,1,0,0,0" +STATE70\MOD1=",1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1" STATE70\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE70\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE70\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1633,7 +1633,7 @@ STATE70\CONTROL="0,3F" STATE70\MOD9="0,1,0" STATE70\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE71\NAME=STATE071 -STATE71\MOD1=",1,1,,1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1,,1,1" +STATE71\MOD1="0,0,0,,1,1,,1,1,,1,1,10,0,0,,1,1,,1,1,10,0,0,,1,1,,1,1,,1,1,0,0,0" STATE71\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE71\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE71\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1642,7 +1642,7 @@ STATE71\CONTROL="0,3F" STATE71\MOD9="0,1,0" STATE71\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE72\NAME=STATE072 -STATE72\MOD1="10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0" +STATE72\MOD1=",1,1,,1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1,,1,1" STATE72\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE72\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE72\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1651,28 +1651,28 @@ STATE72\CONTROL="0,3F" STATE72\MOD9="0,1,0" STATE72\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE73\NAME=STATE073 -STATE73\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE73\MOD1="10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0" STATE73\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE73\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE73\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE73\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE73\MOD4="0,1,0,0,1,0" -STATE73\CONTROL="8,37" +STATE73\CONTROL="0,3F" STATE73\MOD9="0,1,0" STATE73\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE74\NAME=STATE074 STATE74\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE74\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE74\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE74\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE74\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE74\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE74\MOD4="0,1,0,0,1,0" -STATE74\CONTROL="0,3F" +STATE74\CONTROL="8,37" STATE74\MOD9="0,1,0" STATE74\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE75\NAME=STATE075 STATE75\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE75\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE75\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE75\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE75\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE75\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE75\MOD4="0,1,0,0,1,0" STATE75\CONTROL="0,3F" STATE75\MOD9="0,1,0" @@ -1680,26 +1680,26 @@ STATE75\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE76\NAME=STATE076 STATE76\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE76\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE76\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE76\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE76\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE76\MOD4="0,1,0,0,1,0" -STATE76\CONTROL="8,37" +STATE76\CONTROL="0,3F" STATE76\MOD9="0,1,0" STATE76\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE77\NAME=STATE077 STATE77\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE77\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE77\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE77\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE77\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE77\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE77\MOD4="0,1,0,0,1,0" -STATE77\CONTROL="0,3F" +STATE77\CONTROL="8,37" STATE77\MOD9="0,1,0" STATE77\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE78\NAME=STATE078 STATE78\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE78\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE78\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE78\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE78\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE78\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE78\MOD4="0,1,0,0,1,0" STATE78\CONTROL="0,3F" STATE78\MOD9="0,1,0" @@ -1707,7 +1707,7 @@ STATE78\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE79\NAME=STATE079 STATE79\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE79\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE79\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE79\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE79\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE79\MOD4="0,1,0,0,1,0" STATE79\CONTROL="0,3F" @@ -1716,7 +1716,7 @@ STATE79\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE80\NAME=STATE080 STATE80\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE80\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE80\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE80\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE80\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE80\MOD4="0,1,0,0,1,0" STATE80\CONTROL="0,3F" @@ -1725,8 +1725,8 @@ STATE80\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE81\NAME=STATE081 STATE81\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE81\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE81\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE81\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE81\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE81\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE81\MOD4="0,1,0,0,1,0" STATE81\CONTROL="0,3F" STATE81\MOD9="0,1,0" @@ -1734,8 +1734,8 @@ STATE81\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE82\NAME=STATE082 STATE82\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE82\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE82\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE82\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE82\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE82\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE82\MOD4="0,1,0,0,1,0" STATE82\CONTROL="0,3F" STATE82\MOD9="0,1,0" @@ -1743,10 +1743,10 @@ STATE82\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE83\NAME=STATE083 STATE83\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE83\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE83\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE83\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE83\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE83\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE83\MOD4="0,1,0,0,1,0" -STATE83\CONTROL="8,37" +STATE83\CONTROL="0,3F" STATE83\MOD9="0,1,0" STATE83\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE84\NAME=STATE084 @@ -1755,23 +1755,23 @@ STATE84\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE84\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE84\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE84\MOD4="0,1,0,0,1,0" -STATE84\CONTROL="0,31" +STATE84\CONTROL="8,37" STATE84\MOD9="0,1,0" STATE84\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE85\NAME=STATE085 STATE85\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE85\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE85\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE85\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE85\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE85\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE85\MOD4="0,1,0,0,1,0" -STATE85\CONTROL="0,3F" +STATE85\CONTROL="0,31" STATE85\MOD9="0,1,0" STATE85\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE86\NAME=STATE086 STATE86\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE86\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE86\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE86\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE86\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE86\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE86\MOD4="0,1,0,0,1,0" STATE86\CONTROL="0,3F" STATE86\MOD9="0,1,0" @@ -1779,8 +1779,8 @@ STATE86\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE87\NAME=STATE087 STATE87\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE87\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE87\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE87\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE87\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE87\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE87\MOD4="0,1,0,0,1,0" STATE87\CONTROL="0,3F" STATE87\MOD9="0,1,0" @@ -1788,8 +1788,8 @@ STATE87\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE88\NAME=STATE088 STATE88\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE88\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE88\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE88\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE88\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE88\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE88\MOD4="0,1,0,0,1,0" STATE88\CONTROL="0,3F" STATE88\MOD9="0,1,0" @@ -1797,8 +1797,8 @@ STATE88\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE89\NAME=STATE089 STATE89\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE89\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE89\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE89\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE89\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE89\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE89\MOD4="0,1,0,0,1,0" STATE89\CONTROL="0,3F" STATE89\MOD9="0,1,0" @@ -1806,7 +1806,7 @@ STATE89\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE90\NAME=STATE090 STATE90\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE90\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE90\MOD3=",1,1,11.5,1,0,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE90\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE90\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE90\MOD4="0,1,0,0,1,0" STATE90\CONTROL="0,3F" @@ -1815,7 +1815,7 @@ STATE90\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE91\NAME=STATE091 STATE91\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE91\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE91\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE91\MOD3=",1,1,11.5,1,0,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE91\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE91\MOD4="0,1,0,0,1,0" STATE91\CONTROL="0,3F" @@ -1824,7 +1824,7 @@ STATE91\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE92\NAME=STATE092 STATE92\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE92\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE92\MOD3=",1,1,,1,1,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE92\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE92\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE92\MOD4="0,1,0,0,1,0" STATE92\CONTROL="0,3F" @@ -1833,7 +1833,7 @@ STATE92\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE93\NAME=STATE093 STATE93\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE93\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE93\MOD3=",1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE93\MOD3=",1,1,,1,1,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE93\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE93\MOD4="0,1,0,0,1,0" STATE93\CONTROL="0,3F" @@ -1842,7 +1842,7 @@ STATE93\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE94\NAME=STATE094 STATE94\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE94\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE94\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE94\MOD3=",1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE94\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE94\MOD4="0,1,0,0,1,0" STATE94\CONTROL="0,3F" @@ -1851,7 +1851,7 @@ STATE94\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE95\NAME=STATE095 STATE95\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE95\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE95\MOD3=",1,1,11.5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE95\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE95\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE95\MOD4="0,1,0,0,1,0" STATE95\CONTROL="0,3F" @@ -1860,7 +1860,7 @@ STATE95\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE96\NAME=STATE096 STATE96\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE96\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE96\MOD3=",1,1,1,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE96\MOD3=",1,1,11.5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE96\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE96\MOD4="0,1,0,0,1,0" STATE96\CONTROL="0,3F" @@ -1869,8 +1869,8 @@ STATE96\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE97\NAME=STATE097 STATE97\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE97\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE97\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE97\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE97\MOD3=",1,1,1,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE97\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE97\MOD4="0,1,0,0,1,0" STATE97\CONTROL="0,3F" STATE97\MOD9="0,1,0" @@ -1878,8 +1878,8 @@ STATE97\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE98\NAME=STATE098 STATE98\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE98\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE98\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE98\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE98\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE98\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE98\MOD4="0,1,0,0,1,0" STATE98\CONTROL="0,3F" STATE98\MOD9="0,1,0" @@ -1887,8 +1887,8 @@ STATE98\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE99\NAME=STATE099 STATE99\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE99\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE99\MOD3=",1,1,11,1,0,,1,1,,1,1,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE99\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE99\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE99\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE99\MOD4="0,1,0,0,1,0" STATE99\CONTROL="0,3F" STATE99\MOD9="0,1,0" @@ -1896,8 +1896,8 @@ STATE99\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE100\NAME=STATE100 STATE100\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE100\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE100\MOD3=",1,1,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE100\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE100\MOD3=",1,1,11,1,0,,1,1,,1,1,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE100\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE100\MOD4="0,1,0,0,1,0" STATE100\CONTROL="0,3F" STATE100\MOD9="0,1,0" @@ -1905,8 +1905,8 @@ STATE100\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE101\NAME=STATE101 STATE101\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE101\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE101\MOD3=",1,1,11,1,0,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE101\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE101\MOD3=",1,1,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE101\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE101\MOD4="0,1,0,0,1,0" STATE101\CONTROL="0,3F" STATE101\MOD9="0,1,0" @@ -1914,26 +1914,26 @@ STATE101\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE102\NAME=STATE102 STATE102\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE102\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE102\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" -STATE102\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE102\MOD3=",1,1,11,1,0,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE102\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE102\MOD4="0,1,0,0,1,0" -STATE102\CONTROL="8,37" +STATE102\CONTROL="0,3F" STATE102\MOD9="0,1,0" STATE102\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE103\NAME=STATE103 STATE103\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE103\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE103\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE103\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE103\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE103\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE103\MOD4="0,1,0,0,1,0" -STATE103\CONTROL="0,3F" +STATE103\CONTROL="8,37" STATE103\MOD9="0,1,0" STATE103\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE104\NAME=STATE104 STATE104\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE104\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE104\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE104\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE104\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE104\MOD4="0,1,0,0,1,0" STATE104\CONTROL="0,3F" STATE104\MOD9="0,1,0" @@ -1942,42 +1942,42 @@ STATE105\NAME=STATE105 STATE105\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE105\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE105\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE105\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE105\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE105\MOD4="0,1,0,0,1,0" -STATE105\CONTROL="4,3B" +STATE105\CONTROL="0,3F" STATE105\MOD9="0,1,0" STATE105\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE106\NAME=STATE106 -STATE106\MOD1="0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0" +STATE106\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE106\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE106\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE106\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE106\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE106\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE106\MOD4="0,1,0,0,1,0" -STATE106\CONTROL="2,3D" +STATE106\CONTROL="4,3B" STATE106\MOD9="0,1,0" STATE106\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE107\NAME=STATE107 -STATE107\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE107\MOD1="0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0" STATE107\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE107\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" -STATE107\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE107\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE107\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE107\MOD4="0,1,0,0,1,0" -STATE107\CONTROL="4,3B" +STATE107\CONTROL="2,3D" STATE107\MOD9="0,1,0" STATE107\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE108\NAME=STATE108 STATE108\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE108\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE108\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1" -STATE108\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE108\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" +STATE108\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE108\MOD4="0,1,0,0,1,0" -STATE108\CONTROL="0,3F" +STATE108\CONTROL="4,3B" STATE108\MOD9="0,1,0" STATE108\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE109\NAME=STATE109 STATE109\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE109\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE109\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1,,1,1" +STATE109\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1" STATE109\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE109\MOD4="0,1,0,0,1,0" STATE109\CONTROL="0,3F" @@ -1986,7 +1986,7 @@ STATE109\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE110\NAME=STATE110 STATE110\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE110\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE110\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1" +STATE110\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1,,1,1" STATE110\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE110\MOD4="0,1,0,0,1,0" STATE110\CONTROL="0,3F" @@ -1995,7 +1995,7 @@ STATE110\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE111\NAME=STATE111 STATE111\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE111\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE111\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,,1,1,,1,1,,1,1,,1,1" +STATE111\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1" STATE111\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE111\MOD4="0,1,0,0,1,0" STATE111\CONTROL="0,3F" @@ -2004,7 +2004,7 @@ STATE111\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE112\NAME=STATE112 STATE112\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE112\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE112\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1" +STATE112\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,,1,1,,1,1,,1,1,,1,1" STATE112\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE112\MOD4="0,1,0,0,1,0" STATE112\CONTROL="0,3F" @@ -2013,33 +2013,33 @@ STATE112\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE113\NAME=STATE113 STATE113\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE113\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE113\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" -STATE113\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE113\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1" +STATE113\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE113\MOD4="0,1,0,0,1,0" STATE113\CONTROL="0,3F" STATE113\MOD9="0,1,0" STATE113\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE114\NAME=STATE114 STATE114\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE114\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,12,1,0,,1,1,5,1,0,,1,1,,1,1" -STATE114\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE114\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE114\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE114\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" +STATE114\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE114\MOD4="0,1,0,0,1,0" -STATE114\CONTROL="0,31" +STATE114\CONTROL="0,3F" STATE114\MOD9="0,1,0" STATE114\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE115\NAME=STATE115 STATE115\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE115\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE115\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,12,1,0,,1,1,5,1,0,,1,1,,1,1" STATE115\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE115\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE115\MOD4="0,1,0,0,1,0" -STATE115\CONTROL="0,3F" +STATE115\CONTROL="0,31" STATE115\MOD9="0,1,0" STATE115\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE116\NAME=STATE116 STATE116\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE116\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,0,1,0,5,1,0,,1,1,,1,1,,1,1" +STATE116\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE116\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE116\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE116\MOD4="0,1,0,0,1,0" @@ -2048,7 +2048,7 @@ STATE116\MOD9="0,1,0" STATE116\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE117\NAME=STATE117 STATE117\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE117\MOD2=",1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1" +STATE117\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,0,1,0,5,1,0,,1,1,,1,1,,1,1" STATE117\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE117\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE117\MOD4="0,1,0,0,1,0" @@ -2057,7 +2057,7 @@ STATE117\MOD9="0,1,0" STATE117\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE118\NAME=STATE118 STATE118\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE118\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE118\MOD2=",1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1" STATE118\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE118\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE118\MOD4="0,1,0,0,1,0" @@ -2066,7 +2066,7 @@ STATE118\MOD9="0,1,0" STATE118\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE119\NAME=STATE119 STATE119\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE119\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1" +STATE119\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE119\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE119\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE119\MOD4="0,1,0,0,1,0" @@ -2075,7 +2075,7 @@ STATE119\MOD9="0,1,0" STATE119\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE120\NAME=STATE120 STATE120\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE120\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,12,1,0,,1,1,,1,1,,1,1,,1,1" +STATE120\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1" STATE120\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE120\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE120\MOD4="0,1,0,0,1,0" @@ -2084,7 +2084,7 @@ STATE120\MOD9="0,1,0" STATE120\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE121\NAME=STATE121 STATE121\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE121\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1" +STATE121\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,12,1,0,,1,1,,1,1,,1,1,,1,1" STATE121\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE121\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE121\MOD4="0,1,0,0,1,0" @@ -2093,7 +2093,7 @@ STATE121\MOD9="0,1,0" STATE121\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE122\NAME=STATE122 STATE122\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE122\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1" +STATE122\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1" STATE122\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE122\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE122\MOD4="0,1,0,0,1,0" @@ -2102,14 +2102,23 @@ STATE122\MOD9="0,1,0" STATE122\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE123\NAME=STATE123 STATE123\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE123\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE123\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1" STATE123\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE123\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE123\MOD4="0,1,0,0,1,0" STATE123\CONTROL="0,3F" STATE123\MOD9="0,1,0" STATE123\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" -STATES=124 +STATE124\NAME=STATE124 +STATE124\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE124\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE124\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE124\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE124\MOD4="0,1,0,0,1,0" +STATE124\CONTROL="0,3F" +STATE124\MOD9="0,1,0" +STATE124\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATES=125 [SYSTEM]BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 BACKPLANE_TYPE=1 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 1f48cb1..f91faef 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -9,6 +9,7 @@ deimos_TMP SLOT 1 driverx { + DRVX 1 [PCLK_fast,PCLK_slow,1] "PCLK_B3_2"; DRVX 2 [PCLK_fast,PCLK_slow,1] "PCLK_A3_2"; DRVX 3 [PCLK_fast,PCLK_slow,1] "PCLK_B2_2"; @@ -24,13 +25,13 @@ SLOT 1 driverx { } SLOT 2 driverx { - DRVX 1 [1,1,1] "SCI_RGBACKUP2"; - DRVX 2 [1,1,1] "SCI_SWBACKUP1"; + DRVX 1 [SCLK_fast,SCLK_slow,1] "SCI_RGBACKUP2"; + DRVX 2 [SCLK_fast,SCLK_slow,1] "SCI_SWBACKUP1"; DRVX 3 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS2_S2L"; DRVX 4 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS1_S2L"; DRVX 5 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS2_S3L"; DRVX 6 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS_S1"; - DRVX 7 [1,1,1] "SCI_SWBACKUP2"; + DRVX 7 [SCLK_fast,SCLK_slow,1] "SCI_SWBACKUP2"; DRVX 8 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS_RG"; DRVX 9 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS_SW"; DRVX 10 [SCLK_fast_FCS,SCLK_slow_FCS,1] "FCS1_S3L"; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index c323659..147638c 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -93,6 +93,7 @@ param enable_ser_bin = 0 //calculations for linbin... //number of linbin valuable measurements you'll get #define LINBIN_MEAS #exec echo " (sqrt(1 + 8 * _IMAGEROWS) -1)/2 " | bc + //number of non measured linbin rows to read out to maintain total same image size #define LINBIN_NOBIN_ROWS #eval TOTAL_ROWS - LINBIN_MEAS @@ -103,6 +104,7 @@ param enable_ser_bin = 0 //this does floor arithmetic, so might end up with wrong number //if number cols changes #define PIXELS_PER_SEG #eval _AMPREADCOLS / 3 + #define REMAINDER_PIX #eval _AMPREADCOLS - (PIXELS_PER_SEG * 3) @@ -113,16 +115,21 @@ param enable_ser_bin = 0 //number of lines in the TDC segment (including //one bright line and the rest dark) #define LLEL_TDC_LINES 60 + #define LLEL_TDC_BININCR 1 #define LLEL_TDC_LOOPS #eval TOTAL_ROWS / LLEL_TDC_LINES - #define LLEL_TDC_REMAINDER #eval TOTAL_ROWS % LLEL_TDC_LINES + +#define LLEL_TDC_REMAINDER #eval TOTAL_ROWS % LLEL_TDC_LINES #define SER_TDC_COLS 21 + #define SER_TDC_COLSm1 #eval SER_TDC_COLS -1 #define SER_TDC_BININCR 1 + #define SER_TDC_LOOPS #eval (_AMPCOLS + _SERIALOVERSCAN) / SER_TDC_COLS + #define SER_TDC_REMAINDER #eval (_AMPCOLS + _SERIALOVERSCAN) % SER_TDC_COLS @@ -645,6 +652,7 @@ SEQUENCE LineReadout if enable_ser_bin SerBinReadPixels(_AMPCOLS); if enable_ser_bin ReadPixels(_SERIALOVERSCAN); if !enable_ser_bin ReadPixels(_AMPREADCOLS); + if tdi_wait_us Wait1us(tdi_wait_us); //if there are leftover pixels, do them here RETURN; diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index b80f90d..9ef6714 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -95,8 +95,8 @@ WAVEFORM InitialSetup {0 : SET RG TO INV_HIGH; SET SW TO INV_HIGH; - SET RG_CLOCKS TO _RG_LOW; - SET SW_CLOCKS TO _SW_LOW; + SET RG_CLOCKS TO _RG_LOW,FAST; + SET SW_CLOCKS TO _SW_LOW, FAST; //disable the pin drivers SET PD_OE_IN TO 1; @@ -178,11 +178,11 @@ WAVEFORM TransferToSerialRegisterCoincident SET TG TO _TG_CLOCK_HIGH, FAST; SET LINE TO HIGH; SET SW TO INV_LOW; - SET SW_CLOCKS TO _SW_LOW; + SET SW_CLOCKS TO _SW_LOW,FAST; //NOTE: don't think we want to clamp with reset gate activated .+1000: SET RG TO INV_LOW; - SET RG_CLOCKS TO _RG_LOW; + SET RG_CLOCKS TO _RG_LOW,FAST; SET TG TO _TG_CLOCK_LOW, FAST; //simultaneously, operate the AC clamp .+50: @@ -205,7 +205,7 @@ WAVEFORM ParallelForwardNoCoincident SET TG TO _TG_CLOCK_HIGH, FAST; SET SW TO INV_LOW; - SET SW_CLOCKS TO _SW_LOW; + SET SW_CLOCKS TO _SW_LOW, FAST; SET LINE TO HIGH; .+1000: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; @@ -225,13 +225,13 @@ WAVEFORM ParallelForwardNoCoincident SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; SET RG to INV_HIGH; - SET RG_CLOCKS TO _RG_HIGH; + SET RG_CLOCKS TO _RG_HIGH, FAST; TG_GOES_LOW+200:=RG_GOES_LOW SET RG TO INV_LOW; - SET RG_CLOCKS TO _RG_LOW; - SET SW TO INV_HIGH; - SET SW_CLOCKS TO INV_HIGH; + SET RG_CLOCKS TO _RG_LOW, FAST; + SET SW TO INV_LOW; + SET SW_CLOCKS TO _SW_HIGH, FAST; .+50: SET AC_Clamp to HIGH; .+300: SET SCI_SCLK1 TO _SER_CLOCK_LOW, FAST; @@ -268,10 +268,10 @@ WAVEFORM ParallelForwardSegment3 WAVEFORM OutputTestSetup { 0: SET RG TO INV_HIGH; - SET RG_CLOCKS TO _RG_HIGH; + SET RG_CLOCKS TO _RG_HIGH, FAST; SET VRD_F TO 17.0; SET SW TO INV_HIGH; - SET SW_CLOCKS TO _SW_HIGH; + SET SW_CLOCKS TO _SW_HIGH, FAST; .+10ms: SET NOP TO HIGH; SET TG TO _TG_CLOCK_LOW, FAST; .+10ms: SET NOP TO HIGH; @@ -413,7 +413,7 @@ WAVEFORM ForwardParallelSectionANoCoincident SET TG TO _TG_CLOCK_HIGH, FAST; SET SW TO INV_LOW; - SET SW_CLOCKS TO _SW_LOW; + SET SW_CLOCKS TO _SW_LOW, FAST; SET LINE TO HIGH; .+1000: SET SCI_PCLK2_A TO _PAR_CLOCK_LOW, FAST; @@ -433,13 +433,13 @@ WAVEFORM ForwardParallelSectionANoCoincident SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; SET RG to INV_HIGH; - SET RG_CLOCKS TO _RG_HIGH; + SET RG_CLOCKS TO _RG_HIGH, FAST; TG_GOES_LOW+200:=RG_GOES_LOW SET RG TO INV_LOW; - SET RG_CLOCKS TO _RG_LOW; + SET RG_CLOCKS TO _RG_LOW, FAST; SET SW TO INV_HIGH; - SET SW_CLOCKS TO INV_HIGH; + SET SW_CLOCKS TO _SW_HIGH, FAST; .+50: SET AC_Clamp to HIGH; .+300: SET SCI_SCLK1 TO _SER_CLOCK_HIGH, FAST; diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 509b32f..d79cb5f 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -20,8 +20,8 @@ #define _RG_LOW 5.0 /* [-0.5, 1.0] */ #define _RG_HIGH 12.0 /* [8.0, 14.0] */ -#defeval _SW_LOW _SER_CLOCK_LOW /* [-0.5, 1.0] */ -#defeval _SW_HIGH _SER_CLOCK_HIGH /* [8.0, 14.0] */ +#define _SW_LOW _SER_CLOCK_LOW /* [-0.5, 1.0] */ +#define _SW_HIGH _SER_CLOCK_HIGH /* [8.0, 14.0] */ /** --------------------------------------------------------------------------- From 65c95b05bd70d4228a0bd94b079dc18ab377ce8e Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 27 Jan 2026 17:54:28 -0800 Subject: [PATCH 173/194] add labels for LVDS channels --- src/deimos/deimos.acf | 12 ++++++++++++ src/deimos/deimos.mod | 12 ++++++++++++ 2 files changed, 24 insertions(+) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index 8f1a206..5265b45 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -930,6 +930,18 @@ MOD10\LVHC_ENABLE6=0 MOD10\LVHC_V6=0.0 MOD10\LVHC_IL6=0.0 MOD10\LVHC_ORDER6=0 +MOD12\LVDS_LABEL1=PD_OE_IN +MOD12\LVDS_LABEL2=NOP +MOD12\LVDS_LABEL5=RG_SCI3 +MOD12\LVDS_LABEL6=RG_SCI4 +MOD12\LVDS_LABEL7=RG_SCI1 +MOD12\LVDS_LABEL8=RG_SCI2 +MOD12\LVDS_LABEL11=AC_clamp_FCS +MOD12\LVDS_LABEL12=AC_clamp +MOD12\LVDS_LABEL13=SW_SCI4 +MOD12\LVDS_LABEL14=SW_SCI3 +MOD12\LVDS_LABEL15=RG_SCI1 +MOD12\LVDS_LABEL16=SW_SCI2 MOD10\DIO_SOURCE1=0 MOD10\DIO_DIR12=0 MOD10\DIO_LABEL1=Driver Output Enable (unused) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index f91faef..6888658 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -161,6 +161,18 @@ SLOT 10 lvbias { } SLOT 12 lvds { + LVDSL 1 "PD_OE_IN"; + LVDSL 2 "NOP"; + LVDSL 5 "RG_SCI3"; + LVDSL 6 "RG_SCI4"; + LVDSL 7 "RG_SCI1"; + LVDSL 8 "RG_SCI2"; + LVDSL 11 "AC_clamp_FCS"; + LVDSL 12 "AC_clamp"; + LVDSL 13 "SW_SCI4"; + LVDSL 14 "SW_SCI3"; + LVDSL 15 "RG_SCI1"; + LVDSL 16 "SW_SCI2"; DIO 1 [0,0] "Loopback 4 IN"; DIO 2 [2,1] "Loopback 4 OUT"; DIO 3 [0,0] "Loopback 5 IN"; From 0bd9bfc2c94097078122366a8fa40d0535aa39a0 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 28 Jan 2026 16:20:45 -0800 Subject: [PATCH 174/194] add missing enable on SCI llel clock channel --- src/deimos/deimos.acf | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index 5265b45..aefb1a1 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -608,6 +608,7 @@ LINE538="STATE119; STATE000(239)" LINE539="STATE123; STATE000(239)" LINE540="STATE124; RETURN DumpPixelsFCS" LINES=541 +MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=6.6666 MOD1\SLOWSLEWRATE1=0.0303 MOD1\LABEL1=PCLK_B3_2 @@ -2131,7 +2132,8 @@ STATE124\CONTROL="0,3F" STATE124\MOD9="0,1,0" STATE124\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATES=125 -[SYSTEM]BACKPLANE_ID=0000000000000000 +[SYSTEM] +BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 BACKPLANE_TYPE=1 BACKPLANE_VERSION=0.0.0 From b77a6fcf37807e0f7884bd634948b1cf610acf82 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 29 Jan 2026 17:14:38 -0800 Subject: [PATCH 175/194] fix incorrect definition for RG rail biases --- src/deimos/deimos.mod | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 6888658..6303c25 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -145,8 +145,8 @@ SLOT 10 lvbias { LVLC 24 [0.50,6] "Video offset SCI2"; LVHC 1 [2.00,20.0,5,1] "SCI Summing Well - Low"; LVHC 2 [11.00,20.0,5,1] "SCI Summing Well - High"; - LVHC 3 [5.50,20.0,5,1] "SCI Reset Gate - Low"; - LVHC 4 [12.00,20.0,5,1] "SCI Reset Gate - High"; + LVHC 3 [12.0,20.0,5,1] "SCI Reset Gate - High"; + LVHC 4 [5.5,20.0,5,1] "SCI Reset Gate - Low"; LVHC 5 [0.00,0.0,0,0]; LVHC 6 [0.00,0.0,0,0]; DIO 1 [0,0] "Driver Output Enable (unused)"; From 697df3bad0f1de82f620e2d22c52e6bbb97e490a Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 29 Jan 2026 18:30:06 -0800 Subject: [PATCH 176/194] fix ordering of video offset biases --- src/deimos/deimos.mod | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 6303c25..12accd5 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -140,7 +140,7 @@ SLOT 10 lvbias { LVLC 19 [0.0,0] ; LVLC 20 [00.0,0]; LVLC 21 [00.0,0]; - LVLC 22 [00.0,0] "Video offset FCS"; + LVLC 22 [00.0,6] "Video offset FCS"; LVLC 23 [0.50,6] "Video offset SCI"; LVLC 24 [0.50,6] "Video offset SCI2"; LVHC 1 [2.00,20.0,5,1] "SCI Summing Well - Low"; From bcae4cf6403d7e2d27ccd1f4fc7fc63cd70f2ca9 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 4 Feb 2026 13:24:37 -0800 Subject: [PATCH 177/194] updates with work on FCS clocking - about to test VRD modulation --- src/deimos/deimos.acf | 1218 ++++++++++++------------ src/deimos/deimos.cds | 10 +- src/deimos/deimos.mod | 2 +- src/deimos/deimos.seq | 5 +- src/deimos/deimos.signals | 16 +- src/deimos/deimos.waveform | 140 ++- src/deimos/voltage_timing_parameters.h | 17 +- 7 files changed, 686 insertions(+), 722 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index aefb1a1..916a7ac 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -6,32 +6,18 @@ SAMPLEMODE = 1 RAWENABLE = 1 RAWENDLINE = 800 RAWSAMPLES = 20000 +TAPLINES=2 FRAMEMODE=0 -TAPLINE0="AM37L,1,100" -TAPLINE1="AM38R,1,100" -TAPLINE2="AM39L,1,100" -TAPLINE3="AM40R,1,100" -TAPLINE4="AM41L,1,100" -TAPLINE5="AM42R,1,100" -TAPLINE6="AM43L,1,100" -TAPLINE7="AM44R,1,100" -TAPLINE8="AM47L,1,100" -TAPLINE9="AM48R,1,100" -TAPLINE10="AM49L,1,100" -TAPLINE11="AM50R,1,100" -TAPLINE12="AM51L,1,100" -TAPLINE13="AM52R,1,100" -TAPLINE14="AM53L,1,100" -TAPLINE15="AM54R,1,100" -TAPLINES=16 -LINECOUNT=4125 -PIXELCOUNT=1094 -RAWSEL = 11 - RAWSEL = 11 -SHP1 = 120 -SHP2 = 303 -SHD1 = 448 -SHD2 = 575 +TAPLINE0="AM45L,1,100" +TAPLINE1="AM46R,1,100" +RAWSEL=49 +LINECOUNT = 4116 +PIXELCOUNT = 1069 +SHP1 = 250 +SHP2 = 650 +SHD1 = 800 +SHD2 = 1000 +RAWSTARTPIXEL=23 TRIGOUTFORCE=0 TRIGOUTINVERT=0 TRIGOUTLEVEL=0 @@ -149,465 +135,464 @@ LINE79="STATE000; CALL ReadoutKeep" LINE80="STATE000; RETURN IntegrateAndReadout" LINE81=TestBrokenReadout: LINE82="STATE000; CALL OutputTestSetup" -LINE83="STATE000; CALL PulseTGA" -LINE84="STATE000; CALL VRDModulate" -LINE85="STATE000; RETURN TestBrokenReadout" -LINE86=EvacuateE: -LINE87="STATE000; CALL EvacuateEStart" -LINE88="STATE000; CALL Wait1ms" -LINE89="STATE000; CALL EvacuateEFinish" -LINE90="STATE000; RETURN EvacuateE" -LINE91=EvacuateF: -LINE92="STATE000; CALL EvacuateFStart" -LINE93="STATE000; CALL Wait1ms" -LINE94="STATE000; CALL EvacuateFFinish" -LINE95="STATE000; RETURN EvacuateF" -LINE96=Integrate: -LINE97="STATE000; CALL KeepThisFrame" -LINE98="STATE000; CALL ReadPixels(1094)" -LINE99="STATE000; if illum CALL OpenShutter" -LINE100="STATE000; CALL Wait1ms(integrate_illum_ms)" -LINE101="STATE000; CALL Wait1s(integrate_illum_s)" -LINE102="STATE000; if illum CALL CloseShutter" -LINE103="STATE000; CALL Wait1ms(integrate_ms)" -LINE104="STATE000; CALL Wait1s(integrate_s)" -LINE105="STATE000; RETURN Integrate" -LINE106=ReadoutKeep: -LINE107="STATE000; CALL ReadoutBegin" -LINE108="STATE000; if llel_coincident CALL FrameReadout" -LINE109="STATE000; if llel_seq CALL FrameReadout" -LINE110="STATE000; if slow_pix CALL FrameReadout" -LINE111="STATE000; if linbin CALL FrameReadout" -LINE112="STATE000; if dch_llel CALL FrameReadoutTDCllel" -LINE113="STATE000; if dch_ser CALL FrameReadoutTDCser" -LINE114="STATE000; framecount--" -LINE115="STATE000; RETURN ReadoutKeep" -LINE116=FrameReadoutTDCllel: -LINE117="STATE000; CALL Wait1us(50)" -LINE118="STATE000; CALL DumpPixels(1094)" -LINE119="STATE000; CALL FrameReadoutTDCllel_Innerloop(68)" -LINE120="STATE000; CALL LineReadout(44)" -LINE121="STATE000; CALL ReadoutEnd" -LINE122="STATE000; CALL linbindecr(llel_bin)" -LINE123="STATE000; CALL linbinincr" -LINE124="STATE000; RETURN FrameReadoutTDCllel" -LINE125=FrameReadoutTDCllel_Innerloop: -LINE126="STATE000; CALL LineReadoutAOnly(60)" -LINE127="STATE000; CALL ForwardParallelSectionBNoCoincident(llel_bin)" -LINE128="STATE000; CALL linbinincr(1)" -LINE129="STATE000; RETURN FrameReadoutTDCllel_Innerloop" -LINE130=FrameReadoutTDCser: -LINE131="STATE000; CALL Wait1us(50)" -LINE132="STATE000; CALL DumpPixels(1094)" -LINE133="STATE000; CALL LineReadoutTDCser(4124)" -LINE134="STATE000; CALL ReadoutEnd" -LINE135="STATE000; RETURN FrameReadoutTDCser" -LINE136=LineReadoutTDCser: -LINE137="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" -LINE138="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE139="STATE000; CALL TDCser_Innerloop(49)" -LINE140="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(15)" -LINE141="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(15)" -LINE142="STATE000; if !dsch_ser_dump_bcs CALL TDCser_ReadoutLoop" -LINE143="STATE000; if dsch_ser_dump_bcs CALL TDCser_ReadoutLoopDumpBright" -LINE144="STATE000; if !dsch_ser_direction CALL EvacuateF" -LINE145="STATE000; if dsch_ser_direction CALL EvacuateE" -LINE146="STATE000; CALL serbindecr(ser_bin)" -LINE147="STATE000; CALL serbinincr" -LINE148="STATE000; RETURN LineReadoutTDCser" -LINE149=TDCser_ReadoutLoopDumpBright: -LINE150="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(50)" -LINE151="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(50)" -LINE152="STATE000; CALL TDCser_ReadoutLoopDumpBright_Inner(49)" -LINE153="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(15)" -LINE154="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(15)" -LINE155="STATE000; RETURN TDCser_ReadoutLoopDumpBright" -LINE156=TDCser_ReadoutLoop: -LINE157="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(1094)" -LINE158="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(1094)" -LINE159="STATE000; RETURN TDCser_ReadoutLoop" -LINE160=TDCser_ReadoutLoopDumpBright_Inner: -LINE161="STATE000; CALL trigpix" -LINE162="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly" -LINE163="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly" -LINE164="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(20)" -LINE165="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(20)" -LINE166="STATE000; RETURN TDCser_ReadoutLoopDumpBright_Inner" -LINE167=TDCser_Innerloop: -LINE168="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(21)" -LINE169="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(21)" -LINE170="STATE000; if !dsch_ser_direction CALL SerialFBackwards(ser_bin)" -LINE171="STATE000; if dsch_ser_direction CALL SerialEBackwards(ser_bin)" -LINE172="STATE000; CALL serbinincr(1)" -LINE173="STATE000; RETURN TDCser_Innerloop" -LINE174=serbinincr: -LINE175="STATE000; ser_bin++" -LINE176="STATE000; RETURN serbinincr" -LINE177=serbindecr: -LINE178="STATE000; ser_bin--" -LINE179="STATE000; RETURN serbindecr" -LINE180=FrameReadout: -LINE181="STATE000; CALL Wait1us(50)" -LINE182="STATE000; CALL DumpPixels(1094)" -LINE183="STATE000; if tdi_wait_us CALL OpenShutter" -LINE184="STATE000; IF llel_seq CALL LineReadout(4124)" -LINE185="STATE000; IF llel_coincident CALL LineReadoutCoincident(4124)" -LINE186="STATE000; IF slow_pix CALL LineReadoutSlowPix(4124)" -LINE187="STATE000; IF linbin CALL LineReadout(90)" -LINE188="STATE000; IF linbin CALL LineReadoutFast(4034)" -LINE189="STATE000; if tdi_wait_us CALL CloseShutter" -LINE190="STATE000; CALL ReadoutEnd" -LINE191="STATE000; if linbin CALL linbindecr(llel_bin)" -LINE192="STATE000; if linbin CALL linbinincr" -LINE193="STATE000; RETURN FrameReadout" -LINE194=Wait1s: -LINE195="STATE000; if abortintegrate CALL abortintegration" -LINE196="STATE000; CALL Wait1ms(1000)" -LINE197="STATE000; RETURN Wait1s" -LINE198=abortintegration: -LINE199="STATE000; CALL CloseShutter" -LINE200="STATE000; GOTO StartSeqSummitMode" -LINE201=LineReadoutSlowPix: -LINE202="STATE000; CALL ParallelForwardNoCoincident" -LINE203="STATE000; CALL Wait1us(50)" -LINE204="STATE000; CALL ReadPixelsSlow(1094)" -LINE205="STATE000; CALL Wait1us(10)" -LINE206="STATE000; RETURN LineReadoutSlowPix" -LINE207=linbinincrcheck: -LINE208="STATE000; if framecount CALL linbinincr" -LINE209="STATE000; RETURN linbinincrcheck" -LINE210=linbinincr: -LINE211="STATE000; llel_bin++" -LINE212="STATE000; RETURN linbinincr" -LINE213=linbindecr: -LINE214="STATE000; llel_bin--" -LINE215="STATE000; RETURN linbindecr" -LINE216=LineReadoutFast: -LINE217="STATE000; CALL ParallelForwardNoCoincident" -LINE218="STATE000; CALL ReadPixels(1094)" -LINE219="STATE000; RETURN LineReadoutFast" -LINE220=LineReadout: -LINE221="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" -LINE222="STATE000; if linbin CALL linbinincr" -LINE223="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE224="STATE000; if enable_ser_bin CALL ReadPixels(50)" -LINE225="STATE000; if enable_ser_bin CALL SerBinReadPixels(1024)" -LINE226="STATE000; if enable_ser_bin CALL ReadPixels(20)" -LINE227="STATE000; if !enable_ser_bin CALL ReadPixels(1094)" -LINE228="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" -LINE229="STATE000; RETURN LineReadout" -LINE230=SerBinReadPixels: -LINE231="STATE000; CALL PrepSerBin" -LINE232="STATE000; CALL serbindecr" -LINE233="STATE000; CALL SerialBinForwards(ser_bin)" -LINE234="STATE000; CALL ReadPixels" -LINE235="STATE000; CALL serbinincr" -LINE236="STATE000; RETURN SerBinReadPixels" -LINE237=LineReadoutCoincident: -LINE238="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" -LINE239="STATE000; CALL ParallelForwardSegment1" -LINE240="STATE000; CALL TransferToSerialRegisterCoincident" -LINE241="STATE000; CALL ReadPixels(364)" -LINE242="STATE000; CALL ParallelForwardSegment2" -LINE243="STATE000; CALL ReadPixels(364)" -LINE244="STATE000; CALL ParallelForwardSegment3" -LINE245="STATE000; CALL ReadPixels(364) CALL ReadPixels(2)" -LINE246="STATE000; RETURN LineReadoutCoincident" -LINE247=LineReadoutAOnly: -LINE248="STATE000; CALL ForwardParallelSectionANoCoincident" -LINE249="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE250="STATE000; CALL ReadPixels(1094)" -LINE251="STATE000; RETURN LineReadoutAOnly" -LINE252=LineReadoutAOnlyCoincident: -LINE253="STATE000; CALL TransferToSerialRegisterCoincident" -LINE254="STATE000; CALL ReadPixels(50)" -LINE255="STATE000; CALL ParallelForwardSectionASegment1" -LINE256="STATE000; CALL ReadPixels(364)" -LINE257="STATE000; CALL ParallelForwardSectionASegment2" -LINE258="STATE000; CALL ReadPixels(364)" -LINE259="STATE000; CALL ParallelForwardSectionASegment3" -LINE260="STATE000; CALL ReadPixels(364)" -LINE261="STATE000; CALL ReadPixels(2)" -LINE262="STATE000; RETURN LineReadoutAOnlyCoincident" -LINE263=Wait1us: -LINE264="STATE001; STATE000(98)" -LINE265="STATE000; RETURN Wait1us" -LINE266=Wait1ms: -LINE267="STATE001; STATE000(99998)" -LINE268="STATE000; RETURN Wait1ms" -LINE269=KeepThisFrame: -LINE270="STATE002;" -LINE271="STATE003; RETURN KeepThisFrame" -LINE272=InitialSetup: -LINE273="STATE004; STATE000(999)" -LINE274="STATE005; STATE000(9999)" -LINE275="STATE001; RETURN InitialSetup" -LINE276=InitialSetupFCS: -LINE277="STATE006; STATE000(999)" -LINE278="STATE007; STATE000(9999)" -LINE279="STATE001; RETURN InitialSetupFCS" -LINE280=OpenShutter: -LINE281="STATE008; RETURN OpenShutter" -LINE282=CloseShutter: -LINE283="STATE009; RETURN CloseShutter" -LINE284=ReadoutBegin: -LINE285="STATE010; RETURN ReadoutBegin" -LINE286=ReadoutEnd: -LINE287="STATE011; RETURN ReadoutEnd" -LINE288=TransferToSerialRegisterCoincident: -LINE289="STATE012; STATE000(999)" -LINE290="STATE013; STATE000(49)" -LINE291="STATE014; STATE000(49)" -LINE292="STATE015; RETURN TransferToSerialRegisterCoincident" -LINE293=ParallelForwardNoCoincident: -LINE294="STATE001; STATE000(999)" -LINE295="STATE016; STATE000(999)" -LINE296="STATE017; STATE000(999)" -LINE297="STATE018; STATE000(999)" -LINE298="STATE019; STATE000(199)" -LINE299="STATE020; STATE000(49)" -LINE300="STATE021; STATE000(299)" -LINE301="STATE022; STATE000(49)" -LINE302="STATE015; STATE000(399)" -LINE303="STATE023; STATE000(999)" -LINE304="STATE024; STATE000(999)" -LINE305="STATE001; RETURN ParallelForwardNoCoincident" -LINE306=ParallelForwardSegment1: -LINE307="STATE025; RETURN ParallelForwardSegment1" -LINE308=ParallelForwardSegment2: -LINE309="STATE026; RETURN ParallelForwardSegment2" -LINE310=ParallelForwardSegment3: -LINE311="STATE027; RETURN ParallelForwardSegment3" -LINE312=OutputTestSetup: -LINE313="STATE028; STATE000(999999)" -LINE314="STATE029; STATE000(999999)" -LINE315="STATE030; RETURN OutputTestSetup" -LINE316=PulseTGA: -LINE317="STATE031; STATE000(2499)" -LINE318="STATE032; STATE000(2499)" -LINE319="STATE033; RETURN PulseTGA" -LINE320=VRDModulate: -LINE321="STATE034; STATE000(999999)" -LINE322="STATE035; STATE000(99)" +LINE83="STATE000; CALL VRDModulate" +LINE84="STATE000; RETURN TestBrokenReadout" +LINE85=EvacuateE: +LINE86="STATE000; CALL EvacuateEStart" +LINE87="STATE000; CALL Wait1ms" +LINE88="STATE000; CALL EvacuateEFinish" +LINE89="STATE000; RETURN EvacuateE" +LINE90=EvacuateF: +LINE91="STATE000; CALL EvacuateFStart" +LINE92="STATE000; CALL Wait1ms" +LINE93="STATE000; CALL EvacuateFFinish" +LINE94="STATE000; RETURN EvacuateF" +LINE95=Integrate: +LINE96="STATE000; CALL KeepThisFrame" +LINE97="STATE000; CALL ReadPixels(1094)" +LINE98="STATE000; if illum CALL OpenShutter" +LINE99="STATE000; CALL Wait1ms(integrate_illum_ms)" +LINE100="STATE000; CALL Wait1s(integrate_illum_s)" +LINE101="STATE000; if illum CALL CloseShutter" +LINE102="STATE000; CALL Wait1ms(integrate_ms)" +LINE103="STATE000; CALL Wait1s(integrate_s)" +LINE104="STATE000; RETURN Integrate" +LINE105=ReadoutKeep: +LINE106="STATE000; CALL ReadoutBegin" +LINE107="STATE000; if llel_coincident CALL FrameReadout" +LINE108="STATE000; if llel_seq CALL FrameReadout" +LINE109="STATE000; if slow_pix CALL FrameReadout" +LINE110="STATE000; if linbin CALL FrameReadout" +LINE111="STATE000; if dch_llel CALL FrameReadoutTDCllel" +LINE112="STATE000; if dch_ser CALL FrameReadoutTDCser" +LINE113="STATE000; framecount--" +LINE114="STATE000; RETURN ReadoutKeep" +LINE115=FrameReadoutTDCllel: +LINE116="STATE000; CALL Wait1us(50)" +LINE117="STATE000; CALL DumpPixels(1094)" +LINE118="STATE000; CALL FrameReadoutTDCllel_Innerloop(68)" +LINE119="STATE000; CALL LineReadout(44)" +LINE120="STATE000; CALL ReadoutEnd" +LINE121="STATE000; CALL linbindecr(llel_bin)" +LINE122="STATE000; CALL linbinincr" +LINE123="STATE000; RETURN FrameReadoutTDCllel" +LINE124=FrameReadoutTDCllel_Innerloop: +LINE125="STATE000; CALL LineReadoutAOnly(60)" +LINE126="STATE000; CALL ForwardParallelSectionBNoCoincident(llel_bin)" +LINE127="STATE000; CALL linbinincr(1)" +LINE128="STATE000; RETURN FrameReadoutTDCllel_Innerloop" +LINE129=FrameReadoutTDCser: +LINE130="STATE000; CALL Wait1us(50)" +LINE131="STATE000; CALL DumpPixels(1094)" +LINE132="STATE000; CALL LineReadoutTDCser(4124)" +LINE133="STATE000; CALL ReadoutEnd" +LINE134="STATE000; RETURN FrameReadoutTDCser" +LINE135=LineReadoutTDCser: +LINE136="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE137="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE138="STATE000; CALL TDCser_Innerloop(49)" +LINE139="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(15)" +LINE140="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(15)" +LINE141="STATE000; if !dsch_ser_dump_bcs CALL TDCser_ReadoutLoop" +LINE142="STATE000; if dsch_ser_dump_bcs CALL TDCser_ReadoutLoopDumpBright" +LINE143="STATE000; if !dsch_ser_direction CALL EvacuateF" +LINE144="STATE000; if dsch_ser_direction CALL EvacuateE" +LINE145="STATE000; CALL serbindecr(ser_bin)" +LINE146="STATE000; CALL serbinincr" +LINE147="STATE000; RETURN LineReadoutTDCser" +LINE148=TDCser_ReadoutLoopDumpBright: +LINE149="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(50)" +LINE150="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(50)" +LINE151="STATE000; CALL TDCser_ReadoutLoopDumpBright_Inner(49)" +LINE152="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(15)" +LINE153="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(15)" +LINE154="STATE000; RETURN TDCser_ReadoutLoopDumpBright" +LINE155=TDCser_ReadoutLoop: +LINE156="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(1094)" +LINE157="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(1094)" +LINE158="STATE000; RETURN TDCser_ReadoutLoop" +LINE159=TDCser_ReadoutLoopDumpBright_Inner: +LINE160="STATE000; CALL trigpix" +LINE161="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly" +LINE162="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly" +LINE163="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(20)" +LINE164="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(20)" +LINE165="STATE000; RETURN TDCser_ReadoutLoopDumpBright_Inner" +LINE166=TDCser_Innerloop: +LINE167="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(21)" +LINE168="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(21)" +LINE169="STATE000; if !dsch_ser_direction CALL SerialFBackwards(ser_bin)" +LINE170="STATE000; if dsch_ser_direction CALL SerialEBackwards(ser_bin)" +LINE171="STATE000; CALL serbinincr(1)" +LINE172="STATE000; RETURN TDCser_Innerloop" +LINE173=serbinincr: +LINE174="STATE000; ser_bin++" +LINE175="STATE000; RETURN serbinincr" +LINE176=serbindecr: +LINE177="STATE000; ser_bin--" +LINE178="STATE000; RETURN serbindecr" +LINE179=FrameReadout: +LINE180="STATE000; CALL Wait1us(50)" +LINE181="STATE000; CALL DumpPixels(1094)" +LINE182="STATE000; if tdi_wait_us CALL OpenShutter" +LINE183="STATE000; IF llel_seq CALL LineReadout(4124)" +LINE184="STATE000; IF llel_coincident CALL LineReadoutCoincident(4124)" +LINE185="STATE000; IF slow_pix CALL LineReadoutSlowPix(4124)" +LINE186="STATE000; IF linbin CALL LineReadout(90)" +LINE187="STATE000; IF linbin CALL LineReadoutFast(4034)" +LINE188="STATE000; if tdi_wait_us CALL CloseShutter" +LINE189="STATE000; CALL ReadoutEnd" +LINE190="STATE000; if linbin CALL linbindecr(llel_bin)" +LINE191="STATE000; if linbin CALL linbinincr" +LINE192="STATE000; RETURN FrameReadout" +LINE193=Wait1s: +LINE194="STATE000; if abortintegrate CALL abortintegration" +LINE195="STATE000; CALL Wait1ms(1000)" +LINE196="STATE000; RETURN Wait1s" +LINE197=abortintegration: +LINE198="STATE000; CALL CloseShutter" +LINE199="STATE000; GOTO StartSeqSummitMode" +LINE200=LineReadoutSlowPix: +LINE201="STATE000; CALL ParallelForwardNoCoincident" +LINE202="STATE000; CALL Wait1us(50)" +LINE203="STATE000; CALL ReadPixelsSlow(1094)" +LINE204="STATE000; CALL Wait1us(10)" +LINE205="STATE000; RETURN LineReadoutSlowPix" +LINE206=linbinincrcheck: +LINE207="STATE000; if framecount CALL linbinincr" +LINE208="STATE000; RETURN linbinincrcheck" +LINE209=linbinincr: +LINE210="STATE000; llel_bin++" +LINE211="STATE000; RETURN linbinincr" +LINE212=linbindecr: +LINE213="STATE000; llel_bin--" +LINE214="STATE000; RETURN linbindecr" +LINE215=LineReadoutFast: +LINE216="STATE000; CALL ParallelForwardNoCoincident" +LINE217="STATE000; CALL ReadPixels(1094)" +LINE218="STATE000; RETURN LineReadoutFast" +LINE219=LineReadout: +LINE220="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE221="STATE000; if linbin CALL linbinincr" +LINE222="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE223="STATE000; if enable_ser_bin CALL ReadPixels(50)" +LINE224="STATE000; if enable_ser_bin CALL SerBinReadPixels(1024)" +LINE225="STATE000; if enable_ser_bin CALL ReadPixels(20)" +LINE226="STATE000; if !enable_ser_bin CALL ReadPixels(1094)" +LINE227="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE228="STATE000; RETURN LineReadout" +LINE229=SerBinReadPixels: +LINE230="STATE000; CALL PrepSerBin" +LINE231="STATE000; CALL serbindecr" +LINE232="STATE000; CALL SerialBinForwards(ser_bin)" +LINE233="STATE000; CALL ReadPixels" +LINE234="STATE000; CALL serbinincr" +LINE235="STATE000; RETURN SerBinReadPixels" +LINE236=LineReadoutCoincident: +LINE237="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE238="STATE000; CALL ParallelForwardSegment1" +LINE239="STATE000; CALL TransferToSerialRegisterCoincident" +LINE240="STATE000; CALL ReadPixels(364)" +LINE241="STATE000; CALL ParallelForwardSegment2" +LINE242="STATE000; CALL ReadPixels(364)" +LINE243="STATE000; CALL ParallelForwardSegment3" +LINE244="STATE000; CALL ReadPixels(364) CALL ReadPixels(2)" +LINE245="STATE000; RETURN LineReadoutCoincident" +LINE246=LineReadoutAOnly: +LINE247="STATE000; CALL ForwardParallelSectionANoCoincident" +LINE248="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE249="STATE000; CALL ReadPixels(1094)" +LINE250="STATE000; RETURN LineReadoutAOnly" +LINE251=LineReadoutAOnlyCoincident: +LINE252="STATE000; CALL TransferToSerialRegisterCoincident" +LINE253="STATE000; CALL ReadPixels(50)" +LINE254="STATE000; CALL ParallelForwardSectionASegment1" +LINE255="STATE000; CALL ReadPixels(364)" +LINE256="STATE000; CALL ParallelForwardSectionASegment2" +LINE257="STATE000; CALL ReadPixels(364)" +LINE258="STATE000; CALL ParallelForwardSectionASegment3" +LINE259="STATE000; CALL ReadPixels(364)" +LINE260="STATE000; CALL ReadPixels(2)" +LINE261="STATE000; RETURN LineReadoutAOnlyCoincident" +LINE262=Wait1us: +LINE263="STATE001; STATE000(98)" +LINE264="STATE000; RETURN Wait1us" +LINE265=Wait1ms: +LINE266="STATE001; STATE000(99998)" +LINE267="STATE000; RETURN Wait1ms" +LINE268=KeepThisFrame: +LINE269="STATE002;" +LINE270="STATE003; RETURN KeepThisFrame" +LINE271=InitialSetup: +LINE272="STATE004; STATE000(999)" +LINE273="STATE005; STATE000(9999)" +LINE274="STATE001; RETURN InitialSetup" +LINE275=InitialSetupFCS: +LINE276="STATE006; STATE000(999)" +LINE277="STATE007; STATE000(9999)" +LINE278="STATE001; RETURN InitialSetupFCS" +LINE279=OpenShutter: +LINE280="STATE008; RETURN OpenShutter" +LINE281=CloseShutter: +LINE282="STATE009; RETURN CloseShutter" +LINE283=ReadoutBegin: +LINE284="STATE010; RETURN ReadoutBegin" +LINE285=ReadoutEnd: +LINE286="STATE011; RETURN ReadoutEnd" +LINE287=TransferToSerialRegisterCoincident: +LINE288="STATE012; STATE000(999)" +LINE289="STATE013; STATE000(49)" +LINE290="STATE014; STATE000(49)" +LINE291="STATE015; RETURN TransferToSerialRegisterCoincident" +LINE292=ParallelForwardNoCoincident: +LINE293="STATE001; STATE000(999)" +LINE294="STATE016; STATE000(999)" +LINE295="STATE017; STATE000(999)" +LINE296="STATE018; STATE000(999)" +LINE297="STATE019; STATE000(199)" +LINE298="STATE020; STATE000(49)" +LINE299="STATE021; STATE000(299)" +LINE300="STATE022; STATE000(49)" +LINE301="STATE015; STATE000(399)" +LINE302="STATE023; STATE000(999)" +LINE303="STATE024; STATE000(999)" +LINE304="STATE001; RETURN ParallelForwardNoCoincident" +LINE305=ParallelForwardSegment1: +LINE306="STATE025; RETURN ParallelForwardSegment1" +LINE307=ParallelForwardSegment2: +LINE308="STATE026; RETURN ParallelForwardSegment2" +LINE309=ParallelForwardSegment3: +LINE310="STATE027; RETURN ParallelForwardSegment3" +LINE311=OutputTestSetup: +LINE312="STATE028; STATE000(999999)" +LINE313="STATE001; RETURN OutputTestSetup" +LINE314=PulseTGA: +LINE315="STATE029; STATE000(2499)" +LINE316="STATE030; STATE000(2499)" +LINE317="STATE031; RETURN PulseTGA" +LINE318=VRDModulate: +LINE319="STATE032; STATE000(999999)" +LINE320="STATE033; STATE000(99)" +LINE321="STATE034; STATE000(99)" +LINE322="STATE035; STATE000(999999)" LINE323="STATE033; STATE000(99)" -LINE324="STATE036; STATE000(999999)" -LINE325="STATE035; STATE000(99)" +LINE324="STATE034; STATE000(99)" +LINE325="STATE036; STATE000(999999)" LINE326="STATE033; STATE000(99)" -LINE327="STATE037; STATE000(999999)" -LINE328="STATE035; STATE000(99)" +LINE327="STATE034; STATE000(99)" +LINE328="STATE037; STATE000(999999)" LINE329="STATE033; STATE000(99)" -LINE330="STATE038; STATE000(999999)" -LINE331="STATE035; STATE000(99)" +LINE330="STATE034; STATE000(99)" +LINE331="STATE038; STATE000(999999)" LINE332="STATE033; STATE000(99)" -LINE333="STATE039; STATE000(999999)" -LINE334="STATE035; STATE000(99)" +LINE333="STATE034; STATE000(99)" +LINE334="STATE039; STATE000(999999)" LINE335="STATE033; STATE000(99)" -LINE336="STATE040; STATE000(999999)" -LINE337="STATE035; STATE000(99)" +LINE336="STATE034; STATE000(99)" +LINE337="STATE040; STATE000(999999)" LINE338="STATE033; STATE000(99)" -LINE339="STATE041; STATE000(999999)" -LINE340="STATE035; STATE000(99)" +LINE339="STATE034; STATE000(99)" +LINE340="STATE039; STATE000(999999)" LINE341="STATE033; STATE000(99)" -LINE342="STATE040; STATE000(999999)" -LINE343="STATE035; STATE000(99)" +LINE342="STATE034; STATE000(99)" +LINE343="STATE038; STATE000(999999)" LINE344="STATE033; STATE000(99)" -LINE345="STATE039; STATE000(999999)" -LINE346="STATE035; STATE000(99)" +LINE345="STATE034; STATE000(99)" +LINE346="STATE037; STATE000(999999)" LINE347="STATE033; STATE000(99)" -LINE348="STATE038; STATE000(999999)" -LINE349="STATE035; STATE000(99)" +LINE348="STATE034; STATE000(99)" +LINE349="STATE036; STATE000(999999)" LINE350="STATE033; STATE000(99)" -LINE351="STATE037; STATE000(999999)" -LINE352="STATE035; STATE000(99)" -LINE353="STATE033; STATE000(99)" -LINE354="STATE036; RETURN VRDModulate" -LINE355=ReadPixels: -LINE356="STATE042;" -LINE357="STATE043; STATE000(58)" -LINE358="STATE044;" -LINE359="STATE033; STATE000(298)" -LINE360="STATE045; STATE000(199)" -LINE361="STATE046; STATE000(59)" -LINE362="STATE001; RETURN ReadPixels" -LINE363=ReadPixelsSlow: -LINE364="STATE047;" -LINE365="STATE043; STATE000(13)" -LINE366="STATE048; STATE000(14)" -LINE367="STATE049; STATE000(4)" -LINE368="STATE050; STATE000(9)" -LINE369="STATE051; STATE000(15)" -LINE370="STATE033; STATE000(118)" -LINE371="STATE052; STATE000(14)" -LINE372="STATE053; STATE000(14)" -LINE373="STATE045; STATE000(116)" -LINE374="STATE001; RETURN ReadPixelsSlow" -LINE375=ForwardParallelSectionANoCoincident: -LINE376="STATE001; STATE000(999)" -LINE377="STATE054; STATE000(999)" -LINE378="STATE055; STATE000(999)" -LINE379="STATE056; STATE000(999)" -LINE380="STATE057; STATE000(199)" +LINE351="STATE034; STATE000(99)" +LINE352="STATE035; RETURN VRDModulate" +LINE353=ReadPixels: +LINE354="STATE041;" +LINE355="STATE042; STATE000(58)" +LINE356="STATE043;" +LINE357="STATE031; STATE000(298)" +LINE358="STATE044; STATE000(199)" +LINE359="STATE045; STATE000(59)" +LINE360="STATE001; RETURN ReadPixels" +LINE361=ReadPixelsSlow: +LINE362="STATE046;" +LINE363="STATE042; STATE000(13)" +LINE364="STATE047; STATE000(14)" +LINE365="STATE048; STATE000(4)" +LINE366="STATE049; STATE000(9)" +LINE367="STATE050; STATE000(15)" +LINE368="STATE031; STATE000(118)" +LINE369="STATE051; STATE000(14)" +LINE370="STATE052; STATE000(14)" +LINE371="STATE044; STATE000(116)" +LINE372="STATE001; RETURN ReadPixelsSlow" +LINE373=ForwardParallelSectionANoCoincident: +LINE374="STATE001; STATE000(999)" +LINE375="STATE053; STATE000(999)" +LINE376="STATE054; STATE000(999)" +LINE377="STATE055; STATE000(999)" +LINE378="STATE056; STATE000(199)" +LINE379="STATE057; STATE000(49)" +LINE380="STATE021; STATE000(299)" LINE381="STATE058; STATE000(49)" -LINE382="STATE021; STATE000(299)" -LINE383="STATE059; STATE000(49)" -LINE384="STATE015; STATE000(399)" -LINE385="STATE060; STATE000(999)" -LINE386="STATE061; STATE000(999)" -LINE387="STATE001; RETURN ForwardParallelSectionANoCoincident" -LINE388=ForwardParallelSectionBNoCoincident: -LINE389="STATE001; STATE000(999)" -LINE390="STATE062; STATE000(999)" -LINE391="STATE063; STATE000(999)" -LINE392="STATE064; STATE000(999)" -LINE393="STATE065; STATE000(999)" -LINE394="STATE066; STATE000(999)" -LINE395="STATE067; STATE000(999)" -LINE396="STATE001; RETURN ForwardParallelSectionBNoCoincident" -LINE397=ForwardParallelSectionA: -LINE398="STATE068; STATE000(364665)" -LINE399="STATE069; STATE000(364666)" -LINE400="STATE070; RETURN ForwardParallelSectionA" -LINE401=ForwardParallelSectionB: -LINE402="STATE071; STATE000(364665)" -LINE403="STATE072; STATE000(364666)" -LINE404="STATE073; RETURN ForwardParallelSectionB" -LINE405=ForwardParallelAll: -LINE406="STATE026; STATE000(364665)" -LINE407="STATE027; STATE000(364666)" -LINE408="STATE025; RETURN ForwardParallelAll" -LINE409=ParallelForwardSectionASegment1: -LINE410="STATE068; RETURN ParallelForwardSectionASegment1" -LINE411=ParallelForwardSectionASegment2: -LINE412="STATE069; RETURN ParallelForwardSectionASegment2" -LINE413=ParallelForwardSectionASegment3: -LINE414="STATE070; RETURN ParallelForwardSectionASegment3" -LINE415=Wait10us: -LINE416="STATE000; STATE000(999)" -LINE417="STATE001; RETURN Wait10us" -LINE418=ReadPixelsEOnly: +LINE382="STATE015; STATE000(399)" +LINE383="STATE059; STATE000(999)" +LINE384="STATE060; STATE000(999)" +LINE385="STATE001; RETURN ForwardParallelSectionANoCoincident" +LINE386=ForwardParallelSectionBNoCoincident: +LINE387="STATE001; STATE000(999)" +LINE388="STATE061; STATE000(999)" +LINE389="STATE062; STATE000(999)" +LINE390="STATE063; STATE000(999)" +LINE391="STATE064; STATE000(999)" +LINE392="STATE065; STATE000(999)" +LINE393="STATE066; STATE000(999)" +LINE394="STATE001; RETURN ForwardParallelSectionBNoCoincident" +LINE395=ForwardParallelSectionA: +LINE396="STATE067; STATE000(364665)" +LINE397="STATE068; STATE000(364666)" +LINE398="STATE069; RETURN ForwardParallelSectionA" +LINE399=ForwardParallelSectionB: +LINE400="STATE070; STATE000(364665)" +LINE401="STATE071; STATE000(364666)" +LINE402="STATE072; RETURN ForwardParallelSectionB" +LINE403=ForwardParallelAll: +LINE404="STATE026; STATE000(364665)" +LINE405="STATE027; STATE000(364666)" +LINE406="STATE025; RETURN ForwardParallelAll" +LINE407=ParallelForwardSectionASegment1: +LINE408="STATE067; RETURN ParallelForwardSectionASegment1" +LINE409=ParallelForwardSectionASegment2: +LINE410="STATE068; RETURN ParallelForwardSectionASegment2" +LINE411=ParallelForwardSectionASegment3: +LINE412="STATE069; RETURN ParallelForwardSectionASegment3" +LINE413=Wait10us: +LINE414="STATE000; STATE000(999)" +LINE415="STATE001; RETURN Wait10us" +LINE416=ReadPixelsEOnly: +LINE417="STATE073;" +LINE418="STATE042; STATE000(58)" LINE419="STATE074;" -LINE420="STATE043; STATE000(58)" -LINE421="STATE075;" -LINE422="STATE033; STATE000(298)" -LINE423="STATE045; STATE000(199)" -LINE424="STATE076; STATE000(59)" -LINE425="STATE001; RETURN ReadPixelsEOnly" -LINE426=ReadPixelsFOnly: +LINE420="STATE031; STATE000(298)" +LINE421="STATE044; STATE000(199)" +LINE422="STATE075; STATE000(59)" +LINE423="STATE001; RETURN ReadPixelsEOnly" +LINE424=ReadPixelsFOnly: +LINE425="STATE076;" +LINE426="STATE042; STATE000(58)" LINE427="STATE077;" -LINE428="STATE043; STATE000(58)" -LINE429="STATE078;" -LINE430="STATE033; STATE000(298)" -LINE431="STATE045; STATE000(129)" -LINE432="STATE079; STATE000(79)" -LINE433="STATE001; RETURN ReadPixelsFOnly" -LINE434=PrepSerBin: -LINE435="STATE035; STATE000(39)" -LINE436="STATE049; STATE000(19)" -LINE437="STATE033; RETURN PrepSerBin" -LINE438=SerialBinForwards: -LINE439="STATE080; STATE000(39)" -LINE440="STATE081; STATE000(39)" -LINE441="STATE046; STATE000(39)" -LINE442="STATE080; STATE000(39)" -LINE443="STATE001; RETURN SerialBinForwards" -LINE444=DumpPixels: -LINE445="STATE082; STATE000(39)" -LINE446="STATE044; STATE000(19)" -LINE447="STATE033; STATE000(279)" -LINE448="STATE045; STATE000(199)" -LINE449="STATE083; STATE000(59)" -LINE450="STATE001; RETURN DumpPixels" -LINE451=trigpix: -LINE452="STATE084;" -LINE453="STATE085; RETURN trigpix" -LINE454=DumpPixelsEOnly: -LINE455="STATE086; STATE000(39)" -LINE456="STATE075; STATE000(299)" -LINE457="STATE045; STATE000(199)" -LINE458="STATE087; STATE000(59)" -LINE459="STATE001; RETURN DumpPixelsEOnly" -LINE460=DumpPixelsFOnly: -LINE461="STATE088; STATE000(39)" -LINE462="STATE078; STATE000(299)" -LINE463="STATE045; STATE000(129)" -LINE464="STATE089; STATE000(79)" -LINE465="STATE001; RETURN DumpPixelsFOnly" -LINE466=SerialFBackwards: -LINE467="STATE090; STATE000(29)" -LINE468="STATE091; STATE000(29)" -LINE469="STATE092; STATE000(29)" -LINE470="STATE093; STATE000(29)" -LINE471="STATE094; RETURN SerialFBackwards" -LINE472=SerialEBackwards: -LINE473="STATE095; STATE000(29)" -LINE474="STATE096; STATE000(29)" -LINE475="STATE097; STATE000(29)" -LINE476="STATE094; STATE000(29)" -LINE477="STATE093; RETURN SerialEBackwards" -LINE478=EvacuateFFinish: -LINE479="STATE098; STATE000(1999)" -LINE480="STATE099; STATE000(499)" -LINE481="STATE001; RETURN EvacuateFFinish" -LINE482=EvacuateFStart: -LINE483="STATE100; RETURN EvacuateFStart" -LINE484=EvacuateEFinish: -LINE485="STATE098; STATE000(1999)" -LINE486="STATE101; STATE000(499)" -LINE487="STATE001; RETURN EvacuateEFinish" -LINE488=EvacuateEStart: -LINE489="STATE102; RETURN EvacuateEStart" -LINE490=BounceTGTest: -LINE491="STATE103;" -LINE492="STATE085; STATE000(498)" -LINE493="STATE032; STATE000(199)" -LINE494="STATE001; RETURN BounceTGTest" -LINE495=ClampTestInner: -LINE496="STATE103;" -LINE497="STATE085; STATE000(98)" -LINE498="STATE032; STATE000(99)" -LINE499="STATE001; RETURN ClampTestInner" -LINE500=ClampOn: -LINE501="STATE021; RETURN ClampOn" -LINE502=ClampOnFCS: -LINE503="STATE104; RETURN ClampOnFCS" -LINE504=ClampOff: -LINE505="STATE015; RETURN ClampOff" -LINE506=ClampOffFCS: -LINE507="STATE105; RETURN ClampOffFCS" -LINE508=ClampTestLineStart: -LINE509="STATE003; RETURN ClampTestLineStart" -LINE510=TGTestLineStart: -LINE511="STATE106; STATE000(99)" -LINE512="STATE015; RETURN TGTestLineStart" -LINE513=setupTGTest: -LINE514="STATE107; RETURN setupTGTest" -LINE515=FCSParallelForward: -LINE516="STATE108; STATE000(499)" -LINE517="STATE109; STATE000(499)" -LINE518="STATE110; STATE000(499)" -LINE519="STATE111; STATE000(499)" -LINE520="STATE112; STATE000(499)" -LINE521="STATE113; STATE000(499)" -LINE522="STATE114; STATE000(999)" -LINE523="STATE001; RETURN FCSParallelForward" -LINE524=FCSSplitReadout: -LINE525="STATE084;" -LINE526="STATE115; STATE000(239)" -LINE527="STATE116; STATE000(239)" -LINE528="STATE117; STATE000(239)" -LINE529="STATE118; STATE000(239)" -LINE530="STATE119; STATE000(239)" -LINE531="STATE120; STATE000(479)" -LINE532="STATE001; RETURN FCSSplitReadout" -LINE533=DumpPixelsFCS: -LINE534="STATE121; STATE000(239)" -LINE535="STATE116; STATE000(239)" -LINE536="STATE122; STATE000(239)" -LINE537="STATE118; STATE000(239)" -LINE538="STATE119; STATE000(239)" -LINE539="STATE123; STATE000(239)" -LINE540="STATE124; RETURN DumpPixelsFCS" -LINES=541 +LINE428="STATE031; STATE000(298)" +LINE429="STATE044; STATE000(129)" +LINE430="STATE078; STATE000(79)" +LINE431="STATE001; RETURN ReadPixelsFOnly" +LINE432=PrepSerBin: +LINE433="STATE079; STATE000(39)" +LINE434="STATE048; STATE000(19)" +LINE435="STATE031; RETURN PrepSerBin" +LINE436=SerialBinForwards: +LINE437="STATE080; STATE000(39)" +LINE438="STATE081; STATE000(39)" +LINE439="STATE045; STATE000(39)" +LINE440="STATE080; STATE000(39)" +LINE441="STATE001; RETURN SerialBinForwards" +LINE442=DumpPixels: +LINE443="STATE082; STATE000(39)" +LINE444="STATE043; STATE000(19)" +LINE445="STATE031; STATE000(279)" +LINE446="STATE044; STATE000(199)" +LINE447="STATE083; STATE000(59)" +LINE448="STATE001; RETURN DumpPixels" +LINE449=trigpix: +LINE450="STATE084;" +LINE451="STATE085; RETURN trigpix" +LINE452=DumpPixelsEOnly: +LINE453="STATE086; STATE000(39)" +LINE454="STATE074; STATE000(299)" +LINE455="STATE044; STATE000(199)" +LINE456="STATE087; STATE000(59)" +LINE457="STATE001; RETURN DumpPixelsEOnly" +LINE458=DumpPixelsFOnly: +LINE459="STATE088; STATE000(39)" +LINE460="STATE077; STATE000(299)" +LINE461="STATE044; STATE000(129)" +LINE462="STATE089; STATE000(79)" +LINE463="STATE001; RETURN DumpPixelsFOnly" +LINE464=SerialFBackwards: +LINE465="STATE090; STATE000(29)" +LINE466="STATE091; STATE000(29)" +LINE467="STATE092; STATE000(29)" +LINE468="STATE093; STATE000(29)" +LINE469="STATE094; RETURN SerialFBackwards" +LINE470=SerialEBackwards: +LINE471="STATE095; STATE000(29)" +LINE472="STATE096; STATE000(29)" +LINE473="STATE097; STATE000(29)" +LINE474="STATE094; STATE000(29)" +LINE475="STATE093; RETURN SerialEBackwards" +LINE476=EvacuateFFinish: +LINE477="STATE098; STATE000(1999)" +LINE478="STATE099; STATE000(499)" +LINE479="STATE001; RETURN EvacuateFFinish" +LINE480=EvacuateFStart: +LINE481="STATE100; RETURN EvacuateFStart" +LINE482=EvacuateEFinish: +LINE483="STATE098; STATE000(1999)" +LINE484="STATE101; STATE000(499)" +LINE485="STATE001; RETURN EvacuateEFinish" +LINE486=EvacuateEStart: +LINE487="STATE102; RETURN EvacuateEStart" +LINE488=BounceTGTest: +LINE489="STATE103;" +LINE490="STATE085; STATE000(498)" +LINE491="STATE030; STATE000(199)" +LINE492="STATE001; RETURN BounceTGTest" +LINE493=ClampTestInner: +LINE494="STATE103;" +LINE495="STATE085; STATE000(98)" +LINE496="STATE030; STATE000(99)" +LINE497="STATE001; RETURN ClampTestInner" +LINE498=ClampOn: +LINE499="STATE021; RETURN ClampOn" +LINE500=ClampOnFCS: +LINE501="STATE104; RETURN ClampOnFCS" +LINE502=ClampOff: +LINE503="STATE015; RETURN ClampOff" +LINE504=ClampOffFCS: +LINE505="STATE105; RETURN ClampOffFCS" +LINE506=ClampTestLineStart: +LINE507="STATE003; RETURN ClampTestLineStart" +LINE508=TGTestLineStart: +LINE509="STATE106; STATE000(99)" +LINE510="STATE015; RETURN TGTestLineStart" +LINE511=setupTGTest: +LINE512="STATE107; RETURN setupTGTest" +LINE513=FCSParallelForward: +LINE514="STATE108; STATE000(99)" +LINE515="STATE105; STATE000(899)" +LINE516="STATE109; STATE000(999)" +LINE517="STATE110; STATE000(999)" +LINE518="STATE111; STATE000(999)" +LINE519="STATE112; STATE000(999)" +LINE520="STATE113; RETURN FCSParallelForward" +LINE521=FCSSplitReadout: +LINE522="STATE084;" +LINE523="STATE114; STATE000(39)" +LINE524="STATE115; STATE000(39)" +LINE525="STATE116; STATE000(39)" +LINE526="STATE034; STATE000(39)" +LINE527="STATE117; STATE000(39)" +LINE528="STATE118; STATE000(39)" +LINE529="STATE119; STATE000(39)" +LINE530="STATE120; STATE000(299)" +LINE531="STATE001; RETURN FCSSplitReadout" +LINE532=DumpPixelsFCS: +LINE533="STATE121; STATE000(39)" +LINE534="STATE117; STATE000(39)" +LINE535="STATE116; STATE000(39)" +LINE536="STATE115; STATE000(39)" +LINE537="STATE122; STATE000(39)" +LINE538="STATE119; STATE000(39)" +LINE539="STATE123; RETURN DumpPixelsFCS" +LINES=540 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=6.6666 MOD1\SLOWSLEWRATE1=0.0303 @@ -729,19 +714,19 @@ MOD3\FASTSLEWRATE6=50.0000 MOD3\SLOWSLEWRATE6=3.0030 MOD3\LABEL6=Serial F1 MOD3\ENABLE7=1 -MOD3\FASTSLEWRATE7=6.6666 +MOD3\FASTSLEWRATE7=4.0000 MOD3\SLOWSLEWRATE7=0.0303 MOD3\LABEL7=FCS PPhase3U MOD3\ENABLE8=1 -MOD3\FASTSLEWRATE8=6.6666 +MOD3\FASTSLEWRATE8=4.0000 MOD3\SLOWSLEWRATE8=0.0303 MOD3\LABEL8=FCS PPhase3L MOD3\ENABLE9=1 -MOD3\FASTSLEWRATE9=6.6666 +MOD3\FASTSLEWRATE9=4.0000 MOD3\SLOWSLEWRATE9=0.0303 MOD3\LABEL9=FCS PPhase2 MOD3\ENABLE10=1 -MOD3\FASTSLEWRATE10=6.6666 +MOD3\FASTSLEWRATE10=4.0000 MOD3\SLOWSLEWRATE10=0.0303 MOD3\LABEL10=FCS PPhase1 MOD3\ENABLE11=1 @@ -782,7 +767,7 @@ MOD9\HVLC_LABEL10=FCS2 Reset Drain A MOD9\HVLC_V11=14.00 MOD9\HVLC_ORDER11=2 MOD9\HVLC_LABEL11=FCS2 Reset Drain B -MOD9\HVLC_V12=13.00 +MOD9\HVLC_V12=14.90 MOD9\HVLC_ORDER12=1 MOD9\HVLC_LABEL12=FCS Overflow Drain MOD9\HVLC_V13=24.3 @@ -895,7 +880,7 @@ MOD10\LVLC_ORDER20=0 MOD10\LVLC_V21=0.0 MOD10\LVLC_ORDER21=0 MOD10\LVLC_V22=0.0 -MOD10\LVLC_ORDER22=0 +MOD10\LVLC_ORDER22=6 MOD10\LVLC_LABEL22=Video offset FCS MOD10\LVLC_V23=0.5 MOD10\LVLC_ORDER23=6 @@ -914,15 +899,15 @@ MOD10\LVHC_IL2=20.0 MOD10\LVHC_ORDER2=5 MOD10\LVHC_LABEL2=SCI Summing Well - High MOD10\LVHC_ENABLE3=1 -MOD10\LVHC_V3=5.5 +MOD10\LVHC_V3=12.0 MOD10\LVHC_IL3=20.0 MOD10\LVHC_ORDER3=5 -MOD10\LVHC_LABEL3=SCI Reset Gate - Low +MOD10\LVHC_LABEL3=SCI Reset Gate - High MOD10\LVHC_ENABLE4=1 -MOD10\LVHC_V4=12.0 +MOD10\LVHC_V4=5.5 MOD10\LVHC_IL4=20.0 MOD10\LVHC_ORDER4=5 -MOD10\LVHC_LABEL4=SCI Reset Gate - High +MOD10\LVHC_LABEL4=SCI Reset Gate - Low MOD10\LVHC_ENABLE5=0 MOD10\LVHC_V5=0.0 MOD10\LVHC_IL5=0.0 @@ -1062,7 +1047,7 @@ STATE5\MOD9="0,1,0" STATE5\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE6\NAME=STATE006 STATE6\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE6\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,-6,1,0,,1,1,,1,1,,1,1" +STATE6\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,4,1,0,-4,1,0,,1,1,,1,1,,1,1" STATE6\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE6\MOD12="1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE6\MOD4="0,1,0,0,1,0" @@ -1071,8 +1056,8 @@ STATE6\MOD9="0,1,0" STATE6\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE7\NAME=STATE007 STATE7\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE7\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE7\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,2,1,0,2,1,0,,1,1,,1,1" +STATE7\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,-5,1,0,5,1,0,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1" +STATE7\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,-10,1,0,-10,1,0,-10,1,0,,1,1,,1,1" STATE7\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE7\MOD4="0,1,0,0,1,0" STATE7\CONTROL="0,3F" @@ -1260,27 +1245,27 @@ STATE27\MOD9="0,1,0" STATE27\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE28\NAME=STATE028 STATE28\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE28\MOD2="12,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE28\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,12,1,0" -STATE28\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE28\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,12,1,0,4,1,0,,1,1,,1,1,,1,1" +STATE28\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE28\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE28\MOD4="0,1,0,0,1,0" STATE28\CONTROL="0,3F" -STATE28\MOD9="1,6,17" +STATE28\MOD9="" STATE28\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE29\NAME=STATE029 STATE29\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE29\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE29\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" -STATE29\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE29\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE29\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE29\MOD4="0,1,0,0,1,0" STATE29\CONTROL="0,3F" STATE29\MOD9="0,1,0" STATE29\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE30\NAME=STATE030 -STATE30\MOD1="10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0" +STATE30\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE30\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE30\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE30\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE30\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE30\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE30\MOD4="0,1,0,0,1,0" STATE30\CONTROL="0,3F" STATE30\MOD9="0,1,0" @@ -1288,8 +1273,8 @@ STATE30\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE31\NAME=STATE031 STATE31\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE31\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE31\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" -STATE31\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE31\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE31\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE31\MOD4="0,1,0,0,1,0" STATE31\CONTROL="0,3F" STATE31\MOD9="0,1,0" @@ -1297,38 +1282,38 @@ STATE31\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE32\NAME=STATE032 STATE32\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE32\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE32\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE32\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE32\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE32\MOD4="0,1,0,0,1,0" STATE32\CONTROL="0,3F" -STATE32\MOD9="0,1,0" +STATE32\MOD9="" STATE32\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE33\NAME=STATE033 STATE33\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE33\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE33\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE33\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE33\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE33\MOD4="0,1,0,0,1,0" STATE33\CONTROL="0,3F" STATE33\MOD9="0,1,0" STATE33\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE34\NAME=STATE034 STATE34\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE34\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE34\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,4,1,0,,1,1,,1,1,,1,1,,1,1" STATE34\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE34\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE34\MOD4="0,1,0,0,1,0" STATE34\CONTROL="0,3F" -STATE34\MOD9="1,6,14" +STATE34\MOD9="0,1,0" STATE34\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE35\NAME=STATE035 STATE35\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE35\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE35\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE35\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE35\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE35\MOD4="0,1,0,0,1,0" STATE35\CONTROL="0,3F" -STATE35\MOD9="0,1,0" +STATE35\MOD9="" STATE35\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE36\NAME=STATE036 STATE36\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1337,7 +1322,7 @@ STATE36\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE36\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE36\MOD4="0,1,0,0,1,0" STATE36\CONTROL="0,3F" -STATE36\MOD9="1,6,14.5" +STATE36\MOD9="" STATE36\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE37\NAME=STATE037 STATE37\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1346,7 +1331,7 @@ STATE37\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE37\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE37\MOD4="0,1,0,0,1,0" STATE37\CONTROL="0,3F" -STATE37\MOD9="1,6,15" +STATE37\MOD9="" STATE37\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE38\NAME=STATE038 STATE38\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1355,7 +1340,7 @@ STATE38\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE38\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE38\MOD4="0,1,0,0,1,0" STATE38\CONTROL="0,3F" -STATE38\MOD9="1,6,15.5" +STATE38\MOD9="" STATE38\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE39\NAME=STATE039 STATE39\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1364,7 +1349,7 @@ STATE39\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE39\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE39\MOD4="0,1,0,0,1,0" STATE39\CONTROL="0,3F" -STATE39\MOD9="1,6,16" +STATE39\MOD9="" STATE39\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE40\NAME=STATE040 STATE40\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1373,40 +1358,40 @@ STATE40\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE40\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE40\MOD4="0,1,0,0,1,0" STATE40\CONTROL="0,3F" -STATE40\MOD9="1,6,16.5" +STATE40\MOD9="" STATE40\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE41\NAME=STATE041 STATE41\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE41\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE41\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE41\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE41\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE41\MOD4="0,1,0,0,1,0" -STATE41\CONTROL="0,3F" -STATE41\MOD9="1,6,17" +STATE41\CONTROL="8,37" +STATE41\MOD9="0,1,0" STATE41\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE42\NAME=STATE042 STATE42\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE42\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE42\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE42\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE42\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE42\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE42\MOD4="0,1,0,0,1,0" -STATE42\CONTROL="8,37" +STATE42\CONTROL="0,31" STATE42\MOD9="0,1,0" STATE42\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE43\NAME=STATE043 STATE43\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE43\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE43\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE43\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE43\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE43\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE43\MOD4="0,1,0,0,1,0" -STATE43\CONTROL="0,31" +STATE43\CONTROL="0,3F" STATE43\MOD9="0,1,0" STATE43\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE44\NAME=STATE044 STATE44\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE44\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE44\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE44\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE44\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE44\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE44\MOD4="0,1,0,0,1,0" STATE44\CONTROL="0,3F" STATE44\MOD9="0,1,0" @@ -1414,8 +1399,8 @@ STATE44\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE45\NAME=STATE045 STATE45\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE45\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE45\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE45\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE45\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE45\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE45\MOD4="0,1,0,0,1,0" STATE45\CONTROL="0,3F" STATE45\MOD9="0,1,0" @@ -1423,26 +1408,26 @@ STATE45\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE46\NAME=STATE046 STATE46\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE46\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE46\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE46\MOD3=",1,1,,1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE46\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE46\MOD4="0,1,0,0,1,0" -STATE46\CONTROL="0,3F" +STATE46\CONTROL="8,37" STATE46\MOD9="0,1,0" STATE46\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE47\NAME=STATE047 STATE47\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE47\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE47\MOD3=",1,1,,1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE47\MOD3=",1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE47\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE47\MOD4="0,1,0,0,1,0" -STATE47\CONTROL="8,37" +STATE47\CONTROL="0,3F" STATE47\MOD9="0,1,0" STATE47\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE48\NAME=STATE048 STATE48\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE48\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE48\MOD3=",1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE48\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE48\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE48\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE48\MOD4="0,1,0,0,1,0" STATE48\CONTROL="0,3F" STATE48\MOD9="0,1,0" @@ -1450,8 +1435,8 @@ STATE48\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE49\NAME=STATE049 STATE49\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE49\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE49\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE49\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE49\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE49\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE49\MOD4="0,1,0,0,1,0" STATE49\CONTROL="0,3F" STATE49\MOD9="0,1,0" @@ -1459,7 +1444,7 @@ STATE49\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE50\NAME=STATE050 STATE50\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE50\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE50\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE50\MOD3=",1,1,,1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE50\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE50\MOD4="0,1,0,0,1,0" STATE50\CONTROL="0,3F" @@ -1468,7 +1453,7 @@ STATE50\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE51\NAME=STATE051 STATE51\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE51\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE51\MOD3=",1,1,,1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE51\MOD3=",1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE51\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE51\MOD4="0,1,0,0,1,0" STATE51\CONTROL="0,3F" @@ -1477,32 +1462,32 @@ STATE51\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE52\NAME=STATE052 STATE52\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE52\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE52\MOD3=",1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE52\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE52\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE52\MOD4="0,1,0,0,1,0" STATE52\CONTROL="0,3F" STATE52\MOD9="0,1,0" STATE52\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE53\NAME=STATE053 -STATE53\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE53\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE53\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE53\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE53\MOD1=",1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1" +STATE53\MOD2="12,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE53\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,12,1,0" +STATE53\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE53\MOD4="0,1,0,0,1,0" -STATE53\CONTROL="0,3F" +STATE53\CONTROL="4,3B" STATE53\MOD9="0,1,0" STATE53\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE54\NAME=STATE054 -STATE54\MOD1=",1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1" -STATE54\MOD2="12,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE54\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,12,1,0" -STATE54\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE54\MOD1=",1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1" +STATE54\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE54\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE54\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE54\MOD4="0,1,0,0,1,0" -STATE54\CONTROL="4,3B" +STATE54\CONTROL="0,3F" STATE54\MOD9="0,1,0" STATE54\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE55\NAME=STATE055 -STATE55\MOD1=",1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1" +STATE55\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" STATE55\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE55\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE55\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1511,43 +1496,43 @@ STATE55\CONTROL="0,3F" STATE55\MOD9="0,1,0" STATE55\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE56\NAME=STATE056 -STATE56\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE56\MOD1=",1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" STATE56\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE56\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE56\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" STATE56\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE56\MOD4="0,1,0,0,1,0" STATE56\CONTROL="0,3F" STATE56\MOD9="0,1,0" STATE56\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE57\NAME=STATE057 -STATE57\MOD1=",1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" -STATE57\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE57\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" -STATE57\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE57\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE57\MOD2="5,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE57\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" +STATE57\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE57\MOD4="0,1,0,0,1,0" STATE57\CONTROL="0,3F" STATE57\MOD9="0,1,0" STATE57\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE58\NAME=STATE058 STATE58\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE58\MOD2="5,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE58\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" -STATE58\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE58\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE58\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE58\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE58\MOD4="0,1,0,0,1,0" STATE58\CONTROL="0,3F" STATE58\MOD9="0,1,0" STATE58\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE59\NAME=STATE059 -STATE59\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE59\MOD1=",1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1" STATE59\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE59\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE59\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE59\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE59\MOD4="0,1,0,0,1,0" STATE59\CONTROL="0,3F" STATE59\MOD9="0,1,0" STATE59\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE60\NAME=STATE060 -STATE60\MOD1=",1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1" +STATE60\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1556,7 +1541,7 @@ STATE60\CONTROL="0,3F" STATE60\MOD9="0,1,0" STATE60\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE61\NAME=STATE061 -STATE61\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE61\MOD1="10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0" STATE61\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE61\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE61\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1565,7 +1550,7 @@ STATE61\CONTROL="0,3F" STATE61\MOD9="0,1,0" STATE61\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE62\NAME=STATE062 -STATE62\MOD1="10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0" +STATE62\MOD1=",1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1" STATE62\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE62\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE62\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1574,7 +1559,7 @@ STATE62\CONTROL="0,3F" STATE62\MOD9="0,1,0" STATE62\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE63\NAME=STATE063 -STATE63\MOD1=",1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1" +STATE63\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1" STATE63\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE63\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE63\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1583,7 +1568,7 @@ STATE63\CONTROL="0,3F" STATE63\MOD9="0,1,0" STATE63\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE64\NAME=STATE064 -STATE64\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1" +STATE64\MOD1="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0" STATE64\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE64\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE64\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1592,7 +1577,7 @@ STATE64\CONTROL="0,3F" STATE64\MOD9="0,1,0" STATE64\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE65\NAME=STATE065 -STATE65\MOD1="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0" +STATE65\MOD1=",1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1" STATE65\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE65\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE65\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1601,7 +1586,7 @@ STATE65\CONTROL="0,3F" STATE65\MOD9="0,1,0" STATE65\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE66\NAME=STATE066 -STATE66\MOD1=",1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1" +STATE66\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" STATE66\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE66\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE66\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1610,7 +1595,7 @@ STATE66\CONTROL="0,3F" STATE66\MOD9="0,1,0" STATE66\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE67\NAME=STATE067 -STATE67\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE67\MOD1=",1,1,0,0,0,,1,1,,1,1,,1,1,10,0,0,10,0,0,,1,1,,1,1,,1,1,0,0,0,,1,1" STATE67\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE67\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE67\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1619,7 +1604,7 @@ STATE67\CONTROL="0,3F" STATE67\MOD9="0,1,0" STATE67\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE68\NAME=STATE068 -STATE68\MOD1=",1,1,0,0,0,,1,1,,1,1,,1,1,10,0,0,10,0,0,,1,1,,1,1,,1,1,0,0,0,,1,1" +STATE68\MOD1=",1,1,,1,1,,1,1,10,0,0,,1,1,0,0,0,0,0,0,,1,1,10,0,0,,1,1,,1,1,,1,1" STATE68\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE68\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE68\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1628,7 +1613,7 @@ STATE68\CONTROL="0,3F" STATE68\MOD9="0,1,0" STATE68\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE69\NAME=STATE069 -STATE69\MOD1=",1,1,,1,1,,1,1,10,0,0,,1,1,0,0,0,0,0,0,,1,1,10,0,0,,1,1,,1,1,,1,1" +STATE69\MOD1=",1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1" STATE69\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE69\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE69\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1637,7 +1622,7 @@ STATE69\CONTROL="0,3F" STATE69\MOD9="0,1,0" STATE69\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE70\NAME=STATE070 -STATE70\MOD1=",1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1" +STATE70\MOD1="0,0,0,,1,1,,1,1,,1,1,10,0,0,,1,1,,1,1,10,0,0,,1,1,,1,1,,1,1,0,0,0" STATE70\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE70\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE70\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1646,7 +1631,7 @@ STATE70\CONTROL="0,3F" STATE70\MOD9="0,1,0" STATE70\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE71\NAME=STATE071 -STATE71\MOD1="0,0,0,,1,1,,1,1,,1,1,10,0,0,,1,1,,1,1,10,0,0,,1,1,,1,1,,1,1,0,0,0" +STATE71\MOD1=",1,1,,1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1,,1,1" STATE71\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE71\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE71\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1655,7 +1640,7 @@ STATE71\CONTROL="0,3F" STATE71\MOD9="0,1,0" STATE71\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE72\NAME=STATE072 -STATE72\MOD1=",1,1,,1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1,,1,1" +STATE72\MOD1="10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0" STATE72\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE72\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE72\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1664,28 +1649,28 @@ STATE72\CONTROL="0,3F" STATE72\MOD9="0,1,0" STATE72\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE73\NAME=STATE073 -STATE73\MOD1="10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0" +STATE73\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE73\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE73\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE73\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE73\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE73\MOD4="0,1,0,0,1,0" -STATE73\CONTROL="0,3F" +STATE73\CONTROL="8,37" STATE73\MOD9="0,1,0" STATE73\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE74\NAME=STATE074 STATE74\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE74\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE74\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE74\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE74\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE74\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE74\MOD4="0,1,0,0,1,0" -STATE74\CONTROL="8,37" +STATE74\CONTROL="0,3F" STATE74\MOD9="0,1,0" STATE74\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE75\NAME=STATE075 STATE75\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE75\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE75\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE75\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE75\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE75\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE75\MOD4="0,1,0,0,1,0" STATE75\CONTROL="0,3F" STATE75\MOD9="0,1,0" @@ -1693,26 +1678,26 @@ STATE75\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE76\NAME=STATE076 STATE76\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE76\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE76\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE76\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE76\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE76\MOD4="0,1,0,0,1,0" -STATE76\CONTROL="0,3F" +STATE76\CONTROL="8,37" STATE76\MOD9="0,1,0" STATE76\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE77\NAME=STATE077 STATE77\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE77\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE77\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE77\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE77\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE77\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE77\MOD4="0,1,0,0,1,0" -STATE77\CONTROL="8,37" +STATE77\CONTROL="0,3F" STATE77\MOD9="0,1,0" STATE77\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE78\NAME=STATE078 STATE78\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE78\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE78\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE78\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE78\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE78\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE78\MOD4="0,1,0,0,1,0" STATE78\CONTROL="0,3F" STATE78\MOD9="0,1,0" @@ -1720,8 +1705,8 @@ STATE78\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE79\NAME=STATE079 STATE79\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE79\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE79\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE79\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE79\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE79\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE79\MOD4="0,1,0,0,1,0" STATE79\CONTROL="0,3F" STATE79\MOD9="0,1,0" @@ -1981,7 +1966,7 @@ STATE107\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE108\NAME=STATE108 STATE108\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE108\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE108\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" +STATE108\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1,,1,1" STATE108\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE108\MOD4="0,1,0,0,1,0" STATE108\CONTROL="4,3B" @@ -1990,7 +1975,7 @@ STATE108\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE109\NAME=STATE109 STATE109\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE109\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE109\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1" +STATE109\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5.8,1,0,5.8,1,0,,1,1,,1,1,,1,1,,1,1" STATE109\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE109\MOD4="0,1,0,0,1,0" STATE109\CONTROL="0,3F" @@ -1999,7 +1984,7 @@ STATE109\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE110\NAME=STATE110 STATE110\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE110\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE110\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1,,1,1" +STATE110\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" STATE110\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE110\MOD4="0,1,0,0,1,0" STATE110\CONTROL="0,3F" @@ -2008,7 +1993,7 @@ STATE110\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE111\NAME=STATE111 STATE111\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE111\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE111\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1" +STATE111\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1" STATE111\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE111\MOD4="0,1,0,0,1,0" STATE111\CONTROL="0,3F" @@ -2026,7 +2011,7 @@ STATE112\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE113\NAME=STATE113 STATE113\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE113\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE113\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1" +STATE113\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1" STATE113\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE113\MOD4="0,1,0,0,1,0" STATE113\CONTROL="0,3F" @@ -2034,25 +2019,25 @@ STATE113\MOD9="0,1,0" STATE113\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE114\NAME=STATE114 STATE114\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE114\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE114\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" -STATE114\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE114\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,12,1,0,,1,1,,1,1,,1,1,,1,1" +STATE114\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE114\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE114\MOD4="0,1,0,0,1,0" -STATE114\CONTROL="0,3F" +STATE114\CONTROL="0,31" STATE114\MOD9="0,1,0" STATE114\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE115\NAME=STATE115 STATE115\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE115\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,12,1,0,,1,1,5,1,0,,1,1,,1,1" +STATE115\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1" STATE115\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE115\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE115\MOD4="0,1,0,0,1,0" -STATE115\CONTROL="0,31" +STATE115\CONTROL="0,3F" STATE115\MOD9="0,1,0" STATE115\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE116\NAME=STATE116 STATE116\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE116\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE116\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE116\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE116\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE116\MOD4="0,1,0,0,1,0" @@ -2061,7 +2046,7 @@ STATE116\MOD9="0,1,0" STATE116\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE117\NAME=STATE117 STATE117\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE117\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,0,1,0,5,1,0,,1,1,,1,1,,1,1" +STATE117\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,4,1,0,,1,1,,1,1,,1,1" STATE117\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE117\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE117\MOD4="0,1,0,0,1,0" @@ -2070,7 +2055,7 @@ STATE117\MOD9="0,1,0" STATE117\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE118\NAME=STATE118 STATE118\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE118\MOD2=",1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1,,1,1,,1,1,-7,1,0,,1,1,,1,1" +STATE118\MOD2=",1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1" STATE118\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE118\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE118\MOD4="0,1,0,0,1,0" @@ -2088,7 +2073,7 @@ STATE119\MOD9="0,1,0" STATE119\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE120\NAME=STATE120 STATE120\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE120\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1" +STATE120\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,,1,1,-4,1,0,,1,1,,1,1,,1,1" STATE120\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE120\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE120\MOD4="0,1,0,0,1,0" @@ -2097,7 +2082,7 @@ STATE120\MOD9="0,1,0" STATE120\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE121\NAME=STATE121 STATE121\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE121\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,12,1,0,,1,1,,1,1,,1,1,,1,1" +STATE121\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,12,1,0,,1,1,5,1,0,,1,1,,1,1" STATE121\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE121\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE121\MOD4="0,1,0,0,1,0" @@ -2106,7 +2091,7 @@ STATE121\MOD9="0,1,0" STATE121\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE122\NAME=STATE122 STATE122\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE122\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1" +STATE122\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE122\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE122\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE122\MOD4="0,1,0,0,1,0" @@ -2115,23 +2100,14 @@ STATE122\MOD9="0,1,0" STATE122\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE123\NAME=STATE123 STATE123\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE123\MOD2=",1,1,,1,1,-7,1,0,-7,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1" +STATE123\MOD2=",1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,4,1,0,-4,1,0,-5,1,0,,1,1,,1,1" STATE123\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE123\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE123\MOD4="0,1,0,0,1,0" STATE123\CONTROL="0,3F" STATE123\MOD9="0,1,0" STATE123\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" -STATE124\NAME=STATE124 -STATE124\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE124\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" -STATE124\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE124\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" -STATE124\MOD4="0,1,0,0,1,0" -STATE124\CONTROL="0,3F" -STATE124\MOD9="0,1,0" -STATE124\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" -STATES=125 +STATES=124 [SYSTEM] BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 @@ -2165,23 +2141,3 @@ MOD12_ID=0000000000000000 MOD12_REV=0 MOD12_VERSION=0.0.0 MOD12_TYPE=10 -[MODE_DEFAULT] -ACF:FRAMEMODE=0 -ACF:LINECOUNT=4125 -ACF:PIXELCOUNT=1094 -ACF:TAPLINE0="AM37L,1,100" -ACF:TAPLINE1="AM38R,1,100" -ACF:TAPLINES=16 -ARCH:HORI_AMPS=2 -ARCH:NUM_DETECT=8 -ARCH:VERT_AMPS=1 -[MODE_FCS] -ACF:FRAMEMODE=0 -ACF:LINECOUNT=4116 -ACF:PIXELCOUNT=1069 -ACF:TAPLINE0="AM45L,1,100" -ACF:TAPLINE1="AM46R,1,100" -ACF:TAPLINES=2 -ARCH:HORI_AMPS=1 -ARCH:NUM_DETECT=2 -ARCH:VERT_AMPS=1 diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 15d2a25..c5b9aaf 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -67,7 +67,7 @@ SHP2=303 SHD1=448 SHD2=575 -#elif 0 +#elif 1 TAPLINES=2 FRAMEMODE=0 TAPLINE0="AM45L,1,100" @@ -77,10 +77,10 @@ RAWSEL=49 LINECOUNT = _FCS_LINENUM PIXELCOUNT = _FCS_TOTAL_COLS -SHP1 = 10 -SHP2 = 20 -SHD1 = 30 -SHD2 = 40 +SHP1 = 250 +SHP2 = 650 +SHD1 = 800 +SHD2 = 1000 RAWSTARTPIXEL=23 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 12accd5..f639989 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -97,7 +97,7 @@ SLOT 9 hvbias { HVLC 9 [14.00,2] "FCS1 Reset Drain B"; HVLC 10 [14.00,2] "FCS2 Reset Drain A"; HVLC 11 [14.00,2] "FCS2 Reset Drain B"; - HVLC 12 [13.00,1] "FCS Overflow Drain"; + HVLC 12 [14.90,1] "FCS Overflow Drain"; HVLC 13 [24.3,1] "FCS1 Output Drain A"; HVLC 14 [24.3,1] "FCS1 Output Drain B"; HVLC 15 [24.3,1] "FCS2 Output Drain A"; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 147638c..49eb677 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -326,10 +326,11 @@ SEQUENCE IntegrateAndReadout } +//re-purposed to do FCS output testing SEQUENCE TestBrokenReadout { OutputTestSetup(); - PulseTGA(); + // PulseTGA(); VRDModulate(); @@ -337,6 +338,8 @@ SEQUENCE TestBrokenReadout } + + SEQUENCE EvacuateE { EvacuateEStart(); diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index 22c26a1..e4969d6 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -11,7 +11,7 @@ * slot is the slot number containing the module, * channel is the channel number on the module * - * Combinations of signals can also be made by creating a comma-separated + * Combinations of signals can also be made by creating a comma-separatedv * list enclosed in square brackets as follows: * * #define newlabel [ signallabel, signallabel [, signallabel] ] @@ -69,8 +69,8 @@ #define FCS_P3U 3 : 7 // new VIB assignment #define FCS_P3L 3 : 8 // new VIB assignment -#define FCS_P2 3 : 9 // new VIB assignment -#define FCS_P1 3 : 10 // new VIB assignment +#define FCS_P2a 3 : 9 // new VIB assignment +#define FCS_P1a 3 : 10 // new VIB assignment #define TGA2 3 : 11 // new VIB assignment @@ -133,6 +133,9 @@ #define VRD_E 9 : 5 + + +//redefine VRD_F to modulate FCS RD channels #define VRD_F 9 : 6 #define VRD [VRD_E, VRD_F] @@ -140,6 +143,8 @@ /**** Readout Method ****/ /* Science Serials */ +#define VRD_FCS [9:8, 9:9, 9:10, 9:11] + #define SCI_SCLK1 [SCLK_E2, SCLK_F2] #define SCI_SCLK2 [SCLK_E1, SCLK_F1] @@ -179,6 +184,9 @@ #define SCI_SCLK2_FONLY SCLK_F1 //FCS readout -#define FCS_P3 [FCS_P3U, FCS_P3L] + +#defeval FCS_P1 FCS_P2a +#defeval FCS_P2 3:10 +#defeval FCS_P3 [FCS_P3U, FCS_P3L] #define FCS_S2 [FCS1_S2L, FCS2_S2L] #define FCS_S3 [FCS1_S3L, FCS2_S3L] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 9ef6714..087c8a1 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -130,13 +130,13 @@ WAVEFORM InitialSetupFCS .+1000: SET AC_Clamp_FCS to LOW; - SET FCS_P3 TO _MPP_CLOCK_LOW_FCS, FAST; - SET FCS_P2 TO _PAR_CLOCK_HIGH_FCS, FAST; - SET FCS_P1 TO _PAR_CLOCK_HIGH_FCS, FAST; + SET FCS_P3 TO _PAR_CLOCK_LOW_FCS, FAST; + SET FCS_P2 TO _PAR_CLOCK_LOW_FCS, FAST; + SET FCS_P1 TO _PAR_CLOCK_LOW_FCS, FAST; SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; - SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; + SET FCS_S3 TO _SER_CLOCK_LOW_FCS, FAST; .+10000: SET NOP TO HIGH; @@ -267,22 +267,22 @@ WAVEFORM ParallelForwardSegment3 WAVEFORM OutputTestSetup { - 0: SET RG TO INV_HIGH; - SET RG_CLOCKS TO _RG_HIGH, FAST; - SET VRD_F TO 17.0; - SET SW TO INV_HIGH; - SET SW_CLOCKS TO _SW_HIGH, FAST; - .+10ms: SET NOP TO HIGH; - SET TG TO _TG_CLOCK_LOW, FAST; + 0: SET FCS_RG TO _RG_HIGH_FCS, FAST; + // SET RG_CLOCKS TO _RG_HIGH, FAST; + SET VRD_FCS TO 14.0; + SET FCS_SW TO _SW_HIGH_FCS, FAST; + // SET SW_CLOCKS TO _SW_HIGH, FAST; .+10ms: SET NOP TO HIGH; + //SET TG TO _TG_CLOCK_LOW, FAST; + //.+10ms: SET NOP TO HIGH; - SET SCI_SCLK1 TO _SER_CLOCK_LOW,FAST; - SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + /* SET SCI_SCLK1 TO _SER_CLOCK_LOW,FAST; */ + /* SET SCI_SCLK2 TO _SER_CLOCK_LOW, FAST; */ + /* SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; */ - SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; - SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; - SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; + /* SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; */ + /* SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; */ + /* SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; */ } WAVEFORM PulseTGA @@ -296,50 +296,39 @@ WAVEFORM PulseTGA WAVEFORM VRDModulate { - 0: SET VRD_F TO 14.0; - .+10ms: SET RG TO INV_HIGH; - .+1us: SET RG TO INV_LOW; - .+1us: SET VRD_F TO 14.5; - - .+10ms: SET RG TO INV_HIGH; - .+1us: SET RG TO INV_LOW; - .+1us: SET VRD_F TO 15.0; - - .+10ms: SET RG TO INV_HIGH; - .+1us: SET RG TO INV_LOW; - .+1us: SET VRD_F TO 15.5; + 0: SET VRD_FCS TO 12.0; + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; + .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; + .+1us: SET VRD_FCS TO 12.5; - .+10ms: SET RG TO INV_HIGH; - .+1us: SET RG TO INV_LOW; - .+1us: SET VRD_F TO 16.0; + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; + .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; + .+1us: SET VRD_FCS TO 13.0; - .+10ms: SET RG TO INV_HIGH; - .+1us: SET RG TO INV_LOW; - .+1us: SET VRD_F TO 16.5; + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; + .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; + .+1us: SET VRD_FCS TO 13.5; - .+10ms: SET RG TO INV_HIGH; - .+1us: SET RG TO INV_LOW; - .+1us: SET VRD_F TO 17.0; + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; + .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; + .+1us: SET VRD_FCS TO 14.0; - .+10ms: SET RG TO INV_HIGH; - .+1us: SET RG TO INV_LOW; - .+1us: SET VRD_F TO 16.5; + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; + .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; + .+1us: SET VRD_FCS TO 14.5; - .+10ms: SET RG TO INV_HIGH; - .+1us: SET RG TO INV_LOW; - .+1us: SET VRD_F TO 16.0; + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; + .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; + .+1us: SET VRD_FCS TO 15.0; - .+10ms: SET RG TO INV_HIGH; - .+1us: SET RG TO INV_LOW; - .+1us: SET VRD_F TO 15.5; + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; + .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; + .+1us: SET VRD_FCS TO 15.5; - .+10ms: SET RG TO INV_HIGH; - .+1us: SET RG TO INV_LOW; - .+1us: SET VRD_F TO 15.0; + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; + .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; + .+1us: SET VRD_FCS TO 16.0; - .+10ms: SET RG TO INV_HIGH; - .+1us: SET RG TO INV_LOW; - .+1us: SET VRD_F TO 14.5; } @@ -890,7 +879,9 @@ WAVEFORM setupTGTest } -#define FCS_PAR_STEP 500 + +//Jake's working sequence did 1ms between llel clocks +#define FCS_PAR_STEP 1000 WAVEFORM FCSParallelForward { @@ -902,14 +893,12 @@ WAVEFORM FCSParallelForward .+FCS_PAR_STEP: SET FCS_P1 to _PAR_CLOCK_HIGH_FCS, FAST; .+FCS_PAR_STEP: SET FCS_P3 to _MPP_CLOCK_LOW_FCS, FAST; .+FCS_PAR_STEP: set FCS_P2 to _PAR_CLOCK_HIGH_FCS, FAST; - .+FCS_PAR_STEP: set FCS_P1 to _PAR_CLOCK_LOW_FCS, FAST; - SET AC_Clamp_FCS TO LOW; - .+1000: SET NOP TO HIGH; + 100: SET AC_Clamp_FCS TO LOW; } -#define FCS_SER_STEP 240 -#define FCS_SIG_DELAY 480 +#define FCS_SER_STEP 40 +#define FCS_SIG_DELAY 300 #define FCS_RST_DELAY 80 WAVEFORM FCSSplitReadout @@ -921,15 +910,18 @@ WAVEFORM FCSSplitReadout SET LINE TO LOW; SET FRAME TO LOW; SET FCS_RG TO _RG_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; //serial clocking - SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_LOW_FCS, FAST; + .+FCS_SER_STEP: SET FCS_RG TO _RG_LOW_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; - SET FCS_SW TO _SW_HIGH_FCS, FAST; - SET FCS_RG TO _RG_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; + SET FCS_SW TO _SW_HIGH_FCS, FAST; + + .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS,FAST; + + .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; SET FCS_SW TO _SW_LOW_FCS, FAST; .+FCS_SIG_DELAY: SET NOP TO HIGH; @@ -939,15 +931,17 @@ WAVEFORM DumpPixelsFCS { 0:=FCS_DUMP_BEGIN SET FCS_RG TO _RG_HIGH_FCS, FAST; - SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; - SET FCS_SW TO _SW_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; + SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; SET FCS_SW TO _SW_HIGH_FCS, FAST; - .+FCS_SER_STEP: SET FCS_RG TO _RG_LOW_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_LOW_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; + + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS,FAST; + .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS, FAST; + SET FCS_SW TO _SW_LOW_FCS, FAST; + SET FCS_RG TO _RG_LOW_FCS, FAST; } diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index d79cb5f..b9f853d 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -112,7 +112,7 @@ #define PCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_PAR_CLOCK_HIGH - _PAR_CLOCK_LOW) / 1.5" | bc) -#defeval PCLK_fast_FCS PCLK_fast + //e2v says need on average 90ns rise time for a serial clock #define SCLK_fast #exec printf "%2.4f" $(echo "scale=4; (_SER_CLOCK_HIGH - _SER_CLOCK_LOW) / 0.2" | bc) @@ -140,18 +140,21 @@ #define _PAR_CLOCK_HIGH_FCS 2.0 #define _PAR_CLOCK_LOW_FCS -10.0 -#define _MPP_CLOCK_HIGH_FCS 5.0 +#define _MPP_CLOCK_HIGH_FCS 5.8 #define _MPP_CLOCK_LOW_FCS -8.0 #define _SER_CLOCK_HIGH_FCS 5.0 -#define _SER_CLOCK_LOW_FCS -7.0 +#define _SER_CLOCK_LOW_FCS -5.0 -#define _RG_LOW_FCS 0.0 +#define _RG_LOW_FCS 4.0 #define _RG_HIGH_FCS 12.0 -#define _SW_LOW_FCS -6.0 -#define _SW_HIGH_FCS 5.0 +#define _SW_LOW_FCS -4.0 +#define _SW_HIGH_FCS 4.0 #define _RESET_DRAIN_FCS 14.0 #define _OUTPUT_DRAIN_FCS 24.3 #define _LASTGATE_FCS -4.0 -#define _DUMP_DRAIN_FCS 14.0 +#define _DUMP_DRAIN_FCS 20.0 + + +#define PCLK_fast_FCS #exec printf "%2.4f" $(echo "scale=4; (_PAR_CLOCK_HIGH_FCS - _PAR_CLOCK_LOW_FCS) / 3.0" | bc) From 3967b6c7afd6a05f24b903f320c3e0c669faaca1 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 5 Feb 2026 16:31:10 -0800 Subject: [PATCH 178/194] minor updates fixing FCS --- src/deimos/deimos.mod | 4 +-- src/deimos/deimos.signals | 6 ++++- src/deimos/deimos.waveform | 53 +++++++++++++++++++++++++++++--------- 3 files changed, 48 insertions(+), 15 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index f639989..5efed3c 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -85,7 +85,7 @@ SLOT 4 xvbias { /* 4 : Reset Gate Low */ /* 5 : Back Substrate to -100V */ -SLOT 9 hvbias { +SLOT 9 hvxbias { HVLC 1 [0.00,0]; HVLC 2 [24.0,1] "SCI1 Guard Drain"; HVLC 3 [24.0,1] "SCI2 Guard drain"; @@ -118,7 +118,7 @@ SLOT 9 hvbias { HVHC 6 [0.0,0.0,0,0]; } -SLOT 10 lvbias { +SLOT 10 lvxbias { LVLC 1 [3.3,6] "LVDS Receiver Output Enable"; LVLC 2 [00.0,0]; LVLC 3 [3.0,4] "SCI E Output Gate"; diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index e4969d6..cd1b95e 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -143,7 +143,11 @@ /**** Readout Method ****/ /* Science Serials */ -#define VRD_FCS [9:8, 9:9, 9:10, 9:11] +#define VRD_FCSA 9:8 +#define VRD_FCSB 9:9 +#define VRD_FCSA2 9:10 +#define VRD_FCSB2 9:11 + #define SCI_SCLK1 [SCLK_E2, SCLK_F2] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 087c8a1..87b122c 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -269,7 +269,8 @@ WAVEFORM OutputTestSetup { 0: SET FCS_RG TO _RG_HIGH_FCS, FAST; // SET RG_CLOCKS TO _RG_HIGH, FAST; - SET VRD_FCS TO 14.0; + SET VRD_FCSA TO 14.0; + SET VRD_FCSB to 14.0; SET FCS_SW TO _SW_HIGH_FCS, FAST; // SET SW_CLOCKS TO _SW_HIGH, FAST; .+10ms: SET NOP TO HIGH; @@ -296,40 +297,68 @@ WAVEFORM PulseTGA WAVEFORM VRDModulate { - 0: SET VRD_FCS TO 12.0; + 0: SET VRD_FCSA TO 12.0; .+10ms: SET FCS_RG TO _RG_HIGH_FCS; .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; - .+1us: SET VRD_FCS TO 12.5; - + .+1us: SET VRD_FCSA TO 12.5; + .+1us: SET VRD_FCSB TO 12.5; + .+1us: SET VRD_FCSA2 TO 12.5; + .+1us: SET VRD_FCSB2 TO 12.5; + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; - .+1us: SET VRD_FCS TO 13.0; + .+1us: SET VRD_FCSA TO 13.0; + .+1us: SET VRD_FCSB TO 13.0; + .+1us: SET VRD_FCSA2 TO 13.0; + .+1us: SET VRD_FCSB2 TO 13.0; + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; - .+1us: SET VRD_FCS TO 13.5; + .+1us: SET VRD_FCSA TO 13.5; + .+1us: SET VRD_FCSB TO 13.5; + .+1us: SET VRD_FCSA2 TO 13.5; + .+1us: SET VRD_FCSB2 TO 13.5; - .+10ms: SET FCS_RG TO _RG_HIGH_FCS; + + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; - .+1us: SET VRD_FCS TO 14.0; + .+1us: SET VRD_FCSA TO 14.0; + .+1us: SET VRD_FCSB TO 14.0; + .+1us: SET VRD_FCSA2 TO 14.0; + .+1us: SET VRD_FCSB2 TO 14.0; + .+10ms: SET FCS_RG TO _RG_HIGH_FCS; .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; - .+1us: SET VRD_FCS TO 14.5; + .+1us: SET VRD_FCSA TO 14.5; + .+1us: SET VRD_FCSB TO 14.5; + .+1us: SET VRD_FCSA2 TO 14.5; + .+1us: SET VRD_FCSB2 TO 14.5; .+10ms: SET FCS_RG TO _RG_HIGH_FCS; .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; - .+1us: SET VRD_FCS TO 15.0; + .+1us: SET VRD_FCSA TO 15.0; + .+1us: SET VRD_FCSB TO 15.0; + .+1us: SET VRD_FCSA2 TO 15.0; + .+1us: SET VRD_FCSB2 TO 15.0; .+10ms: SET FCS_RG TO _RG_HIGH_FCS; .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; - .+1us: SET VRD_FCS TO 15.5; + .+1us: SET VRD_FCSA TO 15.5; + .+1us: SET VRD_FCSB TO 15.5; + .+1us: SET VRD_FCSA2 TO 15.5; + .+1us: SET VRD_FCSB2 TO 15.5; .+10ms: SET FCS_RG TO _RG_HIGH_FCS; .+1us: SET FCS_RG TO _RG_LOW_FCS, FAST; - .+1us: SET VRD_FCS TO 16.0; + .+1us: SET VRD_FCSA TO 16.0; + .+1us: SET VRD_FCSB TO 16.0; + .+1us: SET VRD_FCSA2 TO 16.0; + .+1us: SET VRD_FCSB2 TO 16.0; + } From 9f90d9ef1636dfc90687471601347cc50fb88863 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 9 Feb 2026 18:11:27 -0800 Subject: [PATCH 179/194] working FCS readout on channel A of FCS1 --- src/deimos/deimos.acf | 1652 +++++++++++++++++++++--------------- src/deimos/deimos.cds | 10 +- src/deimos/deimos.seq | 20 +- src/deimos/deimos.waveform | 40 +- 4 files changed, 988 insertions(+), 734 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index 916a7ac..dd68469 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -10,13 +10,13 @@ TAPLINES=2 FRAMEMODE=0 TAPLINE0="AM45L,1,100" TAPLINE1="AM46R,1,100" -RAWSEL=49 +RAWSEL=48 LINECOUNT = 4116 PIXELCOUNT = 1069 -SHP1 = 250 -SHP2 = 650 -SHD1 = 800 -SHD2 = 1000 +SHP1 = 600 +SHP2 = 900 +SHD1 = 1000 +SHD2 = 1200 RAWSTARTPIXEL=23 TRIGOUTFORCE=0 TRIGOUTINVERT=0 @@ -107,492 +107,502 @@ LINE51="STATE000; CALL Wait1us(50)" LINE52="STATE000; CALL DumpPixels(1094)" LINE53="STATE000; RETURN SummitModeSciDump" LINE54=SummitModeFCSReadout: -LINE55="STATE000; CALL Wait1us(50)" -LINE56="STATE000; CALL FCSLineReadout(4096)" -LINE57="STATE000; CALL FCSLineReadout(20)" -LINE58="STATE000; RETURN SummitModeFCSReadout" -LINE59=FCSLineReadout: -LINE60="STATE000; CALL FCSParallelForward" -LINE61="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE62="STATE000; CALL FCSSplitReadout(1069)" -LINE63="STATE000; RETURN FCSLineReadout" -LINE64=StartSeqEngModeFCS: -LINE65="STATE000; if framecount CALL EngModeFCSIntegrateandReadout" -LINE66="STATE000; if !framecount CALL SummitModeFCSLineFlush(4096)" -LINE67="STATE000; GOTO StartSeqEngModeFCS" -LINE68=EngModeFCSIntegrateandReadout: -LINE69="STATE000; CALL SummitModeFCSIntegrate" -LINE70="STATE000; framecount--" -LINE71="STATE000; RETURN EngModeFCSIntegrateandReadout" -LINE72=StartSeqEngMode: -LINE73="STATE000; if framecount CALL IntegrateAndReadout" -LINE74="STATE000; if !framecount CALL LineReadoutFast(4124)" -LINE75="STATE000; if rg_mod_test_mode CALL TestBrokenReadout" -LINE76="STATE000; GOTO StartSeqEngMode" -LINE77=IntegrateAndReadout: -LINE78="STATE000; CALL Integrate" -LINE79="STATE000; CALL ReadoutKeep" -LINE80="STATE000; RETURN IntegrateAndReadout" -LINE81=TestBrokenReadout: -LINE82="STATE000; CALL OutputTestSetup" -LINE83="STATE000; CALL VRDModulate" -LINE84="STATE000; RETURN TestBrokenReadout" -LINE85=EvacuateE: -LINE86="STATE000; CALL EvacuateEStart" +LINE55="STATE000; CALL FCSLineReadout(4116)" +LINE56="STATE000; RETURN SummitModeFCSReadout" +LINE57=FCSLineReadout: +LINE58="STATE000; CALL FCSParallelForward" +LINE59="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE60="STATE000; CALL FCSSplitReadout(1069)" +LINE61="STATE000; RETURN FCSLineReadout" +LINE62=StartSeqEngModeFCS: +LINE63="STATE000; if framecount CALL SummitModeFCSIntegrate" +LINE64="STATE000; framecount--" +LINE65="STATE000; if !framecount CALL SummitModeFCSLineFlush(4116)" +LINE66="STATE000; GOTO StartSeqEngModeFCS" +LINE67=StartSeqEngMode: +LINE68="STATE000; if framecount CALL IntegrateAndReadout" +LINE69="STATE000; if !framecount CALL LineReadoutFast(4124)" +LINE70="STATE000; if rg_mod_test_mode CALL TestBrokenReadout" +LINE71="STATE000; GOTO StartSeqEngMode" +LINE72=IntegrateAndReadout: +LINE73="STATE000; CALL Integrate" +LINE74="STATE000; CALL ReadoutKeep" +LINE75="STATE000; RETURN IntegrateAndReadout" +LINE76=TestBrokenReadout: +LINE77="STATE000; CALL OutputTestSetup" +LINE78="STATE000; CALL VRDModulate" +LINE79="STATE000; RETURN TestBrokenReadout" +LINE80=EvacuateE: +LINE81="STATE000; CALL EvacuateEStart" +LINE82="STATE000; CALL Wait1ms" +LINE83="STATE000; CALL EvacuateEFinish" +LINE84="STATE000; RETURN EvacuateE" +LINE85=EvacuateF: +LINE86="STATE000; CALL EvacuateFStart" LINE87="STATE000; CALL Wait1ms" -LINE88="STATE000; CALL EvacuateEFinish" -LINE89="STATE000; RETURN EvacuateE" -LINE90=EvacuateF: -LINE91="STATE000; CALL EvacuateFStart" -LINE92="STATE000; CALL Wait1ms" -LINE93="STATE000; CALL EvacuateFFinish" -LINE94="STATE000; RETURN EvacuateF" -LINE95=Integrate: -LINE96="STATE000; CALL KeepThisFrame" -LINE97="STATE000; CALL ReadPixels(1094)" -LINE98="STATE000; if illum CALL OpenShutter" -LINE99="STATE000; CALL Wait1ms(integrate_illum_ms)" -LINE100="STATE000; CALL Wait1s(integrate_illum_s)" -LINE101="STATE000; if illum CALL CloseShutter" -LINE102="STATE000; CALL Wait1ms(integrate_ms)" -LINE103="STATE000; CALL Wait1s(integrate_s)" -LINE104="STATE000; RETURN Integrate" -LINE105=ReadoutKeep: -LINE106="STATE000; CALL ReadoutBegin" -LINE107="STATE000; if llel_coincident CALL FrameReadout" -LINE108="STATE000; if llel_seq CALL FrameReadout" -LINE109="STATE000; if slow_pix CALL FrameReadout" -LINE110="STATE000; if linbin CALL FrameReadout" -LINE111="STATE000; if dch_llel CALL FrameReadoutTDCllel" -LINE112="STATE000; if dch_ser CALL FrameReadoutTDCser" -LINE113="STATE000; framecount--" -LINE114="STATE000; RETURN ReadoutKeep" -LINE115=FrameReadoutTDCllel: -LINE116="STATE000; CALL Wait1us(50)" -LINE117="STATE000; CALL DumpPixels(1094)" -LINE118="STATE000; CALL FrameReadoutTDCllel_Innerloop(68)" -LINE119="STATE000; CALL LineReadout(44)" -LINE120="STATE000; CALL ReadoutEnd" -LINE121="STATE000; CALL linbindecr(llel_bin)" -LINE122="STATE000; CALL linbinincr" -LINE123="STATE000; RETURN FrameReadoutTDCllel" -LINE124=FrameReadoutTDCllel_Innerloop: -LINE125="STATE000; CALL LineReadoutAOnly(60)" -LINE126="STATE000; CALL ForwardParallelSectionBNoCoincident(llel_bin)" -LINE127="STATE000; CALL linbinincr(1)" -LINE128="STATE000; RETURN FrameReadoutTDCllel_Innerloop" -LINE129=FrameReadoutTDCser: -LINE130="STATE000; CALL Wait1us(50)" -LINE131="STATE000; CALL DumpPixels(1094)" -LINE132="STATE000; CALL LineReadoutTDCser(4124)" -LINE133="STATE000; CALL ReadoutEnd" -LINE134="STATE000; RETURN FrameReadoutTDCser" -LINE135=LineReadoutTDCser: -LINE136="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" -LINE137="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE138="STATE000; CALL TDCser_Innerloop(49)" -LINE139="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(15)" -LINE140="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(15)" -LINE141="STATE000; if !dsch_ser_dump_bcs CALL TDCser_ReadoutLoop" -LINE142="STATE000; if dsch_ser_dump_bcs CALL TDCser_ReadoutLoopDumpBright" -LINE143="STATE000; if !dsch_ser_direction CALL EvacuateF" -LINE144="STATE000; if dsch_ser_direction CALL EvacuateE" -LINE145="STATE000; CALL serbindecr(ser_bin)" -LINE146="STATE000; CALL serbinincr" -LINE147="STATE000; RETURN LineReadoutTDCser" -LINE148=TDCser_ReadoutLoopDumpBright: -LINE149="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(50)" -LINE150="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(50)" -LINE151="STATE000; CALL TDCser_ReadoutLoopDumpBright_Inner(49)" -LINE152="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(15)" -LINE153="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(15)" -LINE154="STATE000; RETURN TDCser_ReadoutLoopDumpBright" -LINE155=TDCser_ReadoutLoop: -LINE156="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(1094)" -LINE157="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(1094)" -LINE158="STATE000; RETURN TDCser_ReadoutLoop" -LINE159=TDCser_ReadoutLoopDumpBright_Inner: -LINE160="STATE000; CALL trigpix" -LINE161="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly" -LINE162="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly" -LINE163="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(20)" -LINE164="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(20)" -LINE165="STATE000; RETURN TDCser_ReadoutLoopDumpBright_Inner" -LINE166=TDCser_Innerloop: -LINE167="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(21)" -LINE168="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(21)" -LINE169="STATE000; if !dsch_ser_direction CALL SerialFBackwards(ser_bin)" -LINE170="STATE000; if dsch_ser_direction CALL SerialEBackwards(ser_bin)" -LINE171="STATE000; CALL serbinincr(1)" -LINE172="STATE000; RETURN TDCser_Innerloop" -LINE173=serbinincr: -LINE174="STATE000; ser_bin++" -LINE175="STATE000; RETURN serbinincr" -LINE176=serbindecr: -LINE177="STATE000; ser_bin--" -LINE178="STATE000; RETURN serbindecr" -LINE179=FrameReadout: -LINE180="STATE000; CALL Wait1us(50)" -LINE181="STATE000; CALL DumpPixels(1094)" -LINE182="STATE000; if tdi_wait_us CALL OpenShutter" -LINE183="STATE000; IF llel_seq CALL LineReadout(4124)" -LINE184="STATE000; IF llel_coincident CALL LineReadoutCoincident(4124)" -LINE185="STATE000; IF slow_pix CALL LineReadoutSlowPix(4124)" -LINE186="STATE000; IF linbin CALL LineReadout(90)" -LINE187="STATE000; IF linbin CALL LineReadoutFast(4034)" -LINE188="STATE000; if tdi_wait_us CALL CloseShutter" -LINE189="STATE000; CALL ReadoutEnd" -LINE190="STATE000; if linbin CALL linbindecr(llel_bin)" -LINE191="STATE000; if linbin CALL linbinincr" -LINE192="STATE000; RETURN FrameReadout" -LINE193=Wait1s: -LINE194="STATE000; if abortintegrate CALL abortintegration" -LINE195="STATE000; CALL Wait1ms(1000)" -LINE196="STATE000; RETURN Wait1s" -LINE197=abortintegration: -LINE198="STATE000; CALL CloseShutter" -LINE199="STATE000; GOTO StartSeqSummitMode" -LINE200=LineReadoutSlowPix: -LINE201="STATE000; CALL ParallelForwardNoCoincident" -LINE202="STATE000; CALL Wait1us(50)" -LINE203="STATE000; CALL ReadPixelsSlow(1094)" -LINE204="STATE000; CALL Wait1us(10)" -LINE205="STATE000; RETURN LineReadoutSlowPix" -LINE206=linbinincrcheck: -LINE207="STATE000; if framecount CALL linbinincr" -LINE208="STATE000; RETURN linbinincrcheck" -LINE209=linbinincr: -LINE210="STATE000; llel_bin++" -LINE211="STATE000; RETURN linbinincr" -LINE212=linbindecr: -LINE213="STATE000; llel_bin--" -LINE214="STATE000; RETURN linbindecr" -LINE215=LineReadoutFast: -LINE216="STATE000; CALL ParallelForwardNoCoincident" -LINE217="STATE000; CALL ReadPixels(1094)" -LINE218="STATE000; RETURN LineReadoutFast" -LINE219=LineReadout: -LINE220="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" -LINE221="STATE000; if linbin CALL linbinincr" -LINE222="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE223="STATE000; if enable_ser_bin CALL ReadPixels(50)" -LINE224="STATE000; if enable_ser_bin CALL SerBinReadPixels(1024)" -LINE225="STATE000; if enable_ser_bin CALL ReadPixels(20)" -LINE226="STATE000; if !enable_ser_bin CALL ReadPixels(1094)" -LINE227="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" -LINE228="STATE000; RETURN LineReadout" -LINE229=SerBinReadPixels: -LINE230="STATE000; CALL PrepSerBin" -LINE231="STATE000; CALL serbindecr" -LINE232="STATE000; CALL SerialBinForwards(ser_bin)" -LINE233="STATE000; CALL ReadPixels" -LINE234="STATE000; CALL serbinincr" -LINE235="STATE000; RETURN SerBinReadPixels" -LINE236=LineReadoutCoincident: -LINE237="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" -LINE238="STATE000; CALL ParallelForwardSegment1" -LINE239="STATE000; CALL TransferToSerialRegisterCoincident" -LINE240="STATE000; CALL ReadPixels(364)" -LINE241="STATE000; CALL ParallelForwardSegment2" -LINE242="STATE000; CALL ReadPixels(364)" -LINE243="STATE000; CALL ParallelForwardSegment3" -LINE244="STATE000; CALL ReadPixels(364) CALL ReadPixels(2)" -LINE245="STATE000; RETURN LineReadoutCoincident" -LINE246=LineReadoutAOnly: -LINE247="STATE000; CALL ForwardParallelSectionANoCoincident" -LINE248="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE249="STATE000; CALL ReadPixels(1094)" -LINE250="STATE000; RETURN LineReadoutAOnly" -LINE251=LineReadoutAOnlyCoincident: -LINE252="STATE000; CALL TransferToSerialRegisterCoincident" -LINE253="STATE000; CALL ReadPixels(50)" -LINE254="STATE000; CALL ParallelForwardSectionASegment1" -LINE255="STATE000; CALL ReadPixels(364)" -LINE256="STATE000; CALL ParallelForwardSectionASegment2" -LINE257="STATE000; CALL ReadPixels(364)" -LINE258="STATE000; CALL ParallelForwardSectionASegment3" -LINE259="STATE000; CALL ReadPixels(364)" -LINE260="STATE000; CALL ReadPixels(2)" -LINE261="STATE000; RETURN LineReadoutAOnlyCoincident" -LINE262=Wait1us: -LINE263="STATE001; STATE000(98)" -LINE264="STATE000; RETURN Wait1us" -LINE265=Wait1ms: -LINE266="STATE001; STATE000(99998)" -LINE267="STATE000; RETURN Wait1ms" -LINE268=KeepThisFrame: -LINE269="STATE002;" -LINE270="STATE003; RETURN KeepThisFrame" -LINE271=InitialSetup: -LINE272="STATE004; STATE000(999)" -LINE273="STATE005; STATE000(9999)" -LINE274="STATE001; RETURN InitialSetup" -LINE275=InitialSetupFCS: -LINE276="STATE006; STATE000(999)" -LINE277="STATE007; STATE000(9999)" -LINE278="STATE001; RETURN InitialSetupFCS" -LINE279=OpenShutter: -LINE280="STATE008; RETURN OpenShutter" -LINE281=CloseShutter: -LINE282="STATE009; RETURN CloseShutter" -LINE283=ReadoutBegin: -LINE284="STATE010; RETURN ReadoutBegin" -LINE285=ReadoutEnd: -LINE286="STATE011; RETURN ReadoutEnd" -LINE287=TransferToSerialRegisterCoincident: -LINE288="STATE012; STATE000(999)" -LINE289="STATE013; STATE000(49)" -LINE290="STATE014; STATE000(49)" -LINE291="STATE015; RETURN TransferToSerialRegisterCoincident" -LINE292=ParallelForwardNoCoincident: -LINE293="STATE001; STATE000(999)" -LINE294="STATE016; STATE000(999)" -LINE295="STATE017; STATE000(999)" -LINE296="STATE018; STATE000(999)" -LINE297="STATE019; STATE000(199)" -LINE298="STATE020; STATE000(49)" -LINE299="STATE021; STATE000(299)" -LINE300="STATE022; STATE000(49)" -LINE301="STATE015; STATE000(399)" -LINE302="STATE023; STATE000(999)" -LINE303="STATE024; STATE000(999)" -LINE304="STATE001; RETURN ParallelForwardNoCoincident" -LINE305=ParallelForwardSegment1: -LINE306="STATE025; RETURN ParallelForwardSegment1" -LINE307=ParallelForwardSegment2: -LINE308="STATE026; RETURN ParallelForwardSegment2" -LINE309=ParallelForwardSegment3: -LINE310="STATE027; RETURN ParallelForwardSegment3" -LINE311=OutputTestSetup: -LINE312="STATE028; STATE000(999999)" -LINE313="STATE001; RETURN OutputTestSetup" -LINE314=PulseTGA: -LINE315="STATE029; STATE000(2499)" -LINE316="STATE030; STATE000(2499)" -LINE317="STATE031; RETURN PulseTGA" -LINE318=VRDModulate: -LINE319="STATE032; STATE000(999999)" -LINE320="STATE033; STATE000(99)" -LINE321="STATE034; STATE000(99)" -LINE322="STATE035; STATE000(999999)" -LINE323="STATE033; STATE000(99)" -LINE324="STATE034; STATE000(99)" -LINE325="STATE036; STATE000(999999)" -LINE326="STATE033; STATE000(99)" -LINE327="STATE034; STATE000(99)" -LINE328="STATE037; STATE000(999999)" -LINE329="STATE033; STATE000(99)" -LINE330="STATE034; STATE000(99)" -LINE331="STATE038; STATE000(999999)" -LINE332="STATE033; STATE000(99)" -LINE333="STATE034; STATE000(99)" -LINE334="STATE039; STATE000(999999)" -LINE335="STATE033; STATE000(99)" -LINE336="STATE034; STATE000(99)" -LINE337="STATE040; STATE000(999999)" -LINE338="STATE033; STATE000(99)" -LINE339="STATE034; STATE000(99)" -LINE340="STATE039; STATE000(999999)" -LINE341="STATE033; STATE000(99)" -LINE342="STATE034; STATE000(99)" -LINE343="STATE038; STATE000(999999)" -LINE344="STATE033; STATE000(99)" -LINE345="STATE034; STATE000(99)" -LINE346="STATE037; STATE000(999999)" -LINE347="STATE033; STATE000(99)" -LINE348="STATE034; STATE000(99)" -LINE349="STATE036; STATE000(999999)" -LINE350="STATE033; STATE000(99)" -LINE351="STATE034; STATE000(99)" -LINE352="STATE035; RETURN VRDModulate" -LINE353=ReadPixels: -LINE354="STATE041;" -LINE355="STATE042; STATE000(58)" -LINE356="STATE043;" -LINE357="STATE031; STATE000(298)" -LINE358="STATE044; STATE000(199)" -LINE359="STATE045; STATE000(59)" -LINE360="STATE001; RETURN ReadPixels" -LINE361=ReadPixelsSlow: -LINE362="STATE046;" -LINE363="STATE042; STATE000(13)" -LINE364="STATE047; STATE000(14)" -LINE365="STATE048; STATE000(4)" -LINE366="STATE049; STATE000(9)" -LINE367="STATE050; STATE000(15)" -LINE368="STATE031; STATE000(118)" -LINE369="STATE051; STATE000(14)" -LINE370="STATE052; STATE000(14)" -LINE371="STATE044; STATE000(116)" -LINE372="STATE001; RETURN ReadPixelsSlow" -LINE373=ForwardParallelSectionANoCoincident: -LINE374="STATE001; STATE000(999)" -LINE375="STATE053; STATE000(999)" -LINE376="STATE054; STATE000(999)" -LINE377="STATE055; STATE000(999)" -LINE378="STATE056; STATE000(199)" -LINE379="STATE057; STATE000(49)" -LINE380="STATE021; STATE000(299)" -LINE381="STATE058; STATE000(49)" -LINE382="STATE015; STATE000(399)" -LINE383="STATE059; STATE000(999)" -LINE384="STATE060; STATE000(999)" -LINE385="STATE001; RETURN ForwardParallelSectionANoCoincident" -LINE386=ForwardParallelSectionBNoCoincident: -LINE387="STATE001; STATE000(999)" -LINE388="STATE061; STATE000(999)" -LINE389="STATE062; STATE000(999)" -LINE390="STATE063; STATE000(999)" -LINE391="STATE064; STATE000(999)" -LINE392="STATE065; STATE000(999)" -LINE393="STATE066; STATE000(999)" -LINE394="STATE001; RETURN ForwardParallelSectionBNoCoincident" -LINE395=ForwardParallelSectionA: -LINE396="STATE067; STATE000(364665)" -LINE397="STATE068; STATE000(364666)" -LINE398="STATE069; RETURN ForwardParallelSectionA" -LINE399=ForwardParallelSectionB: -LINE400="STATE070; STATE000(364665)" -LINE401="STATE071; STATE000(364666)" -LINE402="STATE072; RETURN ForwardParallelSectionB" -LINE403=ForwardParallelAll: -LINE404="STATE026; STATE000(364665)" -LINE405="STATE027; STATE000(364666)" -LINE406="STATE025; RETURN ForwardParallelAll" -LINE407=ParallelForwardSectionASegment1: -LINE408="STATE067; RETURN ParallelForwardSectionASegment1" -LINE409=ParallelForwardSectionASegment2: -LINE410="STATE068; RETURN ParallelForwardSectionASegment2" -LINE411=ParallelForwardSectionASegment3: -LINE412="STATE069; RETURN ParallelForwardSectionASegment3" -LINE413=Wait10us: -LINE414="STATE000; STATE000(999)" -LINE415="STATE001; RETURN Wait10us" -LINE416=ReadPixelsEOnly: -LINE417="STATE073;" -LINE418="STATE042; STATE000(58)" -LINE419="STATE074;" -LINE420="STATE031; STATE000(298)" -LINE421="STATE044; STATE000(199)" -LINE422="STATE075; STATE000(59)" -LINE423="STATE001; RETURN ReadPixelsEOnly" -LINE424=ReadPixelsFOnly: -LINE425="STATE076;" -LINE426="STATE042; STATE000(58)" -LINE427="STATE077;" -LINE428="STATE031; STATE000(298)" -LINE429="STATE044; STATE000(129)" -LINE430="STATE078; STATE000(79)" -LINE431="STATE001; RETURN ReadPixelsFOnly" -LINE432=PrepSerBin: -LINE433="STATE079; STATE000(39)" -LINE434="STATE048; STATE000(19)" -LINE435="STATE031; RETURN PrepSerBin" -LINE436=SerialBinForwards: -LINE437="STATE080; STATE000(39)" -LINE438="STATE081; STATE000(39)" -LINE439="STATE045; STATE000(39)" -LINE440="STATE080; STATE000(39)" -LINE441="STATE001; RETURN SerialBinForwards" -LINE442=DumpPixels: -LINE443="STATE082; STATE000(39)" -LINE444="STATE043; STATE000(19)" -LINE445="STATE031; STATE000(279)" -LINE446="STATE044; STATE000(199)" -LINE447="STATE083; STATE000(59)" -LINE448="STATE001; RETURN DumpPixels" -LINE449=trigpix: -LINE450="STATE084;" -LINE451="STATE085; RETURN trigpix" -LINE452=DumpPixelsEOnly: -LINE453="STATE086; STATE000(39)" -LINE454="STATE074; STATE000(299)" -LINE455="STATE044; STATE000(199)" -LINE456="STATE087; STATE000(59)" -LINE457="STATE001; RETURN DumpPixelsEOnly" -LINE458=DumpPixelsFOnly: -LINE459="STATE088; STATE000(39)" -LINE460="STATE077; STATE000(299)" -LINE461="STATE044; STATE000(129)" -LINE462="STATE089; STATE000(79)" -LINE463="STATE001; RETURN DumpPixelsFOnly" -LINE464=SerialFBackwards: -LINE465="STATE090; STATE000(29)" -LINE466="STATE091; STATE000(29)" -LINE467="STATE092; STATE000(29)" -LINE468="STATE093; STATE000(29)" -LINE469="STATE094; RETURN SerialFBackwards" -LINE470=SerialEBackwards: -LINE471="STATE095; STATE000(29)" -LINE472="STATE096; STATE000(29)" -LINE473="STATE097; STATE000(29)" -LINE474="STATE094; STATE000(29)" -LINE475="STATE093; RETURN SerialEBackwards" -LINE476=EvacuateFFinish: -LINE477="STATE098; STATE000(1999)" -LINE478="STATE099; STATE000(499)" -LINE479="STATE001; RETURN EvacuateFFinish" -LINE480=EvacuateFStart: -LINE481="STATE100; RETURN EvacuateFStart" -LINE482=EvacuateEFinish: -LINE483="STATE098; STATE000(1999)" -LINE484="STATE101; STATE000(499)" -LINE485="STATE001; RETURN EvacuateEFinish" -LINE486=EvacuateEStart: -LINE487="STATE102; RETURN EvacuateEStart" -LINE488=BounceTGTest: -LINE489="STATE103;" -LINE490="STATE085; STATE000(498)" -LINE491="STATE030; STATE000(199)" -LINE492="STATE001; RETURN BounceTGTest" -LINE493=ClampTestInner: -LINE494="STATE103;" -LINE495="STATE085; STATE000(98)" -LINE496="STATE030; STATE000(99)" -LINE497="STATE001; RETURN ClampTestInner" -LINE498=ClampOn: -LINE499="STATE021; RETURN ClampOn" -LINE500=ClampOnFCS: -LINE501="STATE104; RETURN ClampOnFCS" -LINE502=ClampOff: -LINE503="STATE015; RETURN ClampOff" -LINE504=ClampOffFCS: -LINE505="STATE105; RETURN ClampOffFCS" -LINE506=ClampTestLineStart: -LINE507="STATE003; RETURN ClampTestLineStart" -LINE508=TGTestLineStart: -LINE509="STATE106; STATE000(99)" -LINE510="STATE015; RETURN TGTestLineStart" -LINE511=setupTGTest: -LINE512="STATE107; RETURN setupTGTest" -LINE513=FCSParallelForward: -LINE514="STATE108; STATE000(99)" -LINE515="STATE105; STATE000(899)" -LINE516="STATE109; STATE000(999)" -LINE517="STATE110; STATE000(999)" -LINE518="STATE111; STATE000(999)" -LINE519="STATE112; STATE000(999)" -LINE520="STATE113; RETURN FCSParallelForward" -LINE521=FCSSplitReadout: -LINE522="STATE084;" -LINE523="STATE114; STATE000(39)" -LINE524="STATE115; STATE000(39)" -LINE525="STATE116; STATE000(39)" -LINE526="STATE034; STATE000(39)" -LINE527="STATE117; STATE000(39)" -LINE528="STATE118; STATE000(39)" -LINE529="STATE119; STATE000(39)" -LINE530="STATE120; STATE000(299)" -LINE531="STATE001; RETURN FCSSplitReadout" -LINE532=DumpPixelsFCS: -LINE533="STATE121; STATE000(39)" -LINE534="STATE117; STATE000(39)" -LINE535="STATE116; STATE000(39)" -LINE536="STATE115; STATE000(39)" -LINE537="STATE122; STATE000(39)" -LINE538="STATE119; STATE000(39)" -LINE539="STATE123; RETURN DumpPixelsFCS" -LINES=540 +LINE88="STATE000; CALL EvacuateFFinish" +LINE89="STATE000; RETURN EvacuateF" +LINE90=Integrate: +LINE91="STATE000; CALL KeepThisFrame" +LINE92="STATE000; CALL ReadPixels(1094)" +LINE93="STATE000; if illum CALL OpenShutter" +LINE94="STATE000; CALL Wait1ms(integrate_illum_ms)" +LINE95="STATE000; CALL Wait1s(integrate_illum_s)" +LINE96="STATE000; if illum CALL CloseShutter" +LINE97="STATE000; CALL Wait1ms(integrate_ms)" +LINE98="STATE000; CALL Wait1s(integrate_s)" +LINE99="STATE000; RETURN Integrate" +LINE100=ReadoutKeep: +LINE101="STATE000; CALL ReadoutBegin" +LINE102="STATE000; if llel_coincident CALL FrameReadout" +LINE103="STATE000; if llel_seq CALL FrameReadout" +LINE104="STATE000; if slow_pix CALL FrameReadout" +LINE105="STATE000; if linbin CALL FrameReadout" +LINE106="STATE000; if dch_llel CALL FrameReadoutTDCllel" +LINE107="STATE000; if dch_ser CALL FrameReadoutTDCser" +LINE108="STATE000; framecount--" +LINE109="STATE000; RETURN ReadoutKeep" +LINE110=FrameReadoutTDCllel: +LINE111="STATE000; CALL Wait1us(50)" +LINE112="STATE000; CALL DumpPixels(1094)" +LINE113="STATE000; CALL FrameReadoutTDCllel_Innerloop(68)" +LINE114="STATE000; CALL LineReadout(44)" +LINE115="STATE000; CALL ReadoutEnd" +LINE116="STATE000; CALL linbindecr(llel_bin)" +LINE117="STATE000; CALL linbinincr" +LINE118="STATE000; RETURN FrameReadoutTDCllel" +LINE119=FrameReadoutTDCllel_Innerloop: +LINE120="STATE000; CALL LineReadoutAOnly(60)" +LINE121="STATE000; CALL ForwardParallelSectionBNoCoincident(llel_bin)" +LINE122="STATE000; CALL linbinincr(1)" +LINE123="STATE000; RETURN FrameReadoutTDCllel_Innerloop" +LINE124=FrameReadoutTDCser: +LINE125="STATE000; CALL Wait1us(50)" +LINE126="STATE000; CALL DumpPixels(1094)" +LINE127="STATE000; CALL LineReadoutTDCser(4124)" +LINE128="STATE000; CALL ReadoutEnd" +LINE129="STATE000; RETURN FrameReadoutTDCser" +LINE130=LineReadoutTDCser: +LINE131="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE132="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE133="STATE000; CALL TDCser_Innerloop(49)" +LINE134="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(15)" +LINE135="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(15)" +LINE136="STATE000; if !dsch_ser_dump_bcs CALL TDCser_ReadoutLoop" +LINE137="STATE000; if dsch_ser_dump_bcs CALL TDCser_ReadoutLoopDumpBright" +LINE138="STATE000; if !dsch_ser_direction CALL EvacuateF" +LINE139="STATE000; if dsch_ser_direction CALL EvacuateE" +LINE140="STATE000; CALL serbindecr(ser_bin)" +LINE141="STATE000; CALL serbinincr" +LINE142="STATE000; RETURN LineReadoutTDCser" +LINE143=TDCser_ReadoutLoopDumpBright: +LINE144="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(50)" +LINE145="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(50)" +LINE146="STATE000; CALL TDCser_ReadoutLoopDumpBright_Inner(49)" +LINE147="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(15)" +LINE148="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(15)" +LINE149="STATE000; RETURN TDCser_ReadoutLoopDumpBright" +LINE150=TDCser_ReadoutLoop: +LINE151="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(1094)" +LINE152="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(1094)" +LINE153="STATE000; RETURN TDCser_ReadoutLoop" +LINE154=TDCser_ReadoutLoopDumpBright_Inner: +LINE155="STATE000; CALL trigpix" +LINE156="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly" +LINE157="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly" +LINE158="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(20)" +LINE159="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(20)" +LINE160="STATE000; RETURN TDCser_ReadoutLoopDumpBright_Inner" +LINE161=TDCser_Innerloop: +LINE162="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(21)" +LINE163="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(21)" +LINE164="STATE000; if !dsch_ser_direction CALL SerialFBackwards(ser_bin)" +LINE165="STATE000; if dsch_ser_direction CALL SerialEBackwards(ser_bin)" +LINE166="STATE000; CALL serbinincr(1)" +LINE167="STATE000; RETURN TDCser_Innerloop" +LINE168=serbinincr: +LINE169="STATE000; ser_bin++" +LINE170="STATE000; RETURN serbinincr" +LINE171=serbindecr: +LINE172="STATE000; ser_bin--" +LINE173="STATE000; RETURN serbindecr" +LINE174=FrameReadout: +LINE175="STATE000; CALL Wait1us(50)" +LINE176="STATE000; CALL DumpPixels(1094)" +LINE177="STATE000; if tdi_wait_us CALL OpenShutter" +LINE178="STATE000; IF llel_seq CALL LineReadout(4124)" +LINE179="STATE000; IF llel_coincident CALL LineReadoutCoincident(4124)" +LINE180="STATE000; IF slow_pix CALL LineReadoutSlowPix(4124)" +LINE181="STATE000; IF linbin CALL LineReadout(90)" +LINE182="STATE000; IF linbin CALL LineReadoutFast(4034)" +LINE183="STATE000; if tdi_wait_us CALL CloseShutter" +LINE184="STATE000; CALL ReadoutEnd" +LINE185="STATE000; if linbin CALL linbindecr(llel_bin)" +LINE186="STATE000; if linbin CALL linbinincr" +LINE187="STATE000; RETURN FrameReadout" +LINE188=Wait1s: +LINE189="STATE000; if abortintegrate CALL abortintegration" +LINE190="STATE000; CALL Wait1ms(1000)" +LINE191="STATE000; RETURN Wait1s" +LINE192=abortintegration: +LINE193="STATE000; CALL CloseShutter" +LINE194="STATE000; GOTO StartSeqSummitMode" +LINE195=LineReadoutSlowPix: +LINE196="STATE000; CALL ParallelForwardNoCoincident" +LINE197="STATE000; CALL Wait1us(50)" +LINE198="STATE000; CALL ReadPixelsSlow(1094)" +LINE199="STATE000; CALL Wait1us(10)" +LINE200="STATE000; RETURN LineReadoutSlowPix" +LINE201=linbinincrcheck: +LINE202="STATE000; if framecount CALL linbinincr" +LINE203="STATE000; RETURN linbinincrcheck" +LINE204=linbinincr: +LINE205="STATE000; llel_bin++" +LINE206="STATE000; RETURN linbinincr" +LINE207=linbindecr: +LINE208="STATE000; llel_bin--" +LINE209="STATE000; RETURN linbindecr" +LINE210=LineReadoutFast: +LINE211="STATE000; CALL ParallelForwardNoCoincident" +LINE212="STATE000; CALL ReadPixels(1094)" +LINE213="STATE000; RETURN LineReadoutFast" +LINE214=LineReadout: +LINE215="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE216="STATE000; if linbin CALL linbinincr" +LINE217="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE218="STATE000; if enable_ser_bin CALL ReadPixels(50)" +LINE219="STATE000; if enable_ser_bin CALL SerBinReadPixels(1024)" +LINE220="STATE000; if enable_ser_bin CALL ReadPixels(20)" +LINE221="STATE000; if !enable_ser_bin CALL ReadPixels(1094)" +LINE222="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE223="STATE000; RETURN LineReadout" +LINE224=SerBinReadPixels: +LINE225="STATE000; CALL PrepSerBin" +LINE226="STATE000; CALL serbindecr" +LINE227="STATE000; CALL SerialBinForwards(ser_bin)" +LINE228="STATE000; CALL ReadPixels" +LINE229="STATE000; CALL serbinincr" +LINE230="STATE000; RETURN SerBinReadPixels" +LINE231=LineReadoutCoincident: +LINE232="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE233="STATE000; CALL ParallelForwardSegment1" +LINE234="STATE000; CALL TransferToSerialRegisterCoincident" +LINE235="STATE000; CALL ReadPixels(364)" +LINE236="STATE000; CALL ParallelForwardSegment2" +LINE237="STATE000; CALL ReadPixels(364)" +LINE238="STATE000; CALL ParallelForwardSegment3" +LINE239="STATE000; CALL ReadPixels(364) CALL ReadPixels(2)" +LINE240="STATE000; RETURN LineReadoutCoincident" +LINE241=LineReadoutAOnly: +LINE242="STATE000; CALL ForwardParallelSectionANoCoincident" +LINE243="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE244="STATE000; CALL ReadPixels(1094)" +LINE245="STATE000; RETURN LineReadoutAOnly" +LINE246=LineReadoutAOnlyCoincident: +LINE247="STATE000; CALL TransferToSerialRegisterCoincident" +LINE248="STATE000; CALL ReadPixels(50)" +LINE249="STATE000; CALL ParallelForwardSectionASegment1" +LINE250="STATE000; CALL ReadPixels(364)" +LINE251="STATE000; CALL ParallelForwardSectionASegment2" +LINE252="STATE000; CALL ReadPixels(364)" +LINE253="STATE000; CALL ParallelForwardSectionASegment3" +LINE254="STATE000; CALL ReadPixels(364)" +LINE255="STATE000; CALL ReadPixels(2)" +LINE256="STATE000; RETURN LineReadoutAOnlyCoincident" +LINE257=Wait1us: +LINE258="STATE001; STATE000(98)" +LINE259="STATE000; RETURN Wait1us" +LINE260=Wait1ms: +LINE261="STATE001; STATE000(99998)" +LINE262="STATE000; RETURN Wait1ms" +LINE263=KeepThisFrame: +LINE264="STATE002;" +LINE265="STATE003; RETURN KeepThisFrame" +LINE266=InitialSetup: +LINE267="STATE004; STATE000(999)" +LINE268="STATE005; STATE000(9999)" +LINE269="STATE001; RETURN InitialSetup" +LINE270=InitialSetupFCS: +LINE271="STATE006; STATE000(999)" +LINE272="STATE007; STATE000(9999)" +LINE273="STATE001; RETURN InitialSetupFCS" +LINE274=OpenShutter: +LINE275="STATE008; RETURN OpenShutter" +LINE276=CloseShutter: +LINE277="STATE009; RETURN CloseShutter" +LINE278=ReadoutBegin: +LINE279="STATE010; RETURN ReadoutBegin" +LINE280=ReadoutEnd: +LINE281="STATE011; RETURN ReadoutEnd" +LINE282=TransferToSerialRegisterCoincident: +LINE283="STATE012; STATE000(999)" +LINE284="STATE013; STATE000(49)" +LINE285="STATE014; STATE000(49)" +LINE286="STATE015; RETURN TransferToSerialRegisterCoincident" +LINE287=ParallelForwardNoCoincident: +LINE288="STATE001; STATE000(999)" +LINE289="STATE016; STATE000(999)" +LINE290="STATE017; STATE000(999)" +LINE291="STATE018; STATE000(999)" +LINE292="STATE019; STATE000(199)" +LINE293="STATE020; STATE000(49)" +LINE294="STATE021; STATE000(299)" +LINE295="STATE022; STATE000(49)" +LINE296="STATE015; STATE000(399)" +LINE297="STATE023; STATE000(999)" +LINE298="STATE024; STATE000(999)" +LINE299="STATE001; RETURN ParallelForwardNoCoincident" +LINE300=ParallelForwardSegment1: +LINE301="STATE025; RETURN ParallelForwardSegment1" +LINE302=ParallelForwardSegment2: +LINE303="STATE026; RETURN ParallelForwardSegment2" +LINE304=ParallelForwardSegment3: +LINE305="STATE027; RETURN ParallelForwardSegment3" +LINE306=OutputTestSetup: +LINE307="STATE028; STATE000(999999)" +LINE308="STATE001; RETURN OutputTestSetup" +LINE309=PulseTGA: +LINE310="STATE029; STATE000(2499)" +LINE311="STATE030; STATE000(2499)" +LINE312="STATE031; RETURN PulseTGA" +LINE313=VRDModulate: +LINE314="STATE032; STATE000(999999)" +LINE315="STATE033; STATE000(99)" +LINE316="STATE034; STATE000(99)" +LINE317="STATE035; STATE000(99)" +LINE318="STATE036; STATE000(99)" +LINE319="STATE037; STATE000(99)" +LINE320="STATE038; STATE000(999999)" +LINE321="STATE033; STATE000(99)" +LINE322="STATE034; STATE000(99)" +LINE323="STATE039; STATE000(99)" +LINE324="STATE040; STATE000(99)" +LINE325="STATE041; STATE000(99)" +LINE326="STATE042; STATE000(999999)" +LINE327="STATE033; STATE000(99)" +LINE328="STATE034; STATE000(99)" +LINE329="STATE043; STATE000(99)" +LINE330="STATE044; STATE000(99)" +LINE331="STATE045; STATE000(99)" +LINE332="STATE046; STATE000(999999)" +LINE333="STATE033; STATE000(99)" +LINE334="STATE034; STATE000(99)" +LINE335="STATE047; STATE000(99)" +LINE336="STATE048; STATE000(99)" +LINE337="STATE049; STATE000(99)" +LINE338="STATE050; STATE000(999999)" +LINE339="STATE033; STATE000(99)" +LINE340="STATE034; STATE000(99)" +LINE341="STATE051; STATE000(99)" +LINE342="STATE052; STATE000(99)" +LINE343="STATE053; STATE000(99)" +LINE344="STATE054; STATE000(999999)" +LINE345="STATE033; STATE000(99)" +LINE346="STATE034; STATE000(99)" +LINE347="STATE055; STATE000(99)" +LINE348="STATE056; STATE000(99)" +LINE349="STATE057; STATE000(99)" +LINE350="STATE058; STATE000(999999)" +LINE351="STATE033; STATE000(99)" +LINE352="STATE034; STATE000(99)" +LINE353="STATE059; STATE000(99)" +LINE354="STATE060; STATE000(99)" +LINE355="STATE061; STATE000(99)" +LINE356="STATE062; STATE000(999999)" +LINE357="STATE033; STATE000(99)" +LINE358="STATE034; STATE000(99)" +LINE359="STATE063; STATE000(99)" +LINE360="STATE064; STATE000(99)" +LINE361="STATE065; STATE000(99)" +LINE362="STATE066; RETURN VRDModulate" +LINE363=ReadPixels: +LINE364="STATE067;" +LINE365="STATE068; STATE000(58)" +LINE366="STATE069;" +LINE367="STATE031; STATE000(298)" +LINE368="STATE070; STATE000(199)" +LINE369="STATE071; STATE000(59)" +LINE370="STATE001; RETURN ReadPixels" +LINE371=ReadPixelsSlow: +LINE372="STATE072;" +LINE373="STATE068; STATE000(13)" +LINE374="STATE073; STATE000(14)" +LINE375="STATE074; STATE000(4)" +LINE376="STATE075; STATE000(9)" +LINE377="STATE076; STATE000(15)" +LINE378="STATE031; STATE000(118)" +LINE379="STATE077; STATE000(14)" +LINE380="STATE078; STATE000(14)" +LINE381="STATE070; STATE000(116)" +LINE382="STATE001; RETURN ReadPixelsSlow" +LINE383=ForwardParallelSectionANoCoincident: +LINE384="STATE001; STATE000(999)" +LINE385="STATE079; STATE000(999)" +LINE386="STATE080; STATE000(999)" +LINE387="STATE081; STATE000(999)" +LINE388="STATE082; STATE000(199)" +LINE389="STATE083; STATE000(49)" +LINE390="STATE021; STATE000(299)" +LINE391="STATE084; STATE000(49)" +LINE392="STATE015; STATE000(399)" +LINE393="STATE085; STATE000(999)" +LINE394="STATE086; STATE000(999)" +LINE395="STATE001; RETURN ForwardParallelSectionANoCoincident" +LINE396=ForwardParallelSectionBNoCoincident: +LINE397="STATE001; STATE000(999)" +LINE398="STATE087; STATE000(999)" +LINE399="STATE088; STATE000(999)" +LINE400="STATE089; STATE000(999)" +LINE401="STATE090; STATE000(999)" +LINE402="STATE091; STATE000(999)" +LINE403="STATE092; STATE000(999)" +LINE404="STATE001; RETURN ForwardParallelSectionBNoCoincident" +LINE405=ForwardParallelSectionA: +LINE406="STATE093; STATE000(364665)" +LINE407="STATE094; STATE000(364666)" +LINE408="STATE095; RETURN ForwardParallelSectionA" +LINE409=ForwardParallelSectionB: +LINE410="STATE096; STATE000(364665)" +LINE411="STATE097; STATE000(364666)" +LINE412="STATE098; RETURN ForwardParallelSectionB" +LINE413=ForwardParallelAll: +LINE414="STATE026; STATE000(364665)" +LINE415="STATE027; STATE000(364666)" +LINE416="STATE025; RETURN ForwardParallelAll" +LINE417=ParallelForwardSectionASegment1: +LINE418="STATE093; RETURN ParallelForwardSectionASegment1" +LINE419=ParallelForwardSectionASegment2: +LINE420="STATE094; RETURN ParallelForwardSectionASegment2" +LINE421=ParallelForwardSectionASegment3: +LINE422="STATE095; RETURN ParallelForwardSectionASegment3" +LINE423=Wait10us: +LINE424="STATE000; STATE000(999)" +LINE425="STATE001; RETURN Wait10us" +LINE426=ReadPixelsEOnly: +LINE427="STATE099;" +LINE428="STATE068; STATE000(58)" +LINE429="STATE100;" +LINE430="STATE031; STATE000(298)" +LINE431="STATE070; STATE000(199)" +LINE432="STATE101; STATE000(59)" +LINE433="STATE001; RETURN ReadPixelsEOnly" +LINE434=ReadPixelsFOnly: +LINE435="STATE102;" +LINE436="STATE068; STATE000(58)" +LINE437="STATE103;" +LINE438="STATE031; STATE000(298)" +LINE439="STATE070; STATE000(129)" +LINE440="STATE104; STATE000(79)" +LINE441="STATE001; RETURN ReadPixelsFOnly" +LINE442=PrepSerBin: +LINE443="STATE105; STATE000(39)" +LINE444="STATE074; STATE000(19)" +LINE445="STATE031; RETURN PrepSerBin" +LINE446=SerialBinForwards: +LINE447="STATE106; STATE000(39)" +LINE448="STATE107; STATE000(39)" +LINE449="STATE071; STATE000(39)" +LINE450="STATE106; STATE000(39)" +LINE451="STATE001; RETURN SerialBinForwards" +LINE452=DumpPixels: +LINE453="STATE108; STATE000(39)" +LINE454="STATE069; STATE000(19)" +LINE455="STATE031; STATE000(279)" +LINE456="STATE070; STATE000(199)" +LINE457="STATE109; STATE000(59)" +LINE458="STATE001; RETURN DumpPixels" +LINE459=trigpix: +LINE460="STATE110;" +LINE461="STATE111; RETURN trigpix" +LINE462=DumpPixelsEOnly: +LINE463="STATE112; STATE000(39)" +LINE464="STATE100; STATE000(299)" +LINE465="STATE070; STATE000(199)" +LINE466="STATE113; STATE000(59)" +LINE467="STATE001; RETURN DumpPixelsEOnly" +LINE468=DumpPixelsFOnly: +LINE469="STATE114; STATE000(39)" +LINE470="STATE103; STATE000(299)" +LINE471="STATE070; STATE000(129)" +LINE472="STATE115; STATE000(79)" +LINE473="STATE001; RETURN DumpPixelsFOnly" +LINE474=SerialFBackwards: +LINE475="STATE116; STATE000(29)" +LINE476="STATE117; STATE000(29)" +LINE477="STATE118; STATE000(29)" +LINE478="STATE119; STATE000(29)" +LINE479="STATE120; RETURN SerialFBackwards" +LINE480=SerialEBackwards: +LINE481="STATE121; STATE000(29)" +LINE482="STATE122; STATE000(29)" +LINE483="STATE123; STATE000(29)" +LINE484="STATE120; STATE000(29)" +LINE485="STATE119; RETURN SerialEBackwards" +LINE486=EvacuateFFinish: +LINE487="STATE124; STATE000(1999)" +LINE488="STATE125; STATE000(499)" +LINE489="STATE001; RETURN EvacuateFFinish" +LINE490=EvacuateFStart: +LINE491="STATE126; RETURN EvacuateFStart" +LINE492=EvacuateEFinish: +LINE493="STATE124; STATE000(1999)" +LINE494="STATE127; STATE000(499)" +LINE495="STATE001; RETURN EvacuateEFinish" +LINE496=EvacuateEStart: +LINE497="STATE128; RETURN EvacuateEStart" +LINE498=BounceTGTest: +LINE499="STATE129;" +LINE500="STATE111; STATE000(498)" +LINE501="STATE030; STATE000(199)" +LINE502="STATE001; RETURN BounceTGTest" +LINE503=ClampTestInner: +LINE504="STATE129;" +LINE505="STATE111; STATE000(98)" +LINE506="STATE030; STATE000(99)" +LINE507="STATE001; RETURN ClampTestInner" +LINE508=ClampOn: +LINE509="STATE021; RETURN ClampOn" +LINE510=ClampOnFCS: +LINE511="STATE130; RETURN ClampOnFCS" +LINE512=ClampOff: +LINE513="STATE015; RETURN ClampOff" +LINE514=ClampOffFCS: +LINE515="STATE131; RETURN ClampOffFCS" +LINE516=ClampTestLineStart: +LINE517="STATE003; RETURN ClampTestLineStart" +LINE518=TGTestLineStart: +LINE519="STATE132; STATE000(99)" +LINE520="STATE015; RETURN TGTestLineStart" +LINE521=setupTGTest: +LINE522="STATE133; RETURN setupTGTest" +LINE523=FCSParallelForward: +LINE524="STATE134; STATE000(4999)" +LINE525="STATE135; STATE000(4999)" +LINE526="STATE136; STATE000(4999)" +LINE527="STATE137; STATE000(4999)" +LINE528="STATE138; STATE000(4999)" +LINE529="STATE139; STATE000(99)" +LINE530="STATE131; RETURN FCSParallelForward" +LINE531=FCSSplitReadout: +LINE532="STATE110;" +LINE533="STATE140; STATE000(99)" +LINE534="STATE141; STATE000(99)" +LINE535="STATE142; STATE000(99)" +LINE536="STATE143; STATE000(99)" +LINE537="STATE144; STATE000(99)" +LINE538="STATE145; STATE000(99)" +LINE539="STATE146; STATE000(299)" +LINE540="STATE147; STATE000(299)" +LINE541="STATE148; RETURN FCSSplitReadout" +LINE542=DumpPixelsFCS: +LINE543="STATE149; STATE000(99)" +LINE544="STATE150; STATE000(99)" +LINE545="STATE141; STATE000(99)" +LINE546="STATE142; STATE000(99)" +LINE547="STATE144; STATE000(99)" +LINE548="STATE145; STATE000(99)" +LINE549="STATE151; RETURN DumpPixelsFCS" +LINES=550 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=6.6666 MOD1\SLOWSLEWRATE1=0.0303 @@ -1057,7 +1067,7 @@ STATE6\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE7\NAME=STATE007 STATE7\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE7\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,-5,1,0,5,1,0,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1" -STATE7\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,-10,1,0,-10,1,0,-10,1,0,,1,1,,1,1" +STATE7\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,-10,1,0,-10,1,0,,1,1,,1,1" STATE7\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE7\MOD4="0,1,0,0,1,0" STATE7\CONTROL="0,3F" @@ -1286,7 +1296,7 @@ STATE32\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE32\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE32\MOD4="0,1,0,0,1,0" STATE32\CONTROL="0,3F" -STATE32\MOD9="" +STATE32\MOD9="1,8,12" STATE32\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE33\NAME=STATE033 STATE33\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1313,7 +1323,7 @@ STATE35\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE35\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE35\MOD4="0,1,0,0,1,0" STATE35\CONTROL="0,3F" -STATE35\MOD9="" +STATE35\MOD9="1,8,12.5" STATE35\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE36\NAME=STATE036 STATE36\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1322,7 +1332,7 @@ STATE36\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE36\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE36\MOD4="0,1,0,0,1,0" STATE36\CONTROL="0,3F" -STATE36\MOD9="" +STATE36\MOD9="1,9,12.5" STATE36\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE37\NAME=STATE037 STATE37\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1331,7 +1341,7 @@ STATE37\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE37\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE37\MOD4="0,1,0,0,1,0" STATE37\CONTROL="0,3F" -STATE37\MOD9="" +STATE37\MOD9="1,10,12.5" STATE37\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE38\NAME=STATE038 STATE38\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1340,7 +1350,7 @@ STATE38\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE38\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE38\MOD4="0,1,0,0,1,0" STATE38\CONTROL="0,3F" -STATE38\MOD9="" +STATE38\MOD9="1,11,12.5" STATE38\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE39\NAME=STATE039 STATE39\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1349,7 +1359,7 @@ STATE39\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE39\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE39\MOD4="0,1,0,0,1,0" STATE39\CONTROL="0,3F" -STATE39\MOD9="" +STATE39\MOD9="1,8,13" STATE39\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE40\NAME=STATE040 STATE40\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1358,309 +1368,309 @@ STATE40\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE40\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE40\MOD4="0,1,0,0,1,0" STATE40\CONTROL="0,3F" -STATE40\MOD9="" +STATE40\MOD9="1,9,13" STATE40\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE41\NAME=STATE041 STATE41\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE41\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE41\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE41\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE41\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE41\MOD4="0,1,0,0,1,0" -STATE41\CONTROL="8,37" -STATE41\MOD9="0,1,0" +STATE41\CONTROL="0,3F" +STATE41\MOD9="1,10,13" STATE41\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE42\NAME=STATE042 STATE42\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE42\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE42\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE42\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE42\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE42\MOD4="0,1,0,0,1,0" -STATE42\CONTROL="0,31" -STATE42\MOD9="0,1,0" +STATE42\CONTROL="0,3F" +STATE42\MOD9="1,11,13" STATE42\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE43\NAME=STATE043 STATE43\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE43\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE43\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE43\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE43\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE43\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE43\MOD4="0,1,0,0,1,0" STATE43\CONTROL="0,3F" -STATE43\MOD9="0,1,0" +STATE43\MOD9="1,8,13.5" STATE43\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE44\NAME=STATE044 STATE44\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE44\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE44\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE44\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE44\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE44\MOD4="0,1,0,0,1,0" STATE44\CONTROL="0,3F" -STATE44\MOD9="0,1,0" +STATE44\MOD9="1,9,13.5" STATE44\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE45\NAME=STATE045 STATE45\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE45\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE45\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE45\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE45\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE45\MOD4="0,1,0,0,1,0" STATE45\CONTROL="0,3F" -STATE45\MOD9="0,1,0" +STATE45\MOD9="1,10,13.5" STATE45\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE46\NAME=STATE046 STATE46\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE46\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE46\MOD3=",1,1,,1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE46\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE46\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE46\MOD4="0,1,0,0,1,0" -STATE46\CONTROL="8,37" -STATE46\MOD9="0,1,0" +STATE46\CONTROL="0,3F" +STATE46\MOD9="1,11,13.5" STATE46\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE47\NAME=STATE047 STATE47\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE47\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE47\MOD3=",1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE47\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE47\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE47\MOD4="0,1,0,0,1,0" STATE47\CONTROL="0,3F" -STATE47\MOD9="0,1,0" +STATE47\MOD9="1,8,14" STATE47\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE48\NAME=STATE048 STATE48\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE48\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE48\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE48\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE48\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE48\MOD4="0,1,0,0,1,0" STATE48\CONTROL="0,3F" -STATE48\MOD9="0,1,0" +STATE48\MOD9="1,9,14" STATE48\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE49\NAME=STATE049 STATE49\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE49\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE49\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE49\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE49\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE49\MOD4="0,1,0,0,1,0" STATE49\CONTROL="0,3F" -STATE49\MOD9="0,1,0" +STATE49\MOD9="1,10,14" STATE49\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE50\NAME=STATE050 STATE50\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE50\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE50\MOD3=",1,1,,1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE50\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE50\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE50\MOD4="0,1,0,0,1,0" STATE50\CONTROL="0,3F" -STATE50\MOD9="0,1,0" +STATE50\MOD9="1,11,14" STATE50\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE51\NAME=STATE051 STATE51\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE51\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE51\MOD3=",1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE51\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE51\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE51\MOD4="0,1,0,0,1,0" STATE51\CONTROL="0,3F" -STATE51\MOD9="0,1,0" +STATE51\MOD9="1,8,14.5" STATE51\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE52\NAME=STATE052 STATE52\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE52\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE52\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE52\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE52\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE52\MOD4="0,1,0,0,1,0" STATE52\CONTROL="0,3F" -STATE52\MOD9="0,1,0" +STATE52\MOD9="1,9,14.5" STATE52\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE53\NAME=STATE053 -STATE53\MOD1=",1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1" -STATE53\MOD2="12,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE53\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,12,1,0" -STATE53\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE53\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE53\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE53\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE53\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE53\MOD4="0,1,0,0,1,0" -STATE53\CONTROL="4,3B" -STATE53\MOD9="0,1,0" +STATE53\CONTROL="0,3F" +STATE53\MOD9="1,10,14.5" STATE53\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE54\NAME=STATE054 -STATE54\MOD1=",1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1" +STATE54\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE54\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE54\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE54\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE54\MOD4="0,1,0,0,1,0" STATE54\CONTROL="0,3F" -STATE54\MOD9="0,1,0" +STATE54\MOD9="1,11,14.5" STATE54\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE55\NAME=STATE055 -STATE55\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE55\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE55\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE55\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE55\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE55\MOD4="0,1,0,0,1,0" STATE55\CONTROL="0,3F" -STATE55\MOD9="0,1,0" +STATE55\MOD9="1,8,15" STATE55\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE56\NAME=STATE056 -STATE56\MOD1=",1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE56\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE56\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE56\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE56\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE56\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE56\MOD4="0,1,0,0,1,0" STATE56\CONTROL="0,3F" -STATE56\MOD9="0,1,0" +STATE56\MOD9="1,9,15" STATE56\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE57\NAME=STATE057 STATE57\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE57\MOD2="5,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE57\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" -STATE57\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE57\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE57\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE57\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE57\MOD4="0,1,0,0,1,0" STATE57\CONTROL="0,3F" -STATE57\MOD9="0,1,0" +STATE57\MOD9="1,10,15" STATE57\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE58\NAME=STATE058 STATE58\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE58\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE58\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE58\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE58\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE58\MOD4="0,1,0,0,1,0" STATE58\CONTROL="0,3F" -STATE58\MOD9="0,1,0" +STATE58\MOD9="1,11,15" STATE58\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE59\NAME=STATE059 -STATE59\MOD1=",1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1" +STATE59\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE59\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE59\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE59\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE59\MOD4="0,1,0,0,1,0" STATE59\CONTROL="0,3F" -STATE59\MOD9="0,1,0" +STATE59\MOD9="1,8,15.5" STATE59\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE60\NAME=STATE060 -STATE60\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE60\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE60\MOD4="0,1,0,0,1,0" STATE60\CONTROL="0,3F" -STATE60\MOD9="0,1,0" +STATE60\MOD9="1,9,15.5" STATE60\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE61\NAME=STATE061 -STATE61\MOD1="10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0" +STATE61\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE61\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE61\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE61\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE61\MOD4="0,1,0,0,1,0" STATE61\CONTROL="0,3F" -STATE61\MOD9="0,1,0" +STATE61\MOD9="1,10,15.5" STATE61\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE62\NAME=STATE062 -STATE62\MOD1=",1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1" +STATE62\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE62\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE62\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE62\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE62\MOD4="0,1,0,0,1,0" STATE62\CONTROL="0,3F" -STATE62\MOD9="0,1,0" +STATE62\MOD9="1,11,15.5" STATE62\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE63\NAME=STATE063 -STATE63\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1" +STATE63\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE63\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE63\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE63\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE63\MOD4="0,1,0,0,1,0" STATE63\CONTROL="0,3F" -STATE63\MOD9="0,1,0" +STATE63\MOD9="1,8,16" STATE63\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE64\NAME=STATE064 -STATE64\MOD1="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0" +STATE64\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE64\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE64\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE64\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE64\MOD4="0,1,0,0,1,0" STATE64\CONTROL="0,3F" -STATE64\MOD9="0,1,0" +STATE64\MOD9="1,9,16" STATE64\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE65\NAME=STATE065 -STATE65\MOD1=",1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1" +STATE65\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE65\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE65\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE65\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE65\MOD4="0,1,0,0,1,0" STATE65\CONTROL="0,3F" -STATE65\MOD9="0,1,0" +STATE65\MOD9="1,10,16" STATE65\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE66\NAME=STATE066 -STATE66\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE66\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE66\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE66\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE66\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE66\MOD4="0,1,0,0,1,0" STATE66\CONTROL="0,3F" -STATE66\MOD9="0,1,0" +STATE66\MOD9="1,11,16" STATE66\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE67\NAME=STATE067 -STATE67\MOD1=",1,1,0,0,0,,1,1,,1,1,,1,1,10,0,0,10,0,0,,1,1,,1,1,,1,1,0,0,0,,1,1" +STATE67\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE67\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE67\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE67\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE67\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE67\MOD4="0,1,0,0,1,0" -STATE67\CONTROL="0,3F" +STATE67\CONTROL="8,37" STATE67\MOD9="0,1,0" STATE67\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE68\NAME=STATE068 -STATE68\MOD1=",1,1,,1,1,,1,1,10,0,0,,1,1,0,0,0,0,0,0,,1,1,10,0,0,,1,1,,1,1,,1,1" +STATE68\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE68\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE68\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE68\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE68\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE68\MOD4="0,1,0,0,1,0" -STATE68\CONTROL="0,3F" +STATE68\CONTROL="0,31" STATE68\MOD9="0,1,0" STATE68\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE69\NAME=STATE069 -STATE69\MOD1=",1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1" +STATE69\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE69\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE69\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE69\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE69\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE69\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE69\MOD4="0,1,0,0,1,0" STATE69\CONTROL="0,3F" STATE69\MOD9="0,1,0" STATE69\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE70\NAME=STATE070 -STATE70\MOD1="0,0,0,,1,1,,1,1,,1,1,10,0,0,,1,1,,1,1,10,0,0,,1,1,,1,1,,1,1,0,0,0" +STATE70\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE70\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE70\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE70\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE70\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE70\MOD4="0,1,0,0,1,0" STATE70\CONTROL="0,3F" STATE70\MOD9="0,1,0" STATE70\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE71\NAME=STATE071 -STATE71\MOD1=",1,1,,1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1,,1,1" +STATE71\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE71\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE71\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE71\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE71\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE71\MOD4="0,1,0,0,1,0" STATE71\CONTROL="0,3F" STATE71\MOD9="0,1,0" STATE71\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE72\NAME=STATE072 -STATE72\MOD1="10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0" +STATE72\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE72\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE72\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE72\MOD3=",1,1,,1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE72\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE72\MOD4="0,1,0,0,1,0" -STATE72\CONTROL="0,3F" +STATE72\CONTROL="8,37" STATE72\MOD9="0,1,0" STATE72\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE73\NAME=STATE073 STATE73\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE73\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE73\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE73\MOD3=",1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE73\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE73\MOD4="0,1,0,0,1,0" -STATE73\CONTROL="8,37" +STATE73\CONTROL="0,3F" STATE73\MOD9="0,1,0" STATE73\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE74\NAME=STATE074 STATE74\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE74\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE74\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE74\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE74\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE74\MOD4="0,1,0,0,1,0" STATE74\CONTROL="0,3F" @@ -1669,7 +1679,7 @@ STATE74\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE75\NAME=STATE075 STATE75\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE75\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE75\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE75\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE75\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE75\MOD4="0,1,0,0,1,0" STATE75\CONTROL="0,3F" @@ -1678,17 +1688,17 @@ STATE75\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE76\NAME=STATE076 STATE76\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE76\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE76\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE76\MOD3=",1,1,,1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE76\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE76\MOD4="0,1,0,0,1,0" -STATE76\CONTROL="8,37" +STATE76\CONTROL="0,3F" STATE76\MOD9="0,1,0" STATE76\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE77\NAME=STATE077 STATE77\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE77\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE77\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE77\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE77\MOD3=",1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE77\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE77\MOD4="0,1,0,0,1,0" STATE77\CONTROL="0,3F" STATE77\MOD9="0,1,0" @@ -1696,53 +1706,53 @@ STATE77\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE78\NAME=STATE078 STATE78\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE78\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE78\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE78\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE78\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE78\MOD4="0,1,0,0,1,0" STATE78\CONTROL="0,3F" STATE78\MOD9="0,1,0" STATE78\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE79\NAME=STATE079 -STATE79\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE79\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE79\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE79\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE79\MOD1=",1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1" +STATE79\MOD2="12,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE79\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,12,1,0" +STATE79\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE79\MOD4="0,1,0,0,1,0" -STATE79\CONTROL="0,3F" +STATE79\CONTROL="4,3B" STATE79\MOD9="0,1,0" STATE79\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE80\NAME=STATE080 -STATE80\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE80\MOD1=",1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1" STATE80\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE80\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE80\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE80\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE80\MOD4="0,1,0,0,1,0" STATE80\CONTROL="0,3F" STATE80\MOD9="0,1,0" STATE80\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE81\NAME=STATE081 -STATE81\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE81\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" STATE81\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE81\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE81\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE81\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE81\MOD4="0,1,0,0,1,0" STATE81\CONTROL="0,3F" STATE81\MOD9="0,1,0" STATE81\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE82\NAME=STATE082 -STATE82\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE82\MOD1=",1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" STATE82\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE82\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE82\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE82\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE82\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE82\MOD4="0,1,0,0,1,0" STATE82\CONTROL="0,3F" STATE82\MOD9="0,1,0" STATE82\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE83\NAME=STATE083 STATE83\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE83\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE83\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE83\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE83\MOD2="5,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE83\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" +STATE83\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE83\MOD4="0,1,0,0,1,0" STATE83\CONTROL="0,3F" STATE83\MOD9="0,1,0" @@ -1750,134 +1760,134 @@ STATE83\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE84\NAME=STATE084 STATE84\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE84\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE84\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE84\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE84\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE84\MOD4="0,1,0,0,1,0" -STATE84\CONTROL="8,37" +STATE84\CONTROL="0,3F" STATE84\MOD9="0,1,0" STATE84\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE85\NAME=STATE085 -STATE85\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE85\MOD1=",1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1" STATE85\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE85\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE85\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE85\MOD4="0,1,0,0,1,0" -STATE85\CONTROL="0,31" +STATE85\CONTROL="0,3F" STATE85\MOD9="0,1,0" STATE85\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE86\NAME=STATE086 -STATE86\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE86\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" STATE86\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE86\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE86\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE86\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE86\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE86\MOD4="0,1,0,0,1,0" STATE86\CONTROL="0,3F" STATE86\MOD9="0,1,0" STATE86\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE87\NAME=STATE087 -STATE87\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE87\MOD1="10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0" STATE87\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE87\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE87\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE87\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE87\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE87\MOD4="0,1,0,0,1,0" STATE87\CONTROL="0,3F" STATE87\MOD9="0,1,0" STATE87\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE88\NAME=STATE088 -STATE88\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE88\MOD1=",1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1" STATE88\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE88\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE88\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE88\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE88\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE88\MOD4="0,1,0,0,1,0" STATE88\CONTROL="0,3F" STATE88\MOD9="0,1,0" STATE88\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE89\NAME=STATE089 -STATE89\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE89\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1" STATE89\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE89\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE89\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE89\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE89\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE89\MOD4="0,1,0,0,1,0" STATE89\CONTROL="0,3F" STATE89\MOD9="0,1,0" STATE89\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE90\NAME=STATE090 -STATE90\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE90\MOD1="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0" STATE90\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE90\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE90\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE90\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE90\MOD4="0,1,0,0,1,0" STATE90\CONTROL="0,3F" STATE90\MOD9="0,1,0" STATE90\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE91\NAME=STATE091 -STATE91\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE91\MOD1=",1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1" STATE91\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE91\MOD3=",1,1,11.5,1,0,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE91\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE91\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE91\MOD4="0,1,0,0,1,0" STATE91\CONTROL="0,3F" STATE91\MOD9="0,1,0" STATE91\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE92\NAME=STATE092 -STATE92\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE92\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" STATE92\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE92\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE92\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE92\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE92\MOD4="0,1,0,0,1,0" STATE92\CONTROL="0,3F" STATE92\MOD9="0,1,0" STATE92\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE93\NAME=STATE093 -STATE93\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE93\MOD1=",1,1,0,0,0,,1,1,,1,1,,1,1,10,0,0,10,0,0,,1,1,,1,1,,1,1,0,0,0,,1,1" STATE93\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE93\MOD3=",1,1,,1,1,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE93\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE93\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE93\MOD4="0,1,0,0,1,0" STATE93\CONTROL="0,3F" STATE93\MOD9="0,1,0" STATE93\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE94\NAME=STATE094 -STATE94\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE94\MOD1=",1,1,,1,1,,1,1,10,0,0,,1,1,0,0,0,0,0,0,,1,1,10,0,0,,1,1,,1,1,,1,1" STATE94\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE94\MOD3=",1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE94\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE94\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE94\MOD4="0,1,0,0,1,0" STATE94\CONTROL="0,3F" STATE94\MOD9="0,1,0" STATE94\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE95\NAME=STATE095 -STATE95\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE95\MOD1=",1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1" STATE95\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE95\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE95\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE95\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE95\MOD4="0,1,0,0,1,0" STATE95\CONTROL="0,3F" STATE95\MOD9="0,1,0" STATE95\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE96\NAME=STATE096 -STATE96\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE96\MOD1="0,0,0,,1,1,,1,1,,1,1,10,0,0,,1,1,,1,1,10,0,0,,1,1,,1,1,,1,1,0,0,0" STATE96\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE96\MOD3=",1,1,11.5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE96\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE96\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE96\MOD4="0,1,0,0,1,0" STATE96\CONTROL="0,3F" STATE96\MOD9="0,1,0" STATE96\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE97\NAME=STATE097 -STATE97\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE97\MOD1=",1,1,,1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1,,1,1" STATE97\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE97\MOD3=",1,1,1,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE97\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE97\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE97\MOD4="0,1,0,0,1,0" STATE97\CONTROL="0,3F" STATE97\MOD9="0,1,0" STATE97\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE98\NAME=STATE098 -STATE98\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE98\MOD1="10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0" STATE98\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE98\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE98\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE98\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE98\MOD4="0,1,0,0,1,0" STATE98\CONTROL="0,3F" STATE98\MOD9="0,1,0" @@ -1885,17 +1895,17 @@ STATE98\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE99\NAME=STATE099 STATE99\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE99\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE99\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE99\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE99\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE99\MOD4="0,1,0,0,1,0" -STATE99\CONTROL="0,3F" +STATE99\CONTROL="8,37" STATE99\MOD9="0,1,0" STATE99\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE100\NAME=STATE100 STATE100\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE100\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE100\MOD3=",1,1,11,1,0,,1,1,,1,1,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE100\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE100\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE100\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE100\MOD4="0,1,0,0,1,0" STATE100\CONTROL="0,3F" STATE100\MOD9="0,1,0" @@ -1903,7 +1913,7 @@ STATE100\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE101\NAME=STATE101 STATE101\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE101\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE101\MOD3=",1,1,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE101\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE101\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE101\MOD4="0,1,0,0,1,0" STATE101\CONTROL="0,3F" @@ -1912,26 +1922,26 @@ STATE101\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE102\NAME=STATE102 STATE102\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE102\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE102\MOD3=",1,1,11,1,0,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE102\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE102\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE102\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE102\MOD4="0,1,0,0,1,0" -STATE102\CONTROL="0,3F" +STATE102\CONTROL="8,37" STATE102\MOD9="0,1,0" STATE102\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE103\NAME=STATE103 STATE103\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE103\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE103\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" -STATE103\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE103\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE103\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE103\MOD4="0,1,0,0,1,0" -STATE103\CONTROL="8,37" +STATE103\CONTROL="0,3F" STATE103\MOD9="0,1,0" STATE103\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE104\NAME=STATE104 STATE104\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE104\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE104\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE104\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE104\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE104\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE104\MOD4="0,1,0,0,1,0" STATE104\CONTROL="0,3F" STATE104\MOD9="0,1,0" @@ -1940,7 +1950,7 @@ STATE105\NAME=STATE105 STATE105\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE105\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE105\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE105\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE105\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE105\MOD4="0,1,0,0,1,0" STATE105\CONTROL="0,3F" STATE105\MOD9="0,1,0" @@ -1948,35 +1958,35 @@ STATE105\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE106\NAME=STATE106 STATE106\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE106\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE106\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE106\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE106\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE106\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE106\MOD4="0,1,0,0,1,0" -STATE106\CONTROL="4,3B" +STATE106\CONTROL="0,3F" STATE106\MOD9="0,1,0" STATE106\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE107\NAME=STATE107 -STATE107\MOD1="0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0" +STATE107\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE107\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE107\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE107\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE107\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE107\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE107\MOD4="0,1,0,0,1,0" -STATE107\CONTROL="2,3D" +STATE107\CONTROL="0,3F" STATE107\MOD9="0,1,0" STATE107\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE108\NAME=STATE108 STATE108\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE108\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE108\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1,,1,1" -STATE108\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE108\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE108\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE108\MOD4="0,1,0,0,1,0" -STATE108\CONTROL="4,3B" +STATE108\CONTROL="0,3F" STATE108\MOD9="0,1,0" STATE108\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE109\NAME=STATE109 STATE109\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE109\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE109\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5.8,1,0,5.8,1,0,,1,1,,1,1,,1,1,,1,1" -STATE109\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE109\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE109\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE109\MOD4="0,1,0,0,1,0" STATE109\CONTROL="0,3F" STATE109\MOD9="0,1,0" @@ -1984,26 +1994,26 @@ STATE109\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE110\NAME=STATE110 STATE110\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE110\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE110\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" +STATE110\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE110\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE110\MOD4="0,1,0,0,1,0" -STATE110\CONTROL="0,3F" +STATE110\CONTROL="8,37" STATE110\MOD9="0,1,0" STATE110\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE111\NAME=STATE111 STATE111\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE111\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE111\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1" +STATE111\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE111\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE111\MOD4="0,1,0,0,1,0" -STATE111\CONTROL="0,3F" +STATE111\CONTROL="0,31" STATE111\MOD9="0,1,0" STATE111\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE112\NAME=STATE112 STATE112\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE112\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE112\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,,1,1,,1,1,,1,1,,1,1" -STATE112\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE112\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE112\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE112\MOD4="0,1,0,0,1,0" STATE112\CONTROL="0,3F" STATE112\MOD9="0,1,0" @@ -2011,34 +2021,34 @@ STATE112\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE113\NAME=STATE113 STATE113\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE113\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE113\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1" -STATE113\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE113\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE113\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE113\MOD4="0,1,0,0,1,0" STATE113\CONTROL="0,3F" STATE113\MOD9="0,1,0" STATE113\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE114\NAME=STATE114 STATE114\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE114\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,12,1,0,,1,1,,1,1,,1,1,,1,1" -STATE114\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE114\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE114\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE114\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE114\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE114\MOD4="0,1,0,0,1,0" -STATE114\CONTROL="0,31" +STATE114\CONTROL="0,3F" STATE114\MOD9="0,1,0" STATE114\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE115\NAME=STATE115 STATE115\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE115\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1" -STATE115\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE115\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE115\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE115\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE115\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE115\MOD4="0,1,0,0,1,0" STATE115\CONTROL="0,3F" STATE115\MOD9="0,1,0" STATE115\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE116\NAME=STATE116 STATE116\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE116\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE116\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE116\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE116\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE116\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE116\MOD4="0,1,0,0,1,0" STATE116\CONTROL="0,3F" @@ -2046,8 +2056,8 @@ STATE116\MOD9="0,1,0" STATE116\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE117\NAME=STATE117 STATE117\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE117\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,4,1,0,,1,1,,1,1,,1,1" -STATE117\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE117\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE117\MOD3=",1,1,11.5,1,0,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE117\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE117\MOD4="0,1,0,0,1,0" STATE117\CONTROL="0,3F" @@ -2055,8 +2065,8 @@ STATE117\MOD9="0,1,0" STATE117\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE118\NAME=STATE118 STATE118\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE118\MOD2=",1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1" -STATE118\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE118\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE118\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE118\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE118\MOD4="0,1,0,0,1,0" STATE118\CONTROL="0,3F" @@ -2064,8 +2074,8 @@ STATE118\MOD9="0,1,0" STATE118\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE119\NAME=STATE119 STATE119\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE119\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE119\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE119\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE119\MOD3=",1,1,,1,1,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE119\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE119\MOD4="0,1,0,0,1,0" STATE119\CONTROL="0,3F" @@ -2073,8 +2083,8 @@ STATE119\MOD9="0,1,0" STATE119\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE120\NAME=STATE120 STATE120\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE120\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,,1,1,-4,1,0,,1,1,,1,1,,1,1" -STATE120\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE120\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE120\MOD3=",1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE120\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE120\MOD4="0,1,0,0,1,0" STATE120\CONTROL="0,3F" @@ -2082,8 +2092,8 @@ STATE120\MOD9="0,1,0" STATE120\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE121\NAME=STATE121 STATE121\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE121\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,12,1,0,,1,1,5,1,0,,1,1,,1,1" -STATE121\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE121\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE121\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE121\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE121\MOD4="0,1,0,0,1,0" STATE121\CONTROL="0,3F" @@ -2091,8 +2101,8 @@ STATE121\MOD9="0,1,0" STATE121\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE122\NAME=STATE122 STATE122\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE122\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE122\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE122\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE122\MOD3=",1,1,11.5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE122\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE122\MOD4="0,1,0,0,1,0" STATE122\CONTROL="0,3F" @@ -2100,14 +2110,266 @@ STATE122\MOD9="0,1,0" STATE122\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE123\NAME=STATE123 STATE123\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE123\MOD2=",1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,4,1,0,-4,1,0,-5,1,0,,1,1,,1,1" -STATE123\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE123\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE123\MOD3=",1,1,1,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE123\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE123\MOD4="0,1,0,0,1,0" STATE123\CONTROL="0,3F" STATE123\MOD9="0,1,0" STATE123\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" -STATES=124 +STATE124\NAME=STATE124 +STATE124\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE124\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE124\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE124\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE124\MOD4="0,1,0,0,1,0" +STATE124\CONTROL="0,3F" +STATE124\MOD9="0,1,0" +STATE124\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE125\NAME=STATE125 +STATE125\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE125\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE125\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE125\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE125\MOD4="0,1,0,0,1,0" +STATE125\CONTROL="0,3F" +STATE125\MOD9="0,1,0" +STATE125\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE126\NAME=STATE126 +STATE126\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE126\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE126\MOD3=",1,1,11,1,0,,1,1,,1,1,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE126\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE126\MOD4="0,1,0,0,1,0" +STATE126\CONTROL="0,3F" +STATE126\MOD9="0,1,0" +STATE126\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE127\NAME=STATE127 +STATE127\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE127\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE127\MOD3=",1,1,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE127\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE127\MOD4="0,1,0,0,1,0" +STATE127\CONTROL="0,3F" +STATE127\MOD9="0,1,0" +STATE127\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE128\NAME=STATE128 +STATE128\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE128\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE128\MOD3=",1,1,11,1,0,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE128\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE128\MOD4="0,1,0,0,1,0" +STATE128\CONTROL="0,3F" +STATE128\MOD9="0,1,0" +STATE128\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE129\NAME=STATE129 +STATE129\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE129\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE129\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE129\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE129\MOD4="0,1,0,0,1,0" +STATE129\CONTROL="8,37" +STATE129\MOD9="0,1,0" +STATE129\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE130\NAME=STATE130 +STATE130\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE130\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE130\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE130\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE130\MOD4="0,1,0,0,1,0" +STATE130\CONTROL="0,3F" +STATE130\MOD9="0,1,0" +STATE130\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE131\NAME=STATE131 +STATE131\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE131\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE131\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE131\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE131\MOD4="0,1,0,0,1,0" +STATE131\CONTROL="0,3F" +STATE131\MOD9="0,1,0" +STATE131\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE132\NAME=STATE132 +STATE132\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE132\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE132\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE132\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE132\MOD4="0,1,0,0,1,0" +STATE132\CONTROL="4,3B" +STATE132\MOD9="0,1,0" +STATE132\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE133\NAME=STATE133 +STATE133\MOD1="0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0" +STATE133\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE133\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE133\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE133\MOD4="0,1,0,0,1,0" +STATE133\CONTROL="2,3D" +STATE133\MOD9="0,1,0" +STATE133\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE134\NAME=STATE134 +STATE134\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE134\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE134\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" +STATE134\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE134\MOD4="0,1,0,0,1,0" +STATE134\CONTROL="4,3B" +STATE134\MOD9="0,1,0" +STATE134\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE135\NAME=STATE135 +STATE135\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE135\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE135\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5.8,1,0,5.8,1,0,,1,1,,1,1,,1,1,,1,1" +STATE135\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE135\MOD4="0,1,0,0,1,0" +STATE135\CONTROL="0,3F" +STATE135\MOD9="0,1,0" +STATE135\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE136\NAME=STATE136 +STATE136\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE136\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE136\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1,,1,1" +STATE136\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE136\MOD4="0,1,0,0,1,0" +STATE136\CONTROL="0,3F" +STATE136\MOD9="0,1,0" +STATE136\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE137\NAME=STATE137 +STATE137\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE137\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE137\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1" +STATE137\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE137\MOD4="0,1,0,0,1,0" +STATE137\CONTROL="0,3F" +STATE137\MOD9="0,1,0" +STATE137\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE138\NAME=STATE138 +STATE138\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE138\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE138\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,,1,1,,1,1,,1,1,,1,1" +STATE138\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE138\MOD4="0,1,0,0,1,0" +STATE138\CONTROL="0,3F" +STATE138\MOD9="0,1,0" +STATE138\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE139\NAME=STATE139 +STATE139\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE139\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE139\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1" +STATE139\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE139\MOD4="0,1,0,0,1,0" +STATE139\CONTROL="0,3F" +STATE139\MOD9="0,1,0" +STATE139\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE140\NAME=STATE140 +STATE140\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE140\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,12,1,0,,1,1,,1,1,,1,1,,1,1" +STATE140\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE140\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE140\MOD4="0,1,0,0,1,0" +STATE140\CONTROL="0,31" +STATE140\MOD9="0,1,0" +STATE140\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE141\NAME=STATE141 +STATE141\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE141\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE141\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE141\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE141\MOD4="0,1,0,0,1,0" +STATE141\CONTROL="0,3F" +STATE141\MOD9="0,1,0" +STATE141\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE142\NAME=STATE142 +STATE142\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE142\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE142\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE142\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE142\MOD4="0,1,0,0,1,0" +STATE142\CONTROL="0,3F" +STATE142\MOD9="0,1,0" +STATE142\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE143\NAME=STATE143 +STATE143\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE143\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,4,1,0,4,1,0,,1,1,,1,1,,1,1" +STATE143\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE143\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE143\MOD4="0,1,0,0,1,0" +STATE143\CONTROL="0,3F" +STATE143\MOD9="0,1,0" +STATE143\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE144\NAME=STATE144 +STATE144\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE144\MOD2=",1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1" +STATE144\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE144\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE144\MOD4="0,1,0,0,1,0" +STATE144\CONTROL="0,3F" +STATE144\MOD9="0,1,0" +STATE144\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE145\NAME=STATE145 +STATE145\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE145\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE145\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE145\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE145\MOD4="0,1,0,0,1,0" +STATE145\CONTROL="0,3F" +STATE145\MOD9="0,1,0" +STATE145\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE146\NAME=STATE146 +STATE146\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE146\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE146\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE146\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE146\MOD4="0,1,0,0,1,0" +STATE146\CONTROL="0,3F" +STATE146\MOD9="0,1,0" +STATE146\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE147\NAME=STATE147 +STATE147\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE147\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-4,1,0,,1,1,,1,1,,1,1" +STATE147\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE147\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE147\MOD4="0,1,0,0,1,0" +STATE147\CONTROL="0,3F" +STATE147\MOD9="0,1,0" +STATE147\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE148\NAME=STATE148 +STATE148\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE148\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1" +STATE148\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE148\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE148\MOD4="0,1,0,0,1,0" +STATE148\CONTROL="0,3F" +STATE148\MOD9="0,1,0" +STATE148\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE149\NAME=STATE149 +STATE149\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE149\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,12,1,0,,1,1,5,1,0,,1,1,,1,1" +STATE149\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE149\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE149\MOD4="0,1,0,0,1,0" +STATE149\CONTROL="0,3F" +STATE149\MOD9="0,1,0" +STATE149\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE150\NAME=STATE150 +STATE150\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE150\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,4,1,0,5,1,0,,1,1,,1,1" +STATE150\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE150\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE150\MOD4="0,1,0,0,1,0" +STATE150\CONTROL="0,3F" +STATE150\MOD9="0,1,0" +STATE150\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATE151\NAME=STATE151 +STATE151\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE151\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,4,1,0,-4,1,0,,1,1,,1,1,,1,1" +STATE151\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE151\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE151\MOD4="0,1,0,0,1,0" +STATE151\CONTROL="0,3F" +STATE151\MOD9="0,1,0" +STATE151\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATES=152 [SYSTEM] BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 @@ -2132,11 +2394,11 @@ MOD4_TYPE=12 MOD9_ID=0000000000000000 MOD9_REV=0 MOD9_VERSION=0.0.0 -MOD9_TYPE=4 +MOD9_TYPE=8 MOD10_ID=0000000000000000 MOD10_REV=0 MOD10_VERSION=0.0.0 -MOD10_TYPE=3 +MOD10_TYPE=9 MOD12_ID=0000000000000000 MOD12_REV=0 MOD12_VERSION=0.0.0 diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index c5b9aaf..90e4b7c 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -73,14 +73,14 @@ FRAMEMODE=0 TAPLINE0="AM45L,1,100" TAPLINE1="AM46R,1,100" -RAWSEL=49 +RAWSEL=48 LINECOUNT = _FCS_LINENUM PIXELCOUNT = _FCS_TOTAL_COLS -SHP1 = 250 -SHP2 = 650 -SHD1 = 800 -SHD2 = 1000 +SHP1 = 750 +SHP2 = 850 +SHD1 = 1000 +SHD2 = 1200 RAWSTARTPIXEL=23 diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 49eb677..ca2f706 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -279,11 +279,8 @@ SEQUENCE SummitModeSciDump { SEQUENCE SummitModeFCSReadout { - Wait1us(50); //TODO: faster FCS readout with windowing - - FCSLineReadout(_FCS_ROWS); - FCSLineReadout(_FCS_LLEL_OVERSCAN); + FCSLineReadout(_FCS_LINENUM); RETURN; } @@ -295,21 +292,14 @@ SEQUENCE FCSLineReadout { } -SEQUENCE StartSeqEngModeFCS { - if framecount EngModeFCSIntegrateandReadout(); - if !framecount SummitModeFCSLineFlush(_FCS_ROWS); - - GOTO StartSeqEngModeFCS(); -} -SEQUENCE EngModeFCSIntegrateandReadout { - SummitModeFCSIntegrate(); +SEQUENCE StartSeqEngModeFCS { + if framecount SummitModeFCSIntegrate(); framecount--; - RETURN; + if !framecount SummitModeFCSLineFlush(_FCS_LINENUM); + GOTO StartSeqEngModeFCS(); } - - SEQUENCE StartSeqEngMode { if framecount IntegrateAndReadout(); if !framecount LineReadoutFast(TOTAL_ROWS); diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 87b122c..c0c9a6d 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -130,7 +130,7 @@ WAVEFORM InitialSetupFCS .+1000: SET AC_Clamp_FCS to LOW; - SET FCS_P3 TO _PAR_CLOCK_LOW_FCS, FAST; + SET FCS_P3 TO _MPP_CLOCK_LOW_FCS, FAST; SET FCS_P2 TO _PAR_CLOCK_LOW_FCS, FAST; SET FCS_P1 TO _PAR_CLOCK_LOW_FCS, FAST; @@ -909,26 +909,31 @@ WAVEFORM setupTGTest } +//known working parallel clock sequence +//NOTE - looks like P1 & P2 are the wrong +// way round!! + + //Jake's working sequence did 1ms between llel clocks -#define FCS_PAR_STEP 1000 +#define FCS_PAR_STEP 5000 WAVEFORM FCSParallelForward { 0: SET AC_Clamp_FCS TO HIGH; SET LINE TO HIGH; - SET FCS_P1 to _PAR_CLOCK_LOW_FCS, FAST; + SET FCS_P2 to _PAR_CLOCK_LOW_FCS, FAST; .+FCS_PAR_STEP: SET FCS_P3 to _MPP_CLOCK_HIGH_FCS, FAST; - .+FCS_PAR_STEP: SET FCS_P2 to _PAR_CLOCK_LOW_FCS, FAST; - .+FCS_PAR_STEP: SET FCS_P1 to _PAR_CLOCK_HIGH_FCS, FAST; + .+FCS_PAR_STEP: SET FCS_P1 to _PAR_CLOCK_LOW_FCS, FAST; + .+FCS_PAR_STEP: SET FCS_P2 to _PAR_CLOCK_HIGH_FCS, FAST; .+FCS_PAR_STEP: SET FCS_P3 to _MPP_CLOCK_LOW_FCS, FAST; - .+FCS_PAR_STEP: set FCS_P2 to _PAR_CLOCK_HIGH_FCS, FAST; - 100: SET AC_Clamp_FCS TO LOW; + .+FCS_PAR_STEP: set FCS_P1 to _PAR_CLOCK_HIGH_FCS, FAST; + .+100: SET AC_Clamp_FCS TO LOW; } -#define FCS_SER_STEP 40 +#define FCS_SER_STEP 100 #define FCS_SIG_DELAY 300 -#define FCS_RST_DELAY 80 +#define FCS_RST_DELAY 300 WAVEFORM FCSSplitReadout { @@ -938,22 +943,19 @@ WAVEFORM FCSSplitReadout .+1: SET PIXEL TO LOW; SET LINE TO LOW; SET FRAME TO LOW; + SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; SET FCS_RG TO _RG_HIGH_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; //serial clocking .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_RG TO _RG_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_RG TO _RG_LOW_FCS, FAST; SET FCS_SW TO _SW_HIGH_FCS, FAST; .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS,FAST; - .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; - SET FCS_SW TO _SW_LOW_FCS, FAST; + .+FCS_RST_DELAY: SET FCS_SW TO _SW_LOW_FCS, FAST; .+FCS_SIG_DELAY: SET NOP TO HIGH; - } WAVEFORM DumpPixelsFCS @@ -961,14 +963,14 @@ WAVEFORM DumpPixelsFCS 0:=FCS_DUMP_BEGIN SET FCS_RG TO _RG_HIGH_FCS, FAST; SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; SET FCS_SW TO _SW_HIGH_FCS, FAST; .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; - .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS,FAST; .+FCS_SER_STEP: SET FCS_S3 TO _SER_CLOCK_LOW_FCS, FAST; + .+FCS_SER_STEP: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS,FAST; + .+FCS_SER_STEP: SET FCS_S2 TO _SER_CLOCK_LOW_FCS, FAST; SET FCS_SW TO _SW_LOW_FCS, FAST; SET FCS_RG TO _RG_LOW_FCS, FAST; From a6b1005437e242110990f72427d24f5c7e0b4b2d Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 10 Feb 2026 14:54:35 -0800 Subject: [PATCH 180/194] closer to decently working FCS readout sequence on FCS1 --- src/deimos/deimos.mod | 2 +- src/deimos/deimos.waveform | 15 +++++++++++++-- src/deimos/voltage_timing_parameters.h | 2 +- 3 files changed, 15 insertions(+), 4 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 5efed3c..5216067 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -140,7 +140,7 @@ SLOT 10 lvxbias { LVLC 19 [0.0,0] ; LVLC 20 [00.0,0]; LVLC 21 [00.0,0]; - LVLC 22 [00.0,6] "Video offset FCS"; + LVLC 22 [0.2,6] "Video offset FCS"; LVLC 23 [0.50,6] "Video offset SCI"; LVLC 24 [0.50,6] "Video offset SCI2"; LVHC 1 [2.00,20.0,5,1] "SCI Summing Well - Low"; diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index c0c9a6d..b8a44fa 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -919,7 +919,12 @@ WAVEFORM setupTGTest WAVEFORM FCSParallelForward { - 0: SET AC_Clamp_FCS TO HIGH; + 0: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; + SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; + SET FCS_SW TO _SW_LOW_FCS, FAST; + SET FCS_RG TO _RG_HIGH_FCS, FAST; + + .+1000: SET AC_Clamp_FCS TO HIGH; SET LINE TO HIGH; SET FCS_P2 to _PAR_CLOCK_LOW_FCS, FAST; .+FCS_PAR_STEP: SET FCS_P3 to _MPP_CLOCK_HIGH_FCS, FAST; @@ -928,10 +933,16 @@ WAVEFORM FCSParallelForward .+FCS_PAR_STEP: SET FCS_P3 to _MPP_CLOCK_LOW_FCS, FAST; .+FCS_PAR_STEP: set FCS_P1 to _PAR_CLOCK_HIGH_FCS, FAST; .+100: SET AC_Clamp_FCS TO LOW; + SET FCS_RG TO _RG_LOW_FCS, FAST; + + .+200: SET NOP TO HIGH; + + + } -#define FCS_SER_STEP 100 +#define FCS_SER_STEP 40 #define FCS_SIG_DELAY 300 #define FCS_RST_DELAY 300 diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index b9f853d..57f9e19 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -145,7 +145,7 @@ #define _SER_CLOCK_HIGH_FCS 5.0 #define _SER_CLOCK_LOW_FCS -5.0 -#define _RG_LOW_FCS 4.0 +#define _RG_LOW_FCS 2.0 #define _RG_HIGH_FCS 12.0 #define _SW_LOW_FCS -4.0 From db82674c9b00168a1af070a736796283483d0cc6 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Wed, 11 Feb 2026 17:44:44 -0800 Subject: [PATCH 181/194] verified working FCS. Do not use for summit camerad yet, some defines and modes need to be altered --- src/deimos/deimos.cds | 8 +++---- src/deimos/deimos.mod | 13 +++++++----- src/deimos/deimos.seq | 1 + src/deimos/deimos.signals | 6 ++---- src/deimos/deimos.waveform | 29 +++++++++++--------------- src/deimos/voltage_timing_parameters.h | 14 ++++++------- 6 files changed, 34 insertions(+), 37 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 90e4b7c..4c267b6 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -77,10 +77,10 @@ RAWSEL=48 LINECOUNT = _FCS_LINENUM PIXELCOUNT = _FCS_TOTAL_COLS -SHP1 = 750 -SHP2 = 850 -SHD1 = 1000 -SHD2 = 1200 +SHP1 = 350 +SHP2 = 500 +SHD1 = 600 +SHD2 = 750 RAWSTARTPIXEL=23 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 5216067..395d7e0 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -95,8 +95,10 @@ SLOT 9 hvxbias { HVLC 7 [0.00,0]; HVLC 8 [14.00,2] "FCS1 Reset Drain A"; HVLC 9 [14.00,2] "FCS1 Reset Drain B"; - HVLC 10 [14.00,2] "FCS2 Reset Drain A"; - HVLC 11 [14.00,2] "FCS2 Reset Drain B"; +//FCS2 selected needs a spicier reset drain too +//to avoid smearing + HVLC 10 [14.50,2] "FCS2 Reset Drain A"; + HVLC 11 [14.50,2] "FCS2 Reset Drain B"; HVLC 12 [14.90,1] "FCS Overflow Drain"; HVLC 13 [24.3,1] "FCS1 Output Drain A"; HVLC 14 [24.3,1] "FCS1 Output Drain B"; @@ -129,9 +131,10 @@ SLOT 10 lvxbias { LVLC 8 [0.0,0]; LVLC 9 [00.0,0]; LVLC 10 [-4.0,4] "LastGateA FCS 1"; - LVLC 11 [-4.0,4] "LastGateB FCS 1"; - LVLC 12 [-4.0,4] "LastGateA FCS 2"; - LVLC 13 [-4.0,4] "LastGateB FCS 2"; + LVLC 11 [-4.0,4] "LastGateB FCS 1"; +// NOTE: it seems last gate on FCS2 detector needs a bit more oomph + LVLC 12 [-1.0,4] "LastGateA FCS 2"; + LVLC 13 [-1.0,4] "LastGateB FCS 2"; LVLC 14 [3.0,4] "SCI E Output Gate 2" ; LVLC 15 [3.0,4] "SCI F Output Gate 2"; LVLC 16 [0.0,0] ; diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index ca2f706..5ecc3b4 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -244,6 +244,7 @@ SEQUENCE SummitModeFCSIntegrate Wait1ms(FcsExpTimeMSec); Wait1s(FcsExpTimeSec); CloseShutter(); + Wait1ms(2); SummitModeFCSReadout(); RETURN; } diff --git a/src/deimos/deimos.signals b/src/deimos/deimos.signals index cd1b95e..573f43a 100644 --- a/src/deimos/deimos.signals +++ b/src/deimos/deimos.signals @@ -69,8 +69,8 @@ #define FCS_P3U 3 : 7 // new VIB assignment #define FCS_P3L 3 : 8 // new VIB assignment -#define FCS_P2a 3 : 9 // new VIB assignment -#define FCS_P1a 3 : 10 // new VIB assignment +#define FCS_P2 3 : 9 // new VIB assignment +#define FCS_P1 3 : 10 // new VIB assignment #define TGA2 3 : 11 // new VIB assignment @@ -189,8 +189,6 @@ //FCS readout -#defeval FCS_P1 FCS_P2a -#defeval FCS_P2 3:10 #defeval FCS_P3 [FCS_P3U, FCS_P3L] #define FCS_S2 [FCS1_S2L, FCS2_S2L] #define FCS_S3 [FCS1_S3L, FCS2_S3L] diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index b8a44fa..40e344f 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -909,36 +909,31 @@ WAVEFORM setupTGTest } -//known working parallel clock sequence -//NOTE - looks like P1 & P2 are the wrong -// way round!! - - //Jake's working sequence did 1ms between llel clocks -#define FCS_PAR_STEP 5000 +#define FCS_PAR_STEP 20000 WAVEFORM FCSParallelForward { - 0: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; - SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; - SET FCS_SW TO _SW_LOW_FCS, FAST; + 0: SET FCS_S1 TO _SER_CLOCK_HIGH_FCS, FAST; + //SET FCS_S3 TO _SER_CLOCK_HIGH_FCS, FAST; + //SET FCS_S2 TO _SER_CLOCK_HIGH_FCS, FAST; + SET FCS_SW TO _SW_LOW_FCS, FAST; SET FCS_RG TO _RG_HIGH_FCS, FAST; - - .+1000: SET AC_Clamp_FCS TO HIGH; + SET LINE TO HIGH; - SET FCS_P2 to _PAR_CLOCK_LOW_FCS, FAST; + SET FCS_P1 to _PAR_CLOCK_LOW_FCS, FAST; .+FCS_PAR_STEP: SET FCS_P3 to _MPP_CLOCK_HIGH_FCS, FAST; - .+FCS_PAR_STEP: SET FCS_P1 to _PAR_CLOCK_LOW_FCS, FAST; - .+FCS_PAR_STEP: SET FCS_P2 to _PAR_CLOCK_HIGH_FCS, FAST; + .+FCS_PAR_STEP: SET FCS_P2 to _PAR_CLOCK_LOW_FCS, FAST; + .+FCS_PAR_STEP: SET FCS_P1 to _PAR_CLOCK_HIGH_FCS, FAST; .+FCS_PAR_STEP: SET FCS_P3 to _MPP_CLOCK_LOW_FCS, FAST; - .+FCS_PAR_STEP: set FCS_P1 to _PAR_CLOCK_HIGH_FCS, FAST; - .+100: SET AC_Clamp_FCS TO LOW; + .+FCS_PAR_STEP: set FCS_P2 to _PAR_CLOCK_HIGH_FCS, FAST; SET FCS_RG TO _RG_LOW_FCS, FAST; + .+1000: SET AC_Clamp_FCS TO HIGH; + .+1000: SET AC_Clamp_FCS TO LOW; .+200: SET NOP TO HIGH; - } diff --git a/src/deimos/voltage_timing_parameters.h b/src/deimos/voltage_timing_parameters.h index 57f9e19..775c7cd 100644 --- a/src/deimos/voltage_timing_parameters.h +++ b/src/deimos/voltage_timing_parameters.h @@ -138,18 +138,18 @@ //FCS related voltage definitions -#define _PAR_CLOCK_HIGH_FCS 2.0 -#define _PAR_CLOCK_LOW_FCS -10.0 -#define _MPP_CLOCK_HIGH_FCS 5.8 -#define _MPP_CLOCK_LOW_FCS -8.0 -#define _SER_CLOCK_HIGH_FCS 5.0 +#define _PAR_CLOCK_HIGH_FCS 7.0 +#define _PAR_CLOCK_LOW_FCS -6.0 +#define _MPP_CLOCK_HIGH_FCS 7.5 +#define _MPP_CLOCK_LOW_FCS -5.0 +#define _SER_CLOCK_HIGH_FCS 8.0 #define _SER_CLOCK_LOW_FCS -5.0 #define _RG_LOW_FCS 2.0 #define _RG_HIGH_FCS 12.0 -#define _SW_LOW_FCS -4.0 -#define _SW_HIGH_FCS 4.0 +#define _SW_LOW_FCS -2.0 +#define _SW_HIGH_FCS 6.0 #define _RESET_DRAIN_FCS 14.0 #define _OUTPUT_DRAIN_FCS 24.3 From a21337e6cb312c20b58e25545cc513d9e9b13363 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 20 Feb 2026 18:05:40 -0800 Subject: [PATCH 182/194] swap tapline ordering in science FP mode to be correct geometry (we think) --- src/deimos/deimos.cds | 43 ++++++++++++++++++++++++++++++++----------- 1 file changed, 32 insertions(+), 11 deletions(-) diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 4c267b6..592619b 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -67,7 +67,7 @@ SHP2=303 SHD1=448 SHD2=575 -#elif 1 +#elif 0 TAPLINES=2 FRAMEMODE=0 TAPLINE0="AM45L,1,100" @@ -86,7 +86,26 @@ RAWSTARTPIXEL=23 #else -FRAMEMODE=0 + //FRAMEMODE=0 +/* TAPLINE0="AM37L,1,100" */ +/* TAPLINE1="AM38R,1,100" */ +/* TAPLINE2="AM39L,1,100" */ +/* TAPLINE3="AM40R,1,100" */ +/* TAPLINE4="AM41L,1,100" */ +/* TAPLINE5="AM42R,1,100" */ +/* TAPLINE6="AM43L,1,100" */ +/* TAPLINE7="AM44R,1,100" */ +/* TAPLINE8="AM47L,1,100" */ +/* TAPLINE9="AM48R,1,100" */ +/* TAPLINE10="AM49L,1,100" */ +/* TAPLINE11="AM50R,1,100" */ +/* TAPLINE12="AM51L,1,100" */ +/* TAPLINE13="AM52R,1,100" */ +/* TAPLINE14="AM53L,1,100" */ + //TAPLINE15="AM54R,1,100" + //TAPLINES=16 + +FRAMEMODE=2 TAPLINE0="AM37L,1,100" TAPLINE1="AM38R,1,100" TAPLINE2="AM39L,1,100" @@ -95,17 +114,19 @@ TAPLINE4="AM41L,1,100" TAPLINE5="AM42R,1,100" TAPLINE6="AM43L,1,100" TAPLINE7="AM44R,1,100" -TAPLINE8="AM47L,1,100" -TAPLINE9="AM48R,1,100" -TAPLINE10="AM49L,1,100" -TAPLINE11="AM50R,1,100" -TAPLINE12="AM51L,1,100" -TAPLINE13="AM52R,1,100" -TAPLINE14="AM53L,1,100" -TAPLINE15="AM54R,1,100" +TAPLINE8="AM54L,1,100" +TAPLINE9="AM53R,1,100" +TAPLINE8="AM52L,1,100" +TAPLINE9="AM51R,1,100" +TAPLINE10="AM50L,1,100" +TAPLINE11="AM49R,1,100" +TAPLINE12="AM48L,1,100" +TAPLINE13="AM47R,1,100" +TAPLINE14="AM46L,1,100" +TAPLINE15="AM45R,1,100" TAPLINES=16 - + LINECOUNT=_LINENUM PIXELCOUNT=_AMPREADCOLS RAWSEL = _RAW_SELECT From f059f02f71649cb817b84155d29911887dd9813d Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 20 Feb 2026 18:05:52 -0800 Subject: [PATCH 183/194] regenerated ACF --- src/deimos/deimos.acf | 1170 +++++++++++++++++++++-------------------- 1 file changed, 600 insertions(+), 570 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index dd68469..fa62fd9 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -6,18 +6,34 @@ SAMPLEMODE = 1 RAWENABLE = 1 RAWENDLINE = 800 RAWSAMPLES = 20000 -TAPLINES=2 -FRAMEMODE=0 -TAPLINE0="AM45L,1,100" -TAPLINE1="AM46R,1,100" -RAWSEL=48 -LINECOUNT = 4116 -PIXELCOUNT = 1069 -SHP1 = 600 -SHP2 = 900 -SHD1 = 1000 -SHD2 = 1200 -RAWSTARTPIXEL=23 +FRAMEMODE=2 +TAPLINE0="AM37L,1,100" +TAPLINE1="AM38R,1,100" +TAPLINE2="AM39L,1,100" +TAPLINE3="AM40R,1,100" +TAPLINE4="AM41L,1,100" +TAPLINE5="AM42R,1,100" +TAPLINE6="AM43L,1,100" +TAPLINE7="AM44R,1,100" +TAPLINE8="AM54L,1,100" +TAPLINE9="AM53R,1,100" +TAPLINE8="AM52L,1,100" +TAPLINE9="AM51R,1,100" +TAPLINE10="AM50L,1,100" +TAPLINE11="AM49R,1,100" +TAPLINE12="AM48L,1,100" +TAPLINE13="AM47R,1,100" +TAPLINE14="AM46L,1,100" +TAPLINE15="AM45R,1,100" +TAPLINES=16 +LINECOUNT=4125 +PIXELCOUNT=1094 +RAWSEL = 11 + RAWSEL = 11 +SHP1 = 120 +SHP2 = 303 +SHD1 = 448 +SHD2 = 575 TRIGOUTFORCE=0 TRIGOUTINVERT=0 TRIGOUTLEVEL=0 @@ -87,522 +103,525 @@ LINE31="STATE000; CALL OpenShutter" LINE32="STATE000; CALL Wait1ms(FcsExpTimeMSec)" LINE33="STATE000; CALL Wait1s(FcsExpTimeSec)" LINE34="STATE000; CALL CloseShutter" -LINE35="STATE000; CALL SummitModeFCSReadout" -LINE36="STATE000; RETURN SummitModeFCSIntegrate" -LINE37=SummitModeSciReadout: -LINE38="STATE000; summit_sci_is_integrating--" -LINE39="STATE000; SciStop--" -LINE40="STATE000; CALL ReadoutBegin" -LINE41="STATE000; CALL Wait1us(50)" -LINE42="STATE000; CALL DumpPixels(1094)" -LINE43="STATE000; if llel_seq CALL LineReadout(4124)" -LINE44="STATE000; if llel_coincident CALL LineReadoutCoincident(4124)" -LINE45="STATE000; CALL ReadoutEnd" -LINE46="STATE000; RETURN SummitModeSciReadout" -LINE47=SummitModeSciDump: -LINE48="STATE000; CALL EvacuateEStart" -LINE49="STATE000; CALL EvacuateFStart" -LINE50="STATE000; CALL ParallelForwardNoCoincident(4124)" -LINE51="STATE000; CALL Wait1us(50)" -LINE52="STATE000; CALL DumpPixels(1094)" -LINE53="STATE000; RETURN SummitModeSciDump" -LINE54=SummitModeFCSReadout: -LINE55="STATE000; CALL FCSLineReadout(4116)" -LINE56="STATE000; RETURN SummitModeFCSReadout" -LINE57=FCSLineReadout: -LINE58="STATE000; CALL FCSParallelForward" -LINE59="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE60="STATE000; CALL FCSSplitReadout(1069)" -LINE61="STATE000; RETURN FCSLineReadout" -LINE62=StartSeqEngModeFCS: -LINE63="STATE000; if framecount CALL SummitModeFCSIntegrate" -LINE64="STATE000; framecount--" -LINE65="STATE000; if !framecount CALL SummitModeFCSLineFlush(4116)" -LINE66="STATE000; GOTO StartSeqEngModeFCS" -LINE67=StartSeqEngMode: -LINE68="STATE000; if framecount CALL IntegrateAndReadout" -LINE69="STATE000; if !framecount CALL LineReadoutFast(4124)" -LINE70="STATE000; if rg_mod_test_mode CALL TestBrokenReadout" -LINE71="STATE000; GOTO StartSeqEngMode" -LINE72=IntegrateAndReadout: -LINE73="STATE000; CALL Integrate" -LINE74="STATE000; CALL ReadoutKeep" -LINE75="STATE000; RETURN IntegrateAndReadout" -LINE76=TestBrokenReadout: -LINE77="STATE000; CALL OutputTestSetup" -LINE78="STATE000; CALL VRDModulate" -LINE79="STATE000; RETURN TestBrokenReadout" -LINE80=EvacuateE: -LINE81="STATE000; CALL EvacuateEStart" -LINE82="STATE000; CALL Wait1ms" -LINE83="STATE000; CALL EvacuateEFinish" -LINE84="STATE000; RETURN EvacuateE" -LINE85=EvacuateF: -LINE86="STATE000; CALL EvacuateFStart" -LINE87="STATE000; CALL Wait1ms" -LINE88="STATE000; CALL EvacuateFFinish" -LINE89="STATE000; RETURN EvacuateF" -LINE90=Integrate: -LINE91="STATE000; CALL KeepThisFrame" -LINE92="STATE000; CALL ReadPixels(1094)" -LINE93="STATE000; if illum CALL OpenShutter" -LINE94="STATE000; CALL Wait1ms(integrate_illum_ms)" -LINE95="STATE000; CALL Wait1s(integrate_illum_s)" -LINE96="STATE000; if illum CALL CloseShutter" -LINE97="STATE000; CALL Wait1ms(integrate_ms)" -LINE98="STATE000; CALL Wait1s(integrate_s)" -LINE99="STATE000; RETURN Integrate" -LINE100=ReadoutKeep: -LINE101="STATE000; CALL ReadoutBegin" -LINE102="STATE000; if llel_coincident CALL FrameReadout" -LINE103="STATE000; if llel_seq CALL FrameReadout" -LINE104="STATE000; if slow_pix CALL FrameReadout" -LINE105="STATE000; if linbin CALL FrameReadout" -LINE106="STATE000; if dch_llel CALL FrameReadoutTDCllel" -LINE107="STATE000; if dch_ser CALL FrameReadoutTDCser" -LINE108="STATE000; framecount--" -LINE109="STATE000; RETURN ReadoutKeep" -LINE110=FrameReadoutTDCllel: -LINE111="STATE000; CALL Wait1us(50)" -LINE112="STATE000; CALL DumpPixels(1094)" -LINE113="STATE000; CALL FrameReadoutTDCllel_Innerloop(68)" -LINE114="STATE000; CALL LineReadout(44)" -LINE115="STATE000; CALL ReadoutEnd" -LINE116="STATE000; CALL linbindecr(llel_bin)" -LINE117="STATE000; CALL linbinincr" -LINE118="STATE000; RETURN FrameReadoutTDCllel" -LINE119=FrameReadoutTDCllel_Innerloop: -LINE120="STATE000; CALL LineReadoutAOnly(60)" -LINE121="STATE000; CALL ForwardParallelSectionBNoCoincident(llel_bin)" -LINE122="STATE000; CALL linbinincr(1)" -LINE123="STATE000; RETURN FrameReadoutTDCllel_Innerloop" -LINE124=FrameReadoutTDCser: -LINE125="STATE000; CALL Wait1us(50)" -LINE126="STATE000; CALL DumpPixels(1094)" -LINE127="STATE000; CALL LineReadoutTDCser(4124)" -LINE128="STATE000; CALL ReadoutEnd" -LINE129="STATE000; RETURN FrameReadoutTDCser" -LINE130=LineReadoutTDCser: -LINE131="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" -LINE132="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE133="STATE000; CALL TDCser_Innerloop(49)" -LINE134="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(15)" -LINE135="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(15)" -LINE136="STATE000; if !dsch_ser_dump_bcs CALL TDCser_ReadoutLoop" -LINE137="STATE000; if dsch_ser_dump_bcs CALL TDCser_ReadoutLoopDumpBright" -LINE138="STATE000; if !dsch_ser_direction CALL EvacuateF" -LINE139="STATE000; if dsch_ser_direction CALL EvacuateE" -LINE140="STATE000; CALL serbindecr(ser_bin)" -LINE141="STATE000; CALL serbinincr" -LINE142="STATE000; RETURN LineReadoutTDCser" -LINE143=TDCser_ReadoutLoopDumpBright: -LINE144="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(50)" -LINE145="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(50)" -LINE146="STATE000; CALL TDCser_ReadoutLoopDumpBright_Inner(49)" -LINE147="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(15)" -LINE148="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(15)" -LINE149="STATE000; RETURN TDCser_ReadoutLoopDumpBright" -LINE150=TDCser_ReadoutLoop: -LINE151="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(1094)" -LINE152="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(1094)" -LINE153="STATE000; RETURN TDCser_ReadoutLoop" -LINE154=TDCser_ReadoutLoopDumpBright_Inner: -LINE155="STATE000; CALL trigpix" -LINE156="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly" -LINE157="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly" -LINE158="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(20)" -LINE159="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(20)" -LINE160="STATE000; RETURN TDCser_ReadoutLoopDumpBright_Inner" -LINE161=TDCser_Innerloop: -LINE162="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(21)" -LINE163="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(21)" -LINE164="STATE000; if !dsch_ser_direction CALL SerialFBackwards(ser_bin)" -LINE165="STATE000; if dsch_ser_direction CALL SerialEBackwards(ser_bin)" -LINE166="STATE000; CALL serbinincr(1)" -LINE167="STATE000; RETURN TDCser_Innerloop" -LINE168=serbinincr: -LINE169="STATE000; ser_bin++" -LINE170="STATE000; RETURN serbinincr" -LINE171=serbindecr: -LINE172="STATE000; ser_bin--" -LINE173="STATE000; RETURN serbindecr" -LINE174=FrameReadout: -LINE175="STATE000; CALL Wait1us(50)" -LINE176="STATE000; CALL DumpPixels(1094)" -LINE177="STATE000; if tdi_wait_us CALL OpenShutter" -LINE178="STATE000; IF llel_seq CALL LineReadout(4124)" -LINE179="STATE000; IF llel_coincident CALL LineReadoutCoincident(4124)" -LINE180="STATE000; IF slow_pix CALL LineReadoutSlowPix(4124)" -LINE181="STATE000; IF linbin CALL LineReadout(90)" -LINE182="STATE000; IF linbin CALL LineReadoutFast(4034)" -LINE183="STATE000; if tdi_wait_us CALL CloseShutter" -LINE184="STATE000; CALL ReadoutEnd" -LINE185="STATE000; if linbin CALL linbindecr(llel_bin)" -LINE186="STATE000; if linbin CALL linbinincr" -LINE187="STATE000; RETURN FrameReadout" -LINE188=Wait1s: -LINE189="STATE000; if abortintegrate CALL abortintegration" -LINE190="STATE000; CALL Wait1ms(1000)" -LINE191="STATE000; RETURN Wait1s" -LINE192=abortintegration: -LINE193="STATE000; CALL CloseShutter" -LINE194="STATE000; GOTO StartSeqSummitMode" -LINE195=LineReadoutSlowPix: -LINE196="STATE000; CALL ParallelForwardNoCoincident" -LINE197="STATE000; CALL Wait1us(50)" -LINE198="STATE000; CALL ReadPixelsSlow(1094)" -LINE199="STATE000; CALL Wait1us(10)" -LINE200="STATE000; RETURN LineReadoutSlowPix" -LINE201=linbinincrcheck: -LINE202="STATE000; if framecount CALL linbinincr" -LINE203="STATE000; RETURN linbinincrcheck" -LINE204=linbinincr: -LINE205="STATE000; llel_bin++" -LINE206="STATE000; RETURN linbinincr" -LINE207=linbindecr: -LINE208="STATE000; llel_bin--" -LINE209="STATE000; RETURN linbindecr" -LINE210=LineReadoutFast: -LINE211="STATE000; CALL ParallelForwardNoCoincident" -LINE212="STATE000; CALL ReadPixels(1094)" -LINE213="STATE000; RETURN LineReadoutFast" -LINE214=LineReadout: -LINE215="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" -LINE216="STATE000; if linbin CALL linbinincr" -LINE217="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE218="STATE000; if enable_ser_bin CALL ReadPixels(50)" -LINE219="STATE000; if enable_ser_bin CALL SerBinReadPixels(1024)" -LINE220="STATE000; if enable_ser_bin CALL ReadPixels(20)" -LINE221="STATE000; if !enable_ser_bin CALL ReadPixels(1094)" -LINE222="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" -LINE223="STATE000; RETURN LineReadout" -LINE224=SerBinReadPixels: -LINE225="STATE000; CALL PrepSerBin" -LINE226="STATE000; CALL serbindecr" -LINE227="STATE000; CALL SerialBinForwards(ser_bin)" -LINE228="STATE000; CALL ReadPixels" -LINE229="STATE000; CALL serbinincr" -LINE230="STATE000; RETURN SerBinReadPixels" -LINE231=LineReadoutCoincident: -LINE232="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" -LINE233="STATE000; CALL ParallelForwardSegment1" -LINE234="STATE000; CALL TransferToSerialRegisterCoincident" -LINE235="STATE000; CALL ReadPixels(364)" -LINE236="STATE000; CALL ParallelForwardSegment2" -LINE237="STATE000; CALL ReadPixels(364)" -LINE238="STATE000; CALL ParallelForwardSegment3" -LINE239="STATE000; CALL ReadPixels(364) CALL ReadPixels(2)" -LINE240="STATE000; RETURN LineReadoutCoincident" -LINE241=LineReadoutAOnly: -LINE242="STATE000; CALL ForwardParallelSectionANoCoincident" -LINE243="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE244="STATE000; CALL ReadPixels(1094)" -LINE245="STATE000; RETURN LineReadoutAOnly" -LINE246=LineReadoutAOnlyCoincident: -LINE247="STATE000; CALL TransferToSerialRegisterCoincident" -LINE248="STATE000; CALL ReadPixels(50)" -LINE249="STATE000; CALL ParallelForwardSectionASegment1" -LINE250="STATE000; CALL ReadPixels(364)" -LINE251="STATE000; CALL ParallelForwardSectionASegment2" -LINE252="STATE000; CALL ReadPixels(364)" -LINE253="STATE000; CALL ParallelForwardSectionASegment3" -LINE254="STATE000; CALL ReadPixels(364)" -LINE255="STATE000; CALL ReadPixels(2)" -LINE256="STATE000; RETURN LineReadoutAOnlyCoincident" -LINE257=Wait1us: -LINE258="STATE001; STATE000(98)" -LINE259="STATE000; RETURN Wait1us" -LINE260=Wait1ms: -LINE261="STATE001; STATE000(99998)" -LINE262="STATE000; RETURN Wait1ms" -LINE263=KeepThisFrame: -LINE264="STATE002;" -LINE265="STATE003; RETURN KeepThisFrame" -LINE266=InitialSetup: -LINE267="STATE004; STATE000(999)" -LINE268="STATE005; STATE000(9999)" -LINE269="STATE001; RETURN InitialSetup" -LINE270=InitialSetupFCS: -LINE271="STATE006; STATE000(999)" -LINE272="STATE007; STATE000(9999)" -LINE273="STATE001; RETURN InitialSetupFCS" -LINE274=OpenShutter: -LINE275="STATE008; RETURN OpenShutter" -LINE276=CloseShutter: -LINE277="STATE009; RETURN CloseShutter" -LINE278=ReadoutBegin: -LINE279="STATE010; RETURN ReadoutBegin" -LINE280=ReadoutEnd: -LINE281="STATE011; RETURN ReadoutEnd" -LINE282=TransferToSerialRegisterCoincident: -LINE283="STATE012; STATE000(999)" -LINE284="STATE013; STATE000(49)" -LINE285="STATE014; STATE000(49)" -LINE286="STATE015; RETURN TransferToSerialRegisterCoincident" -LINE287=ParallelForwardNoCoincident: -LINE288="STATE001; STATE000(999)" -LINE289="STATE016; STATE000(999)" -LINE290="STATE017; STATE000(999)" -LINE291="STATE018; STATE000(999)" -LINE292="STATE019; STATE000(199)" -LINE293="STATE020; STATE000(49)" -LINE294="STATE021; STATE000(299)" -LINE295="STATE022; STATE000(49)" -LINE296="STATE015; STATE000(399)" -LINE297="STATE023; STATE000(999)" -LINE298="STATE024; STATE000(999)" -LINE299="STATE001; RETURN ParallelForwardNoCoincident" -LINE300=ParallelForwardSegment1: -LINE301="STATE025; RETURN ParallelForwardSegment1" -LINE302=ParallelForwardSegment2: -LINE303="STATE026; RETURN ParallelForwardSegment2" -LINE304=ParallelForwardSegment3: -LINE305="STATE027; RETURN ParallelForwardSegment3" -LINE306=OutputTestSetup: -LINE307="STATE028; STATE000(999999)" -LINE308="STATE001; RETURN OutputTestSetup" -LINE309=PulseTGA: -LINE310="STATE029; STATE000(2499)" -LINE311="STATE030; STATE000(2499)" -LINE312="STATE031; RETURN PulseTGA" -LINE313=VRDModulate: -LINE314="STATE032; STATE000(999999)" -LINE315="STATE033; STATE000(99)" -LINE316="STATE034; STATE000(99)" -LINE317="STATE035; STATE000(99)" -LINE318="STATE036; STATE000(99)" -LINE319="STATE037; STATE000(99)" -LINE320="STATE038; STATE000(999999)" -LINE321="STATE033; STATE000(99)" -LINE322="STATE034; STATE000(99)" -LINE323="STATE039; STATE000(99)" -LINE324="STATE040; STATE000(99)" -LINE325="STATE041; STATE000(99)" -LINE326="STATE042; STATE000(999999)" -LINE327="STATE033; STATE000(99)" -LINE328="STATE034; STATE000(99)" -LINE329="STATE043; STATE000(99)" -LINE330="STATE044; STATE000(99)" -LINE331="STATE045; STATE000(99)" -LINE332="STATE046; STATE000(999999)" -LINE333="STATE033; STATE000(99)" -LINE334="STATE034; STATE000(99)" -LINE335="STATE047; STATE000(99)" -LINE336="STATE048; STATE000(99)" -LINE337="STATE049; STATE000(99)" -LINE338="STATE050; STATE000(999999)" -LINE339="STATE033; STATE000(99)" -LINE340="STATE034; STATE000(99)" -LINE341="STATE051; STATE000(99)" -LINE342="STATE052; STATE000(99)" -LINE343="STATE053; STATE000(99)" -LINE344="STATE054; STATE000(999999)" -LINE345="STATE033; STATE000(99)" -LINE346="STATE034; STATE000(99)" -LINE347="STATE055; STATE000(99)" -LINE348="STATE056; STATE000(99)" -LINE349="STATE057; STATE000(99)" -LINE350="STATE058; STATE000(999999)" -LINE351="STATE033; STATE000(99)" -LINE352="STATE034; STATE000(99)" -LINE353="STATE059; STATE000(99)" -LINE354="STATE060; STATE000(99)" -LINE355="STATE061; STATE000(99)" -LINE356="STATE062; STATE000(999999)" -LINE357="STATE033; STATE000(99)" -LINE358="STATE034; STATE000(99)" -LINE359="STATE063; STATE000(99)" -LINE360="STATE064; STATE000(99)" -LINE361="STATE065; STATE000(99)" -LINE362="STATE066; RETURN VRDModulate" -LINE363=ReadPixels: -LINE364="STATE067;" -LINE365="STATE068; STATE000(58)" -LINE366="STATE069;" -LINE367="STATE031; STATE000(298)" -LINE368="STATE070; STATE000(199)" -LINE369="STATE071; STATE000(59)" -LINE370="STATE001; RETURN ReadPixels" -LINE371=ReadPixelsSlow: -LINE372="STATE072;" -LINE373="STATE068; STATE000(13)" -LINE374="STATE073; STATE000(14)" -LINE375="STATE074; STATE000(4)" -LINE376="STATE075; STATE000(9)" -LINE377="STATE076; STATE000(15)" -LINE378="STATE031; STATE000(118)" -LINE379="STATE077; STATE000(14)" -LINE380="STATE078; STATE000(14)" -LINE381="STATE070; STATE000(116)" -LINE382="STATE001; RETURN ReadPixelsSlow" -LINE383=ForwardParallelSectionANoCoincident: -LINE384="STATE001; STATE000(999)" -LINE385="STATE079; STATE000(999)" -LINE386="STATE080; STATE000(999)" -LINE387="STATE081; STATE000(999)" -LINE388="STATE082; STATE000(199)" -LINE389="STATE083; STATE000(49)" -LINE390="STATE021; STATE000(299)" -LINE391="STATE084; STATE000(49)" -LINE392="STATE015; STATE000(399)" -LINE393="STATE085; STATE000(999)" -LINE394="STATE086; STATE000(999)" -LINE395="STATE001; RETURN ForwardParallelSectionANoCoincident" -LINE396=ForwardParallelSectionBNoCoincident: -LINE397="STATE001; STATE000(999)" -LINE398="STATE087; STATE000(999)" -LINE399="STATE088; STATE000(999)" -LINE400="STATE089; STATE000(999)" -LINE401="STATE090; STATE000(999)" -LINE402="STATE091; STATE000(999)" -LINE403="STATE092; STATE000(999)" -LINE404="STATE001; RETURN ForwardParallelSectionBNoCoincident" -LINE405=ForwardParallelSectionA: -LINE406="STATE093; STATE000(364665)" -LINE407="STATE094; STATE000(364666)" -LINE408="STATE095; RETURN ForwardParallelSectionA" -LINE409=ForwardParallelSectionB: -LINE410="STATE096; STATE000(364665)" -LINE411="STATE097; STATE000(364666)" -LINE412="STATE098; RETURN ForwardParallelSectionB" -LINE413=ForwardParallelAll: -LINE414="STATE026; STATE000(364665)" -LINE415="STATE027; STATE000(364666)" -LINE416="STATE025; RETURN ForwardParallelAll" -LINE417=ParallelForwardSectionASegment1: -LINE418="STATE093; RETURN ParallelForwardSectionASegment1" -LINE419=ParallelForwardSectionASegment2: -LINE420="STATE094; RETURN ParallelForwardSectionASegment2" -LINE421=ParallelForwardSectionASegment3: -LINE422="STATE095; RETURN ParallelForwardSectionASegment3" -LINE423=Wait10us: -LINE424="STATE000; STATE000(999)" -LINE425="STATE001; RETURN Wait10us" -LINE426=ReadPixelsEOnly: -LINE427="STATE099;" -LINE428="STATE068; STATE000(58)" -LINE429="STATE100;" -LINE430="STATE031; STATE000(298)" -LINE431="STATE070; STATE000(199)" -LINE432="STATE101; STATE000(59)" -LINE433="STATE001; RETURN ReadPixelsEOnly" -LINE434=ReadPixelsFOnly: -LINE435="STATE102;" -LINE436="STATE068; STATE000(58)" -LINE437="STATE103;" -LINE438="STATE031; STATE000(298)" -LINE439="STATE070; STATE000(129)" -LINE440="STATE104; STATE000(79)" -LINE441="STATE001; RETURN ReadPixelsFOnly" -LINE442=PrepSerBin: -LINE443="STATE105; STATE000(39)" -LINE444="STATE074; STATE000(19)" -LINE445="STATE031; RETURN PrepSerBin" -LINE446=SerialBinForwards: -LINE447="STATE106; STATE000(39)" -LINE448="STATE107; STATE000(39)" -LINE449="STATE071; STATE000(39)" -LINE450="STATE106; STATE000(39)" -LINE451="STATE001; RETURN SerialBinForwards" -LINE452=DumpPixels: -LINE453="STATE108; STATE000(39)" -LINE454="STATE069; STATE000(19)" -LINE455="STATE031; STATE000(279)" -LINE456="STATE070; STATE000(199)" -LINE457="STATE109; STATE000(59)" -LINE458="STATE001; RETURN DumpPixels" -LINE459=trigpix: -LINE460="STATE110;" -LINE461="STATE111; RETURN trigpix" -LINE462=DumpPixelsEOnly: -LINE463="STATE112; STATE000(39)" -LINE464="STATE100; STATE000(299)" -LINE465="STATE070; STATE000(199)" -LINE466="STATE113; STATE000(59)" -LINE467="STATE001; RETURN DumpPixelsEOnly" -LINE468=DumpPixelsFOnly: -LINE469="STATE114; STATE000(39)" -LINE470="STATE103; STATE000(299)" -LINE471="STATE070; STATE000(129)" -LINE472="STATE115; STATE000(79)" -LINE473="STATE001; RETURN DumpPixelsFOnly" -LINE474=SerialFBackwards: -LINE475="STATE116; STATE000(29)" -LINE476="STATE117; STATE000(29)" -LINE477="STATE118; STATE000(29)" -LINE478="STATE119; STATE000(29)" -LINE479="STATE120; RETURN SerialFBackwards" -LINE480=SerialEBackwards: -LINE481="STATE121; STATE000(29)" -LINE482="STATE122; STATE000(29)" -LINE483="STATE123; STATE000(29)" -LINE484="STATE120; STATE000(29)" -LINE485="STATE119; RETURN SerialEBackwards" -LINE486=EvacuateFFinish: -LINE487="STATE124; STATE000(1999)" -LINE488="STATE125; STATE000(499)" -LINE489="STATE001; RETURN EvacuateFFinish" -LINE490=EvacuateFStart: -LINE491="STATE126; RETURN EvacuateFStart" -LINE492=EvacuateEFinish: -LINE493="STATE124; STATE000(1999)" -LINE494="STATE127; STATE000(499)" -LINE495="STATE001; RETURN EvacuateEFinish" -LINE496=EvacuateEStart: -LINE497="STATE128; RETURN EvacuateEStart" -LINE498=BounceTGTest: -LINE499="STATE129;" -LINE500="STATE111; STATE000(498)" -LINE501="STATE030; STATE000(199)" -LINE502="STATE001; RETURN BounceTGTest" -LINE503=ClampTestInner: -LINE504="STATE129;" -LINE505="STATE111; STATE000(98)" -LINE506="STATE030; STATE000(99)" -LINE507="STATE001; RETURN ClampTestInner" -LINE508=ClampOn: -LINE509="STATE021; RETURN ClampOn" -LINE510=ClampOnFCS: -LINE511="STATE130; RETURN ClampOnFCS" -LINE512=ClampOff: -LINE513="STATE015; RETURN ClampOff" -LINE514=ClampOffFCS: -LINE515="STATE131; RETURN ClampOffFCS" -LINE516=ClampTestLineStart: -LINE517="STATE003; RETURN ClampTestLineStart" -LINE518=TGTestLineStart: -LINE519="STATE132; STATE000(99)" -LINE520="STATE015; RETURN TGTestLineStart" -LINE521=setupTGTest: -LINE522="STATE133; RETURN setupTGTest" -LINE523=FCSParallelForward: -LINE524="STATE134; STATE000(4999)" -LINE525="STATE135; STATE000(4999)" -LINE526="STATE136; STATE000(4999)" -LINE527="STATE137; STATE000(4999)" -LINE528="STATE138; STATE000(4999)" -LINE529="STATE139; STATE000(99)" -LINE530="STATE131; RETURN FCSParallelForward" -LINE531=FCSSplitReadout: -LINE532="STATE110;" -LINE533="STATE140; STATE000(99)" -LINE534="STATE141; STATE000(99)" -LINE535="STATE142; STATE000(99)" -LINE536="STATE143; STATE000(99)" -LINE537="STATE144; STATE000(99)" -LINE538="STATE145; STATE000(99)" -LINE539="STATE146; STATE000(299)" -LINE540="STATE147; STATE000(299)" -LINE541="STATE148; RETURN FCSSplitReadout" -LINE542=DumpPixelsFCS: -LINE543="STATE149; STATE000(99)" -LINE544="STATE150; STATE000(99)" -LINE545="STATE141; STATE000(99)" -LINE546="STATE142; STATE000(99)" -LINE547="STATE144; STATE000(99)" -LINE548="STATE145; STATE000(99)" -LINE549="STATE151; RETURN DumpPixelsFCS" -LINES=550 +LINE35="STATE000; CALL Wait1ms(2)" +LINE36="STATE000; CALL SummitModeFCSReadout" +LINE37="STATE000; RETURN SummitModeFCSIntegrate" +LINE38=SummitModeSciReadout: +LINE39="STATE000; summit_sci_is_integrating--" +LINE40="STATE000; SciStop--" +LINE41="STATE000; CALL ReadoutBegin" +LINE42="STATE000; CALL Wait1us(50)" +LINE43="STATE000; CALL DumpPixels(1094)" +LINE44="STATE000; if llel_seq CALL LineReadout(4124)" +LINE45="STATE000; if llel_coincident CALL LineReadoutCoincident(4124)" +LINE46="STATE000; CALL ReadoutEnd" +LINE47="STATE000; RETURN SummitModeSciReadout" +LINE48=SummitModeSciDump: +LINE49="STATE000; CALL EvacuateEStart" +LINE50="STATE000; CALL EvacuateFStart" +LINE51="STATE000; CALL ParallelForwardNoCoincident(4124)" +LINE52="STATE000; CALL Wait1us(50)" +LINE53="STATE000; CALL DumpPixels(1094)" +LINE54="STATE000; RETURN SummitModeSciDump" +LINE55=SummitModeFCSReadout: +LINE56="STATE000; CALL FCSLineReadout(4116)" +LINE57="STATE000; RETURN SummitModeFCSReadout" +LINE58=FCSLineReadout: +LINE59="STATE000; CALL FCSParallelForward" +LINE60="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE61="STATE000; CALL FCSSplitReadout(1069)" +LINE62="STATE000; RETURN FCSLineReadout" +LINE63=StartSeqEngModeFCS: +LINE64="STATE000; if framecount CALL SummitModeFCSIntegrate" +LINE65="STATE000; framecount--" +LINE66="STATE000; if !framecount CALL SummitModeFCSLineFlush(4116)" +LINE67="STATE000; GOTO StartSeqEngModeFCS" +LINE68=StartSeqEngMode: +LINE69="STATE000; if framecount CALL IntegrateAndReadout" +LINE70="STATE000; if !framecount CALL LineReadoutFast(4124)" +LINE71="STATE000; if rg_mod_test_mode CALL TestBrokenReadout" +LINE72="STATE000; GOTO StartSeqEngMode" +LINE73=IntegrateAndReadout: +LINE74="STATE000; CALL Integrate" +LINE75="STATE000; CALL ReadoutKeep" +LINE76="STATE000; RETURN IntegrateAndReadout" +LINE77=TestBrokenReadout: +LINE78="STATE000; CALL OutputTestSetup" +LINE79="STATE000; CALL VRDModulate" +LINE80="STATE000; RETURN TestBrokenReadout" +LINE81=EvacuateE: +LINE82="STATE000; CALL EvacuateEStart" +LINE83="STATE000; CALL Wait1ms" +LINE84="STATE000; CALL EvacuateEFinish" +LINE85="STATE000; RETURN EvacuateE" +LINE86=EvacuateF: +LINE87="STATE000; CALL EvacuateFStart" +LINE88="STATE000; CALL Wait1ms" +LINE89="STATE000; CALL EvacuateFFinish" +LINE90="STATE000; RETURN EvacuateF" +LINE91=Integrate: +LINE92="STATE000; CALL KeepThisFrame" +LINE93="STATE000; CALL ReadPixels(1094)" +LINE94="STATE000; if illum CALL OpenShutter" +LINE95="STATE000; CALL Wait1ms(integrate_illum_ms)" +LINE96="STATE000; CALL Wait1s(integrate_illum_s)" +LINE97="STATE000; if illum CALL CloseShutter" +LINE98="STATE000; CALL Wait1ms(integrate_ms)" +LINE99="STATE000; CALL Wait1s(integrate_s)" +LINE100="STATE000; RETURN Integrate" +LINE101=ReadoutKeep: +LINE102="STATE000; CALL ReadoutBegin" +LINE103="STATE000; if llel_coincident CALL FrameReadout" +LINE104="STATE000; if llel_seq CALL FrameReadout" +LINE105="STATE000; if slow_pix CALL FrameReadout" +LINE106="STATE000; if linbin CALL FrameReadout" +LINE107="STATE000; if dch_llel CALL FrameReadoutTDCllel" +LINE108="STATE000; if dch_ser CALL FrameReadoutTDCser" +LINE109="STATE000; framecount--" +LINE110="STATE000; RETURN ReadoutKeep" +LINE111=FrameReadoutTDCllel: +LINE112="STATE000; CALL Wait1us(50)" +LINE113="STATE000; CALL DumpPixels(1094)" +LINE114="STATE000; CALL FrameReadoutTDCllel_Innerloop(68)" +LINE115="STATE000; CALL LineReadout(44)" +LINE116="STATE000; CALL ReadoutEnd" +LINE117="STATE000; CALL linbindecr(llel_bin)" +LINE118="STATE000; CALL linbinincr" +LINE119="STATE000; RETURN FrameReadoutTDCllel" +LINE120=FrameReadoutTDCllel_Innerloop: +LINE121="STATE000; CALL LineReadoutAOnly(60)" +LINE122="STATE000; CALL ForwardParallelSectionBNoCoincident(llel_bin)" +LINE123="STATE000; CALL linbinincr(1)" +LINE124="STATE000; RETURN FrameReadoutTDCllel_Innerloop" +LINE125=FrameReadoutTDCser: +LINE126="STATE000; CALL Wait1us(50)" +LINE127="STATE000; CALL DumpPixels(1094)" +LINE128="STATE000; CALL LineReadoutTDCser(4124)" +LINE129="STATE000; CALL ReadoutEnd" +LINE130="STATE000; RETURN FrameReadoutTDCser" +LINE131=LineReadoutTDCser: +LINE132="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE133="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE134="STATE000; CALL TDCser_Innerloop(49)" +LINE135="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(15)" +LINE136="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(15)" +LINE137="STATE000; if !dsch_ser_dump_bcs CALL TDCser_ReadoutLoop" +LINE138="STATE000; if dsch_ser_dump_bcs CALL TDCser_ReadoutLoopDumpBright" +LINE139="STATE000; if !dsch_ser_direction CALL EvacuateF" +LINE140="STATE000; if dsch_ser_direction CALL EvacuateE" +LINE141="STATE000; CALL serbindecr(ser_bin)" +LINE142="STATE000; CALL serbinincr" +LINE143="STATE000; RETURN LineReadoutTDCser" +LINE144=TDCser_ReadoutLoopDumpBright: +LINE145="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(50)" +LINE146="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(50)" +LINE147="STATE000; CALL TDCser_ReadoutLoopDumpBright_Inner(49)" +LINE148="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(15)" +LINE149="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(15)" +LINE150="STATE000; RETURN TDCser_ReadoutLoopDumpBright" +LINE151=TDCser_ReadoutLoop: +LINE152="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(1094)" +LINE153="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(1094)" +LINE154="STATE000; RETURN TDCser_ReadoutLoop" +LINE155=TDCser_ReadoutLoopDumpBright_Inner: +LINE156="STATE000; CALL trigpix" +LINE157="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly" +LINE158="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly" +LINE159="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(20)" +LINE160="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(20)" +LINE161="STATE000; RETURN TDCser_ReadoutLoopDumpBright_Inner" +LINE162=TDCser_Innerloop: +LINE163="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(21)" +LINE164="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(21)" +LINE165="STATE000; if !dsch_ser_direction CALL SerialFBackwards(ser_bin)" +LINE166="STATE000; if dsch_ser_direction CALL SerialEBackwards(ser_bin)" +LINE167="STATE000; CALL serbinincr(1)" +LINE168="STATE000; RETURN TDCser_Innerloop" +LINE169=serbinincr: +LINE170="STATE000; ser_bin++" +LINE171="STATE000; RETURN serbinincr" +LINE172=serbindecr: +LINE173="STATE000; ser_bin--" +LINE174="STATE000; RETURN serbindecr" +LINE175=FrameReadout: +LINE176="STATE000; CALL Wait1us(50)" +LINE177="STATE000; CALL DumpPixels(1094)" +LINE178="STATE000; if tdi_wait_us CALL OpenShutter" +LINE179="STATE000; IF llel_seq CALL LineReadout(4124)" +LINE180="STATE000; IF llel_coincident CALL LineReadoutCoincident(4124)" +LINE181="STATE000; IF slow_pix CALL LineReadoutSlowPix(4124)" +LINE182="STATE000; IF linbin CALL LineReadout(90)" +LINE183="STATE000; IF linbin CALL LineReadoutFast(4034)" +LINE184="STATE000; if tdi_wait_us CALL CloseShutter" +LINE185="STATE000; CALL ReadoutEnd" +LINE186="STATE000; if linbin CALL linbindecr(llel_bin)" +LINE187="STATE000; if linbin CALL linbinincr" +LINE188="STATE000; RETURN FrameReadout" +LINE189=Wait1s: +LINE190="STATE000; if abortintegrate CALL abortintegration" +LINE191="STATE000; CALL Wait1ms(1000)" +LINE192="STATE000; RETURN Wait1s" +LINE193=abortintegration: +LINE194="STATE000; CALL CloseShutter" +LINE195="STATE000; GOTO StartSeqSummitMode" +LINE196=LineReadoutSlowPix: +LINE197="STATE000; CALL ParallelForwardNoCoincident" +LINE198="STATE000; CALL Wait1us(50)" +LINE199="STATE000; CALL ReadPixelsSlow(1094)" +LINE200="STATE000; CALL Wait1us(10)" +LINE201="STATE000; RETURN LineReadoutSlowPix" +LINE202=linbinincrcheck: +LINE203="STATE000; if framecount CALL linbinincr" +LINE204="STATE000; RETURN linbinincrcheck" +LINE205=linbinincr: +LINE206="STATE000; llel_bin++" +LINE207="STATE000; RETURN linbinincr" +LINE208=linbindecr: +LINE209="STATE000; llel_bin--" +LINE210="STATE000; RETURN linbindecr" +LINE211=LineReadoutFast: +LINE212="STATE000; CALL ParallelForwardNoCoincident" +LINE213="STATE000; CALL ReadPixels(1094)" +LINE214="STATE000; RETURN LineReadoutFast" +LINE215=LineReadout: +LINE216="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE217="STATE000; if linbin CALL linbinincr" +LINE218="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE219="STATE000; if enable_ser_bin CALL ReadPixels(50)" +LINE220="STATE000; if enable_ser_bin CALL SerBinReadPixels(1024)" +LINE221="STATE000; if enable_ser_bin CALL ReadPixels(20)" +LINE222="STATE000; if !enable_ser_bin CALL ReadPixels(1094)" +LINE223="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE224="STATE000; RETURN LineReadout" +LINE225=SerBinReadPixels: +LINE226="STATE000; CALL PrepSerBin" +LINE227="STATE000; CALL serbindecr" +LINE228="STATE000; CALL SerialBinForwards(ser_bin)" +LINE229="STATE000; CALL ReadPixels" +LINE230="STATE000; CALL serbinincr" +LINE231="STATE000; RETURN SerBinReadPixels" +LINE232=LineReadoutCoincident: +LINE233="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE234="STATE000; CALL ParallelForwardSegment1" +LINE235="STATE000; CALL TransferToSerialRegisterCoincident" +LINE236="STATE000; CALL ReadPixels(364)" +LINE237="STATE000; CALL ParallelForwardSegment2" +LINE238="STATE000; CALL ReadPixels(364)" +LINE239="STATE000; CALL ParallelForwardSegment3" +LINE240="STATE000; CALL ReadPixels(364) CALL ReadPixels(2)" +LINE241="STATE000; RETURN LineReadoutCoincident" +LINE242=LineReadoutAOnly: +LINE243="STATE000; CALL ForwardParallelSectionANoCoincident" +LINE244="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE245="STATE000; CALL ReadPixels(1094)" +LINE246="STATE000; RETURN LineReadoutAOnly" +LINE247=LineReadoutAOnlyCoincident: +LINE248="STATE000; CALL TransferToSerialRegisterCoincident" +LINE249="STATE000; CALL ReadPixels(50)" +LINE250="STATE000; CALL ParallelForwardSectionASegment1" +LINE251="STATE000; CALL ReadPixels(364)" +LINE252="STATE000; CALL ParallelForwardSectionASegment2" +LINE253="STATE000; CALL ReadPixels(364)" +LINE254="STATE000; CALL ParallelForwardSectionASegment3" +LINE255="STATE000; CALL ReadPixels(364)" +LINE256="STATE000; CALL ReadPixels(2)" +LINE257="STATE000; RETURN LineReadoutAOnlyCoincident" +LINE258=Wait1us: +LINE259="STATE001; STATE000(98)" +LINE260="STATE000; RETURN Wait1us" +LINE261=Wait1ms: +LINE262="STATE001; STATE000(99998)" +LINE263="STATE000; RETURN Wait1ms" +LINE264=KeepThisFrame: +LINE265="STATE002;" +LINE266="STATE003; RETURN KeepThisFrame" +LINE267=InitialSetup: +LINE268="STATE004; STATE000(999)" +LINE269="STATE005; STATE000(9999)" +LINE270="STATE001; RETURN InitialSetup" +LINE271=InitialSetupFCS: +LINE272="STATE006; STATE000(999)" +LINE273="STATE007; STATE000(9999)" +LINE274="STATE001; RETURN InitialSetupFCS" +LINE275=OpenShutter: +LINE276="STATE008; RETURN OpenShutter" +LINE277=CloseShutter: +LINE278="STATE009; RETURN CloseShutter" +LINE279=ReadoutBegin: +LINE280="STATE010; RETURN ReadoutBegin" +LINE281=ReadoutEnd: +LINE282="STATE011; RETURN ReadoutEnd" +LINE283=TransferToSerialRegisterCoincident: +LINE284="STATE012; STATE000(999)" +LINE285="STATE013; STATE000(49)" +LINE286="STATE014; STATE000(49)" +LINE287="STATE015; RETURN TransferToSerialRegisterCoincident" +LINE288=ParallelForwardNoCoincident: +LINE289="STATE001; STATE000(999)" +LINE290="STATE016; STATE000(999)" +LINE291="STATE017; STATE000(999)" +LINE292="STATE018; STATE000(999)" +LINE293="STATE019; STATE000(199)" +LINE294="STATE020; STATE000(49)" +LINE295="STATE021; STATE000(299)" +LINE296="STATE022; STATE000(49)" +LINE297="STATE015; STATE000(399)" +LINE298="STATE023; STATE000(999)" +LINE299="STATE024; STATE000(999)" +LINE300="STATE001; RETURN ParallelForwardNoCoincident" +LINE301=ParallelForwardSegment1: +LINE302="STATE025; RETURN ParallelForwardSegment1" +LINE303=ParallelForwardSegment2: +LINE304="STATE026; RETURN ParallelForwardSegment2" +LINE305=ParallelForwardSegment3: +LINE306="STATE027; RETURN ParallelForwardSegment3" +LINE307=OutputTestSetup: +LINE308="STATE028; STATE000(999999)" +LINE309="STATE001; RETURN OutputTestSetup" +LINE310=PulseTGA: +LINE311="STATE029; STATE000(2499)" +LINE312="STATE030; STATE000(2499)" +LINE313="STATE031; RETURN PulseTGA" +LINE314=VRDModulate: +LINE315="STATE032; STATE000(999999)" +LINE316="STATE033; STATE000(99)" +LINE317="STATE034; STATE000(99)" +LINE318="STATE035; STATE000(99)" +LINE319="STATE036; STATE000(99)" +LINE320="STATE037; STATE000(99)" +LINE321="STATE038; STATE000(999999)" +LINE322="STATE033; STATE000(99)" +LINE323="STATE034; STATE000(99)" +LINE324="STATE039; STATE000(99)" +LINE325="STATE040; STATE000(99)" +LINE326="STATE041; STATE000(99)" +LINE327="STATE042; STATE000(999999)" +LINE328="STATE033; STATE000(99)" +LINE329="STATE034; STATE000(99)" +LINE330="STATE043; STATE000(99)" +LINE331="STATE044; STATE000(99)" +LINE332="STATE045; STATE000(99)" +LINE333="STATE046; STATE000(999999)" +LINE334="STATE033; STATE000(99)" +LINE335="STATE034; STATE000(99)" +LINE336="STATE047; STATE000(99)" +LINE337="STATE048; STATE000(99)" +LINE338="STATE049; STATE000(99)" +LINE339="STATE050; STATE000(999999)" +LINE340="STATE033; STATE000(99)" +LINE341="STATE034; STATE000(99)" +LINE342="STATE051; STATE000(99)" +LINE343="STATE052; STATE000(99)" +LINE344="STATE053; STATE000(99)" +LINE345="STATE054; STATE000(999999)" +LINE346="STATE033; STATE000(99)" +LINE347="STATE034; STATE000(99)" +LINE348="STATE055; STATE000(99)" +LINE349="STATE056; STATE000(99)" +LINE350="STATE057; STATE000(99)" +LINE351="STATE058; STATE000(999999)" +LINE352="STATE033; STATE000(99)" +LINE353="STATE034; STATE000(99)" +LINE354="STATE059; STATE000(99)" +LINE355="STATE060; STATE000(99)" +LINE356="STATE061; STATE000(99)" +LINE357="STATE062; STATE000(999999)" +LINE358="STATE033; STATE000(99)" +LINE359="STATE034; STATE000(99)" +LINE360="STATE063; STATE000(99)" +LINE361="STATE064; STATE000(99)" +LINE362="STATE065; STATE000(99)" +LINE363="STATE066; RETURN VRDModulate" +LINE364=ReadPixels: +LINE365="STATE067;" +LINE366="STATE068; STATE000(58)" +LINE367="STATE069;" +LINE368="STATE031; STATE000(298)" +LINE369="STATE070; STATE000(199)" +LINE370="STATE071; STATE000(59)" +LINE371="STATE001; RETURN ReadPixels" +LINE372=ReadPixelsSlow: +LINE373="STATE072;" +LINE374="STATE068; STATE000(13)" +LINE375="STATE073; STATE000(14)" +LINE376="STATE074; STATE000(4)" +LINE377="STATE075; STATE000(9)" +LINE378="STATE076; STATE000(15)" +LINE379="STATE031; STATE000(118)" +LINE380="STATE077; STATE000(14)" +LINE381="STATE078; STATE000(14)" +LINE382="STATE070; STATE000(116)" +LINE383="STATE001; RETURN ReadPixelsSlow" +LINE384=ForwardParallelSectionANoCoincident: +LINE385="STATE001; STATE000(999)" +LINE386="STATE079; STATE000(999)" +LINE387="STATE080; STATE000(999)" +LINE388="STATE081; STATE000(999)" +LINE389="STATE082; STATE000(199)" +LINE390="STATE083; STATE000(49)" +LINE391="STATE021; STATE000(299)" +LINE392="STATE084; STATE000(49)" +LINE393="STATE015; STATE000(399)" +LINE394="STATE085; STATE000(999)" +LINE395="STATE086; STATE000(999)" +LINE396="STATE001; RETURN ForwardParallelSectionANoCoincident" +LINE397=ForwardParallelSectionBNoCoincident: +LINE398="STATE001; STATE000(999)" +LINE399="STATE087; STATE000(999)" +LINE400="STATE088; STATE000(999)" +LINE401="STATE089; STATE000(999)" +LINE402="STATE090; STATE000(999)" +LINE403="STATE091; STATE000(999)" +LINE404="STATE092; STATE000(999)" +LINE405="STATE001; RETURN ForwardParallelSectionBNoCoincident" +LINE406=ForwardParallelSectionA: +LINE407="STATE093; STATE000(364665)" +LINE408="STATE094; STATE000(364666)" +LINE409="STATE095; RETURN ForwardParallelSectionA" +LINE410=ForwardParallelSectionB: +LINE411="STATE096; STATE000(364665)" +LINE412="STATE097; STATE000(364666)" +LINE413="STATE098; RETURN ForwardParallelSectionB" +LINE414=ForwardParallelAll: +LINE415="STATE026; STATE000(364665)" +LINE416="STATE027; STATE000(364666)" +LINE417="STATE025; RETURN ForwardParallelAll" +LINE418=ParallelForwardSectionASegment1: +LINE419="STATE093; RETURN ParallelForwardSectionASegment1" +LINE420=ParallelForwardSectionASegment2: +LINE421="STATE094; RETURN ParallelForwardSectionASegment2" +LINE422=ParallelForwardSectionASegment3: +LINE423="STATE095; RETURN ParallelForwardSectionASegment3" +LINE424=Wait10us: +LINE425="STATE000; STATE000(999)" +LINE426="STATE001; RETURN Wait10us" +LINE427=ReadPixelsEOnly: +LINE428="STATE099;" +LINE429="STATE068; STATE000(58)" +LINE430="STATE100;" +LINE431="STATE031; STATE000(298)" +LINE432="STATE070; STATE000(199)" +LINE433="STATE101; STATE000(59)" +LINE434="STATE001; RETURN ReadPixelsEOnly" +LINE435=ReadPixelsFOnly: +LINE436="STATE102;" +LINE437="STATE068; STATE000(58)" +LINE438="STATE103;" +LINE439="STATE031; STATE000(298)" +LINE440="STATE070; STATE000(129)" +LINE441="STATE104; STATE000(79)" +LINE442="STATE001; RETURN ReadPixelsFOnly" +LINE443=PrepSerBin: +LINE444="STATE105; STATE000(39)" +LINE445="STATE074; STATE000(19)" +LINE446="STATE031; RETURN PrepSerBin" +LINE447=SerialBinForwards: +LINE448="STATE106; STATE000(39)" +LINE449="STATE107; STATE000(39)" +LINE450="STATE071; STATE000(39)" +LINE451="STATE106; STATE000(39)" +LINE452="STATE001; RETURN SerialBinForwards" +LINE453=DumpPixels: +LINE454="STATE108; STATE000(39)" +LINE455="STATE069; STATE000(19)" +LINE456="STATE031; STATE000(279)" +LINE457="STATE070; STATE000(199)" +LINE458="STATE109; STATE000(59)" +LINE459="STATE001; RETURN DumpPixels" +LINE460=trigpix: +LINE461="STATE110;" +LINE462="STATE111; RETURN trigpix" +LINE463=DumpPixelsEOnly: +LINE464="STATE112; STATE000(39)" +LINE465="STATE100; STATE000(299)" +LINE466="STATE070; STATE000(199)" +LINE467="STATE113; STATE000(59)" +LINE468="STATE001; RETURN DumpPixelsEOnly" +LINE469=DumpPixelsFOnly: +LINE470="STATE114; STATE000(39)" +LINE471="STATE103; STATE000(299)" +LINE472="STATE070; STATE000(129)" +LINE473="STATE115; STATE000(79)" +LINE474="STATE001; RETURN DumpPixelsFOnly" +LINE475=SerialFBackwards: +LINE476="STATE116; STATE000(29)" +LINE477="STATE117; STATE000(29)" +LINE478="STATE118; STATE000(29)" +LINE479="STATE119; STATE000(29)" +LINE480="STATE120; RETURN SerialFBackwards" +LINE481=SerialEBackwards: +LINE482="STATE121; STATE000(29)" +LINE483="STATE122; STATE000(29)" +LINE484="STATE123; STATE000(29)" +LINE485="STATE120; STATE000(29)" +LINE486="STATE119; RETURN SerialEBackwards" +LINE487=EvacuateFFinish: +LINE488="STATE124; STATE000(1999)" +LINE489="STATE125; STATE000(499)" +LINE490="STATE001; RETURN EvacuateFFinish" +LINE491=EvacuateFStart: +LINE492="STATE126; RETURN EvacuateFStart" +LINE493=EvacuateEFinish: +LINE494="STATE124; STATE000(1999)" +LINE495="STATE127; STATE000(499)" +LINE496="STATE001; RETURN EvacuateEFinish" +LINE497=EvacuateEStart: +LINE498="STATE128; RETURN EvacuateEStart" +LINE499=BounceTGTest: +LINE500="STATE129;" +LINE501="STATE111; STATE000(498)" +LINE502="STATE030; STATE000(199)" +LINE503="STATE001; RETURN BounceTGTest" +LINE504=ClampTestInner: +LINE505="STATE129;" +LINE506="STATE111; STATE000(98)" +LINE507="STATE030; STATE000(99)" +LINE508="STATE001; RETURN ClampTestInner" +LINE509=ClampOn: +LINE510="STATE021; RETURN ClampOn" +LINE511=ClampOnFCS: +LINE512="STATE130; RETURN ClampOnFCS" +LINE513=ClampOff: +LINE514="STATE015; RETURN ClampOff" +LINE515=ClampOffFCS: +LINE516="STATE131; RETURN ClampOffFCS" +LINE517=ClampTestLineStart: +LINE518="STATE003; RETURN ClampTestLineStart" +LINE519=TGTestLineStart: +LINE520="STATE132; STATE000(99)" +LINE521="STATE015; RETURN TGTestLineStart" +LINE522=setupTGTest: +LINE523="STATE133; RETURN setupTGTest" +LINE524=FCSParallelForward: +LINE525="STATE134; STATE000(19999)" +LINE526="STATE135; STATE000(19999)" +LINE527="STATE136; STATE000(19999)" +LINE528="STATE137; STATE000(19999)" +LINE529="STATE138; STATE000(19999)" +LINE530="STATE139; STATE000(999)" +LINE531="STATE130; STATE000(999)" +LINE532="STATE131; STATE000(199)" +LINE533="STATE001; RETURN FCSParallelForward" +LINE534=FCSSplitReadout: +LINE535="STATE110;" +LINE536="STATE140; STATE000(39)" +LINE537="STATE141; STATE000(39)" +LINE538="STATE142; STATE000(39)" +LINE539="STATE143; STATE000(39)" +LINE540="STATE144; STATE000(39)" +LINE541="STATE145; STATE000(39)" +LINE542="STATE146; STATE000(299)" +LINE543="STATE147; STATE000(299)" +LINE544="STATE001; RETURN FCSSplitReadout" +LINE545=DumpPixelsFCS: +LINE546="STATE148; STATE000(39)" +LINE547="STATE149; STATE000(39)" +LINE548="STATE141; STATE000(39)" +LINE549="STATE142; STATE000(39)" +LINE550="STATE144; STATE000(39)" +LINE551="STATE145; STATE000(39)" +LINE552="STATE150; RETURN DumpPixelsFCS" +LINES=553 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=6.6666 MOD1\SLOWSLEWRATE1=0.0303 @@ -724,19 +743,19 @@ MOD3\FASTSLEWRATE6=50.0000 MOD3\SLOWSLEWRATE6=3.0030 MOD3\LABEL6=Serial F1 MOD3\ENABLE7=1 -MOD3\FASTSLEWRATE7=4.0000 +MOD3\FASTSLEWRATE7=4.3333 MOD3\SLOWSLEWRATE7=0.0303 MOD3\LABEL7=FCS PPhase3U MOD3\ENABLE8=1 -MOD3\FASTSLEWRATE8=4.0000 +MOD3\FASTSLEWRATE8=4.3333 MOD3\SLOWSLEWRATE8=0.0303 MOD3\LABEL8=FCS PPhase3L MOD3\ENABLE9=1 -MOD3\FASTSLEWRATE9=4.0000 +MOD3\FASTSLEWRATE9=4.3333 MOD3\SLOWSLEWRATE9=0.0303 MOD3\LABEL9=FCS PPhase2 MOD3\ENABLE10=1 -MOD3\FASTSLEWRATE10=4.0000 +MOD3\FASTSLEWRATE10=4.3333 MOD3\SLOWSLEWRATE10=0.0303 MOD3\LABEL10=FCS PPhase1 MOD3\ENABLE11=1 @@ -771,10 +790,10 @@ MOD9\HVLC_LABEL8=FCS1 Reset Drain A MOD9\HVLC_V9=14.00 MOD9\HVLC_ORDER9=2 MOD9\HVLC_LABEL9=FCS1 Reset Drain B -MOD9\HVLC_V10=14.00 +MOD9\HVLC_V10=14.50 MOD9\HVLC_ORDER10=2 MOD9\HVLC_LABEL10=FCS2 Reset Drain A -MOD9\HVLC_V11=14.00 +MOD9\HVLC_V11=14.50 MOD9\HVLC_ORDER11=2 MOD9\HVLC_LABEL11=FCS2 Reset Drain B MOD9\HVLC_V12=14.90 @@ -865,10 +884,10 @@ MOD10\LVLC_LABEL10=LastGateA FCS 1 MOD10\LVLC_V11=-4.0 MOD10\LVLC_ORDER11=4 MOD10\LVLC_LABEL11=LastGateB FCS 1 -MOD10\LVLC_V12=-4.0 +MOD10\LVLC_V12=-1.0 MOD10\LVLC_ORDER12=4 MOD10\LVLC_LABEL12=LastGateA FCS 2 -MOD10\LVLC_V13=-4.0 +MOD10\LVLC_V13=-1.0 MOD10\LVLC_ORDER13=4 MOD10\LVLC_LABEL13=LastGateB FCS 2 MOD10\LVLC_V14=3.0 @@ -889,7 +908,7 @@ MOD10\LVLC_V20=0.0 MOD10\LVLC_ORDER20=0 MOD10\LVLC_V21=0.0 MOD10\LVLC_ORDER21=0 -MOD10\LVLC_V22=0.0 +MOD10\LVLC_V22=0.2 MOD10\LVLC_ORDER22=6 MOD10\LVLC_LABEL22=Video offset FCS MOD10\LVLC_V23=0.5 @@ -1057,7 +1076,7 @@ STATE5\MOD9="0,1,0" STATE5\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE6\NAME=STATE006 STATE6\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE6\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,4,1,0,-4,1,0,,1,1,,1,1,,1,1" +STATE6\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,-2,1,0,,1,1,,1,1,,1,1" STATE6\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE6\MOD12="1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE6\MOD4="0,1,0,0,1,0" @@ -1066,8 +1085,8 @@ STATE6\MOD9="0,1,0" STATE6\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE7\NAME=STATE007 STATE7\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE7\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,-5,1,0,5,1,0,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1" -STATE7\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,-10,1,0,-10,1,0,,1,1,,1,1" +STATE7\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,-5,1,0,8,1,0,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1" +STATE7\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-5,1,0,-5,1,0,-6,1,0,-6,1,0,,1,1,,1,1" STATE7\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE7\MOD4="0,1,0,0,1,0" STATE7\CONTROL="0,3F" @@ -1255,7 +1274,7 @@ STATE27\MOD9="0,1,0" STATE27\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE28\NAME=STATE028 STATE28\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE28\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,12,1,0,4,1,0,,1,1,,1,1,,1,1" +STATE28\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,12,1,0,6,1,0,,1,1,,1,1,,1,1" STATE28\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE28\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE28\MOD4="0,1,0,0,1,0" @@ -1309,7 +1328,7 @@ STATE33\MOD9="0,1,0" STATE33\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE34\NAME=STATE034 STATE34\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE34\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,4,1,0,,1,1,,1,1,,1,1,,1,1" +STATE34\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1,,1,1" STATE34\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE34\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE34\MOD4="0,1,0,0,1,0" @@ -2209,9 +2228,9 @@ STATE133\MOD9="0,1,0" STATE133\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE134\NAME=STATE134 STATE134\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE134\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE134\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1" -STATE134\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE134\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,12,1,0,-2,1,0,,1,1,,1,1,,1,1" +STATE134\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1" +STATE134\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE134\MOD4="0,1,0,0,1,0" STATE134\CONTROL="4,3B" STATE134\MOD9="0,1,0" @@ -2219,7 +2238,7 @@ STATE134\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE135\NAME=STATE135 STATE135\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE135\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE135\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5.8,1,0,5.8,1,0,,1,1,,1,1,,1,1,,1,1" +STATE135\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,7.5,1,0,7.5,1,0,,1,1,,1,1,,1,1,,1,1" STATE135\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE135\MOD4="0,1,0,0,1,0" STATE135\CONTROL="0,3F" @@ -2228,7 +2247,7 @@ STATE135\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE136\NAME=STATE136 STATE136\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE136\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE136\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-10,1,0,,1,1,,1,1,,1,1" +STATE136\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1" STATE136\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE136\MOD4="0,1,0,0,1,0" STATE136\CONTROL="0,3F" @@ -2237,7 +2256,7 @@ STATE136\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE137\NAME=STATE137 STATE137\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE137\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE137\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1" +STATE137\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,7,1,0,,1,1,,1,1" STATE137\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE137\MOD4="0,1,0,0,1,0" STATE137\CONTROL="0,3F" @@ -2246,7 +2265,7 @@ STATE137\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE138\NAME=STATE138 STATE138\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE138\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE138\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-8,1,0,-8,1,0,,1,1,,1,1,,1,1,,1,1" +STATE138\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,,1,1" STATE138\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE138\MOD4="0,1,0,0,1,0" STATE138\CONTROL="0,3F" @@ -2254,8 +2273,8 @@ STATE138\MOD9="0,1,0" STATE138\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE139\NAME=STATE139 STATE139\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE139\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE139\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1" +STATE139\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1,,1,1" +STATE139\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,7,1,0,,1,1,,1,1,,1,1" STATE139\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE139\MOD4="0,1,0,0,1,0" STATE139\CONTROL="0,3F" @@ -2263,7 +2282,7 @@ STATE139\MOD9="0,1,0" STATE139\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE140\NAME=STATE140 STATE140\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE140\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,12,1,0,,1,1,,1,1,,1,1,,1,1" +STATE140\MOD2=",1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,12,1,0,,1,1,8,1,0,,1,1,,1,1" STATE140\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE140\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE140\MOD4="0,1,0,0,1,0" @@ -2281,7 +2300,7 @@ STATE141\MOD9="0,1,0" STATE141\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE142\NAME=STATE142 STATE142\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE142\MOD2=",1,1,,1,1,5,1,0,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE142\MOD2=",1,1,,1,1,8,1,0,8,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE142\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE142\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE142\MOD4="0,1,0,0,1,0" @@ -2290,7 +2309,7 @@ STATE142\MOD9="0,1,0" STATE142\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE143\NAME=STATE143 STATE143\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE143\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,4,1,0,4,1,0,,1,1,,1,1,,1,1" +STATE143\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,6,1,0,,1,1,,1,1,,1,1" STATE143\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE143\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE143\MOD4="0,1,0,0,1,0" @@ -2308,7 +2327,7 @@ STATE144\MOD9="0,1,0" STATE144\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE145\NAME=STATE145 STATE145\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE145\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE145\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE145\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE145\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE145\MOD4="0,1,0,0,1,0" @@ -2326,7 +2345,7 @@ STATE146\MOD9="0,1,0" STATE146\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE147\NAME=STATE147 STATE147\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE147\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-4,1,0,,1,1,,1,1,,1,1" +STATE147\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-2,1,0,,1,1,,1,1,,1,1" STATE147\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE147\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE147\MOD4="0,1,0,0,1,0" @@ -2335,16 +2354,16 @@ STATE147\MOD9="0,1,0" STATE147\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE148\NAME=STATE148 STATE148\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE148\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1" +STATE148\MOD2=",1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,12,1,0,,1,1,8,1,0,,1,1,,1,1" STATE148\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE148\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE148\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE148\MOD4="0,1,0,0,1,0" STATE148\CONTROL="0,3F" STATE148\MOD9="0,1,0" STATE148\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE149\NAME=STATE149 STATE149\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE149\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,12,1,0,,1,1,5,1,0,,1,1,,1,1" +STATE149\MOD2=",1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,,1,1,6,1,0,8,1,0,,1,1,,1,1" STATE149\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE149\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE149\MOD4="0,1,0,0,1,0" @@ -2353,23 +2372,14 @@ STATE149\MOD9="0,1,0" STATE149\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE150\NAME=STATE150 STATE150\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE150\MOD2=",1,1,,1,1,,1,1,,1,1,5,1,0,,1,1,,1,1,,1,1,4,1,0,5,1,0,,1,1,,1,1" +STATE150\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,2,1,0,-2,1,0,,1,1,,1,1,,1,1" STATE150\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE150\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE150\MOD4="0,1,0,0,1,0" STATE150\CONTROL="0,3F" STATE150\MOD9="0,1,0" STATE150\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" -STATE151\NAME=STATE151 -STATE151\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE151\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,4,1,0,-4,1,0,,1,1,,1,1,,1,1" -STATE151\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE151\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" -STATE151\MOD4="0,1,0,0,1,0" -STATE151\CONTROL="0,3F" -STATE151\MOD9="0,1,0" -STATE151\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" -STATES=152 +STATES=151 [SYSTEM] BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 @@ -2403,3 +2413,23 @@ MOD12_ID=0000000000000000 MOD12_REV=0 MOD12_VERSION=0.0.0 MOD12_TYPE=10 +[MODE_DEFAULT] +ACF:FRAMEMODE=0 +ACF:LINECOUNT=4125 +ACF:PIXELCOUNT=1094 +ACF:TAPLINE0="AM37L,1,100" +ACF:TAPLINE1="AM38R,1,100" +ACF:TAPLINES=16 +ARCH:HORI_AMPS=2 +ARCH:NUM_DETECT=8 +ARCH:VERT_AMPS=1 +[MODE_FCS] +ACF:FRAMEMODE=0 +ACF:LINECOUNT=4116 +ACF:PIXELCOUNT=1069 +ACF:TAPLINE0="AM45L,1,100" +ACF:TAPLINE1="AM46R,1,100" +ACF:TAPLINES=2 +ARCH:HORI_AMPS=1 +ARCH:NUM_DETECT=2 +ARCH:VERT_AMPS=1 From 136bb451e652dc573daff7313ec7cf4ee497ae8e Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Fri, 20 Feb 2026 18:09:12 -0800 Subject: [PATCH 184/194] correct current limit for full science focal plance OD lines --- src/deimos/deimos.mod | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 395d7e0..fbb8e9c 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -112,10 +112,10 @@ SLOT 9 hvxbias { HVLC 22 [17.00,2] "SCI2 F Reset Drain"; HVLC 23 [0.0,0]; HVLC 24 [0.0,0]; //TODO: needs re-assignment! - HVHC 1 [29.0,10.0,3,1] "SCI E Output Drain"; - HVHC 2 [29.0,10.0,3,1] "SCI F Output Drain"; - HVHC 3 [29.0,10.0,3,1] "SCI2 E Output Drain"; - HVHC 4 [29.0,10.0,3,1] "SCI2 F Output Drain"; + HVHC 1 [29.0,25.0,3,1] "SCI E Output Drain"; + HVHC 2 [29.0,25.0,3,1] "SCI F Output Drain"; + HVHC 3 [29.0,25.0,3,1] "SCI2 E Output Drain"; + HVHC 4 [29.0,25.0,3,1] "SCI2 F Output Drain"; HVHC 5 [0.0,0.0,0,0]; HVHC 6 [0.0,0.0,0,0]; } From 5708efd9f4567577c0ac22ecc84560c3ec0013c5 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 23 Feb 2026 15:30:09 -0800 Subject: [PATCH 185/194] update power on sequence --- src/deimos/deimos.acf | 26 +++++++++++++------------- src/deimos/deimos.mod | 18 +++++++++--------- 2 files changed, 22 insertions(+), 22 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index fa62fd9..d2f54b9 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -777,10 +777,10 @@ MOD9\HVLC_LABEL3=SCI2 Guard drain MOD9\HVLC_V4=0.00 MOD9\HVLC_ORDER4=0 MOD9\HVLC_V5=17.5 -MOD9\HVLC_ORDER5=2 +MOD9\HVLC_ORDER5=1 MOD9\HVLC_LABEL5=SCI1 E Reset Drain MOD9\HVLC_V6=17.5 -MOD9\HVLC_ORDER6=2 +MOD9\HVLC_ORDER6=1 MOD9\HVLC_LABEL6=SCI1 F Reset Drain MOD9\HVLC_V7=0.00 MOD9\HVLC_ORDER7=0 @@ -797,19 +797,19 @@ MOD9\HVLC_V11=14.50 MOD9\HVLC_ORDER11=2 MOD9\HVLC_LABEL11=FCS2 Reset Drain B MOD9\HVLC_V12=14.90 -MOD9\HVLC_ORDER12=1 +MOD9\HVLC_ORDER12=2 MOD9\HVLC_LABEL12=FCS Overflow Drain MOD9\HVLC_V13=24.3 -MOD9\HVLC_ORDER13=1 +MOD9\HVLC_ORDER13=2 MOD9\HVLC_LABEL13=FCS1 Output Drain A MOD9\HVLC_V14=24.3 -MOD9\HVLC_ORDER14=1 +MOD9\HVLC_ORDER14=2 MOD9\HVLC_LABEL14=FCS1 Output Drain B MOD9\HVLC_V15=24.3 -MOD9\HVLC_ORDER15=1 +MOD9\HVLC_ORDER15=2 MOD9\HVLC_LABEL15=FCS2 Output Drain A MOD9\HVLC_V16=24.3 -MOD9\HVLC_ORDER16=1 +MOD9\HVLC_ORDER16=2 MOD9\HVLC_LABEL16=FCS2 Output Drain B MOD9\HVLC_V17=0.00 MOD9\HVLC_ORDER17=0 @@ -820,10 +820,10 @@ MOD9\HVLC_ORDER19=0 MOD9\HVLC_V20=0.00 MOD9\HVLC_ORDER20=0 MOD9\HVLC_V21=17.00 -MOD9\HVLC_ORDER21=2 +MOD9\HVLC_ORDER21=1 MOD9\HVLC_LABEL21=SCI2 E Reset Drain MOD9\HVLC_V22=17.00 -MOD9\HVLC_ORDER22=2 +MOD9\HVLC_ORDER22=1 MOD9\HVLC_LABEL22=SCI2 F Reset Drain MOD9\HVLC_V23=0.0 MOD9\HVLC_ORDER23=0 @@ -831,22 +831,22 @@ MOD9\HVLC_V24=0.0 MOD9\HVLC_ORDER24=0 MOD9\HVHC_ENABLE1=1 MOD9\HVHC_V1=29.0 -MOD9\HVHC_IL1=10.0 +MOD9\HVHC_IL1=25.0 MOD9\HVHC_ORDER1=3 MOD9\HVHC_LABEL1=SCI E Output Drain MOD9\HVHC_ENABLE2=1 MOD9\HVHC_V2=29.0 -MOD9\HVHC_IL2=10.0 +MOD9\HVHC_IL2=25.0 MOD9\HVHC_ORDER2=3 MOD9\HVHC_LABEL2=SCI F Output Drain MOD9\HVHC_ENABLE3=1 MOD9\HVHC_V3=29.0 -MOD9\HVHC_IL3=10.0 +MOD9\HVHC_IL3=25.0 MOD9\HVHC_ORDER3=3 MOD9\HVHC_LABEL3=SCI2 E Output Drain MOD9\HVHC_ENABLE4=1 MOD9\HVHC_V4=29.0 -MOD9\HVHC_IL4=10.0 +MOD9\HVHC_IL4=25.0 MOD9\HVHC_ORDER4=3 MOD9\HVHC_LABEL4=SCI2 F Output Drain MOD9\HVHC_ENABLE5=0 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index fbb8e9c..65a0ec2 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -90,8 +90,8 @@ SLOT 9 hvxbias { HVLC 2 [24.0,1] "SCI1 Guard Drain"; HVLC 3 [24.0,1] "SCI2 Guard drain"; HVLC 4 [0.00,0]; - HVLC 5 [17.5,2] "SCI1 E Reset Drain"; - HVLC 6 [17.5,2] "SCI1 F Reset Drain"; + HVLC 5 [17.5,1] "SCI1 E Reset Drain"; + HVLC 6 [17.5,1] "SCI1 F Reset Drain"; HVLC 7 [0.00,0]; HVLC 8 [14.00,2] "FCS1 Reset Drain A"; HVLC 9 [14.00,2] "FCS1 Reset Drain B"; @@ -99,17 +99,17 @@ SLOT 9 hvxbias { //to avoid smearing HVLC 10 [14.50,2] "FCS2 Reset Drain A"; HVLC 11 [14.50,2] "FCS2 Reset Drain B"; - HVLC 12 [14.90,1] "FCS Overflow Drain"; - HVLC 13 [24.3,1] "FCS1 Output Drain A"; - HVLC 14 [24.3,1] "FCS1 Output Drain B"; - HVLC 15 [24.3,1] "FCS2 Output Drain A"; - HVLC 16 [24.3,1] "FCS2 Output Drain B"; + HVLC 12 [14.90,2] "FCS Overflow Drain"; + HVLC 13 [24.3,2] "FCS1 Output Drain A"; + HVLC 14 [24.3,2] "FCS1 Output Drain B"; + HVLC 15 [24.3,2] "FCS2 Output Drain A"; + HVLC 16 [24.3,2] "FCS2 Output Drain B"; HVLC 17 [0.00,0]; HVLC 18 [0.00,0]; HVLC 19 [0.00,0]; HVLC 20 [0.00,0]; - HVLC 21 [17.00,2] "SCI2 E Reset Drain"; - HVLC 22 [17.00,2] "SCI2 F Reset Drain"; + HVLC 21 [17.00,1] "SCI2 E Reset Drain"; + HVLC 22 [17.00,1] "SCI2 F Reset Drain"; HVLC 23 [0.0,0]; HVLC 24 [0.0,0]; //TODO: needs re-assignment! HVHC 1 [29.0,25.0,3,1] "SCI E Output Drain"; From 815c9dc3461b1e98bfc194857937bf6d1d6917b1 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 23 Feb 2026 15:34:54 -0800 Subject: [PATCH 186/194] power up outputs at same time as resets --- src/deimos/deimos.acf | 8 ++++---- src/deimos/deimos.mod | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index d2f54b9..af5ff63 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -832,22 +832,22 @@ MOD9\HVLC_ORDER24=0 MOD9\HVHC_ENABLE1=1 MOD9\HVHC_V1=29.0 MOD9\HVHC_IL1=25.0 -MOD9\HVHC_ORDER1=3 +MOD9\HVHC_ORDER1=1 MOD9\HVHC_LABEL1=SCI E Output Drain MOD9\HVHC_ENABLE2=1 MOD9\HVHC_V2=29.0 MOD9\HVHC_IL2=25.0 -MOD9\HVHC_ORDER2=3 +MOD9\HVHC_ORDER2=1 MOD9\HVHC_LABEL2=SCI F Output Drain MOD9\HVHC_ENABLE3=1 MOD9\HVHC_V3=29.0 MOD9\HVHC_IL3=25.0 -MOD9\HVHC_ORDER3=3 +MOD9\HVHC_ORDER3=1 MOD9\HVHC_LABEL3=SCI2 E Output Drain MOD9\HVHC_ENABLE4=1 MOD9\HVHC_V4=29.0 MOD9\HVHC_IL4=25.0 -MOD9\HVHC_ORDER4=3 +MOD9\HVHC_ORDER4=1 MOD9\HVHC_LABEL4=SCI2 F Output Drain MOD9\HVHC_ENABLE5=0 MOD9\HVHC_V5=0.0 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index 65a0ec2..bc1a340 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -112,10 +112,10 @@ SLOT 9 hvxbias { HVLC 22 [17.00,1] "SCI2 F Reset Drain"; HVLC 23 [0.0,0]; HVLC 24 [0.0,0]; //TODO: needs re-assignment! - HVHC 1 [29.0,25.0,3,1] "SCI E Output Drain"; - HVHC 2 [29.0,25.0,3,1] "SCI F Output Drain"; - HVHC 3 [29.0,25.0,3,1] "SCI2 E Output Drain"; - HVHC 4 [29.0,25.0,3,1] "SCI2 F Output Drain"; + HVHC 1 [29.0,25.0,1,1] "SCI E Output Drain"; + HVHC 2 [29.0,25.0,1,1] "SCI F Output Drain"; + HVHC 3 [29.0,25.0,1,1] "SCI2 E Output Drain"; + HVHC 4 [29.0,25.0,1,1] "SCI2 F Output Drain"; HVHC 5 [0.0,0.0,0,0]; HVHC 6 [0.0,0.0,0,0]; } From a911c35a9b9f4fdf813587f94f06f0912fa85d11 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 23 Feb 2026 15:37:03 -0800 Subject: [PATCH 187/194] little bit more current headroom on OD pins --- src/deimos/deimos.acf | 8 ++++---- src/deimos/deimos.mod | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index af5ff63..c7101bf 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -831,22 +831,22 @@ MOD9\HVLC_V24=0.0 MOD9\HVLC_ORDER24=0 MOD9\HVHC_ENABLE1=1 MOD9\HVHC_V1=29.0 -MOD9\HVHC_IL1=25.0 +MOD9\HVHC_IL1=27.0 MOD9\HVHC_ORDER1=1 MOD9\HVHC_LABEL1=SCI E Output Drain MOD9\HVHC_ENABLE2=1 MOD9\HVHC_V2=29.0 -MOD9\HVHC_IL2=25.0 +MOD9\HVHC_IL2=27.0 MOD9\HVHC_ORDER2=1 MOD9\HVHC_LABEL2=SCI F Output Drain MOD9\HVHC_ENABLE3=1 MOD9\HVHC_V3=29.0 -MOD9\HVHC_IL3=25.0 +MOD9\HVHC_IL3=27.0 MOD9\HVHC_ORDER3=1 MOD9\HVHC_LABEL3=SCI2 E Output Drain MOD9\HVHC_ENABLE4=1 MOD9\HVHC_V4=29.0 -MOD9\HVHC_IL4=25.0 +MOD9\HVHC_IL4=27.0 MOD9\HVHC_ORDER4=1 MOD9\HVHC_LABEL4=SCI2 F Output Drain MOD9\HVHC_ENABLE5=0 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index bc1a340..c0bc3df 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -112,10 +112,10 @@ SLOT 9 hvxbias { HVLC 22 [17.00,1] "SCI2 F Reset Drain"; HVLC 23 [0.0,0]; HVLC 24 [0.0,0]; //TODO: needs re-assignment! - HVHC 1 [29.0,25.0,1,1] "SCI E Output Drain"; - HVHC 2 [29.0,25.0,1,1] "SCI F Output Drain"; - HVHC 3 [29.0,25.0,1,1] "SCI2 E Output Drain"; - HVHC 4 [29.0,25.0,1,1] "SCI2 F Output Drain"; + HVHC 1 [29.0,27.0,1,1] "SCI E Output Drain"; + HVHC 2 [29.0,27.0,1,1] "SCI F Output Drain"; + HVHC 3 [29.0,27.0,1,1] "SCI2 E Output Drain"; + HVHC 4 [29.0,27.0,1,1] "SCI2 F Output Drain"; HVHC 5 [0.0,0.0,0,0]; HVHC 6 [0.0,0.0,0,0]; } From 1314d2340b1d20a4c0de814f9d8137a761cf9c33 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Tue, 24 Feb 2026 09:57:21 -0800 Subject: [PATCH 188/194] re-order tap lines correctly, start on constant defs, slow down seq parallels a little bit --- src/deimos/deimos.acf | 42 ++++++++++++++++++++++++-------------- src/deimos/deimos.cds | 14 ++++++------- src/deimos/deimos.seq | 22 +++++++++++++++++++- src/deimos/deimos.waveform | 14 ++++++------- 4 files changed, 61 insertions(+), 31 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index c7101bf..182e61c 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -17,14 +17,12 @@ TAPLINE6="AM43L,1,100" TAPLINE7="AM44R,1,100" TAPLINE8="AM54L,1,100" TAPLINE9="AM53R,1,100" -TAPLINE8="AM52L,1,100" -TAPLINE9="AM51R,1,100" -TAPLINE10="AM50L,1,100" -TAPLINE11="AM49R,1,100" -TAPLINE12="AM48L,1,100" -TAPLINE13="AM47R,1,100" -TAPLINE14="AM46L,1,100" -TAPLINE15="AM45R,1,100" +TAPLINE10="AM52L,1,100" +TAPLINE11="AM51R,1,100" +TAPLINE12="AM50L,1,100" +TAPLINE13="AM49R,1,100" +TAPLINE14="AM48L,1,100" +TAPLINE15="AM47R,1,100" TAPLINES=16 LINECOUNT=4125 PIXELCOUNT=1094 @@ -68,6 +66,20 @@ PARAMETER26="enable_ser_bin=0" PARAMETER27="dsch_ser_direction=0" PARAMETER28="dsch_ser_dump_bcs=0" PARAMETERS=29 +CONSTANT0="sci_llel_high=10.000000" +CONSTANT1="sci_llel_low=0.000000" +CONSTANT2="sci_ser_high=11.000000" +CONSTANT3="sci_ser_low=1.000000" +CONSTANT4="sci_ser_rcv=11.500000" +CONSTANT5="sci_tg_high=10.500000" +CONSTANT6="sci_tg_low=0.000000" +CONSTANT7="fcs_llel_high=7.000000" +CONSTANT8="fcs_mpp_high=7.500000" +CONSTANT9="fcs_ser_high=8.000000" +CONSTANT10="fcs_rg_low=2.000000" +CONSTANT11="fcs_rg_high=12.000000" +CONSTANT12="fcs_sw_high=6.000000" +CONSTANTS=13 LINE0=StartSeqSummitMode: LINE1="STATE000; CALL InitialSetup" LINE2="STATE000; CALL InitialSetupFCS" @@ -357,17 +369,17 @@ LINE285="STATE013; STATE000(49)" LINE286="STATE014; STATE000(49)" LINE287="STATE015; RETURN TransferToSerialRegisterCoincident" LINE288=ParallelForwardNoCoincident: -LINE289="STATE001; STATE000(999)" -LINE290="STATE016; STATE000(999)" -LINE291="STATE017; STATE000(999)" -LINE292="STATE018; STATE000(999)" +LINE289="STATE001; STATE000(1199)" +LINE290="STATE016; STATE000(1199)" +LINE291="STATE017; STATE000(1199)" +LINE292="STATE018; STATE000(1199)" LINE293="STATE019; STATE000(199)" LINE294="STATE020; STATE000(49)" LINE295="STATE021; STATE000(299)" LINE296="STATE022; STATE000(49)" -LINE297="STATE015; STATE000(399)" -LINE298="STATE023; STATE000(999)" -LINE299="STATE024; STATE000(999)" +LINE297="STATE015; STATE000(599)" +LINE298="STATE023; STATE000(1199)" +LINE299="STATE024; STATE000(1199)" LINE300="STATE001; RETURN ParallelForwardNoCoincident" LINE301=ParallelForwardSegment1: LINE302="STATE025; RETURN ParallelForwardSegment1" diff --git a/src/deimos/deimos.cds b/src/deimos/deimos.cds index 592619b..5167474 100644 --- a/src/deimos/deimos.cds +++ b/src/deimos/deimos.cds @@ -116,14 +116,12 @@ TAPLINE6="AM43L,1,100" TAPLINE7="AM44R,1,100" TAPLINE8="AM54L,1,100" TAPLINE9="AM53R,1,100" -TAPLINE8="AM52L,1,100" -TAPLINE9="AM51R,1,100" -TAPLINE10="AM50L,1,100" -TAPLINE11="AM49R,1,100" -TAPLINE12="AM48L,1,100" -TAPLINE13="AM47R,1,100" -TAPLINE14="AM46L,1,100" -TAPLINE15="AM45R,1,100" +TAPLINE10="AM52L,1,100" +TAPLINE11="AM51R,1,100" +TAPLINE12="AM50L,1,100" +TAPLINE13="AM49R,1,100" +TAPLINE14="AM48L,1,100" +TAPLINE15="AM47R,1,100" TAPLINES=16 diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 5ecc3b4..92dded9 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -75,7 +75,6 @@ param enable_ser_bin = 0 //backwards from F. direction 1 means read //out towards F, dump backwards from E param dsch_ser_direction = 0 - //serial CTI should we dump the bright columns? param dsch_ser_dump_bcs = 0 @@ -85,8 +84,29 @@ param enable_ser_bin = 0 //const llel_tri_slew = P_TRI_SLEW_RATE + //defined voltage constants + //science clocks + const sci_llel_high = _PAR_CLOCK_HIGH + const sci_llel_low = _PAR_CLOCK_LOW + const sci_ser_high = _SER_CLOCK_HIGH + const sci_ser_low = _SER_CLOCK_LOW + const sci_ser_rcv = _SER_CLOCK_RCV + const sci_tg_high = _TG_CLOCK_HIGH + const sci_tg_low = _TG_CLOCK_LOW + + //fcs clocks + const fcs_llel_high = _PAR_CLOCK_HIGH_FCS + // const fcs_llel_low = _PAR_CLOCK_LOW_FCS + //const fcs_mpp_low = _MPP_CLOCK_LOW_FCS + const fcs_mpp_high = _MPP_CLOCK_HIGH_FCS + //const fcs_ser_low = _SER_CLOCK_LOW_FCS + const fcs_ser_high = _SER_CLOCK_HIGH_FCS + const fcs_rg_low = _RG_LOW_FCS + const fcs_rg_high = _RG_HIGH_FCS + // const fcs_sw_low = _SW_LOW_FCS + const fcs_sw_high = _SW_HIGH_FCS //TODO: wide gate integration mode diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 40e344f..9d804cf 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -199,7 +199,7 @@ WAVEFORM TransferToSerialRegisterCoincident WAVEFORM ParallelForwardNoCoincident { 0: SET NOP TO HIGH; - .+1000:=PHASE3_HIGH + .+1200:=PHASE3_HIGH SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; SET TG TO _TG_CLOCK_HIGH, FAST; @@ -208,16 +208,16 @@ WAVEFORM ParallelForwardNoCoincident SET SW_CLOCKS TO _SW_LOW, FAST; SET LINE TO HIGH; - .+1000: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; - .+1000: SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; - .+1000:=TG_GOES_LOW SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; + .+1200: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; + .+1200: SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; + .+1200:=TG_GOES_LOW SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; SET TG TO _TG_CLOCK_LOW, FAST; - .+1000: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; - .+1000: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; + .+1200: SET SCI_PCLK2 TO _PAR_CLOCK_HIGH, FAST; + .+1200: SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; //delay before starting SCLKs - .+1000: SET NOP TO HIGH; + .+1200: SET NOP TO HIGH; //serial receive side From ab64ded2128d2be73cd7a16520dbc00526f3618e Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 26 Feb 2026 16:29:33 -0800 Subject: [PATCH 189/194] add mising frame strobe --- src/deimos/deimos.acf | 2 +- src/deimos/deimos.waveform | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index 182e61c..7f4d3db 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -1128,7 +1128,7 @@ STATE10\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE10\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE10\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE10\MOD4="0,1,0,0,1,0" -STATE10\CONTROL="4,3B" +STATE10\CONTROL="6,39" STATE10\MOD9="0,1,0" STATE10\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE11\NAME=STATE011 diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 9d804cf..4384d0e 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -158,6 +158,7 @@ WAVEFORM CloseShutter WAVEFORM ReadoutBegin { 0:SET LINE TO HIGH; + SET FRAME TO HIGH; SET SCI_PCLK1 TO _PAR_CLOCK_LOW, FAST; } From 8b048f8e5100e182a184d2f4674511d1c84bb20c Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 26 Feb 2026 16:50:23 -0800 Subject: [PATCH 190/194] add extra line flush at start of summit mode science readout --- src/deimos/deimos.acf | 2 +- src/deimos/deimos.seq | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index 7f4d3db..5c74fe1 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -123,7 +123,7 @@ LINE39="STATE000; summit_sci_is_integrating--" LINE40="STATE000; SciStop--" LINE41="STATE000; CALL ReadoutBegin" LINE42="STATE000; CALL Wait1us(50)" -LINE43="STATE000; CALL DumpPixels(1094)" +LINE43="STATE000; CALL ReadPixels(1094)" LINE44="STATE000; if llel_seq CALL LineReadout(4124)" LINE45="STATE000; if llel_coincident CALL LineReadoutCoincident(4124)" LINE46="STATE000; CALL ReadoutEnd" diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index 92dded9..a5dfd1f 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -279,9 +279,10 @@ SEQUENCE SummitModeSciReadout { //IF SciStop SciStop--; SciStop--; ReadoutBegin(); + Wait1us(50); - DumpPixels(_AMPREADCOLS); + ReadPixels(_AMPREADCOLS); //make this a fast/ dump readout if need to speed up if llel_seq LineReadout(TOTAL_ROWS); if llel_coincident LineReadoutCoincident(TOTAL_ROWS); From b56e67443af23f64e88abaa087967d2c0eb3f84b Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Thu, 26 Feb 2026 17:05:48 -0800 Subject: [PATCH 191/194] add MODE_SCI with 4124 readout (dumping rather than readout DC clamp restore) --- src/deimos/deimos.acf | 14 ++++++++++++-- src/deimos/deimos.modes | 10 +++++++++- src/deimos/deimos.seq | 2 +- 3 files changed, 22 insertions(+), 4 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index 5c74fe1..67770f7 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -123,7 +123,7 @@ LINE39="STATE000; summit_sci_is_integrating--" LINE40="STATE000; SciStop--" LINE41="STATE000; CALL ReadoutBegin" LINE42="STATE000; CALL Wait1us(50)" -LINE43="STATE000; CALL ReadPixels(1094)" +LINE43="STATE000; CALL DumpPixels(1094)" LINE44="STATE000; if llel_seq CALL LineReadout(4124)" LINE45="STATE000; if llel_coincident CALL LineReadoutCoincident(4124)" LINE46="STATE000; CALL ReadoutEnd" @@ -2426,7 +2426,7 @@ MOD12_REV=0 MOD12_VERSION=0.0.0 MOD12_TYPE=10 [MODE_DEFAULT] -ACF:FRAMEMODE=0 +ACF:FRAMEMODE=2 ACF:LINECOUNT=4125 ACF:PIXELCOUNT=1094 ACF:TAPLINE0="AM37L,1,100" @@ -2445,3 +2445,13 @@ ACF:TAPLINES=2 ARCH:HORI_AMPS=1 ARCH:NUM_DETECT=2 ARCH:VERT_AMPS=1 +[MODE_SCI] +ACF:FRAMEMODE=2 +ACF:LINECOUNT=4124 +ACF:PIXELCOUNT=1094 +ACF:TAPLINE0="AM37L,1,100" +ACF:TAPLINE1="AM38R,1,100" +ACF:TAPLINES=16 +ARCH:HORI_AMPS=2 +ARCH:NUM_DETECT=8 +ARCH:VERT_AMPS=1 diff --git a/src/deimos/deimos.modes b/src/deimos/deimos.modes index 35aad49..05bb6b0 100644 --- a/src/deimos/deimos.modes +++ b/src/deimos/deimos.modes @@ -2,7 +2,7 @@ ARCH:NUM_DETECT=8 ARCH:HORI_AMPS=2 ARCH:VERT_AMPS=1 -ACF:FRAMEMODE=0 +ACF:FRAMEMODE=2 ACF:PIXELCOUNT=1094 ACF:LINECOUNT=4125 @@ -16,3 +16,11 @@ ACF:TAPLINE1="AM46R,1,100" ACF:LINECOUNT=4116 ACF:PIXELCOUNT=1069 ACF:FRAMEMODE=0 + +[MODE_SCI] +ARCH:NUM_DETECT=8 +ARCH:HORI_AMPS=2 +ARCH:VERT_AMPS=1 +ACF:LINECOUNT=4124 +ACF:PIXELCOUNT=1094 +ACF:FRAMEMODE=0 \ No newline at end of file diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index a5dfd1f..e00260b 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -282,7 +282,7 @@ SEQUENCE SummitModeSciReadout { Wait1us(50); - ReadPixels(_AMPREADCOLS); //make this a fast/ dump readout if need to speed up + DumpPixels(_AMPREADCOLS); //make this a fast/ dump readout if need to speed up if llel_seq LineReadout(TOTAL_ROWS); if llel_coincident LineReadoutCoincident(TOTAL_ROWS); From 3dd6f02a2367493448d3984a490920ca56f08aea Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 23 Mar 2026 17:08:11 -0700 Subject: [PATCH 192/194] fix eng mode extra frame bug --- src/deimos/deimos.acf | 1369 ++++++++++++++++++------------------ src/deimos/deimos.def | 2 +- src/deimos/deimos.seq | 4 +- src/deimos/deimos.waveform | 22 +- 4 files changed, 708 insertions(+), 689 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index 67770f7..7925d07 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -24,7 +24,7 @@ TAPLINE13="AM49R,1,100" TAPLINE14="AM48L,1,100" TAPLINE15="AM47R,1,100" TAPLINES=16 -LINECOUNT=4125 +LINECOUNT=4124 PIXELCOUNT=1094 RAWSEL = 11 RAWSEL = 11 @@ -78,8 +78,9 @@ CONSTANT8="fcs_mpp_high=7.500000" CONSTANT9="fcs_ser_high=8.000000" CONSTANT10="fcs_rg_low=2.000000" CONSTANT11="fcs_rg_high=12.000000" -CONSTANT12="fcs_sw_high=6.000000" -CONSTANTS=13 +CONSTANT12="fcs_sw_low=-2.000000" +CONSTANT13="fcs_sw_high=6.000000" +CONSTANTS=14 LINE0=StartSeqSummitMode: LINE1="STATE000; CALL InitialSetup" LINE2="STATE000; CALL InitialSetupFCS" @@ -172,468 +173,469 @@ LINE88="STATE000; CALL Wait1ms" LINE89="STATE000; CALL EvacuateFFinish" LINE90="STATE000; RETURN EvacuateF" LINE91=Integrate: -LINE92="STATE000; CALL KeepThisFrame" -LINE93="STATE000; CALL ReadPixels(1094)" -LINE94="STATE000; if illum CALL OpenShutter" -LINE95="STATE000; CALL Wait1ms(integrate_illum_ms)" -LINE96="STATE000; CALL Wait1s(integrate_illum_s)" -LINE97="STATE000; if illum CALL CloseShutter" -LINE98="STATE000; CALL Wait1ms(integrate_ms)" -LINE99="STATE000; CALL Wait1s(integrate_s)" -LINE100="STATE000; RETURN Integrate" -LINE101=ReadoutKeep: -LINE102="STATE000; CALL ReadoutBegin" -LINE103="STATE000; if llel_coincident CALL FrameReadout" -LINE104="STATE000; if llel_seq CALL FrameReadout" -LINE105="STATE000; if slow_pix CALL FrameReadout" -LINE106="STATE000; if linbin CALL FrameReadout" -LINE107="STATE000; if dch_llel CALL FrameReadoutTDCllel" -LINE108="STATE000; if dch_ser CALL FrameReadoutTDCser" -LINE109="STATE000; framecount--" -LINE110="STATE000; RETURN ReadoutKeep" -LINE111=FrameReadoutTDCllel: -LINE112="STATE000; CALL Wait1us(50)" -LINE113="STATE000; CALL DumpPixels(1094)" -LINE114="STATE000; CALL FrameReadoutTDCllel_Innerloop(68)" -LINE115="STATE000; CALL LineReadout(44)" -LINE116="STATE000; CALL ReadoutEnd" -LINE117="STATE000; CALL linbindecr(llel_bin)" -LINE118="STATE000; CALL linbinincr" -LINE119="STATE000; RETURN FrameReadoutTDCllel" -LINE120=FrameReadoutTDCllel_Innerloop: -LINE121="STATE000; CALL LineReadoutAOnly(60)" -LINE122="STATE000; CALL ForwardParallelSectionBNoCoincident(llel_bin)" -LINE123="STATE000; CALL linbinincr(1)" -LINE124="STATE000; RETURN FrameReadoutTDCllel_Innerloop" -LINE125=FrameReadoutTDCser: -LINE126="STATE000; CALL Wait1us(50)" -LINE127="STATE000; CALL DumpPixels(1094)" -LINE128="STATE000; CALL LineReadoutTDCser(4124)" -LINE129="STATE000; CALL ReadoutEnd" -LINE130="STATE000; RETURN FrameReadoutTDCser" -LINE131=LineReadoutTDCser: -LINE132="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" -LINE133="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE134="STATE000; CALL TDCser_Innerloop(49)" -LINE135="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(15)" -LINE136="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(15)" -LINE137="STATE000; if !dsch_ser_dump_bcs CALL TDCser_ReadoutLoop" -LINE138="STATE000; if dsch_ser_dump_bcs CALL TDCser_ReadoutLoopDumpBright" -LINE139="STATE000; if !dsch_ser_direction CALL EvacuateF" -LINE140="STATE000; if dsch_ser_direction CALL EvacuateE" -LINE141="STATE000; CALL serbindecr(ser_bin)" -LINE142="STATE000; CALL serbinincr" -LINE143="STATE000; RETURN LineReadoutTDCser" -LINE144=TDCser_ReadoutLoopDumpBright: -LINE145="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(50)" -LINE146="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(50)" -LINE147="STATE000; CALL TDCser_ReadoutLoopDumpBright_Inner(49)" -LINE148="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(15)" -LINE149="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(15)" -LINE150="STATE000; RETURN TDCser_ReadoutLoopDumpBright" -LINE151=TDCser_ReadoutLoop: -LINE152="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(1094)" -LINE153="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(1094)" -LINE154="STATE000; RETURN TDCser_ReadoutLoop" -LINE155=TDCser_ReadoutLoopDumpBright_Inner: -LINE156="STATE000; CALL trigpix" -LINE157="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly" -LINE158="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly" -LINE159="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(20)" -LINE160="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(20)" -LINE161="STATE000; RETURN TDCser_ReadoutLoopDumpBright_Inner" -LINE162=TDCser_Innerloop: -LINE163="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(21)" -LINE164="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(21)" -LINE165="STATE000; if !dsch_ser_direction CALL SerialFBackwards(ser_bin)" -LINE166="STATE000; if dsch_ser_direction CALL SerialEBackwards(ser_bin)" -LINE167="STATE000; CALL serbinincr(1)" -LINE168="STATE000; RETURN TDCser_Innerloop" -LINE169=serbinincr: -LINE170="STATE000; ser_bin++" -LINE171="STATE000; RETURN serbinincr" -LINE172=serbindecr: -LINE173="STATE000; ser_bin--" -LINE174="STATE000; RETURN serbindecr" -LINE175=FrameReadout: -LINE176="STATE000; CALL Wait1us(50)" -LINE177="STATE000; CALL DumpPixels(1094)" -LINE178="STATE000; if tdi_wait_us CALL OpenShutter" -LINE179="STATE000; IF llel_seq CALL LineReadout(4124)" -LINE180="STATE000; IF llel_coincident CALL LineReadoutCoincident(4124)" -LINE181="STATE000; IF slow_pix CALL LineReadoutSlowPix(4124)" -LINE182="STATE000; IF linbin CALL LineReadout(90)" -LINE183="STATE000; IF linbin CALL LineReadoutFast(4034)" -LINE184="STATE000; if tdi_wait_us CALL CloseShutter" -LINE185="STATE000; CALL ReadoutEnd" -LINE186="STATE000; if linbin CALL linbindecr(llel_bin)" -LINE187="STATE000; if linbin CALL linbinincr" -LINE188="STATE000; RETURN FrameReadout" -LINE189=Wait1s: -LINE190="STATE000; if abortintegrate CALL abortintegration" -LINE191="STATE000; CALL Wait1ms(1000)" -LINE192="STATE000; RETURN Wait1s" -LINE193=abortintegration: -LINE194="STATE000; CALL CloseShutter" -LINE195="STATE000; GOTO StartSeqSummitMode" -LINE196=LineReadoutSlowPix: -LINE197="STATE000; CALL ParallelForwardNoCoincident" -LINE198="STATE000; CALL Wait1us(50)" -LINE199="STATE000; CALL ReadPixelsSlow(1094)" -LINE200="STATE000; CALL Wait1us(10)" -LINE201="STATE000; RETURN LineReadoutSlowPix" -LINE202=linbinincrcheck: -LINE203="STATE000; if framecount CALL linbinincr" -LINE204="STATE000; RETURN linbinincrcheck" -LINE205=linbinincr: -LINE206="STATE000; llel_bin++" -LINE207="STATE000; RETURN linbinincr" -LINE208=linbindecr: -LINE209="STATE000; llel_bin--" -LINE210="STATE000; RETURN linbindecr" -LINE211=LineReadoutFast: -LINE212="STATE000; CALL ParallelForwardNoCoincident" -LINE213="STATE000; CALL ReadPixels(1094)" -LINE214="STATE000; RETURN LineReadoutFast" -LINE215=LineReadout: -LINE216="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" -LINE217="STATE000; if linbin CALL linbinincr" -LINE218="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE219="STATE000; if enable_ser_bin CALL ReadPixels(50)" -LINE220="STATE000; if enable_ser_bin CALL SerBinReadPixels(1024)" -LINE221="STATE000; if enable_ser_bin CALL ReadPixels(20)" -LINE222="STATE000; if !enable_ser_bin CALL ReadPixels(1094)" -LINE223="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" -LINE224="STATE000; RETURN LineReadout" -LINE225=SerBinReadPixels: -LINE226="STATE000; CALL PrepSerBin" -LINE227="STATE000; CALL serbindecr" -LINE228="STATE000; CALL SerialBinForwards(ser_bin)" -LINE229="STATE000; CALL ReadPixels" -LINE230="STATE000; CALL serbinincr" -LINE231="STATE000; RETURN SerBinReadPixels" -LINE232=LineReadoutCoincident: -LINE233="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" -LINE234="STATE000; CALL ParallelForwardSegment1" -LINE235="STATE000; CALL TransferToSerialRegisterCoincident" -LINE236="STATE000; CALL ReadPixels(364)" -LINE237="STATE000; CALL ParallelForwardSegment2" -LINE238="STATE000; CALL ReadPixels(364)" -LINE239="STATE000; CALL ParallelForwardSegment3" -LINE240="STATE000; CALL ReadPixels(364) CALL ReadPixels(2)" -LINE241="STATE000; RETURN LineReadoutCoincident" -LINE242=LineReadoutAOnly: -LINE243="STATE000; CALL ForwardParallelSectionANoCoincident" -LINE244="STATE000; CALL Wait1us(line_clamp_delay_us)" -LINE245="STATE000; CALL ReadPixels(1094)" -LINE246="STATE000; RETURN LineReadoutAOnly" -LINE247=LineReadoutAOnlyCoincident: -LINE248="STATE000; CALL TransferToSerialRegisterCoincident" -LINE249="STATE000; CALL ReadPixels(50)" -LINE250="STATE000; CALL ParallelForwardSectionASegment1" -LINE251="STATE000; CALL ReadPixels(364)" -LINE252="STATE000; CALL ParallelForwardSectionASegment2" -LINE253="STATE000; CALL ReadPixels(364)" -LINE254="STATE000; CALL ParallelForwardSectionASegment3" -LINE255="STATE000; CALL ReadPixels(364)" -LINE256="STATE000; CALL ReadPixels(2)" -LINE257="STATE000; RETURN LineReadoutAOnlyCoincident" -LINE258=Wait1us: -LINE259="STATE001; STATE000(98)" -LINE260="STATE000; RETURN Wait1us" -LINE261=Wait1ms: -LINE262="STATE001; STATE000(99998)" -LINE263="STATE000; RETURN Wait1ms" -LINE264=KeepThisFrame: -LINE265="STATE002;" -LINE266="STATE003; RETURN KeepThisFrame" -LINE267=InitialSetup: -LINE268="STATE004; STATE000(999)" -LINE269="STATE005; STATE000(9999)" -LINE270="STATE001; RETURN InitialSetup" -LINE271=InitialSetupFCS: -LINE272="STATE006; STATE000(999)" -LINE273="STATE007; STATE000(9999)" -LINE274="STATE001; RETURN InitialSetupFCS" -LINE275=OpenShutter: -LINE276="STATE008; RETURN OpenShutter" -LINE277=CloseShutter: -LINE278="STATE009; RETURN CloseShutter" -LINE279=ReadoutBegin: -LINE280="STATE010; RETURN ReadoutBegin" -LINE281=ReadoutEnd: -LINE282="STATE011; RETURN ReadoutEnd" -LINE283=TransferToSerialRegisterCoincident: -LINE284="STATE012; STATE000(999)" -LINE285="STATE013; STATE000(49)" -LINE286="STATE014; STATE000(49)" -LINE287="STATE015; RETURN TransferToSerialRegisterCoincident" -LINE288=ParallelForwardNoCoincident: -LINE289="STATE001; STATE000(1199)" -LINE290="STATE016; STATE000(1199)" +LINE92="STATE000; CALL ReadPixels(1094)" +LINE93="STATE000; if illum CALL OpenShutter" +LINE94="STATE000; CALL Wait1ms(integrate_illum_ms)" +LINE95="STATE000; CALL Wait1s(integrate_illum_s)" +LINE96="STATE000; if illum CALL CloseShutter" +LINE97="STATE000; CALL Wait1ms(integrate_ms)" +LINE98="STATE000; CALL Wait1s(integrate_s)" +LINE99="STATE000; RETURN Integrate" +LINE100=ReadoutKeep: +LINE101="STATE000; CALL ReadoutBegin" +LINE102="STATE000; if llel_coincident CALL FrameReadout" +LINE103="STATE000; if llel_seq CALL FrameReadout" +LINE104="STATE000; if slow_pix CALL FrameReadout" +LINE105="STATE000; if linbin CALL FrameReadout" +LINE106="STATE000; if dch_llel CALL FrameReadoutTDCllel" +LINE107="STATE000; if dch_ser CALL FrameReadoutTDCser" +LINE108="STATE000; framecount--" +LINE109="STATE000; RETURN ReadoutKeep" +LINE110=FrameReadoutTDCllel: +LINE111="STATE000; CALL Wait1us(50)" +LINE112="STATE000; CALL DumpPixels(1094)" +LINE113="STATE000; CALL FrameReadoutTDCllel_Innerloop(68)" +LINE114="STATE000; CALL LineReadout(44)" +LINE115="STATE000; CALL ReadoutEnd" +LINE116="STATE000; CALL linbindecr(llel_bin)" +LINE117="STATE000; CALL linbinincr" +LINE118="STATE000; RETURN FrameReadoutTDCllel" +LINE119=FrameReadoutTDCllel_Innerloop: +LINE120="STATE000; CALL LineReadoutAOnly(60)" +LINE121="STATE000; CALL ForwardParallelSectionBNoCoincident(llel_bin)" +LINE122="STATE000; CALL linbinincr(1)" +LINE123="STATE000; RETURN FrameReadoutTDCllel_Innerloop" +LINE124=FrameReadoutTDCser: +LINE125="STATE000; CALL Wait1us(50)" +LINE126="STATE000; CALL DumpPixels(1094)" +LINE127="STATE000; CALL LineReadoutTDCser(4124)" +LINE128="STATE000; CALL ReadoutEnd" +LINE129="STATE000; RETURN FrameReadoutTDCser" +LINE130=LineReadoutTDCser: +LINE131="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE132="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE133="STATE000; CALL TDCser_Innerloop(49)" +LINE134="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(15)" +LINE135="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(15)" +LINE136="STATE000; if !dsch_ser_dump_bcs CALL TDCser_ReadoutLoop" +LINE137="STATE000; if dsch_ser_dump_bcs CALL TDCser_ReadoutLoopDumpBright" +LINE138="STATE000; if !dsch_ser_direction CALL EvacuateF" +LINE139="STATE000; if dsch_ser_direction CALL EvacuateE" +LINE140="STATE000; CALL serbindecr(ser_bin)" +LINE141="STATE000; CALL serbinincr" +LINE142="STATE000; RETURN LineReadoutTDCser" +LINE143=TDCser_ReadoutLoopDumpBright: +LINE144="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(50)" +LINE145="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(50)" +LINE146="STATE000; CALL TDCser_ReadoutLoopDumpBright_Inner(49)" +LINE147="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(15)" +LINE148="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(15)" +LINE149="STATE000; RETURN TDCser_ReadoutLoopDumpBright" +LINE150=TDCser_ReadoutLoop: +LINE151="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(1094)" +LINE152="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(1094)" +LINE153="STATE000; RETURN TDCser_ReadoutLoop" +LINE154=TDCser_ReadoutLoopDumpBright_Inner: +LINE155="STATE000; CALL trigpix" +LINE156="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly" +LINE157="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly" +LINE158="STATE000; if !dsch_ser_direction CALL ReadPixelsEOnly(20)" +LINE159="STATE000; if dsch_ser_direction CALL ReadPixelsFOnly(20)" +LINE160="STATE000; RETURN TDCser_ReadoutLoopDumpBright_Inner" +LINE161=TDCser_Innerloop: +LINE162="STATE000; if !dsch_ser_direction CALL DumpPixelsEOnly(21)" +LINE163="STATE000; if dsch_ser_direction CALL DumpPixelsFOnly(21)" +LINE164="STATE000; if !dsch_ser_direction CALL SerialFBackwards(ser_bin)" +LINE165="STATE000; if dsch_ser_direction CALL SerialEBackwards(ser_bin)" +LINE166="STATE000; CALL serbinincr(1)" +LINE167="STATE000; RETURN TDCser_Innerloop" +LINE168=serbinincr: +LINE169="STATE000; ser_bin++" +LINE170="STATE000; RETURN serbinincr" +LINE171=serbindecr: +LINE172="STATE000; ser_bin--" +LINE173="STATE000; RETURN serbindecr" +LINE174=FrameReadout: +LINE175="STATE000; CALL Wait1us(50)" +LINE176="STATE000; CALL DumpPixels(1094)" +LINE177="STATE000; if tdi_wait_us CALL OpenShutter" +LINE178="STATE000; IF llel_seq CALL LineReadout(4124)" +LINE179="STATE000; IF llel_coincident CALL LineReadoutCoincident(4124)" +LINE180="STATE000; IF slow_pix CALL LineReadoutSlowPix(4124)" +LINE181="STATE000; IF linbin CALL LineReadout(90)" +LINE182="STATE000; IF linbin CALL LineReadoutFast(4034)" +LINE183="STATE000; if tdi_wait_us CALL CloseShutter" +LINE184="STATE000; CALL ReadoutEnd" +LINE185="STATE000; if linbin CALL linbindecr(llel_bin)" +LINE186="STATE000; if linbin CALL linbinincr" +LINE187="STATE000; RETURN FrameReadout" +LINE188=Wait1s: +LINE189="STATE000; if abortintegrate CALL abortintegration" +LINE190="STATE000; CALL Wait1ms(1000)" +LINE191="STATE000; RETURN Wait1s" +LINE192=abortintegration: +LINE193="STATE000; CALL CloseShutter" +LINE194="STATE000; GOTO StartSeqSummitMode" +LINE195=LineReadoutSlowPix: +LINE196="STATE000; CALL ParallelForwardNoCoincident" +LINE197="STATE000; CALL Wait1us(50)" +LINE198="STATE000; CALL ReadPixelsSlow(1094)" +LINE199="STATE000; CALL Wait1us(10)" +LINE200="STATE000; RETURN LineReadoutSlowPix" +LINE201=linbinincrcheck: +LINE202="STATE000; if framecount CALL linbinincr" +LINE203="STATE000; RETURN linbinincrcheck" +LINE204=linbinincr: +LINE205="STATE000; llel_bin++" +LINE206="STATE000; RETURN linbinincr" +LINE207=linbindecr: +LINE208="STATE000; llel_bin--" +LINE209="STATE000; RETURN linbindecr" +LINE210=LineReadoutFast: +LINE211="STATE000; CALL ParallelForwardNoCoincident" +LINE212="STATE000; CALL ReadPixels(1094)" +LINE213="STATE000; RETURN LineReadoutFast" +LINE214=LineReadout: +LINE215="STATE000; CALL ParallelForwardNoCoincident(llel_bin)" +LINE216="STATE000; if linbin CALL linbinincr" +LINE217="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE218="STATE000; if enable_ser_bin CALL ReadPixels(50)" +LINE219="STATE000; if enable_ser_bin CALL SerBinReadPixels(1024)" +LINE220="STATE000; if enable_ser_bin CALL ReadPixels(20)" +LINE221="STATE000; if !enable_ser_bin CALL ReadPixels(1094)" +LINE222="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE223="STATE000; RETURN LineReadout" +LINE224=SerBinReadPixels: +LINE225="STATE000; CALL PrepSerBin" +LINE226="STATE000; CALL serbindecr" +LINE227="STATE000; CALL SerialBinForwards(ser_bin)" +LINE228="STATE000; CALL ReadPixels" +LINE229="STATE000; CALL serbinincr" +LINE230="STATE000; RETURN SerBinReadPixels" +LINE231=LineReadoutCoincident: +LINE232="STATE000; if tdi_wait_us CALL Wait1us(tdi_wait_us)" +LINE233="STATE000; CALL ParallelForwardSegment1" +LINE234="STATE000; CALL TransferToSerialRegisterCoincident" +LINE235="STATE000; CALL ReadPixels(364)" +LINE236="STATE000; CALL ParallelForwardSegment2" +LINE237="STATE000; CALL ReadPixels(364)" +LINE238="STATE000; CALL ParallelForwardSegment3" +LINE239="STATE000; CALL ReadPixels(364) CALL ReadPixels(2)" +LINE240="STATE000; RETURN LineReadoutCoincident" +LINE241=LineReadoutAOnly: +LINE242="STATE000; CALL ForwardParallelSectionANoCoincident" +LINE243="STATE000; CALL Wait1us(line_clamp_delay_us)" +LINE244="STATE000; CALL ReadPixels(1094)" +LINE245="STATE000; RETURN LineReadoutAOnly" +LINE246=LineReadoutAOnlyCoincident: +LINE247="STATE000; CALL TransferToSerialRegisterCoincident" +LINE248="STATE000; CALL ReadPixels(50)" +LINE249="STATE000; CALL ParallelForwardSectionASegment1" +LINE250="STATE000; CALL ReadPixels(364)" +LINE251="STATE000; CALL ParallelForwardSectionASegment2" +LINE252="STATE000; CALL ReadPixels(364)" +LINE253="STATE000; CALL ParallelForwardSectionASegment3" +LINE254="STATE000; CALL ReadPixels(364)" +LINE255="STATE000; CALL ReadPixels(2)" +LINE256="STATE000; RETURN LineReadoutAOnlyCoincident" +LINE257=testConst: +LINE258="STATE001; STATE000(98)" +LINE259="STATE000; RETURN testConst" +LINE260=Wait1us: +LINE261="STATE002; STATE000(98)" +LINE262="STATE000; RETURN Wait1us" +LINE263=Wait1ms: +LINE264="STATE002; STATE000(99998)" +LINE265="STATE000; RETURN Wait1ms" +LINE266=KeepThisFrame: +LINE267="STATE003;" +LINE268="STATE004; RETURN KeepThisFrame" +LINE269=InitialSetup: +LINE270="STATE005; STATE000(999)" +LINE271="STATE006; STATE000(9999)" +LINE272="STATE002; RETURN InitialSetup" +LINE273=InitialSetupFCS: +LINE274="STATE007; STATE000(999)" +LINE275="STATE008; STATE000(9999)" +LINE276="STATE002; RETURN InitialSetupFCS" +LINE277=OpenShutter: +LINE278="STATE009; RETURN OpenShutter" +LINE279=CloseShutter: +LINE280="STATE010; RETURN CloseShutter" +LINE281=ReadoutBegin: +LINE282="STATE011; RETURN ReadoutBegin" +LINE283=ReadoutEnd: +LINE284="STATE012; RETURN ReadoutEnd" +LINE285=TransferToSerialRegisterCoincident: +LINE286="STATE013; STATE000(999)" +LINE287="STATE014; STATE000(49)" +LINE288="STATE015; STATE000(49)" +LINE289="STATE016; RETURN TransferToSerialRegisterCoincident" +LINE290=ParallelForwardNoCoincident: LINE291="STATE017; STATE000(1199)" LINE292="STATE018; STATE000(1199)" -LINE293="STATE019; STATE000(199)" -LINE294="STATE020; STATE000(49)" -LINE295="STATE021; STATE000(299)" -LINE296="STATE022; STATE000(49)" -LINE297="STATE015; STATE000(599)" -LINE298="STATE023; STATE000(1199)" +LINE293="STATE019; STATE000(1199)" +LINE294="STATE020; STATE000(199)" +LINE295="STATE021; STATE000(49)" +LINE296="STATE022; STATE000(299)" +LINE297="STATE023; STATE000(49)" +LINE298="STATE016; STATE000(599)" LINE299="STATE024; STATE000(1199)" -LINE300="STATE001; RETURN ParallelForwardNoCoincident" -LINE301=ParallelForwardSegment1: -LINE302="STATE025; RETURN ParallelForwardSegment1" -LINE303=ParallelForwardSegment2: -LINE304="STATE026; RETURN ParallelForwardSegment2" -LINE305=ParallelForwardSegment3: -LINE306="STATE027; RETURN ParallelForwardSegment3" -LINE307=OutputTestSetup: -LINE308="STATE028; STATE000(999999)" -LINE309="STATE001; RETURN OutputTestSetup" -LINE310=PulseTGA: -LINE311="STATE029; STATE000(2499)" +LINE300="STATE025; STATE000(1199)" +LINE301="STATE002; RETURN ParallelForwardNoCoincident" +LINE302=ParallelForwardSegment1: +LINE303="STATE026; RETURN ParallelForwardSegment1" +LINE304=ParallelForwardSegment2: +LINE305="STATE027; RETURN ParallelForwardSegment2" +LINE306=ParallelForwardSegment3: +LINE307="STATE028; RETURN ParallelForwardSegment3" +LINE308=OutputTestSetup: +LINE309="STATE029; STATE000(999999)" +LINE310="STATE002; RETURN OutputTestSetup" +LINE311=PulseTGA: LINE312="STATE030; STATE000(2499)" -LINE313="STATE031; RETURN PulseTGA" -LINE314=VRDModulate: -LINE315="STATE032; STATE000(999999)" -LINE316="STATE033; STATE000(99)" +LINE313="STATE031; STATE000(2499)" +LINE314="STATE032; RETURN PulseTGA" +LINE315=VRDModulate: +LINE316="STATE033; STATE000(999999)" LINE317="STATE034; STATE000(99)" LINE318="STATE035; STATE000(99)" LINE319="STATE036; STATE000(99)" LINE320="STATE037; STATE000(99)" -LINE321="STATE038; STATE000(999999)" -LINE322="STATE033; STATE000(99)" +LINE321="STATE038; STATE000(99)" +LINE322="STATE039; STATE000(999999)" LINE323="STATE034; STATE000(99)" -LINE324="STATE039; STATE000(99)" +LINE324="STATE035; STATE000(99)" LINE325="STATE040; STATE000(99)" LINE326="STATE041; STATE000(99)" -LINE327="STATE042; STATE000(999999)" -LINE328="STATE033; STATE000(99)" +LINE327="STATE042; STATE000(99)" +LINE328="STATE043; STATE000(999999)" LINE329="STATE034; STATE000(99)" -LINE330="STATE043; STATE000(99)" +LINE330="STATE035; STATE000(99)" LINE331="STATE044; STATE000(99)" LINE332="STATE045; STATE000(99)" -LINE333="STATE046; STATE000(999999)" -LINE334="STATE033; STATE000(99)" +LINE333="STATE046; STATE000(99)" +LINE334="STATE047; STATE000(999999)" LINE335="STATE034; STATE000(99)" -LINE336="STATE047; STATE000(99)" +LINE336="STATE035; STATE000(99)" LINE337="STATE048; STATE000(99)" LINE338="STATE049; STATE000(99)" -LINE339="STATE050; STATE000(999999)" -LINE340="STATE033; STATE000(99)" +LINE339="STATE050; STATE000(99)" +LINE340="STATE051; STATE000(999999)" LINE341="STATE034; STATE000(99)" -LINE342="STATE051; STATE000(99)" +LINE342="STATE035; STATE000(99)" LINE343="STATE052; STATE000(99)" LINE344="STATE053; STATE000(99)" -LINE345="STATE054; STATE000(999999)" -LINE346="STATE033; STATE000(99)" +LINE345="STATE054; STATE000(99)" +LINE346="STATE055; STATE000(999999)" LINE347="STATE034; STATE000(99)" -LINE348="STATE055; STATE000(99)" +LINE348="STATE035; STATE000(99)" LINE349="STATE056; STATE000(99)" LINE350="STATE057; STATE000(99)" -LINE351="STATE058; STATE000(999999)" -LINE352="STATE033; STATE000(99)" +LINE351="STATE058; STATE000(99)" +LINE352="STATE059; STATE000(999999)" LINE353="STATE034; STATE000(99)" -LINE354="STATE059; STATE000(99)" +LINE354="STATE035; STATE000(99)" LINE355="STATE060; STATE000(99)" LINE356="STATE061; STATE000(99)" -LINE357="STATE062; STATE000(999999)" -LINE358="STATE033; STATE000(99)" +LINE357="STATE062; STATE000(99)" +LINE358="STATE063; STATE000(999999)" LINE359="STATE034; STATE000(99)" -LINE360="STATE063; STATE000(99)" +LINE360="STATE035; STATE000(99)" LINE361="STATE064; STATE000(99)" LINE362="STATE065; STATE000(99)" -LINE363="STATE066; RETURN VRDModulate" -LINE364=ReadPixels: -LINE365="STATE067;" -LINE366="STATE068; STATE000(58)" -LINE367="STATE069;" -LINE368="STATE031; STATE000(298)" -LINE369="STATE070; STATE000(199)" -LINE370="STATE071; STATE000(59)" -LINE371="STATE001; RETURN ReadPixels" -LINE372=ReadPixelsSlow: -LINE373="STATE072;" -LINE374="STATE068; STATE000(13)" -LINE375="STATE073; STATE000(14)" -LINE376="STATE074; STATE000(4)" -LINE377="STATE075; STATE000(9)" -LINE378="STATE076; STATE000(15)" -LINE379="STATE031; STATE000(118)" -LINE380="STATE077; STATE000(14)" +LINE363="STATE066; STATE000(99)" +LINE364="STATE067; RETURN VRDModulate" +LINE365=ReadPixels: +LINE366="STATE068;" +LINE367="STATE069; STATE000(58)" +LINE368="STATE070;" +LINE369="STATE032; STATE000(298)" +LINE370="STATE071; STATE000(199)" +LINE371="STATE072; STATE000(59)" +LINE372="STATE002; RETURN ReadPixels" +LINE373=ReadPixelsSlow: +LINE374="STATE073;" +LINE375="STATE069; STATE000(13)" +LINE376="STATE074; STATE000(14)" +LINE377="STATE075; STATE000(4)" +LINE378="STATE076; STATE000(9)" +LINE379="STATE077; STATE000(15)" +LINE380="STATE032; STATE000(118)" LINE381="STATE078; STATE000(14)" -LINE382="STATE070; STATE000(116)" -LINE383="STATE001; RETURN ReadPixelsSlow" -LINE384=ForwardParallelSectionANoCoincident: -LINE385="STATE001; STATE000(999)" -LINE386="STATE079; STATE000(999)" +LINE382="STATE079; STATE000(14)" +LINE383="STATE071; STATE000(116)" +LINE384="STATE002; RETURN ReadPixelsSlow" +LINE385=ForwardParallelSectionANoCoincident: +LINE386="STATE002; STATE000(999)" LINE387="STATE080; STATE000(999)" LINE388="STATE081; STATE000(999)" -LINE389="STATE082; STATE000(199)" -LINE390="STATE083; STATE000(49)" -LINE391="STATE021; STATE000(299)" -LINE392="STATE084; STATE000(49)" -LINE393="STATE015; STATE000(399)" -LINE394="STATE085; STATE000(999)" +LINE389="STATE082; STATE000(999)" +LINE390="STATE083; STATE000(199)" +LINE391="STATE084; STATE000(49)" +LINE392="STATE022; STATE000(299)" +LINE393="STATE085; STATE000(49)" +LINE394="STATE016; STATE000(399)" LINE395="STATE086; STATE000(999)" -LINE396="STATE001; RETURN ForwardParallelSectionANoCoincident" -LINE397=ForwardParallelSectionBNoCoincident: -LINE398="STATE001; STATE000(999)" -LINE399="STATE087; STATE000(999)" +LINE396="STATE087; STATE000(999)" +LINE397="STATE002; RETURN ForwardParallelSectionANoCoincident" +LINE398=ForwardParallelSectionBNoCoincident: +LINE399="STATE002; STATE000(999)" LINE400="STATE088; STATE000(999)" LINE401="STATE089; STATE000(999)" LINE402="STATE090; STATE000(999)" LINE403="STATE091; STATE000(999)" LINE404="STATE092; STATE000(999)" -LINE405="STATE001; RETURN ForwardParallelSectionBNoCoincident" -LINE406=ForwardParallelSectionA: -LINE407="STATE093; STATE000(364665)" -LINE408="STATE094; STATE000(364666)" -LINE409="STATE095; RETURN ForwardParallelSectionA" -LINE410=ForwardParallelSectionB: -LINE411="STATE096; STATE000(364665)" -LINE412="STATE097; STATE000(364666)" -LINE413="STATE098; RETURN ForwardParallelSectionB" -LINE414=ForwardParallelAll: -LINE415="STATE026; STATE000(364665)" -LINE416="STATE027; STATE000(364666)" -LINE417="STATE025; RETURN ForwardParallelAll" -LINE418=ParallelForwardSectionASegment1: -LINE419="STATE093; RETURN ParallelForwardSectionASegment1" -LINE420=ParallelForwardSectionASegment2: -LINE421="STATE094; RETURN ParallelForwardSectionASegment2" -LINE422=ParallelForwardSectionASegment3: -LINE423="STATE095; RETURN ParallelForwardSectionASegment3" -LINE424=Wait10us: -LINE425="STATE000; STATE000(999)" -LINE426="STATE001; RETURN Wait10us" -LINE427=ReadPixelsEOnly: -LINE428="STATE099;" -LINE429="STATE068; STATE000(58)" -LINE430="STATE100;" -LINE431="STATE031; STATE000(298)" -LINE432="STATE070; STATE000(199)" -LINE433="STATE101; STATE000(59)" -LINE434="STATE001; RETURN ReadPixelsEOnly" -LINE435=ReadPixelsFOnly: -LINE436="STATE102;" -LINE437="STATE068; STATE000(58)" -LINE438="STATE103;" -LINE439="STATE031; STATE000(298)" -LINE440="STATE070; STATE000(129)" -LINE441="STATE104; STATE000(79)" -LINE442="STATE001; RETURN ReadPixelsFOnly" -LINE443=PrepSerBin: -LINE444="STATE105; STATE000(39)" -LINE445="STATE074; STATE000(19)" -LINE446="STATE031; RETURN PrepSerBin" -LINE447=SerialBinForwards: -LINE448="STATE106; STATE000(39)" +LINE405="STATE093; STATE000(999)" +LINE406="STATE002; RETURN ForwardParallelSectionBNoCoincident" +LINE407=ForwardParallelSectionA: +LINE408="STATE094; STATE000(364665)" +LINE409="STATE095; STATE000(364666)" +LINE410="STATE096; RETURN ForwardParallelSectionA" +LINE411=ForwardParallelSectionB: +LINE412="STATE097; STATE000(364665)" +LINE413="STATE098; STATE000(364666)" +LINE414="STATE099; RETURN ForwardParallelSectionB" +LINE415=ForwardParallelAll: +LINE416="STATE027; STATE000(364665)" +LINE417="STATE028; STATE000(364666)" +LINE418="STATE026; RETURN ForwardParallelAll" +LINE419=ParallelForwardSectionASegment1: +LINE420="STATE094; RETURN ParallelForwardSectionASegment1" +LINE421=ParallelForwardSectionASegment2: +LINE422="STATE095; RETURN ParallelForwardSectionASegment2" +LINE423=ParallelForwardSectionASegment3: +LINE424="STATE096; RETURN ParallelForwardSectionASegment3" +LINE425=Wait10us: +LINE426="STATE000; STATE000(999)" +LINE427="STATE002; RETURN Wait10us" +LINE428=ReadPixelsEOnly: +LINE429="STATE100;" +LINE430="STATE069; STATE000(58)" +LINE431="STATE101;" +LINE432="STATE032; STATE000(298)" +LINE433="STATE071; STATE000(199)" +LINE434="STATE102; STATE000(59)" +LINE435="STATE002; RETURN ReadPixelsEOnly" +LINE436=ReadPixelsFOnly: +LINE437="STATE103;" +LINE438="STATE069; STATE000(58)" +LINE439="STATE104;" +LINE440="STATE032; STATE000(298)" +LINE441="STATE071; STATE000(129)" +LINE442="STATE105; STATE000(79)" +LINE443="STATE002; RETURN ReadPixelsFOnly" +LINE444=PrepSerBin: +LINE445="STATE106; STATE000(39)" +LINE446="STATE075; STATE000(19)" +LINE447="STATE032; RETURN PrepSerBin" +LINE448=SerialBinForwards: LINE449="STATE107; STATE000(39)" -LINE450="STATE071; STATE000(39)" -LINE451="STATE106; STATE000(39)" -LINE452="STATE001; RETURN SerialBinForwards" -LINE453=DumpPixels: -LINE454="STATE108; STATE000(39)" -LINE455="STATE069; STATE000(19)" -LINE456="STATE031; STATE000(279)" -LINE457="STATE070; STATE000(199)" -LINE458="STATE109; STATE000(59)" -LINE459="STATE001; RETURN DumpPixels" -LINE460=trigpix: -LINE461="STATE110;" -LINE462="STATE111; RETURN trigpix" -LINE463=DumpPixelsEOnly: -LINE464="STATE112; STATE000(39)" -LINE465="STATE100; STATE000(299)" -LINE466="STATE070; STATE000(199)" -LINE467="STATE113; STATE000(59)" -LINE468="STATE001; RETURN DumpPixelsEOnly" -LINE469=DumpPixelsFOnly: -LINE470="STATE114; STATE000(39)" -LINE471="STATE103; STATE000(299)" -LINE472="STATE070; STATE000(129)" -LINE473="STATE115; STATE000(79)" -LINE474="STATE001; RETURN DumpPixelsFOnly" -LINE475=SerialFBackwards: -LINE476="STATE116; STATE000(29)" +LINE450="STATE108; STATE000(39)" +LINE451="STATE072; STATE000(39)" +LINE452="STATE107; STATE000(39)" +LINE453="STATE002; RETURN SerialBinForwards" +LINE454=DumpPixels: +LINE455="STATE109; STATE000(39)" +LINE456="STATE070; STATE000(19)" +LINE457="STATE032; STATE000(279)" +LINE458="STATE071; STATE000(199)" +LINE459="STATE110; STATE000(59)" +LINE460="STATE002; RETURN DumpPixels" +LINE461=trigpix: +LINE462="STATE111;" +LINE463="STATE112; RETURN trigpix" +LINE464=DumpPixelsEOnly: +LINE465="STATE113; STATE000(39)" +LINE466="STATE101; STATE000(299)" +LINE467="STATE071; STATE000(199)" +LINE468="STATE114; STATE000(59)" +LINE469="STATE002; RETURN DumpPixelsEOnly" +LINE470=DumpPixelsFOnly: +LINE471="STATE115; STATE000(39)" +LINE472="STATE104; STATE000(299)" +LINE473="STATE071; STATE000(129)" +LINE474="STATE116; STATE000(79)" +LINE475="STATE002; RETURN DumpPixelsFOnly" +LINE476=SerialFBackwards: LINE477="STATE117; STATE000(29)" LINE478="STATE118; STATE000(29)" LINE479="STATE119; STATE000(29)" -LINE480="STATE120; RETURN SerialFBackwards" -LINE481=SerialEBackwards: -LINE482="STATE121; STATE000(29)" +LINE480="STATE120; STATE000(29)" +LINE481="STATE121; RETURN SerialFBackwards" +LINE482=SerialEBackwards: LINE483="STATE122; STATE000(29)" LINE484="STATE123; STATE000(29)" -LINE485="STATE120; STATE000(29)" -LINE486="STATE119; RETURN SerialEBackwards" -LINE487=EvacuateFFinish: -LINE488="STATE124; STATE000(1999)" -LINE489="STATE125; STATE000(499)" -LINE490="STATE001; RETURN EvacuateFFinish" -LINE491=EvacuateFStart: -LINE492="STATE126; RETURN EvacuateFStart" -LINE493=EvacuateEFinish: -LINE494="STATE124; STATE000(1999)" -LINE495="STATE127; STATE000(499)" -LINE496="STATE001; RETURN EvacuateEFinish" -LINE497=EvacuateEStart: -LINE498="STATE128; RETURN EvacuateEStart" -LINE499=BounceTGTest: -LINE500="STATE129;" -LINE501="STATE111; STATE000(498)" -LINE502="STATE030; STATE000(199)" -LINE503="STATE001; RETURN BounceTGTest" -LINE504=ClampTestInner: -LINE505="STATE129;" -LINE506="STATE111; STATE000(98)" -LINE507="STATE030; STATE000(99)" -LINE508="STATE001; RETURN ClampTestInner" -LINE509=ClampOn: -LINE510="STATE021; RETURN ClampOn" -LINE511=ClampOnFCS: -LINE512="STATE130; RETURN ClampOnFCS" -LINE513=ClampOff: -LINE514="STATE015; RETURN ClampOff" -LINE515=ClampOffFCS: -LINE516="STATE131; RETURN ClampOffFCS" -LINE517=ClampTestLineStart: -LINE518="STATE003; RETURN ClampTestLineStart" -LINE519=TGTestLineStart: -LINE520="STATE132; STATE000(99)" -LINE521="STATE015; RETURN TGTestLineStart" -LINE522=setupTGTest: -LINE523="STATE133; RETURN setupTGTest" -LINE524=FCSParallelForward: -LINE525="STATE134; STATE000(19999)" +LINE485="STATE124; STATE000(29)" +LINE486="STATE121; STATE000(29)" +LINE487="STATE120; RETURN SerialEBackwards" +LINE488=EvacuateFFinish: +LINE489="STATE125; STATE000(1999)" +LINE490="STATE126; STATE000(499)" +LINE491="STATE002; RETURN EvacuateFFinish" +LINE492=EvacuateFStart: +LINE493="STATE127; RETURN EvacuateFStart" +LINE494=EvacuateEFinish: +LINE495="STATE125; STATE000(1999)" +LINE496="STATE128; STATE000(499)" +LINE497="STATE002; RETURN EvacuateEFinish" +LINE498=EvacuateEStart: +LINE499="STATE129; RETURN EvacuateEStart" +LINE500=BounceTGTest: +LINE501="STATE130;" +LINE502="STATE112; STATE000(498)" +LINE503="STATE031; STATE000(199)" +LINE504="STATE002; RETURN BounceTGTest" +LINE505=ClampTestInner: +LINE506="STATE130;" +LINE507="STATE112; STATE000(98)" +LINE508="STATE031; STATE000(99)" +LINE509="STATE002; RETURN ClampTestInner" +LINE510=ClampOn: +LINE511="STATE022; RETURN ClampOn" +LINE512=ClampOnFCS: +LINE513="STATE131; RETURN ClampOnFCS" +LINE514=ClampOff: +LINE515="STATE016; RETURN ClampOff" +LINE516=ClampOffFCS: +LINE517="STATE132; RETURN ClampOffFCS" +LINE518=ClampTestLineStart: +LINE519="STATE004; RETURN ClampTestLineStart" +LINE520=TGTestLineStart: +LINE521="STATE133; STATE000(99)" +LINE522="STATE016; RETURN TGTestLineStart" +LINE523=setupTGTest: +LINE524="STATE134; RETURN setupTGTest" +LINE525=FCSParallelForward: LINE526="STATE135; STATE000(19999)" LINE527="STATE136; STATE000(19999)" LINE528="STATE137; STATE000(19999)" LINE529="STATE138; STATE000(19999)" -LINE530="STATE139; STATE000(999)" -LINE531="STATE130; STATE000(999)" -LINE532="STATE131; STATE000(199)" -LINE533="STATE001; RETURN FCSParallelForward" -LINE534=FCSSplitReadout: -LINE535="STATE110;" -LINE536="STATE140; STATE000(39)" +LINE530="STATE139; STATE000(19999)" +LINE531="STATE140; STATE000(999)" +LINE532="STATE131; STATE000(999)" +LINE533="STATE132; STATE000(199)" +LINE534="STATE002; RETURN FCSParallelForward" +LINE535=FCSSplitReadout: +LINE536="STATE111;" LINE537="STATE141; STATE000(39)" LINE538="STATE142; STATE000(39)" LINE539="STATE143; STATE000(39)" LINE540="STATE144; STATE000(39)" LINE541="STATE145; STATE000(39)" -LINE542="STATE146; STATE000(299)" +LINE542="STATE146; STATE000(39)" LINE543="STATE147; STATE000(299)" -LINE544="STATE001; RETURN FCSSplitReadout" -LINE545=DumpPixelsFCS: -LINE546="STATE148; STATE000(39)" +LINE544="STATE148; STATE000(299)" +LINE545="STATE002; RETURN FCSSplitReadout" +LINE546=DumpPixelsFCS: LINE547="STATE149; STATE000(39)" -LINE548="STATE141; STATE000(39)" +LINE548="STATE150; STATE000(39)" LINE549="STATE142; STATE000(39)" -LINE550="STATE144; STATE000(39)" +LINE550="STATE143; STATE000(39)" LINE551="STATE145; STATE000(39)" -LINE552="STATE150; RETURN DumpPixelsFCS" -LINES=553 +LINE552="STATE146; STATE000(39)" +LINE553="STATE151; RETURN DumpPixelsFCS" +LINES=554 MOD1\ENABLE1=1 MOD1\FASTSLEWRATE1=6.6666 MOD1\SLOWSLEWRATE1=0.0303 @@ -1045,7 +1047,7 @@ STATE1\NAME=STATE001 STATE1\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE1\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE1\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE1\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE1\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE1\MOD4="0,1,0,0,1,0" STATE1\CONTROL="0,3F" STATE1\MOD9="0,1,0" @@ -1054,9 +1056,9 @@ STATE2\NAME=STATE002 STATE2\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE2\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE2\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE2\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE2\MOD12="1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE2\MOD4="0,1,0,0,1,0" -STATE2\CONTROL="2,3D" +STATE2\CONTROL="0,3F" STATE2\MOD9="0,1,0" STATE2\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE3\NAME=STATE003 @@ -1065,52 +1067,52 @@ STATE3\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE3\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE3\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE3\MOD4="0,1,0,0,1,0" -STATE3\CONTROL="4,3B" +STATE3\CONTROL="2,3D" STATE3\MOD9="0,1,0" STATE3\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE4\NAME=STATE004 STATE4\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE4\MOD2="5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE4\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" -STATE4\MOD12="1,0,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE4\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE4\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE4\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE4\MOD4="0,1,0,0,1,0" -STATE4\CONTROL="0,3F" +STATE4\CONTROL="4,3B" STATE4\MOD9="0,1,0" STATE4\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE5\NAME=STATE005 -STATE5\MOD1="0,1,0,0,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,0,1,0,0,1,0" -STATE5\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE5\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE5\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE5\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE5\MOD2="5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE5\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" +STATE5\MOD12="1,0,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE5\MOD4="0,1,0,0,1,0" STATE5\CONTROL="0,3F" STATE5\MOD9="0,1,0" STATE5\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE6\NAME=STATE006 -STATE6\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE6\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,-2,1,0,,1,1,,1,1,,1,1" +STATE6\MOD1="0,1,0,0,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,0,1,0,0,1,0" +STATE6\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE6\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE6\MOD12="1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE6\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE6\MOD4="0,1,0,0,1,0" STATE6\CONTROL="0,3F" STATE6\MOD9="0,1,0" STATE6\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE7\NAME=STATE007 STATE7\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE7\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,-5,1,0,8,1,0,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1" -STATE7\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-5,1,0,-5,1,0,-6,1,0,-6,1,0,,1,1,,1,1" -STATE7\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE7\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,-2,1,0,,1,1,,1,1,,1,1" +STATE7\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE7\MOD12="1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE7\MOD4="0,1,0,0,1,0" STATE7\CONTROL="0,3F" STATE7\MOD9="0,1,0" STATE7\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE8\NAME=STATE008 STATE8\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE8\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE8\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE8\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE8\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,-5,1,0,8,1,0,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1" +STATE8\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-5,1,0,-5,1,0,-6,1,0,-6,1,0,,1,1,,1,1" +STATE8\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE8\MOD4="0,1,0,0,1,0" -STATE8\CONTROL="1,3E" +STATE8\CONTROL="0,3F" STATE8\MOD9="0,1,0" STATE8\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE9\NAME=STATE009 @@ -1119,50 +1121,50 @@ STATE9\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE9\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE9\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE9\MOD4="0,1,0,0,1,0" -STATE9\CONTROL="0,3E" +STATE9\CONTROL="1,3E" STATE9\MOD9="0,1,0" STATE9\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE10\NAME=STATE010 -STATE10\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE10\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE10\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE10\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE10\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE10\MOD4="0,1,0,0,1,0" -STATE10\CONTROL="6,39" +STATE10\CONTROL="0,3E" STATE10\MOD9="0,1,0" STATE10\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE11\NAME=STATE011 -STATE11\MOD1=",1,1,,1,1,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,,1,1,,1,1" +STATE11\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1" STATE11\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE11\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE11\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE11\MOD4="0,1,0,0,1,0" -STATE11\CONTROL="0,3F" +STATE11\CONTROL="6,39" STATE11\MOD9="0,1,0" STATE11\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE12\NAME=STATE012 -STATE12\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE12\MOD2=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE12\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" -STATE12\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE12\MOD1=",1,1,,1,1,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,10,1,0,,1,1,,1,1" +STATE12\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE12\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE12\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE12\MOD4="0,1,0,0,1,0" -STATE12\CONTROL="4,3B" +STATE12\CONTROL="0,3F" STATE12\MOD9="0,1,0" STATE12\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE13\NAME=STATE013 STATE13\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE13\MOD2="5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE13\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,5,1,0" -STATE13\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE13\MOD2=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE13\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE13\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE13\MOD4="0,1,0,0,1,0" -STATE13\CONTROL="0,3F" +STATE13\CONTROL="4,3B" STATE13\MOD9="0,1,0" STATE13\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE14\NAME=STATE014 STATE14\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE14\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE14\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE14\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE14\MOD2="5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE14\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,5,1,0" +STATE14\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE14\MOD4="0,1,0,0,1,0" STATE14\CONTROL="0,3F" STATE14\MOD9="0,1,0" @@ -1170,32 +1172,32 @@ STATE14\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE15\NAME=STATE015 STATE15\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE15\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE15\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE15\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE15\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE15\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE15\MOD4="0,1,0,0,1,0" STATE15\CONTROL="0,3F" STATE15\MOD9="0,1,0" STATE15\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE16\NAME=STATE016 -STATE16\MOD1="10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0" -STATE16\MOD2="12,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE16\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,12,1,0" -STATE16\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE16\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE16\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE16\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE16\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE16\MOD4="0,1,0,0,1,0" -STATE16\CONTROL="4,3B" +STATE16\CONTROL="0,3F" STATE16\MOD9="0,1,0" STATE16\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE17\NAME=STATE017 -STATE17\MOD1=",1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1" -STATE17\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE17\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE17\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE17\MOD1="10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0" +STATE17\MOD2="12,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE17\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,12,1,0" +STATE17\MOD12="1,1,1,0,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE17\MOD4="0,1,0,0,1,0" -STATE17\CONTROL="0,3F" +STATE17\CONTROL="4,3B" STATE17\MOD9="0,1,0" STATE17\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE18\NAME=STATE018 -STATE18\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1" +STATE18\MOD1=",1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1" STATE18\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE18\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE18\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1204,28 +1206,28 @@ STATE18\CONTROL="0,3F" STATE18\MOD9="0,1,0" STATE18\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE19\NAME=STATE019 -STATE19\MOD1="0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0" +STATE19\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1" STATE19\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE19\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE19\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE19\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE19\MOD4="0,1,0,0,1,0" STATE19\CONTROL="0,3F" STATE19\MOD9="0,1,0" STATE19\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE20\NAME=STATE020 -STATE20\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE20\MOD2="5,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE20\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" -STATE20\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE20\MOD1="0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0" +STATE20\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE20\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE20\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE20\MOD4="0,1,0,0,1,0" STATE20\CONTROL="0,3F" STATE20\MOD9="0,1,0" STATE20\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE21\NAME=STATE021 STATE21\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE21\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE21\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE21\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE21\MOD2="5,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE21\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" +STATE21\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE21\MOD4="0,1,0,0,1,0" STATE21\CONTROL="0,3F" STATE21\MOD9="0,1,0" @@ -1233,23 +1235,23 @@ STATE21\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE22\NAME=STATE022 STATE22\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE22\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE22\MOD3=",1,1,1,1,0,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE22\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE22\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE22\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE22\MOD4="0,1,0,0,1,0" STATE22\CONTROL="0,3F" STATE22\MOD9="0,1,0" STATE22\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE23\NAME=STATE023 -STATE23\MOD1=",1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1" +STATE23\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE23\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE23\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE23\MOD3=",1,1,1,1,0,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE23\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE23\MOD4="0,1,0,0,1,0" STATE23\CONTROL="0,3F" STATE23\MOD9="0,1,0" STATE23\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE24\NAME=STATE024 -STATE24\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE24\MOD1=",1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1" STATE24\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE24\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE24\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1258,7 +1260,7 @@ STATE24\CONTROL="0,3F" STATE24\MOD9="0,1,0" STATE24\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE25\NAME=STATE025 -STATE25\MOD1="10,0,0,10,0,0,0,0,0,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,0,0,0,10,0,0,10,0,0" +STATE25\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1" STATE25\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE25\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE25\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1267,7 +1269,7 @@ STATE25\CONTROL="0,3F" STATE25\MOD9="0,1,0" STATE25\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE26\NAME=STATE026 -STATE26\MOD1="0,0,0,0,0,0,,1,1,,1,1,10,0,0,10,0,0,10,0,0,10,0,0,,1,1,,1,1,0,0,0,0,0,0" +STATE26\MOD1="10,0,0,10,0,0,0,0,0,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,0,0,0,10,0,0,10,0,0" STATE26\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE26\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE26\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1276,7 +1278,7 @@ STATE26\CONTROL="0,3F" STATE26\MOD9="0,1,0" STATE26\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE27\NAME=STATE027 -STATE27\MOD1=",1,1,,1,1,10,0,0,10,0,0,0,0,0,0,0,0,0,0,0,0,0,0,10,0,0,10,0,0,,1,1,,1,1" +STATE27\MOD1="0,0,0,0,0,0,,1,1,,1,1,10,0,0,10,0,0,10,0,0,10,0,0,,1,1,,1,1,0,0,0,0,0,0" STATE27\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE27\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE27\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1285,27 +1287,27 @@ STATE27\CONTROL="0,3F" STATE27\MOD9="0,1,0" STATE27\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE28\NAME=STATE028 -STATE28\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE28\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,12,1,0,6,1,0,,1,1,,1,1,,1,1" +STATE28\MOD1=",1,1,,1,1,10,0,0,10,0,0,0,0,0,0,0,0,0,0,0,0,0,0,10,0,0,10,0,0,,1,1,,1,1" +STATE28\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE28\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE28\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE28\MOD4="0,1,0,0,1,0" STATE28\CONTROL="0,3F" -STATE28\MOD9="" +STATE28\MOD9="0,1,0" STATE28\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE29\NAME=STATE029 STATE29\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE29\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE29\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE29\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,12,1,0,6,1,0,,1,1,,1,1,,1,1" +STATE29\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE29\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE29\MOD4="0,1,0,0,1,0" STATE29\CONTROL="0,3F" -STATE29\MOD9="0,1,0" +STATE29\MOD9="" STATE29\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE30\NAME=STATE030 STATE30\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE30\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE30\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE30\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" STATE30\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE30\MOD4="0,1,0,0,1,0" STATE30\CONTROL="0,3F" @@ -1314,8 +1316,8 @@ STATE30\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE31\NAME=STATE031 STATE31\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE31\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE31\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE31\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE31\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE31\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE31\MOD4="0,1,0,0,1,0" STATE31\CONTROL="0,3F" STATE31\MOD9="0,1,0" @@ -1324,10 +1326,10 @@ STATE32\NAME=STATE032 STATE32\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE32\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE32\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE32\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE32\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE32\MOD4="0,1,0,0,1,0" STATE32\CONTROL="0,3F" -STATE32\MOD9="1,8,12" +STATE32\MOD9="0,1,0" STATE32\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE33\NAME=STATE033 STATE33\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1336,11 +1338,11 @@ STATE33\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE33\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE33\MOD4="0,1,0,0,1,0" STATE33\CONTROL="0,3F" -STATE33\MOD9="0,1,0" +STATE33\MOD9="1,8,12" STATE33\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE34\NAME=STATE034 STATE34\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE34\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1,,1,1" +STATE34\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE34\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE34\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE34\MOD4="0,1,0,0,1,0" @@ -1349,12 +1351,12 @@ STATE34\MOD9="0,1,0" STATE34\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE35\NAME=STATE035 STATE35\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE35\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE35\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1,,1,1" STATE35\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE35\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE35\MOD4="0,1,0,0,1,0" STATE35\CONTROL="0,3F" -STATE35\MOD9="1,8,12.5" +STATE35\MOD9="0,1,0" STATE35\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE36\NAME=STATE036 STATE36\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1363,7 +1365,7 @@ STATE36\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE36\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE36\MOD4="0,1,0,0,1,0" STATE36\CONTROL="0,3F" -STATE36\MOD9="1,9,12.5" +STATE36\MOD9="1,8,12.5" STATE36\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE37\NAME=STATE037 STATE37\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1372,7 +1374,7 @@ STATE37\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE37\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE37\MOD4="0,1,0,0,1,0" STATE37\CONTROL="0,3F" -STATE37\MOD9="1,10,12.5" +STATE37\MOD9="1,9,12.5" STATE37\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE38\NAME=STATE038 STATE38\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1381,7 +1383,7 @@ STATE38\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE38\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE38\MOD4="0,1,0,0,1,0" STATE38\CONTROL="0,3F" -STATE38\MOD9="1,11,12.5" +STATE38\MOD9="1,10,12.5" STATE38\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE39\NAME=STATE039 STATE39\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1390,7 +1392,7 @@ STATE39\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE39\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE39\MOD4="0,1,0,0,1,0" STATE39\CONTROL="0,3F" -STATE39\MOD9="1,8,13" +STATE39\MOD9="1,11,12.5" STATE39\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE40\NAME=STATE040 STATE40\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1399,7 +1401,7 @@ STATE40\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE40\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE40\MOD4="0,1,0,0,1,0" STATE40\CONTROL="0,3F" -STATE40\MOD9="1,9,13" +STATE40\MOD9="1,8,13" STATE40\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE41\NAME=STATE041 STATE41\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1408,7 +1410,7 @@ STATE41\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE41\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE41\MOD4="0,1,0,0,1,0" STATE41\CONTROL="0,3F" -STATE41\MOD9="1,10,13" +STATE41\MOD9="1,9,13" STATE41\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE42\NAME=STATE042 STATE42\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1417,7 +1419,7 @@ STATE42\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE42\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE42\MOD4="0,1,0,0,1,0" STATE42\CONTROL="0,3F" -STATE42\MOD9="1,11,13" +STATE42\MOD9="1,10,13" STATE42\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE43\NAME=STATE043 STATE43\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1426,7 +1428,7 @@ STATE43\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE43\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE43\MOD4="0,1,0,0,1,0" STATE43\CONTROL="0,3F" -STATE43\MOD9="1,8,13.5" +STATE43\MOD9="1,11,13" STATE43\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE44\NAME=STATE044 STATE44\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1435,7 +1437,7 @@ STATE44\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE44\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE44\MOD4="0,1,0,0,1,0" STATE44\CONTROL="0,3F" -STATE44\MOD9="1,9,13.5" +STATE44\MOD9="1,8,13.5" STATE44\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE45\NAME=STATE045 STATE45\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1444,7 +1446,7 @@ STATE45\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE45\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE45\MOD4="0,1,0,0,1,0" STATE45\CONTROL="0,3F" -STATE45\MOD9="1,10,13.5" +STATE45\MOD9="1,9,13.5" STATE45\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE46\NAME=STATE046 STATE46\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1453,7 +1455,7 @@ STATE46\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE46\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE46\MOD4="0,1,0,0,1,0" STATE46\CONTROL="0,3F" -STATE46\MOD9="1,11,13.5" +STATE46\MOD9="1,10,13.5" STATE46\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE47\NAME=STATE047 STATE47\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1462,7 +1464,7 @@ STATE47\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE47\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE47\MOD4="0,1,0,0,1,0" STATE47\CONTROL="0,3F" -STATE47\MOD9="1,8,14" +STATE47\MOD9="1,11,13.5" STATE47\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE48\NAME=STATE048 STATE48\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1471,7 +1473,7 @@ STATE48\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE48\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE48\MOD4="0,1,0,0,1,0" STATE48\CONTROL="0,3F" -STATE48\MOD9="1,9,14" +STATE48\MOD9="1,8,14" STATE48\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE49\NAME=STATE049 STATE49\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1480,7 +1482,7 @@ STATE49\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE49\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE49\MOD4="0,1,0,0,1,0" STATE49\CONTROL="0,3F" -STATE49\MOD9="1,10,14" +STATE49\MOD9="1,9,14" STATE49\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE50\NAME=STATE050 STATE50\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1489,7 +1491,7 @@ STATE50\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE50\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE50\MOD4="0,1,0,0,1,0" STATE50\CONTROL="0,3F" -STATE50\MOD9="1,11,14" +STATE50\MOD9="1,10,14" STATE50\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE51\NAME=STATE051 STATE51\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1498,7 +1500,7 @@ STATE51\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE51\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE51\MOD4="0,1,0,0,1,0" STATE51\CONTROL="0,3F" -STATE51\MOD9="1,8,14.5" +STATE51\MOD9="1,11,14" STATE51\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE52\NAME=STATE052 STATE52\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1507,7 +1509,7 @@ STATE52\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE52\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE52\MOD4="0,1,0,0,1,0" STATE52\CONTROL="0,3F" -STATE52\MOD9="1,9,14.5" +STATE52\MOD9="1,8,14.5" STATE52\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE53\NAME=STATE053 STATE53\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1516,7 +1518,7 @@ STATE53\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE53\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE53\MOD4="0,1,0,0,1,0" STATE53\CONTROL="0,3F" -STATE53\MOD9="1,10,14.5" +STATE53\MOD9="1,9,14.5" STATE53\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE54\NAME=STATE054 STATE54\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1525,7 +1527,7 @@ STATE54\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE54\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE54\MOD4="0,1,0,0,1,0" STATE54\CONTROL="0,3F" -STATE54\MOD9="1,11,14.5" +STATE54\MOD9="1,10,14.5" STATE54\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE55\NAME=STATE055 STATE55\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1534,7 +1536,7 @@ STATE55\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE55\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE55\MOD4="0,1,0,0,1,0" STATE55\CONTROL="0,3F" -STATE55\MOD9="1,8,15" +STATE55\MOD9="1,11,14.5" STATE55\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE56\NAME=STATE056 STATE56\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1543,7 +1545,7 @@ STATE56\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE56\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE56\MOD4="0,1,0,0,1,0" STATE56\CONTROL="0,3F" -STATE56\MOD9="1,9,15" +STATE56\MOD9="1,8,15" STATE56\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE57\NAME=STATE057 STATE57\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1552,7 +1554,7 @@ STATE57\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE57\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE57\MOD4="0,1,0,0,1,0" STATE57\CONTROL="0,3F" -STATE57\MOD9="1,10,15" +STATE57\MOD9="1,9,15" STATE57\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE58\NAME=STATE058 STATE58\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1561,7 +1563,7 @@ STATE58\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE58\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE58\MOD4="0,1,0,0,1,0" STATE58\CONTROL="0,3F" -STATE58\MOD9="1,11,15" +STATE58\MOD9="1,10,15" STATE58\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE59\NAME=STATE059 STATE59\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1570,7 +1572,7 @@ STATE59\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE59\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE59\MOD4="0,1,0,0,1,0" STATE59\CONTROL="0,3F" -STATE59\MOD9="1,8,15.5" +STATE59\MOD9="1,11,15" STATE59\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE60\NAME=STATE060 STATE60\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1579,7 +1581,7 @@ STATE60\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE60\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE60\MOD4="0,1,0,0,1,0" STATE60\CONTROL="0,3F" -STATE60\MOD9="1,9,15.5" +STATE60\MOD9="1,8,15.5" STATE60\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE61\NAME=STATE061 STATE61\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1588,7 +1590,7 @@ STATE61\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE61\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE61\MOD4="0,1,0,0,1,0" STATE61\CONTROL="0,3F" -STATE61\MOD9="1,10,15.5" +STATE61\MOD9="1,9,15.5" STATE61\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE62\NAME=STATE062 STATE62\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1597,7 +1599,7 @@ STATE62\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE62\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE62\MOD4="0,1,0,0,1,0" STATE62\CONTROL="0,3F" -STATE62\MOD9="1,11,15.5" +STATE62\MOD9="1,10,15.5" STATE62\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE63\NAME=STATE063 STATE63\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1606,7 +1608,7 @@ STATE63\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE63\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE63\MOD4="0,1,0,0,1,0" STATE63\CONTROL="0,3F" -STATE63\MOD9="1,8,16" +STATE63\MOD9="1,11,15.5" STATE63\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE64\NAME=STATE064 STATE64\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1615,7 +1617,7 @@ STATE64\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE64\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE64\MOD4="0,1,0,0,1,0" STATE64\CONTROL="0,3F" -STATE64\MOD9="1,9,16" +STATE64\MOD9="1,8,16" STATE64\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE65\NAME=STATE065 STATE65\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1624,7 +1626,7 @@ STATE65\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE65\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE65\MOD4="0,1,0,0,1,0" STATE65\CONTROL="0,3F" -STATE65\MOD9="1,10,16" +STATE65\MOD9="1,9,16" STATE65\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE66\NAME=STATE066 STATE66\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" @@ -1633,40 +1635,40 @@ STATE66\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE66\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE66\MOD4="0,1,0,0,1,0" STATE66\CONTROL="0,3F" -STATE66\MOD9="1,11,16" +STATE66\MOD9="1,10,16" STATE66\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE67\NAME=STATE067 STATE67\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE67\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE67\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE67\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE67\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE67\MOD4="0,1,0,0,1,0" -STATE67\CONTROL="8,37" -STATE67\MOD9="0,1,0" +STATE67\CONTROL="0,3F" +STATE67\MOD9="1,11,16" STATE67\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE68\NAME=STATE068 STATE68\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE68\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE68\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE68\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE68\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE68\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE68\MOD4="0,1,0,0,1,0" -STATE68\CONTROL="0,31" +STATE68\CONTROL="8,37" STATE68\MOD9="0,1,0" STATE68\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE69\NAME=STATE069 STATE69\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE69\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE69\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE69\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE69\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE69\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE69\MOD4="0,1,0,0,1,0" -STATE69\CONTROL="0,3F" +STATE69\CONTROL="0,31" STATE69\MOD9="0,1,0" STATE69\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE70\NAME=STATE070 STATE70\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE70\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE70\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE70\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE70\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE70\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE70\MOD4="0,1,0,0,1,0" STATE70\CONTROL="0,3F" STATE70\MOD9="0,1,0" @@ -1674,8 +1676,8 @@ STATE70\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE71\NAME=STATE071 STATE71\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE71\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE71\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE71\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE71\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE71\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE71\MOD4="0,1,0,0,1,0" STATE71\CONTROL="0,3F" STATE71\MOD9="0,1,0" @@ -1683,26 +1685,26 @@ STATE71\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE72\NAME=STATE072 STATE72\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE72\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE72\MOD3=",1,1,,1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE72\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE72\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE72\MOD4="0,1,0,0,1,0" -STATE72\CONTROL="8,37" +STATE72\CONTROL="0,3F" STATE72\MOD9="0,1,0" STATE72\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE73\NAME=STATE073 STATE73\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE73\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE73\MOD3=",1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE73\MOD3=",1,1,,1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE73\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE73\MOD4="0,1,0,0,1,0" -STATE73\CONTROL="0,3F" +STATE73\CONTROL="8,37" STATE73\MOD9="0,1,0" STATE73\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE74\NAME=STATE074 STATE74\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE74\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE74\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE74\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE74\MOD3=",1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE74\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE74\MOD4="0,1,0,0,1,0" STATE74\CONTROL="0,3F" STATE74\MOD9="0,1,0" @@ -1710,8 +1712,8 @@ STATE74\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE75\NAME=STATE075 STATE75\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE75\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE75\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE75\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE75\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE75\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE75\MOD4="0,1,0,0,1,0" STATE75\CONTROL="0,3F" STATE75\MOD9="0,1,0" @@ -1719,7 +1721,7 @@ STATE75\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE76\NAME=STATE076 STATE76\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE76\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE76\MOD3=",1,1,,1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE76\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE76\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE76\MOD4="0,1,0,0,1,0" STATE76\CONTROL="0,3F" @@ -1728,7 +1730,7 @@ STATE76\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE77\NAME=STATE077 STATE77\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE77\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE77\MOD3=",1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE77\MOD3=",1,1,,1,1,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE77\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE77\MOD4="0,1,0,0,1,0" STATE77\CONTROL="0,3F" @@ -1737,32 +1739,32 @@ STATE77\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE78\NAME=STATE078 STATE78\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE78\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE78\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE78\MOD3=",1,1,,1,1,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE78\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE78\MOD4="0,1,0,0,1,0" STATE78\CONTROL="0,3F" STATE78\MOD9="0,1,0" STATE78\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE79\NAME=STATE079 -STATE79\MOD1=",1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1" -STATE79\MOD2="12,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE79\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,12,1,0" -STATE79\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE79\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE79\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE79\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE79\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE79\MOD4="0,1,0,0,1,0" -STATE79\CONTROL="4,3B" +STATE79\CONTROL="0,3F" STATE79\MOD9="0,1,0" STATE79\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE80\NAME=STATE080 -STATE80\MOD1=",1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1" -STATE80\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE80\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE80\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE80\MOD1=",1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1" +STATE80\MOD2="12,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE80\MOD3="10.5,1,0,1,1,0,11.5,1,0,11.5,1,0,11.5,1,0,11.5,1,0,,1,1,,1,1,,1,1,,1,1,10.5,1,0,12,1,0" +STATE80\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE80\MOD4="0,1,0,0,1,0" -STATE80\CONTROL="0,3F" +STATE80\CONTROL="4,3B" STATE80\MOD9="0,1,0" STATE80\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE81\NAME=STATE081 -STATE81\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE81\MOD1=",1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1" STATE81\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE81\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE81\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1771,43 +1773,43 @@ STATE81\CONTROL="0,3F" STATE81\MOD9="0,1,0" STATE81\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE82\NAME=STATE082 -STATE82\MOD1=",1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE82\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" STATE82\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE82\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE82\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE82\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE82\MOD4="0,1,0,0,1,0" STATE82\CONTROL="0,3F" STATE82\MOD9="0,1,0" STATE82\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE83\NAME=STATE083 -STATE83\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE83\MOD2="5,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE83\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" -STATE83\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE83\MOD1=",1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE83\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE83\MOD3="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1" +STATE83\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE83\MOD4="0,1,0,0,1,0" STATE83\CONTROL="0,3F" STATE83\MOD9="0,1,0" STATE83\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE84\NAME=STATE084 STATE84\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE84\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE84\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE84\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE84\MOD2="5,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE84\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,5,1,0" +STATE84\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE84\MOD4="0,1,0,0,1,0" STATE84\CONTROL="0,3F" STATE84\MOD9="0,1,0" STATE84\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE85\NAME=STATE085 -STATE85\MOD1=",1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1" +STATE85\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE85\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE85\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE85\MOD3=",1,1,1,1,0,11,1,0,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE85\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE85\MOD4="0,1,0,0,1,0" STATE85\CONTROL="0,3F" STATE85\MOD9="0,1,0" STATE85\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE86\NAME=STATE086 -STATE86\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE86\MOD1=",1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1" STATE86\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE86\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE86\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1816,7 +1818,7 @@ STATE86\CONTROL="0,3F" STATE86\MOD9="0,1,0" STATE86\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE87\NAME=STATE087 -STATE87\MOD1="10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0" +STATE87\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1" STATE87\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE87\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE87\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1825,7 +1827,7 @@ STATE87\CONTROL="0,3F" STATE87\MOD9="0,1,0" STATE87\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE88\NAME=STATE088 -STATE88\MOD1=",1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1" +STATE88\MOD1="10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0" STATE88\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE88\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE88\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1834,7 +1836,7 @@ STATE88\CONTROL="0,3F" STATE88\MOD9="0,1,0" STATE88\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE89\NAME=STATE089 -STATE89\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1" +STATE89\MOD1=",1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1" STATE89\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE89\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE89\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1843,7 +1845,7 @@ STATE89\CONTROL="0,3F" STATE89\MOD9="0,1,0" STATE89\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE90\NAME=STATE090 -STATE90\MOD1="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0" +STATE90\MOD1=",1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1" STATE90\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE90\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE90\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1852,7 +1854,7 @@ STATE90\CONTROL="0,3F" STATE90\MOD9="0,1,0" STATE90\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE91\NAME=STATE091 -STATE91\MOD1=",1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1" +STATE91\MOD1="0,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,1,0" STATE91\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE91\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE91\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1861,7 +1863,7 @@ STATE91\CONTROL="0,3F" STATE91\MOD9="0,1,0" STATE91\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE92\NAME=STATE092 -STATE92\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" +STATE92\MOD1=",1,1,,1,1,10,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10,1,0,,1,1,,1,1" STATE92\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE92\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE92\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1870,7 +1872,7 @@ STATE92\CONTROL="0,3F" STATE92\MOD9="0,1,0" STATE92\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE93\NAME=STATE093 -STATE93\MOD1=",1,1,0,0,0,,1,1,,1,1,,1,1,10,0,0,10,0,0,,1,1,,1,1,,1,1,0,0,0,,1,1" +STATE93\MOD1=",1,1,,1,1,,1,1,,1,1,0,1,0,,1,1,,1,1,0,1,0,,1,1,,1,1,,1,1,,1,1" STATE93\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE93\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE93\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1879,7 +1881,7 @@ STATE93\CONTROL="0,3F" STATE93\MOD9="0,1,0" STATE93\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE94\NAME=STATE094 -STATE94\MOD1=",1,1,,1,1,,1,1,10,0,0,,1,1,0,0,0,0,0,0,,1,1,10,0,0,,1,1,,1,1,,1,1" +STATE94\MOD1=",1,1,0,0,0,,1,1,,1,1,,1,1,10,0,0,10,0,0,,1,1,,1,1,,1,1,0,0,0,,1,1" STATE94\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE94\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE94\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1888,7 +1890,7 @@ STATE94\CONTROL="0,3F" STATE94\MOD9="0,1,0" STATE94\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE95\NAME=STATE095 -STATE95\MOD1=",1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1" +STATE95\MOD1=",1,1,,1,1,,1,1,10,0,0,,1,1,0,0,0,0,0,0,,1,1,10,0,0,,1,1,,1,1,,1,1" STATE95\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE95\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE95\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1897,7 +1899,7 @@ STATE95\CONTROL="0,3F" STATE95\MOD9="0,1,0" STATE95\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE96\NAME=STATE096 -STATE96\MOD1="0,0,0,,1,1,,1,1,,1,1,10,0,0,,1,1,,1,1,10,0,0,,1,1,,1,1,,1,1,0,0,0" +STATE96\MOD1=",1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1" STATE96\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE96\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE96\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1906,7 +1908,7 @@ STATE96\CONTROL="0,3F" STATE96\MOD9="0,1,0" STATE96\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE97\NAME=STATE097 -STATE97\MOD1=",1,1,,1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1,,1,1" +STATE97\MOD1="0,0,0,,1,1,,1,1,,1,1,10,0,0,,1,1,,1,1,10,0,0,,1,1,,1,1,,1,1,0,0,0" STATE97\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE97\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE97\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1915,7 +1917,7 @@ STATE97\CONTROL="0,3F" STATE97\MOD9="0,1,0" STATE97\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE98\NAME=STATE098 -STATE98\MOD1="10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0" +STATE98\MOD1=",1,1,,1,1,10,0,0,,1,1,0,0,0,,1,1,,1,1,0,0,0,,1,1,10,0,0,,1,1,,1,1" STATE98\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE98\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE98\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" @@ -1924,28 +1926,28 @@ STATE98\CONTROL="0,3F" STATE98\MOD9="0,1,0" STATE98\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE99\NAME=STATE099 -STATE99\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE99\MOD1="10,0,0,,1,1,0,0,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,0,0,0,,1,1,10,0,0" STATE99\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE99\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE99\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE99\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE99\MOD4="0,1,0,0,1,0" -STATE99\CONTROL="8,37" +STATE99\CONTROL="0,3F" STATE99\MOD9="0,1,0" STATE99\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE100\NAME=STATE100 STATE100\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE100\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE100\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE100\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE100\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE100\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE100\MOD4="0,1,0,0,1,0" -STATE100\CONTROL="0,3F" +STATE100\CONTROL="8,37" STATE100\MOD9="0,1,0" STATE100\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE101\NAME=STATE101 STATE101\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE101\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE101\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE101\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE101\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE101\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE101\MOD4="0,1,0,0,1,0" STATE101\CONTROL="0,3F" STATE101\MOD9="0,1,0" @@ -1953,26 +1955,26 @@ STATE101\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE102\NAME=STATE102 STATE102\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE102\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE102\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE102\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE102\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE102\MOD4="0,1,0,0,1,0" -STATE102\CONTROL="8,37" +STATE102\CONTROL="0,3F" STATE102\MOD9="0,1,0" STATE102\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE103\NAME=STATE103 STATE103\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE103\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE103\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE103\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE103\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE103\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE103\MOD4="0,1,0,0,1,0" -STATE103\CONTROL="0,3F" +STATE103\CONTROL="8,37" STATE103\MOD9="0,1,0" STATE103\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE104\NAME=STATE104 STATE104\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE104\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE104\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE104\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE104\MOD3=",1,1,11,1,0,,1,1,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE104\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE104\MOD4="0,1,0,0,1,0" STATE104\CONTROL="0,3F" STATE104\MOD9="0,1,0" @@ -1980,8 +1982,8 @@ STATE104\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE105\NAME=STATE105 STATE105\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE105\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE105\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE105\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE105\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE105\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE105\MOD4="0,1,0,0,1,0" STATE105\CONTROL="0,3F" STATE105\MOD9="0,1,0" @@ -1989,8 +1991,8 @@ STATE105\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE106\NAME=STATE106 STATE106\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE106\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE106\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE106\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE106\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE106\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE106\MOD4="0,1,0,0,1,0" STATE106\CONTROL="0,3F" STATE106\MOD9="0,1,0" @@ -1998,7 +2000,7 @@ STATE106\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE107\NAME=STATE107 STATE107\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE107\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE107\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE107\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE107\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE107\MOD4="0,1,0,0,1,0" STATE107\CONTROL="0,3F" @@ -2007,8 +2009,8 @@ STATE107\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE108\NAME=STATE108 STATE108\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE108\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE108\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE108\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE108\MOD3=",1,1,11,1,0,,1,1,1,1,0,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE108\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE108\MOD4="0,1,0,0,1,0" STATE108\CONTROL="0,3F" STATE108\MOD9="0,1,0" @@ -2016,8 +2018,8 @@ STATE108\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE109\NAME=STATE109 STATE109\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE109\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE109\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE109\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE109\MOD3=",1,1,,1,1,1,1,0,11,1,0,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE109\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE109\MOD4="0,1,0,0,1,0" STATE109\CONTROL="0,3F" STATE109\MOD9="0,1,0" @@ -2025,10 +2027,10 @@ STATE109\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE110\NAME=STATE110 STATE110\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE110\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE110\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE110\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE110\MOD3=",1,1,1,1,0,11,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE110\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE110\MOD4="0,1,0,0,1,0" -STATE110\CONTROL="8,37" +STATE110\CONTROL="0,3F" STATE110\MOD9="0,1,0" STATE110\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE111\NAME=STATE111 @@ -2037,23 +2039,23 @@ STATE111\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE111\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE111\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE111\MOD4="0,1,0,0,1,0" -STATE111\CONTROL="0,31" +STATE111\CONTROL="8,37" STATE111\MOD9="0,1,0" STATE111\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE112\NAME=STATE112 STATE112\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE112\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE112\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE112\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE112\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE112\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE112\MOD4="0,1,0,0,1,0" -STATE112\CONTROL="0,3F" +STATE112\CONTROL="0,31" STATE112\MOD9="0,1,0" STATE112\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE113\NAME=STATE113 STATE113\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE113\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE113\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE113\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE113\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE113\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE113\MOD4="0,1,0,0,1,0" STATE113\CONTROL="0,3F" STATE113\MOD9="0,1,0" @@ -2061,8 +2063,8 @@ STATE113\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE114\NAME=STATE114 STATE114\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE114\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE114\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE114\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE114\MOD3=",1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE114\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE114\MOD4="0,1,0,0,1,0" STATE114\CONTROL="0,3F" STATE114\MOD9="0,1,0" @@ -2070,8 +2072,8 @@ STATE114\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE115\NAME=STATE115 STATE115\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE115\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE115\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE115\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE115\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE115\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE115\MOD4="0,1,0,0,1,0" STATE115\CONTROL="0,3F" STATE115\MOD9="0,1,0" @@ -2079,8 +2081,8 @@ STATE115\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE116\NAME=STATE116 STATE116\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE116\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE116\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE116\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE116\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE116\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE116\MOD4="0,1,0,0,1,0" STATE116\CONTROL="0,3F" STATE116\MOD9="0,1,0" @@ -2088,7 +2090,7 @@ STATE116\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE117\NAME=STATE117 STATE117\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE117\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE117\MOD3=",1,1,11.5,1,0,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE117\MOD3=",1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE117\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE117\MOD4="0,1,0,0,1,0" STATE117\CONTROL="0,3F" @@ -2097,7 +2099,7 @@ STATE117\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE118\NAME=STATE118 STATE118\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE118\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE118\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE118\MOD3=",1,1,11.5,1,0,,1,1,,1,1,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE118\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE118\MOD4="0,1,0,0,1,0" STATE118\CONTROL="0,3F" @@ -2106,7 +2108,7 @@ STATE118\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE119\NAME=STATE119 STATE119\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE119\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE119\MOD3=",1,1,,1,1,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE119\MOD3=",1,1,1,1,0,,1,1,,1,1,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE119\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE119\MOD4="0,1,0,0,1,0" STATE119\CONTROL="0,3F" @@ -2115,7 +2117,7 @@ STATE119\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE120\NAME=STATE120 STATE120\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE120\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE120\MOD3=",1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE120\MOD3=",1,1,,1,1,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE120\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE120\MOD4="0,1,0,0,1,0" STATE120\CONTROL="0,3F" @@ -2124,7 +2126,7 @@ STATE120\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE121\NAME=STATE121 STATE121\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE121\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE121\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE121\MOD3=",1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE121\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE121\MOD4="0,1,0,0,1,0" STATE121\CONTROL="0,3F" @@ -2133,7 +2135,7 @@ STATE121\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE122\NAME=STATE122 STATE122\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE122\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE122\MOD3=",1,1,11.5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE122\MOD3=",1,1,,1,1,,1,1,,1,1,1,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE122\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE122\MOD4="0,1,0,0,1,0" STATE122\CONTROL="0,3F" @@ -2142,7 +2144,7 @@ STATE122\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE123\NAME=STATE123 STATE123\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE123\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE123\MOD3=",1,1,1,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE123\MOD3=",1,1,11.5,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE123\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE123\MOD4="0,1,0,0,1,0" STATE123\CONTROL="0,3F" @@ -2151,8 +2153,8 @@ STATE123\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE124\NAME=STATE124 STATE124\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE124\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE124\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE124\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE124\MOD3=",1,1,1,1,0,,1,1,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE124\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE124\MOD4="0,1,0,0,1,0" STATE124\CONTROL="0,3F" STATE124\MOD9="0,1,0" @@ -2160,8 +2162,8 @@ STATE124\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE125\NAME=STATE125 STATE125\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE125\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE125\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE125\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE125\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE125\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE125\MOD4="0,1,0,0,1,0" STATE125\CONTROL="0,3F" STATE125\MOD9="0,1,0" @@ -2169,8 +2171,8 @@ STATE125\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE126\NAME=STATE126 STATE126\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE126\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE126\MOD3=",1,1,11,1,0,,1,1,,1,1,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE126\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE126\MOD3=",1,1,1,1,0,,1,1,,1,1,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE126\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE126\MOD4="0,1,0,0,1,0" STATE126\CONTROL="0,3F" STATE126\MOD9="0,1,0" @@ -2178,8 +2180,8 @@ STATE126\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE127\NAME=STATE127 STATE127\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE127\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE127\MOD3=",1,1,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE127\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE127\MOD3=",1,1,11,1,0,,1,1,,1,1,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE127\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE127\MOD4="0,1,0,0,1,0" STATE127\CONTROL="0,3F" STATE127\MOD9="0,1,0" @@ -2187,8 +2189,8 @@ STATE127\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE128\NAME=STATE128 STATE128\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE128\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE128\MOD3=",1,1,11,1,0,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE128\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" +STATE128\MOD3=",1,1,1,1,0,11,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE128\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE128\MOD4="0,1,0,0,1,0" STATE128\CONTROL="0,3F" STATE128\MOD9="0,1,0" @@ -2196,26 +2198,26 @@ STATE128\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE129\NAME=STATE129 STATE129\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE129\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE129\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" -STATE129\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE129\MOD3=",1,1,11,1,0,11,1,0,11,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE129\MOD12="1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,1,1,1,1,1,1,1" STATE129\MOD4="0,1,0,0,1,0" -STATE129\CONTROL="8,37" +STATE129\CONTROL="0,3F" STATE129\MOD9="0,1,0" STATE129\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE130\NAME=STATE130 STATE130\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE130\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE130\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE130\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE130\MOD3="10.5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,10.5,1,0,,1,1" +STATE130\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE130\MOD4="0,1,0,0,1,0" -STATE130\CONTROL="0,3F" +STATE130\CONTROL="8,37" STATE130\MOD9="0,1,0" STATE130\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE131\NAME=STATE131 STATE131\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE131\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE131\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE131\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE131\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE131\MOD4="0,1,0,0,1,0" STATE131\CONTROL="0,3F" STATE131\MOD9="0,1,0" @@ -2224,42 +2226,42 @@ STATE132\NAME=STATE132 STATE132\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE132\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE132\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE132\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE132\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE132\MOD4="0,1,0,0,1,0" -STATE132\CONTROL="4,3B" +STATE132\CONTROL="0,3F" STATE132\MOD9="0,1,0" STATE132\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE133\NAME=STATE133 -STATE133\MOD1="0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0" +STATE133\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE133\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE133\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE133\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" +STATE133\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE133\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE133\MOD4="0,1,0,0,1,0" -STATE133\CONTROL="2,3D" +STATE133\CONTROL="4,3B" STATE133\MOD9="0,1,0" STATE133\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE134\NAME=STATE134 -STATE134\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE134\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,12,1,0,-2,1,0,,1,1,,1,1,,1,1" -STATE134\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1" -STATE134\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE134\MOD1="0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0,0,1,0" +STATE134\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE134\MOD3=",1,1,1,1,0,1,1,0,1,1,0,1,1,0,1,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE134\MOD12="1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1" STATE134\MOD4="0,1,0,0,1,0" -STATE134\CONTROL="4,3B" +STATE134\CONTROL="2,3D" STATE134\MOD9="0,1,0" STATE134\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE135\NAME=STATE135 STATE135\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE135\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE135\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,7.5,1,0,7.5,1,0,,1,1,,1,1,,1,1,,1,1" +STATE135\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,12,1,0,-2,1,0,,1,1,,1,1,,1,1" +STATE135\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1" STATE135\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE135\MOD4="0,1,0,0,1,0" -STATE135\CONTROL="0,3F" +STATE135\CONTROL="4,3B" STATE135\MOD9="0,1,0" STATE135\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE136\NAME=STATE136 STATE136\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE136\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE136\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1" +STATE136\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,7.5,1,0,7.5,1,0,,1,1,,1,1,,1,1,,1,1" STATE136\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE136\MOD4="0,1,0,0,1,0" STATE136\CONTROL="0,3F" @@ -2268,7 +2270,7 @@ STATE136\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE137\NAME=STATE137 STATE137\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE137\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE137\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,7,1,0,,1,1,,1,1" +STATE137\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-6,1,0,,1,1,,1,1,,1,1" STATE137\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE137\MOD4="0,1,0,0,1,0" STATE137\CONTROL="0,3F" @@ -2277,7 +2279,7 @@ STATE137\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE138\NAME=STATE138 STATE138\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE138\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE138\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,,1,1" +STATE138\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,7,1,0,,1,1,,1,1" STATE138\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE138\MOD4="0,1,0,0,1,0" STATE138\CONTROL="0,3F" @@ -2285,8 +2287,8 @@ STATE138\MOD9="0,1,0" STATE138\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE139\NAME=STATE139 STATE139\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE139\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1,,1,1" -STATE139\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,7,1,0,,1,1,,1,1,,1,1" +STATE139\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE139\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,,1,1" STATE139\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE139\MOD4="0,1,0,0,1,0" STATE139\CONTROL="0,3F" @@ -2294,25 +2296,25 @@ STATE139\MOD9="0,1,0" STATE139\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE140\NAME=STATE140 STATE140\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE140\MOD2=",1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,12,1,0,,1,1,8,1,0,,1,1,,1,1" -STATE140\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE140\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,,1,1,,1,1,,1,1,,1,1" +STATE140\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,7,1,0,,1,1,,1,1,,1,1" STATE140\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE140\MOD4="0,1,0,0,1,0" -STATE140\CONTROL="0,31" +STATE140\CONTROL="0,3F" STATE140\MOD9="0,1,0" STATE140\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE141\NAME=STATE141 STATE141\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE141\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE141\MOD2=",1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,12,1,0,,1,1,8,1,0,,1,1,,1,1" STATE141\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE141\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE141\MOD4="0,1,0,0,1,0" -STATE141\CONTROL="0,3F" +STATE141\CONTROL="0,31" STATE141\MOD9="0,1,0" STATE141\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE142\NAME=STATE142 STATE142\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE142\MOD2=",1,1,,1,1,8,1,0,8,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE142\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE142\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE142\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE142\MOD4="0,1,0,0,1,0" @@ -2321,7 +2323,7 @@ STATE142\MOD9="0,1,0" STATE142\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE143\NAME=STATE143 STATE143\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE143\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,6,1,0,,1,1,,1,1,,1,1" +STATE143\MOD2=",1,1,,1,1,8,1,0,8,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE143\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE143\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE143\MOD4="0,1,0,0,1,0" @@ -2330,7 +2332,7 @@ STATE143\MOD9="0,1,0" STATE143\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE144\NAME=STATE144 STATE144\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE144\MOD2=",1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1" +STATE144\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,2,1,0,6,1,0,,1,1,,1,1,,1,1" STATE144\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE144\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE144\MOD4="0,1,0,0,1,0" @@ -2339,7 +2341,7 @@ STATE144\MOD9="0,1,0" STATE144\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE145\NAME=STATE145 STATE145\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE145\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE145\MOD2=",1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1,,1,1,,1,1,-5,1,0,,1,1,,1,1" STATE145\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE145\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE145\MOD4="0,1,0,0,1,0" @@ -2348,7 +2350,7 @@ STATE145\MOD9="0,1,0" STATE145\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE146\NAME=STATE146 STATE146\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE146\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE146\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE146\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE146\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE146\MOD4="0,1,0,0,1,0" @@ -2357,7 +2359,7 @@ STATE146\MOD9="0,1,0" STATE146\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE147\NAME=STATE147 STATE147\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE147\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-2,1,0,,1,1,,1,1,,1,1" +STATE147\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE147\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE147\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE147\MOD4="0,1,0,0,1,0" @@ -2366,7 +2368,7 @@ STATE147\MOD9="0,1,0" STATE147\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE148\NAME=STATE148 STATE148\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE148\MOD2=",1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,12,1,0,,1,1,8,1,0,,1,1,,1,1" +STATE148\MOD2=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,-2,1,0,,1,1,,1,1,,1,1" STATE148\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE148\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE148\MOD4="0,1,0,0,1,0" @@ -2375,7 +2377,7 @@ STATE148\MOD9="0,1,0" STATE148\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE149\NAME=STATE149 STATE149\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE149\MOD2=",1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,,1,1,6,1,0,8,1,0,,1,1,,1,1" +STATE149\MOD2=",1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,12,1,0,,1,1,8,1,0,,1,1,,1,1" STATE149\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE149\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE149\MOD4="0,1,0,0,1,0" @@ -2384,14 +2386,23 @@ STATE149\MOD9="0,1,0" STATE149\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" STATE150\NAME=STATE150 STATE150\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" -STATE150\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,2,1,0,-2,1,0,,1,1,,1,1,,1,1" +STATE150\MOD2=",1,1,,1,1,,1,1,,1,1,8,1,0,,1,1,,1,1,,1,1,6,1,0,8,1,0,,1,1,,1,1" STATE150\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" STATE150\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" STATE150\MOD4="0,1,0,0,1,0" STATE150\CONTROL="0,3F" STATE150\MOD9="0,1,0" STATE150\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" -STATES=151 +STATE151\NAME=STATE151 +STATE151\MOD1=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE151\MOD2=",1,1,,1,1,-5,1,0,-5,1,0,,1,1,,1,1,,1,1,2,1,0,-2,1,0,,1,1,,1,1,,1,1" +STATE151\MOD3=",1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1,,1,1" +STATE151\MOD12="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1" +STATE151\MOD4="0,1,0,0,1,0" +STATE151\CONTROL="0,3F" +STATE151\MOD9="0,1,0" +STATE151\MOD10="1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0" +STATES=152 [SYSTEM] BACKPLANE_ID=0000000000000000 BACKPLANE_REV=0 diff --git a/src/deimos/deimos.def b/src/deimos/deimos.def index 4425bc3..cd48c54 100644 --- a/src/deimos/deimos.def +++ b/src/deimos/deimos.def @@ -67,7 +67,7 @@ #define _PARALLELOVERSCAN 20 #define _AMPREADCOLS #eval (_AMPCOLS + _SERIALPRESCAN + _SERIALOVERSCAN) -#define _LINENUM #eval (_IMAGEROWS + _PARALLELOVERSCAN) + 1 +#define _LINENUM #eval (_IMAGEROWS + _PARALLELOVERSCAN) diff --git a/src/deimos/deimos.seq b/src/deimos/deimos.seq index e00260b..6f7b03a 100644 --- a/src/deimos/deimos.seq +++ b/src/deimos/deimos.seq @@ -105,7 +105,7 @@ param enable_ser_bin = 0 const fcs_rg_low = _RG_LOW_FCS const fcs_rg_high = _RG_HIGH_FCS - // const fcs_sw_low = _SW_LOW_FCS + const fcs_sw_low = _SW_LOW_FCS const fcs_sw_high = _SW_HIGH_FCS //TODO: wide gate integration mode @@ -370,7 +370,7 @@ SEQUENCE EvacuateF SEQUENCE Integrate { - KeepThisFrame(); + //KeepThisFrame(); //NOTE: do ONE line of readout now, //to get the buffer locked //so we can see it's moving from outside diff --git a/src/deimos/deimos.waveform b/src/deimos/deimos.waveform index 4384d0e..571770e 100644 --- a/src/deimos/deimos.waveform +++ b/src/deimos/deimos.waveform @@ -54,6 +54,12 @@ WAVEFORM SerialRecieving { /* ARCHON Timing Control */ /*****************************************/ +WAVEFORM testConst { + 0: SET RG_CLOCKS TO sci_llel_high, FAST; + .+1us: RETURN; + +} + WAVEFORM Wait1us { @@ -200,7 +206,6 @@ WAVEFORM TransferToSerialRegisterCoincident WAVEFORM ParallelForwardNoCoincident { 0: SET NOP TO HIGH; - .+1200:=PHASE3_HIGH SET SCI_PCLK3 TO _PAR_CLOCK_HIGH, FAST; SET TG TO _TG_CLOCK_HIGH, FAST; @@ -208,8 +213,16 @@ WAVEFORM ParallelForwardNoCoincident SET SW TO INV_LOW; SET SW_CLOCKS TO _SW_LOW, FAST; SET LINE TO HIGH; + + SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; + SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; + SET RG to INV_HIGH; + SET RG_CLOCKS TO _RG_HIGH, FAST; + + - .+1200: SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; + .+1200:=PHASE3_HIGH SET SCI_PCLK2 TO _PAR_CLOCK_LOW, FAST; .+1200: SET SCI_PCLK1 TO _PAR_CLOCK_HIGH, FAST; .+1200:=TG_GOES_LOW SET SCI_PCLK3 TO _PAR_CLOCK_LOW, FAST; SET TG TO _TG_CLOCK_LOW, FAST; @@ -222,11 +235,6 @@ WAVEFORM ParallelForwardNoCoincident //serial receive side - PHASE3_HIGH: SET SCI_SCLK1 TO _SER_CLOCK_RCV, FAST; - SET SCI_SCLK2 TO _SER_CLOCK_RCV, FAST; - SET SCI_SCLK3 TO _SER_CLOCK_LOW, FAST; - SET RG to INV_HIGH; - SET RG_CLOCKS TO _RG_HIGH, FAST; TG_GOES_LOW+200:=RG_GOES_LOW SET RG TO INV_LOW; From 3e09a21f866499187c5360621fe5d29deff08652 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 23 Mar 2026 17:42:10 -0700 Subject: [PATCH 193/194] tune SCI2 offset to normalise all detectors --- src/deimos/deimos.acf | 2 +- src/deimos/deimos.mod | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/deimos/deimos.acf b/src/deimos/deimos.acf index 7925d07..0ee24db 100644 --- a/src/deimos/deimos.acf +++ b/src/deimos/deimos.acf @@ -928,7 +928,7 @@ MOD10\LVLC_LABEL22=Video offset FCS MOD10\LVLC_V23=0.5 MOD10\LVLC_ORDER23=6 MOD10\LVLC_LABEL23=Video offset SCI -MOD10\LVLC_V24=0.5 +MOD10\LVLC_V24=0.46 MOD10\LVLC_ORDER24=6 MOD10\LVLC_LABEL24=Video offset SCI2 MOD10\LVHC_ENABLE1=1 diff --git a/src/deimos/deimos.mod b/src/deimos/deimos.mod index c0bc3df..1412c3d 100644 --- a/src/deimos/deimos.mod +++ b/src/deimos/deimos.mod @@ -145,7 +145,7 @@ SLOT 10 lvxbias { LVLC 21 [00.0,0]; LVLC 22 [0.2,6] "Video offset FCS"; LVLC 23 [0.50,6] "Video offset SCI"; - LVLC 24 [0.50,6] "Video offset SCI2"; + LVLC 24 [0.46,6] "Video offset SCI2"; LVHC 1 [2.00,20.0,5,1] "SCI Summing Well - Low"; LVHC 2 [11.00,20.0,5,1] "SCI Summing Well - High"; LVHC 3 [12.0,20.0,5,1] "SCI Reset Gate - High"; From 19d13853ee20c7da0c76db3729ffeccb7f151431 Mon Sep 17 00:00:00 2001 From: Dan Weatherill Date: Mon, 27 Apr 2026 16:18:56 -0700 Subject: [PATCH 194/194] forgot to change number of taplines in FCS alt mode --- src/deimos/deimos.modes | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/deimos/deimos.modes b/src/deimos/deimos.modes index 05bb6b0..c42b6a6 100644 --- a/src/deimos/deimos.modes +++ b/src/deimos/deimos.modes @@ -13,6 +13,7 @@ ARCH:HORI_AMPS=1 ARCH:VERT_AMPS=1 ACF:TAPLINE0="AM45L,1,100" ACF:TAPLINE1="AM46R,1,100" +ACF:TAPLINES=2 ACF:LINECOUNT=4116 ACF:PIXELCOUNT=1069 ACF:FRAMEMODE=0 @@ -23,4 +24,4 @@ ARCH:HORI_AMPS=2 ARCH:VERT_AMPS=1 ACF:LINECOUNT=4124 ACF:PIXELCOUNT=1094 -ACF:FRAMEMODE=0 \ No newline at end of file +ACF:FRAMEMODE=0