Commit d0bd991
Add Stanford Research SR830 lock-in amplifier driver
Problem: The lab's SR830 DSP lock-in amplifier, reached over a Prologix GPIB-USB
adaptor, had no driver in PyHardwareLibrary.
Solution: Add SR830Device (and DebugSR830Device) combining PhysicalDevice,
AnalogInputStreamDevice, AnalogOutputDevice, PhaseLockedDetectionDevice, and
TriggerableDevice:
- Aux A/D inputs (OAUX?) via getAnalogVoltage(AuxInput); Aux D/A outputs (AUXV)
via setAnalogVoltage(value, AuxOutput).
- Demodulated reads X/Y/R/theta (OUTP?/SNAP?), reference frequency (FREQ?), input
source (ISRC), sensitivity (SENS) and time constant (OFLT) in physical units
with nearest-step snapping.
- Buffered acquisition of the internal data buffer (DDEF/SRAT/SEND/REST/STRT/
PAUS/SPTS?/TRCA?) via the AnalogInputStreamDevice primitives, with a
StreamChannel enum and a SampleClock (internal rate vs external per-edge).
- Trigger via TSTR (setTriggerSource) and TRIG (softwareTrigger).
- doInitializeDevice self-discovers the Prologix among the connected FTDI adaptors
by confirming *IDN? contains SR830, and pins the adaptor serial for reconnects.
- DebugSR830Device swaps in a DebugPrologixGPIBPort (an in-memory CommunicationPort
that follows the readData/writeData structure) so all parse/validate paths run
without hardware.
Verified against the lab SR830 (s/n 86552): tests/testSR830.py has 43 tests,
including 8 that talk to the real instrument (reads, aux out round-trip, buffered
acquisition, trigger) and skip cleanly when no SR830 is attached.
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01T2DmAfLHSiK1fb3PiXDyJP1 parent 1fa3e13 commit d0bd991
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