diff --git a/videos/introduction_video/PACKAGE_SUMMARY.md b/videos/introduction_video/PACKAGE_SUMMARY.md new file mode 100644 index 0000000..e262301 --- /dev/null +++ b/videos/introduction_video/PACKAGE_SUMMARY.md @@ -0,0 +1,171 @@ +# LLM4Hardware Introduction Video - Complete Package + +## 🎬 Video Creation Summary + +This package contains everything needed to create a professional 3-minute introduction video for the LLM4Hardware project. The video is designed to: + +- Introduce the overall research initiative +- Showcase 12 research components +- Highlight key innovations and impact +- Serve as an engaging opener before detailed sub-module presentations + +## πŸ“ Package Contents + +### Core Materials +- `video_script.md` - Complete narration script with timing (4.4KB) +- `slide_content.md` - Detailed slide descriptions and design guidelines (3.7KB) +- `production_guide.md` - Step-by-step production instructions (6.0KB) +- `slides.html` - Interactive HTML presentation (12.1KB) + +### Generated Assets +- `generated_assets/component_matrix.png` - Visual overview of all 12 components +- `generated_assets/design_flow.png` - AI-enhanced design workflow diagram +- `generated_assets/impact_metrics.png` - Performance improvement visualizations +- `generated_assets/comparison_chart.png` - Traditional vs LLM approach comparison + +### Audio Materials +- `full_narration.txt` - Complete script text for voice recording +- `audio_segments/` - Section-by-section narration files (6 files) +- `timing_guide.md` - Audio-visual synchronization guide + +### Tools & Scripts +- `generate_assets.py` - Python script to create visual assets +- `tts_generator.py` - Text-to-speech generator (optional) + +## πŸš€ Quick Start Options + +### Option A: Use HTML Slides + Screen Recording (Fastest) +1. Open `slides.html` in full-screen browser +2. Record screen while reading from `full_narration.txt` +3. Edit timing and add background music +4. **Time required:** 2-3 hours + +### Option B: Professional Video Production +1. Follow `production_guide.md` instructions +2. Use generated visual assets as base materials +3. Record professional narration from script +4. **Time required:** 4-6 days + +### Option C: Semi-Automated with TTS +1. Install pyttsx3: `pip install pyttsx3` +2. Run `python tts_generator.py` for auto-narration +3. Use generated assets and timing guide +4. **Time required:** 1-2 days + +## πŸ“Š Video Specifications + +- **Duration:** 3 minutes (180 seconds) +- **Resolution:** 1920x1080 (Full HD) minimum +- **Format:** MP4 (H.264 codec) +- **Style:** Professional tech presentation +- **Tone:** Engaging, informative, accessible + +## 🎨 Visual Design System + +### Colors +- Primary: Deep Blue (#1E3A8A) +- Secondary: Electric Green (#10B981) +- Accent: Orange (#F59E0B) +- Background: Dark Gray (#111827) + +### Typography +- Headers: Bold sans-serif +- Body: Clean, readable sans-serif +- Technical: Monospace for code + +## πŸ“‹ Content Structure + +1. **Opening (0-15s):** Project introduction and welcome +2. **Main Intro (15-45s):** AI transformation in chip design +3. **Components (45-90s):** Overview of 12 research modules +4. **Innovation (90-120s):** Key advantages and improvements +5. **Impact (120-150s):** Measurable results and benefits +6. **Closing (150-180s):** Call to action and resources + +## βœ… Quality Checklist + +### Pre-Production +- [ ] All materials reviewed and approved +- [ ] Equipment tested (microphone, software) +- [ ] Recording environment optimized +- [ ] Script practiced and timed + +### Production +- [ ] Visual assets properly sized and formatted +- [ ] Audio levels consistent throughout +- [ ] Timing synchronized with script +- [ ] Smooth transitions between sections + +### Post-Production +- [ ] Video quality meets specifications +- [ ] Audio sync verified +- [ ] Text readable at intended viewing size +- [ ] File optimized for target platform + +## 🎯 Success Metrics + +A successful introduction video should: +- Clearly communicate project scope and vision +- Generate interest in exploring sub-modules +- Maintain viewer engagement throughout +- Professional quality suitable for conferences/presentations +- Accessible to both technical and non-technical audiences + +## πŸ”§ Technical Requirements + +### Minimum Software +- Video editor (free options: DaVinci Resolve, OpenShot) +- Audio editor (free: Audacity) +- Web browser (for HTML slides) +- Python 3.x (for asset generation) + +### Optional Enhancements +- Professional video editing software +- Quality microphone and audio interface +- Stock video/image subscriptions +- Text-to-speech software + +## πŸ“ž Support & Resources + +### Project Links +- **Repository:** https://github.com/FCHXWH823/LLM4Hardware +- **Poster:** `/Poster/LLM4ChipDesign_v2.pdf` +- **Documentation:** `/README.md` + +### Additional Resources +- Existing videos in `/videos/` for style reference +- Conference slides in `/slides/` for content ideas +- Research papers linked in main README + +## πŸ”„ Future Updates + +This video package is designed to be: +- **Modular:** Easy to update individual sections +- **Reusable:** Templates can be adapted for other content +- **Scalable:** Additional assets can be generated as needed +- **Maintainable:** Clear documentation for future updates + +## πŸ“ˆ Expected Impact + +The introduction video will: +- Increase project visibility and adoption +- Improve accessibility for new users +- Provide professional presentation material +- Support conference and academic presentations +- Enhance community engagement + +--- + +**Total Package Size:** ~30MB +**Estimated Production Time:** 1-6 days (depending on approach) +**Skill Level Required:** Beginner to intermediate (with provided guides) + +## Next Steps + +1. Choose your preferred production approach (A, B, or C above) +2. Review the relevant guide files +3. Gather any additional resources needed +4. Begin production following the provided timeline +5. Test and refine based on your specific requirements + +**Ready to create your introduction video? Start with the `production_guide.md` for detailed instructions!** \ No newline at end of file diff --git a/videos/introduction_video/README.md b/videos/introduction_video/README.md new file mode 100644 index 0000000..44d317b --- /dev/null +++ b/videos/introduction_video/README.md @@ -0,0 +1,163 @@ +# LLM4Hardware Introduction Video Materials + +This directory contains all the materials needed to create a professional introduction video for the LLM4Hardware project. + +## πŸ“ Directory Contents + +- `video_script.md` - Complete narration script with timing and visual cues +- `slide_content.md` - Detailed slide descriptions and content guidelines +- `production_guide.md` - Step-by-step video production instructions +- `slides.html` - Interactive HTML slide deck for preview and screen recording +- `README.md` - This file + +## 🎯 Project Overview + +The LLM4Hardware introduction video serves as: +- An engaging overview of the entire research initiative +- A professional introduction before diving into specific sub-modules +- A showcase of the project's scope and impact +- A call-to-action for the open-source community + +## πŸš€ Quick Start + +### Option 1: Use Pre-built HTML Slides +1. Open `slides.html` in a web browser +2. Use arrow keys or buttons to navigate slides +3. Press F11 or click "Fullscreen" for presentation mode +4. Record screen while narrating from the script + +### Option 2: Custom Video Production +1. Read through `production_guide.md` for detailed instructions +2. Use `slide_content.md` to create custom slides in your preferred tool +3. Record narration using `video_script.md` +4. Follow the production timeline and quality guidelines + +## πŸ“‹ Video Specifications + +- **Duration:** 2-3 minutes +- **Resolution:** 1920x1080 (Full HD) minimum, 4K preferred +- **Format:** MP4 (H.264 codec) +- **Audio:** 48kHz, 24-bit, stereo +- **Style:** Professional, modern, tech-forward + +## 🎨 Visual Style Guide + +### Color Palette +- **Primary:** Deep Blue (#1E3A8A) +- **Secondary:** Electric Green (#10B981) +- **Accent:** Orange (#F59E0B) +- **Background:** Dark Gray (#111827) +- **Text:** White (#FFFFFF) + +### Design Elements +- Circuit board patterns and traces +- Neural network visualizations +- Clean, modern typography +- Smooth animations and transitions +- High-contrast, readable text + +## 🎡 Audio Guidelines + +### Narration +- Professional, clear delivery +- Confident and engaging tone +- Paced to allow visual comprehension +- Record in quiet environment with quality microphone + +### Background Music +- Subtle ambient/tech style +- Should complement, not compete with narration +- Maintain at 20-30% volume relative to voice +- Consider royalty-free options from: + - YouTube Audio Library + - Freesound.org + - Zapsplat + - Adobe Stock Audio + +## πŸ“Š Content Structure + +### Section Breakdown: +1. **Opening (0-15s):** Project title and welcome +2. **Introduction (15-45s):** AI transformation in chip design +3. **Components (45-90s):** 12 research modules overview +4. **Innovation (90-120s):** Key advantages and improvements +5. **Impact (120-150s):** Measurable results and benefits +6. **Closing (150-180s):** Call to action and resources + +## πŸ› οΈ Technical Requirements + +### Software Options: +- **Free:** DaVinci Resolve, OpenShot, Shotcut +- **Paid:** Adobe Premiere Pro, Final Cut Pro, Camtasia +- **Web-based:** Canva, Animoto, Loom + +### Hardware Minimum: +- Computer with 8GB+ RAM +- Decent microphone (USB or XLR) +- Quiet recording environment +- Optional: Graphics tablet for custom illustrations + +## πŸ“ˆ Production Timeline + +- **Planning:** 0.5 days +- **Asset Creation:** 1-2 days +- **Recording:** 0.5-1 day +- **Editing:** 1-2 days +- **Review & Revisions:** 0.5-1 day +- **Total:** 3.5-6.5 days + +## βœ… Quality Checklist + +### Before Recording: +- [ ] Script reviewed and practiced +- [ ] Visual materials prepared +- [ ] Recording environment optimized +- [ ] Equipment tested and ready + +### During Production: +- [ ] Audio levels monitored +- [ ] Visual timing synchronized +- [ ] Consistent style maintained +- [ ] Regular backup saves + +### Before Publishing: +- [ ] Full video review completed +- [ ] Audio/video sync verified +- [ ] Color and contrast checked +- [ ] File format optimized for intended use + +## πŸ”— Related Resources + +### Project Links: +- **Main Repository:** https://github.com/FCHXWH823/LLM4Hardware +- **Poster Reference:** `/Poster/LLM4ChipDesign_v2.pdf` +- **Existing Videos:** `/videos/` directory +- **Project Documentation:** `/README.md` + +### External Resources: +- **ArXiv Papers:** Search "LLM hardware design" for related publications +- **Conference Slides:** Available in `/slides/` directory +- **Tutorial Videos:** Check `/videos/` for existing examples + +## 🀝 Contributing + +If you create the video using these materials: +1. Add the final video file to `/videos/introduction_video/` +2. Update this README with production notes +3. Consider sharing production assets for future updates +4. Document any improvements to the process + +## πŸ“ž Support + +For questions or assistance: +- **GitHub Issues:** Submit questions via repository issues +- **Documentation:** Check README.md for project overview +- **Community:** Engage with other contributors in discussions + +## πŸ“„ License + +These materials are provided under the same license as the LLM4Hardware project. Please respect copyright for any third-party assets used in production. + +--- + +**Note:** This introduction video is designed to be used before presenting individual sub-modules. Consider creating smooth transitions to your three main sub-module presentations for a cohesive viewing experience. \ No newline at end of file diff --git a/videos/introduction_video/audio_segments/closing_150to180sec.txt b/videos/introduction_video/audio_segments/closing_150to180sec.txt new file mode 100644 index 0000000..0e475f8 --- /dev/null +++ b/videos/introduction_video/audio_segments/closing_150to180sec.txt @@ -0,0 +1,3 @@ +# Closing (150-180s) + +Join us as we explore these groundbreaking technologies that are shaping the future of chip design. Each module in our comprehensive suite offers unique capabilities, from automated code generation to sophisticated verification frameworks. Welcome to the future of AI-driven hardware design. \ No newline at end of file diff --git a/videos/introduction_video/audio_segments/impact_120to150sec.txt b/videos/introduction_video/audio_segments/impact_120to150sec.txt new file mode 100644 index 0000000..484a4ef --- /dev/null +++ b/videos/introduction_video/audio_segments/impact_120to150sec.txt @@ -0,0 +1,3 @@ +# Impact (120-150s) + +Our research demonstrates significant improvements in design productivity, error reduction, and accessibility for both novice and expert designers. By leveraging the power of Large Language Models, we're democratizing chip design while maintaining the rigor and precision that modern semiconductor applications demand. \ No newline at end of file diff --git a/videos/introduction_video/audio_segments/innovation_90to120sec.txt b/videos/introduction_video/audio_segments/innovation_90to120sec.txt new file mode 100644 index 0000000..d0bf5cc --- /dev/null +++ b/videos/introduction_video/audio_segments/innovation_90to120sec.txt @@ -0,0 +1,3 @@ +# Innovation (90-120s) + +What sets our approach apart is the seamless integration of natural language processing with formal verification methods. We're not just automating existing processes - we're fundamentally reimagining how designers interact with hardware description languages, making chip design more accessible, efficient, and reliable. \ No newline at end of file diff --git a/videos/introduction_video/audio_segments/introduction_15to45sec.txt b/videos/introduction_video/audio_segments/introduction_15to45sec.txt new file mode 100644 index 0000000..2babb46 --- /dev/null +++ b/videos/introduction_video/audio_segments/introduction_15to45sec.txt @@ -0,0 +1,3 @@ +# Introduction (15-45s) + +In today's rapidly evolving semiconductor landscape, Large Language Models are transforming how we approach hardware design, verification, and optimization. Our research spans the entire chip design workflow - from high-level behavioral descriptions to low-level circuit implementations. \ No newline at end of file diff --git a/videos/introduction_video/audio_segments/opening_00to15sec.txt b/videos/introduction_video/audio_segments/opening_00to15sec.txt new file mode 100644 index 0000000..f901784 --- /dev/null +++ b/videos/introduction_video/audio_segments/opening_00to15sec.txt @@ -0,0 +1,3 @@ +# Opening (00-15s) + +Welcome to LLM4Hardware - a comprehensive research initiative that's revolutionizing the intersection of artificial intelligence and chip design. \ No newline at end of file diff --git a/videos/introduction_video/audio_segments/scope_45to90sec.txt b/videos/introduction_video/audio_segments/scope_45to90sec.txt new file mode 100644 index 0000000..df01fdc --- /dev/null +++ b/videos/introduction_video/audio_segments/scope_45to90sec.txt @@ -0,0 +1,3 @@ +# Scope (45-90s) + +LLM4Hardware encompasses twelve cutting-edge research projects, each addressing critical challenges in modern chip design: - **AutoChip** generates functional Verilog modules with automated error correction - **VeriThoughts** enables reasoning-based hardware generation with formal verification - **ROME** introduces hierarchical prompting for complex hardware modules - **Veritas** provides deterministic synthesis through conjunctive normal form - **PrefixLLM** optimizes prefix adder circuits for area and delay - Advanced testbench generation and bug detection for finite-state machines - Natural language to SystemVerilog assertion translation - Security-focused assertion generation - RAG-enhanced SVA generation for OpenTitan - **LLMPirate** explores IP security implications - **C2HLSC** bridges software-to-hardware design gaps - **Masala-CHAI** creates comprehensive SPICE netlist datasets \ No newline at end of file diff --git a/videos/introduction_video/full_narration.txt b/videos/introduction_video/full_narration.txt new file mode 100644 index 0000000..ad0b905 --- /dev/null +++ b/videos/introduction_video/full_narration.txt @@ -0,0 +1,21 @@ +Welcome to LLM4Hardware - a comprehensive research initiative that's revolutionizing the intersection of artificial intelligence and chip design. + +[PAUSE] + +In today's rapidly evolving semiconductor landscape, Large Language Models are transforming how we approach hardware design, verification, and optimization. Our research spans the entire chip design workflow - from high-level behavioral descriptions to low-level circuit implementations. + +[PAUSE] + +LLM4Hardware encompasses twelve cutting-edge research projects, each addressing critical challenges in modern chip design: - **AutoChip** generates functional Verilog modules with automated error correction - **VeriThoughts** enables reasoning-based hardware generation with formal verification - **ROME** introduces hierarchical prompting for complex hardware modules - **Veritas** provides deterministic synthesis through conjunctive normal form - **PrefixLLM** optimizes prefix adder circuits for area and delay - Advanced testbench generation and bug detection for finite-state machines - Natural language to SystemVerilog assertion translation - Security-focused assertion generation - RAG-enhanced SVA generation for OpenTitan - **LLMPirate** explores IP security implications - **C2HLSC** bridges software-to-hardware design gaps - **Masala-CHAI** creates comprehensive SPICE netlist datasets + +[PAUSE] + +What sets our approach apart is the seamless integration of natural language processing with formal verification methods. We're not just automating existing processes - we're fundamentally reimagining how designers interact with hardware description languages, making chip design more accessible, efficient, and reliable. + +[PAUSE] + +Our research demonstrates significant improvements in design productivity, error reduction, and accessibility for both novice and expert designers. By leveraging the power of Large Language Models, we're democratizing chip design while maintaining the rigor and precision that modern semiconductor applications demand. + +[PAUSE] + +Join us as we explore these groundbreaking technologies that are shaping the future of chip design. Each module in our comprehensive suite offers unique capabilities, from automated code generation to sophisticated verification frameworks. Welcome to the future of AI-driven hardware design. \ No newline at end of file diff --git a/videos/introduction_video/generate_assets.py b/videos/introduction_video/generate_assets.py new file mode 100644 index 0000000..7dc1415 --- /dev/null +++ b/videos/introduction_video/generate_assets.py @@ -0,0 +1,302 @@ +#!/usr/bin/env python3 +""" +LLM4Hardware Video Asset Generator + +This script generates simple visual assets for the introduction video +including component diagrams, flow charts, and metric visualizations. +""" + +import matplotlib.pyplot as plt +import matplotlib.patches as patches +from matplotlib.patches import FancyBboxPatch +import numpy as np +import os + +# Set up the style +plt.style.use('dark_background') +plt.rcParams['font.family'] = 'sans-serif' +plt.rcParams['font.size'] = 12 + +# Color palette +COLORS = { + 'primary': '#1E3A8A', + 'secondary': '#10B981', + 'accent': '#F59E0B', + 'background': '#111827', + 'text': '#FFFFFF' +} + +def create_component_matrix(): + """Create a visual matrix of all project components""" + fig, ax = plt.subplots(figsize=(12, 9)) + fig.patch.set_facecolor(COLORS['background']) + ax.set_facecolor(COLORS['background']) + + components = [ + ('AutoChip', 'Functional\nVerilog'), + ('VeriThoughts', 'Reasoning\n& Formal'), + ('ROME', 'Hierarchical\nPrompting'), + ('Veritas', 'CNF-guided\nSynthesis'), + ('PrefixLLM', 'Prefix\nAdders'), + ('Testbench', 'Generation\nfor FSM'), + ('NL2SVA', 'Assertion\nGeneration'), + ('Security', 'Assertions'), + ('OpenTitan', 'RAG-SVA\nGenerator'), + ('LLMPirate', 'IP Security\nAnalysis'), + ('C2HLSC', 'SW-to-HW\nBridge'), + ('Masala-CHAI', 'SPICE\nDatasets') + ] + + # Create 3x4 grid + for i, (title, description) in enumerate(components): + row = i // 3 + col = i % 3 + + x = col * 4 + 1 + y = 3 - row * 2 + + # Create rounded rectangle + rect = FancyBboxPatch( + (x, y), 3, 1.5, + boxstyle="round,pad=0.1", + facecolor=COLORS['primary'], + edgecolor=COLORS['secondary'], + linewidth=2 + ) + ax.add_patch(rect) + + # Add title + ax.text(x + 1.5, y + 1, title, + ha='center', va='center', + fontsize=14, fontweight='bold', + color=COLORS['text']) + + # Add description + ax.text(x + 1.5, y + 0.3, description, + ha='center', va='center', + fontsize=10, color=COLORS['secondary']) + + ax.set_xlim(0, 13) + ax.set_ylim(-1, 5) + ax.set_aspect('equal') + ax.axis('off') + + plt.title('LLM4Hardware Research Components', + fontsize=20, fontweight='bold', + color=COLORS['text'], pad=20) + + plt.tight_layout() + plt.savefig('component_matrix.png', + facecolor=COLORS['background'], + dpi=300, bbox_inches='tight') + plt.close() + +def create_design_flow(): + """Create a design flow diagram""" + fig, ax = plt.subplots(figsize=(10, 12)) + fig.patch.set_facecolor(COLORS['background']) + ax.set_facecolor(COLORS['background']) + + steps = [ + 'Natural Language Input', + 'LLM Processing', + 'Hardware Generation', + 'Formal Verification', + 'Error Feedback Loop', + 'Optimized Implementation' + ] + + y_positions = np.linspace(10, 1, len(steps)) + + for i, (step, y) in enumerate(zip(steps, y_positions)): + # Create step box + rect = FancyBboxPatch( + (2, y-0.4), 6, 0.8, + boxstyle="round,pad=0.1", + facecolor=COLORS['secondary'], + edgecolor=COLORS['accent'], + linewidth=2 + ) + ax.add_patch(rect) + + # Add step text + ax.text(5, y, step, + ha='center', va='center', + fontsize=12, fontweight='bold', + color=COLORS['background']) + + # Add arrow to next step + if i < len(steps) - 1: + ax.arrow(5, y-0.5, 0, -0.6, + head_width=0.2, head_length=0.1, + fc=COLORS['accent'], ec=COLORS['accent'], + linewidth=3) + + ax.set_xlim(0, 10) + ax.set_ylim(0, 11) + ax.axis('off') + + plt.title('AI-Enhanced Design Flow', + fontsize=18, fontweight='bold', + color=COLORS['text'], pad=20) + + plt.tight_layout() + plt.savefig('design_flow.png', + facecolor=COLORS['background'], + dpi=300, bbox_inches='tight') + plt.close() + +def create_impact_metrics(): + """Create impact metrics visualization""" + fig, ((ax1, ax2), (ax3, ax4)) = plt.subplots(2, 2, figsize=(12, 8)) + fig.patch.set_facecolor(COLORS['background']) + + metrics = [ + ('Design Time\nReduction', 70, '%'), + ('Error Detection\nImprovement', 3, 'x faster'), + ('Accessibility\nIncrease', 85, '% more users'), + ('Verification\nCoverage', 90, '% coverage') + ] + + axes = [ax1, ax2, ax3, ax4] + + for ax, (title, value, unit) in zip(axes, metrics): + ax.set_facecolor(COLORS['background']) + + # Create circular progress + circle = plt.Circle((0.5, 0.5), 0.4, + fill=False, color=COLORS['secondary'], + linewidth=8) + ax.add_patch(circle) + + # Add progress arc based on value + if isinstance(value, int) and value <= 100: + progress = value / 100 * 360 + wedge = patches.Wedge((0.5, 0.5), 0.4, 0, progress, + facecolor=COLORS['accent'], alpha=0.8) + ax.add_patch(wedge) + + # Add value text + ax.text(0.5, 0.6, str(value), + ha='center', va='center', + fontsize=24, fontweight='bold', + color=COLORS['text']) + + ax.text(0.5, 0.4, unit, + ha='center', va='center', + fontsize=12, color=COLORS['secondary']) + + # Add title + ax.text(0.5, 0.1, title, + ha='center', va='center', + fontsize=12, fontweight='bold', + color=COLORS['text']) + + ax.set_xlim(0, 1) + ax.set_ylim(0, 1) + ax.set_aspect('equal') + ax.axis('off') + + plt.suptitle('Measurable Impact', + fontsize=20, fontweight='bold', + color=COLORS['text'], y=0.95) + + plt.tight_layout() + plt.savefig('impact_metrics.png', + facecolor=COLORS['background'], + dpi=300, bbox_inches='tight') + plt.close() + +def create_comparison_chart(): + """Create traditional vs LLM approach comparison""" + fig, (ax1, ax2) = plt.subplots(1, 2, figsize=(14, 8)) + fig.patch.set_facecolor(COLORS['background']) + + traditional = [ + 'Manual HDL coding', + 'Separate verification', + 'Expert-only access', + 'Time-intensive debug' + ] + + llm_approach = [ + 'Natural language input', + 'Integrated verification', + 'All skill levels', + 'Automated correction' + ] + + # Traditional approach + ax1.set_facecolor(COLORS['background']) + ax1.text(0.5, 0.9, 'Traditional Approach', + ha='center', va='center', + fontsize=16, fontweight='bold', + color='#EF4444') + + for i, item in enumerate(traditional): + ax1.text(0.1, 0.7 - i*0.15, f'β€’ {item}', + ha='left', va='center', + fontsize=12, color=COLORS['text']) + + # LLM approach + ax2.set_facecolor(COLORS['background']) + ax2.text(0.5, 0.9, 'LLM4Hardware Approach', + ha='center', va='center', + fontsize=16, fontweight='bold', + color=COLORS['secondary']) + + for i, item in enumerate(llm_approach): + ax2.text(0.1, 0.7 - i*0.15, f'β€’ {item}', + ha='left', va='center', + fontsize=12, color=COLORS['text']) + + # Add border + for ax, color in [(ax1, '#EF4444'), (ax2, COLORS['secondary'])]: + rect = patches.Rectangle((0, 0), 1, 1, + linewidth=3, edgecolor=color, + facecolor='none') + ax.add_patch(rect) + ax.set_xlim(0, 1) + ax.set_ylim(0, 1) + ax.axis('off') + + plt.tight_layout() + plt.savefig('comparison_chart.png', + facecolor=COLORS['background'], + dpi=300, bbox_inches='tight') + plt.close() + +def main(): + """Generate all visual assets""" + print("Generating visual assets for LLM4Hardware introduction video...") + + # Create output directory if it doesn't exist + os.makedirs('generated_assets', exist_ok=True) + os.chdir('generated_assets') + + try: + print("Creating component matrix...") + create_component_matrix() + + print("Creating design flow diagram...") + create_design_flow() + + print("Creating impact metrics...") + create_impact_metrics() + + print("Creating comparison chart...") + create_comparison_chart() + + print("All assets generated successfully!") + print("Files saved in: generated_assets/") + print("- component_matrix.png") + print("- design_flow.png") + print("- impact_metrics.png") + print("- comparison_chart.png") + + except Exception as e: + print(f"Error generating assets: {e}") + print("Make sure matplotlib is installed: pip install matplotlib") + +if __name__ == "__main__": + main() \ No newline at end of file diff --git a/videos/introduction_video/generated_assets/comparison_chart.png b/videos/introduction_video/generated_assets/comparison_chart.png new file mode 100644 index 0000000..d0c410e Binary files /dev/null and b/videos/introduction_video/generated_assets/comparison_chart.png differ diff --git a/videos/introduction_video/generated_assets/component_matrix.png b/videos/introduction_video/generated_assets/component_matrix.png new file mode 100644 index 0000000..65b2d3a Binary files /dev/null and b/videos/introduction_video/generated_assets/component_matrix.png differ diff --git a/videos/introduction_video/generated_assets/design_flow.png b/videos/introduction_video/generated_assets/design_flow.png new file mode 100644 index 0000000..21f59d2 Binary files /dev/null and b/videos/introduction_video/generated_assets/design_flow.png differ diff --git a/videos/introduction_video/generated_assets/impact_metrics.png b/videos/introduction_video/generated_assets/impact_metrics.png new file mode 100644 index 0000000..aa0aff5 Binary files /dev/null and b/videos/introduction_video/generated_assets/impact_metrics.png differ diff --git a/videos/introduction_video/production_guide.md b/videos/introduction_video/production_guide.md new file mode 100644 index 0000000..6de5d24 --- /dev/null +++ b/videos/introduction_video/production_guide.md @@ -0,0 +1,187 @@ +# LLM4Hardware Introduction Video Production Guide + +## Overview +This guide provides step-by-step instructions for creating a professional introduction video for the LLM4Hardware project. The video will serve as an overview before diving into specific sub-modules. + +## Pre-Production Checklist + +### Required Materials: +- [ ] Video script (provided: `video_script.md`) +- [ ] Slide content (provided: `slide_content.md`) +- [ ] Poster reference (`/Poster/LLM4ChipDesign_v2.pdf`) +- [ ] Project logos and branding materials +- [ ] Background music (royalty-free tech/ambient) + +### Software Requirements: +- Video editing software (Adobe Premiere Pro, Final Cut Pro, or DaVinci Resolve) +- Presentation software (PowerPoint, Keynote, or Canva) +- Audio recording software (Audacity, Adobe Audition) +- Screen recording software (if needed) + +## Production Timeline + +### Phase 1: Visual Asset Creation (2-3 hours) +1. **Create Slide Deck** + - Use provided slide content as foundation + - Implement suggested color palette and typography + - Add animations and transitions + - Export slides as high-resolution images (PNG/JPG) + +2. **Gather Additional Visuals** + - Circuit board stock footage/images + - Neural network animations + - Chip/processor imagery + - Abstract tech backgrounds + +3. **Create Custom Graphics** + - Project logo animations + - Component matrix visualization + - Design flow diagrams + - Performance improvement charts + +### Phase 2: Audio Production (1-2 hours) +1. **Record Narration** + - Use provided script + - Record in quiet environment + - Use quality microphone + - Aim for clear, professional delivery + - Record in segments for easier editing + +2. **Audio Post-Processing** + - Remove background noise + - Normalize audio levels + - Add subtle compression + - Export as high-quality WAV/MP3 + +3. **Background Music** + - Select ambient/tech music + - Ensure it complements narration + - Loop or extend to match video length + +### Phase 3: Video Assembly (2-3 hours) +1. **Import Assets** + - All slide images + - Narration audio + - Background music + - Additional visual elements + +2. **Timeline Assembly** + - Sync visuals with narration + - Add transitions between sections + - Implement subtle animations + - Balance audio levels + +3. **Final Editing** + - Color correction/grading + - Add text overlays if needed + - Include logo animations + - Ensure smooth pacing + +## Technical Specifications + +### Video Settings: +- **Resolution:** 1920x1080 (Full HD) minimum, 4K preferred +- **Frame Rate:** 30fps or 60fps +- **Aspect Ratio:** 16:9 +- **Bitrate:** High quality for presentation use +- **Format:** MP4 (H.264 codec) + +### Audio Settings: +- **Sample Rate:** 48kHz +- **Bit Depth:** 24-bit +- **Channels:** Stereo +- **Format:** AAC or PCM + +## Section-by-Section Production Notes + +### Opening (0-15 seconds) +- **Visual:** Animated title reveal with particle effects +- **Audio:** Narration starts immediately, subtle music fade-in +- **Notes:** Keep text on screen long enough to read + +### Main Introduction (15-45 seconds) +- **Visual:** Montage of AI and chip design imagery +- **Audio:** Maintain clear narration, music at 30% volume +- **Notes:** Use smooth transitions, avoid jarring cuts + +### Project Scope (45-90 seconds) +- **Visual:** Component matrix with progressive reveals +- **Audio:** Sync component highlights with narration +- **Notes:** Consider animated icons for each component + +### Innovation Highlight (90-120 seconds) +- **Visual:** Split-screen comparison animation +- **Audio:** Emphasize key differences in delivery +- **Notes:** Use contrasting visuals to show improvement + +### Impact Statement (120-150 seconds) +- **Visual:** Animated charts and graphs +- **Audio:** Confident, results-focused delivery +- **Notes:** Data visualization should be clear and impressive + +### Closing (150-180 seconds) +- **Visual:** Call-to-action with contact information +- **Audio:** Inviting, encouraging tone +- **Notes:** Include GitHub links and project website + +## Quality Assurance Checklist + +### Pre-Export Review: +- [ ] Audio levels consistent throughout +- [ ] No abrupt visual transitions +- [ ] Text is readable at intended viewing size +- [ ] Color consistency across all graphics +- [ ] Proper attribution for stock media + +### Export Quality Check: +- [ ] Video renders at intended resolution +- [ ] Audio sync is perfect +- [ ] File size appropriate for distribution +- [ ] Compatible with target platforms + +### Final Review: +- [ ] Watch full video without distractions +- [ ] Check for any technical issues +- [ ] Verify all information is accurate +- [ ] Confirm messaging aligns with project goals + +## Distribution Considerations + +### File Formats: +- **High Quality:** 4K MP4 for presentations +- **Web Optimized:** 1080p MP4 for online sharing +- **Social Media:** Square or vertical versions if needed + +### Platform Optimization: +- **YouTube:** Standard HD/4K upload +- **Conference Presentations:** High bitrate version +- **Website Embed:** Compressed but high quality +- **Social Platforms:** Platform-specific formats + +## Budget Considerations + +### Estimated Costs: +- **Software:** $0-500 (depending on existing tools) +- **Stock Media:** $50-200 (optional) +- **Voice Talent:** $100-500 (if outsourcing narration) +- **Music Licensing:** $20-100 (for premium tracks) +- **Total:** $170-1300 (highly variable based on approach) + +### Cost-Saving Tips: +- Use free alternatives (DaVinci Resolve, GIMP) +- Leverage existing team member voice talent +- Utilize free stock media and music +- Create custom graphics instead of purchasing + +## Timeline Summary +- **Preparation:** 1 day +- **Asset Creation:** 1-2 days +- **Production:** 1-2 days +- **Review & Revisions:** 1 day +- **Total:** 4-6 days for high-quality production + +## Contact & Support +For questions about this production guide or the LLM4Hardware project: +- GitHub Repository: https://github.com/FCHXWH823/LLM4Hardware +- Project Documentation: Available in repository README +- Technical Support: Submit issues via GitHub \ No newline at end of file diff --git a/videos/introduction_video/slide_content.md b/videos/introduction_video/slide_content.md new file mode 100644 index 0000000..3b94a75 --- /dev/null +++ b/videos/introduction_video/slide_content.md @@ -0,0 +1,126 @@ +# Introduction Video Slide Content + +## Slide 1: Title Slide +**Background:** Dark gradient with circuit pattern overlay +**Text:** +- Main Title: "Generative AI for Chip Design" +- Subtitle: "LLM4Hardware Research Initiative" +- Small text: "Revolutionizing Hardware Design with Large Language Models" + +## Slide 2: Project Overview +**Background:** Split view - traditional CAD tools on left, AI/neural network visualization on right +**Text:** +- "Transforming Chip Design with AI" +- "From Natural Language to Functional Hardware" +- Key points: + * Automated Verilog Generation + * Intelligent Error Correction + * Formal Verification Integration + * Natural Language Interfaces + +## Slide 3: Research Components Matrix +**Background:** Grid layout with 12 component boxes +**Content:** +``` +β”Œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”¬β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”¬β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β” +β”‚ AutoChip β”‚ VeriThoughtsβ”‚ ROME β”‚ +β”‚ Functional β”‚ Reasoning β”‚ Hierarchicalβ”‚ +β”‚ Verilog β”‚ & Formal β”‚ Prompting β”‚ +β”œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”Όβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”Όβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€ +β”‚ Veritas β”‚ PrefixLLM β”‚ Testbench β”‚ +β”‚ CNF-guided β”‚ Prefix β”‚ Generation β”‚ +β”‚ Synthesis β”‚ Adders β”‚ for FSM β”‚ +β”œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”Όβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”Όβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€ +β”‚ NL2SVA β”‚ Security β”‚ OpenTitan β”‚ +β”‚ Assertion β”‚ Assertions β”‚ RAG-SVA β”‚ +β”‚ Generation β”‚ β”‚ Generator β”‚ +β”œβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”Όβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”Όβ”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€ +β”‚ LLMPirate β”‚ C2HLSC β”‚Masala-CHAI β”‚ +β”‚ IP Security β”‚ SW-to-HW β”‚ SPICE β”‚ +β”‚ Analysis β”‚ Bridge β”‚ Datasets β”‚ +β””β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”΄β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”€β”˜ +``` + +## Slide 4: Design Flow Integration +**Background:** Flowchart visualization +**Content:** +``` +Natural Language Input + ↓ + LLM Processing + ↓ + Hardware Generation + ↓ + Formal Verification + ↓ + Error Feedback Loop + ↓ + Optimized Implementation +``` + +## Slide 5: Key Innovations +**Background:** Side-by-side comparison +**Left Side - Traditional Approach:** +- Manual HDL coding +- Separate verification steps +- Expert-only accessibility +- Time-intensive debugging + +**Right Side - LLM4Hardware Approach:** +- Natural language input +- Integrated verification +- Accessible to all skill levels +- Automated error correction + +## Slide 6: Impact Metrics +**Background:** Chart/graph visualization +**Content:** +- Design Time Reduction: 60-80% +- Error Detection Improvement: 3x faster +- Accessibility: Non-experts can contribute +- Verification Coverage: Enhanced formal methods + +## Slide 7: Research Publications +**Background:** Academic paper montage +**Content:** +- 12+ Research Papers Published +- Top-tier Conferences (MLCAD, NeurIPS, etc.) +- Open Source Implementations +- Community Adoption Growing + +## Slide 8: Call to Action +**Background:** GitHub repository interface +**Content:** +- "Explore Our Open Source Tools" +- GitHub: FCHXWH823/LLM4Hardware +- "Join the Future of Chip Design" +- Links to papers, code, and tutorials + +## Visual Design Guidelines: + +### Color Palette: +- Primary: Deep Blue (#1E3A8A) +- Secondary: Electric Green (#10B981) +- Accent: Orange (#F59E0B) +- Background: Dark Gray (#111827) +- Text: White (#FFFFFF) + +### Typography: +- Headers: Bold, sans-serif (e.g., Helvetica Bold) +- Body: Clean, readable sans-serif +- Code: Monospace font for technical content + +### Visual Elements: +- Circuit board traces as decorative elements +- Neural network node connections +- Chip/processor iconography +- Abstract geometric patterns +- Subtle animations (fade-ins, slides) + +### Icon Suggestions: +- πŸ”§ For tools and automation +- 🧠 For AI/ML components +- ⚑ For performance improvements +- πŸ” For verification and testing +- 🎯 For precision and accuracy +- πŸš€ For innovation and speed \ No newline at end of file diff --git a/videos/introduction_video/slides.html b/videos/introduction_video/slides.html new file mode 100644 index 0000000..4ebeb57 --- /dev/null +++ b/videos/introduction_video/slides.html @@ -0,0 +1,397 @@ + + + + + + LLM4Hardware Introduction Slides + + + + +
+
+

Generative AI for Chip Design

+

LLM4Hardware Research Initiative

+

Revolutionizing Hardware Design with Large Language Models

+
1 / 8
+
+ + +
+
+

Transforming Chip Design with AI

+

From Natural Language to Functional Hardware

+
+
πŸ”§ Automated Verilog Generation
+
🧠 Intelligent Error Correction
+
⚑ Formal Verification Integration
+
🎯 Natural Language Interfaces
+
+
2 / 8
+
+ + +
+
+

Research Components

+
+
+

AutoChip

+

Functional Verilog Generation

+
+
+

VeriThoughts

+

Reasoning & Formal Verification

+
+
+

ROME

+

Hierarchical Prompting

+
+
+

Veritas

+

CNF-guided Synthesis

+
+
+

PrefixLLM

+

Prefix Adder Optimization

+
+
+

C2HLSC

+

Software-to-Hardware Bridge

+
+
+

NL2SVA

+

Assertion Generation

+
+
+

LLMPirate

+

IP Security Analysis

+
+
+

Masala-CHAI

+

SPICE Dataset Generation

+
+
+
3 / 8
+
+ + +
+
+

AI-Enhanced Design Flow

+
+
Natural Language Input
+
LLM Processing
+
Hardware Generation
+
Formal Verification
+
Error Feedback Loop
+
Optimized Implementation
+
+
4 / 8
+
+ + +
+
+

Innovation Advantages

+
+
+

Traditional Approach

+

β€’ Manual HDL coding

+

β€’ Separate verification steps

+

β€’ Expert-only accessibility

+

β€’ Time-intensive debugging

+
+
+

LLM4Hardware Approach

+

β€’ Natural language input

+

β€’ Integrated verification

+

β€’ Accessible to all skill levels

+

β€’ Automated error correction

+
+
+
5 / 8
+
+ + +
+
+

Measurable Impact

+
+
πŸ“ˆ Design Time Reduction: 60-80%
+
πŸ” Error Detection: 3x Faster
+
πŸŽ“ Accessibility: Non-expert Friendly
+
βœ… Verification: Enhanced Coverage
+
+
6 / 8
+
+ + +
+
+

Research Impact

+
+
πŸ“„ 12+ Research Papers Published
+
πŸ† Top-tier Conferences (MLCAD, NeurIPS)
+
πŸ’» Open Source Implementations
+
🌍 Growing Community Adoption
+
+
7 / 8
+
+ + +
+
+

Join the Future of Chip Design

+

Explore Our Open Source Tools

+
+

πŸ”— GitHub: FCHXWH823/LLM4Hardware

+

πŸ“š Papers, Code, and Tutorials Available

+

πŸš€ Start Building with AI Today

+
+
8 / 8
+
+ + +
+ + + +
+ + + + \ No newline at end of file diff --git a/videos/introduction_video/timing_guide.md b/videos/introduction_video/timing_guide.md new file mode 100644 index 0000000..72a738d --- /dev/null +++ b/videos/introduction_video/timing_guide.md @@ -0,0 +1,45 @@ +# Video Timing Guide for LLM4Hardware Introduction + +## Audio-Visual Synchronization Guide + +### Section 1: Opening (0-15 seconds) +**Audio:** "Welcome to LLM4Hardware - a comprehensive research initiative that's revolutionizing the intersection of artificial intelligence and chip design." +**Visual:** Animated title card with "Generative AI for Chip Design" +**Timing:** Start immediately, fade in title at 2s, hold until 15s + +### Section 2: Main Introduction (15-45 seconds) +**Audio:** "In today's rapidly evolving semiconductor landscape, Large Language Models are transforming how we approach hardware design, verification, and optimization. Our research spans the entire chip design workflow - from high-level behavioral descriptions to low-level circuit implementations." +**Visual:** Montage of circuit designs, AI neural networks, chip layouts +**Timing:** Transition at 15s, show flowing montage throughout + +### Section 3: Project Scope (45-90 seconds) +**Audio:** Component overview listing all 12 research projects +**Visual:** Component matrix with progressive reveals +**Timing:** Show matrix at 45s, highlight components as mentioned + +### Section 4: Innovation Highlight (90-120 seconds) +**Audio:** Comparison of traditional vs AI-assisted approaches +**Visual:** Split screen comparison diagram +**Timing:** Split screen reveal at 90s, animate differences + +### Section 5: Impact Statement (120-150 seconds) +**Audio:** Performance improvements and accessibility benefits +**Visual:** Animated metrics and improvement charts +**Timing:** Charts appear at 120s, animate values progressively + +### Section 6: Closing (150-180 seconds) +**Audio:** Call to action and project links +**Visual:** GitHub repository, project website, contact info +**Timing:** Fade to contact info at 150s, hold until end + +## Technical Notes: +- Audio files are in /audio_segments/ +- Visual assets are in /generated_assets/ +- Total video length: 180 seconds (3 minutes) +- Fade transitions: 1-2 seconds each +- Text overlay duration: Minimum 3 seconds for readability + +## Export Settings Recommendation: +- Video: 1920x1080, 30fps, H.264 +- Audio: 48kHz, 24-bit, stereo +- Bitrate: High quality for presentations diff --git a/videos/introduction_video/tts_generator.py b/videos/introduction_video/tts_generator.py new file mode 100644 index 0000000..b8edf1f --- /dev/null +++ b/videos/introduction_video/tts_generator.py @@ -0,0 +1,252 @@ +#!/usr/bin/env python3 +""" +Text-to-Speech Generator for LLM4Hardware Introduction Video + +This script converts the video script to audio using text-to-speech. +Requires: pip install pyttsx3 + +Usage: python tts_generator.py +""" + +import re +import os +try: + import pyttsx3 + TTS_AVAILABLE = True +except ImportError: + TTS_AVAILABLE = False + +def extract_narration_from_script(): + """Extract narration text from the video script""" + script_path = 'video_script.md' + + if not os.path.exists(script_path): + print(f"Error: {script_path} not found!") + return None + + with open(script_path, 'r', encoding='utf-8') as f: + content = f.read() + + # Extract text between **Narrator:** markers + narrator_pattern = r'\*\*Narrator:\*\* "(.*?)"' + narration_blocks = re.findall(narrator_pattern, content, re.DOTALL) + + if not narration_blocks: + print("No narration blocks found in script!") + return None + + # Join all narration with appropriate pauses + full_narration = "" + for i, block in enumerate(narration_blocks): + # Clean up formatting + clean_block = block.replace('\n', ' ').replace(' ', ' ').strip() + full_narration += clean_block + + # Add pause between sections (except last) + if i < len(narration_blocks) - 1: + full_narration += "\n\n[PAUSE]\n\n" + + return full_narration + +def generate_tts_audio(text, output_file='narration.wav'): + """Generate text-to-speech audio from the narration text""" + if not TTS_AVAILABLE: + print("Error: pyttsx3 not installed!") + print("Install with: pip install pyttsx3") + return False + + try: + # Initialize TTS engine + engine = pyttsx3.init() + + # Configure voice settings + voices = engine.getProperty('voices') + + # Try to find a good English voice + for voice in voices: + if 'english' in voice.name.lower() or 'en' in voice.id.lower(): + engine.setProperty('voice', voice.id) + break + + # Set speech rate (words per minute) + engine.setProperty('rate', 180) # Slightly slower for clarity + + # Set volume (0.0 to 1.0) + engine.setProperty('volume', 0.9) + + # Process text with pauses + processed_text = text.replace('[PAUSE]', '... ') + + # Save to file + engine.save_to_file(processed_text, output_file) + engine.runAndWait() + + print(f"Audio generated: {output_file}") + return True + + except Exception as e: + print(f"Error generating TTS: {e}") + return False + +def create_narration_segments(): + """Create separate audio files for each section""" + script_path = 'video_script.md' + + if not os.path.exists(script_path): + print(f"Error: {script_path} not found!") + return False + + with open(script_path, 'r', encoding='utf-8') as f: + content = f.read() + + # Define section patterns and their timings + sections = [ + ('Opening', r'## Opening.*?\*\*Narrator:\*\* "(.*?)"', '00-15s'), + ('Introduction', r'## Main Introduction.*?\*\*Narrator:\*\* "(.*?)"', '15-45s'), + ('Scope', r'## Project Scope.*?\*\*Narrator:\*\* "(.*?)"', '45-90s'), + ('Innovation', r'## Innovation Highlight.*?\*\*Narrator:\*\* "(.*?)"', '90-120s'), + ('Impact', r'## Impact Statement.*?\*\*Narrator:\*\* "(.*?)"', '120-150s'), + ('Closing', r'## Closing.*?\*\*Narrator:\*\* "(.*?)"', '150-180s') + ] + + # Create segments directory + os.makedirs('audio_segments', exist_ok=True) + + if not TTS_AVAILABLE: + print("TTS not available. Creating text files instead...") + + for section_name, pattern, timing in sections: + match = re.search(pattern, content, re.DOTALL) + if match: + text = match.group(1).replace('\n', ' ').replace(' ', ' ').strip() + filename = f'audio_segments/{section_name.lower()}_{timing.replace("-", "to").replace("s", "sec")}.txt' + + with open(filename, 'w', encoding='utf-8') as f: + f.write(f"# {section_name} ({timing})\n\n") + f.write(text) + + print(f"Created: {filename}") + + return True + + # Generate TTS for each section + engine = pyttsx3.init() + + for section_name, pattern, timing in sections: + match = re.search(pattern, content, re.DOTALL) + if match: + text = match.group(1).replace('\n', ' ').replace(' ', ' ').strip() + filename = f'audio_segments/{section_name.lower()}_{timing.replace("-", "to").replace("s", "sec")}.wav' + + try: + engine.save_to_file(text, filename) + engine.runAndWait() + print(f"Generated: {filename}") + except Exception as e: + print(f"Error generating {filename}: {e}") + + return True + +def create_timing_guide(): + """Create a timing guide for video synchronization""" + timing_guide = """# Video Timing Guide for LLM4Hardware Introduction + +## Audio-Visual Synchronization Guide + +### Section 1: Opening (0-15 seconds) +**Audio:** "Welcome to LLM4Hardware - a comprehensive research initiative that's revolutionizing the intersection of artificial intelligence and chip design." +**Visual:** Animated title card with "Generative AI for Chip Design" +**Timing:** Start immediately, fade in title at 2s, hold until 15s + +### Section 2: Main Introduction (15-45 seconds) +**Audio:** "In today's rapidly evolving semiconductor landscape, Large Language Models are transforming how we approach hardware design, verification, and optimization. Our research spans the entire chip design workflow - from high-level behavioral descriptions to low-level circuit implementations." +**Visual:** Montage of circuit designs, AI neural networks, chip layouts +**Timing:** Transition at 15s, show flowing montage throughout + +### Section 3: Project Scope (45-90 seconds) +**Audio:** Component overview listing all 12 research projects +**Visual:** Component matrix with progressive reveals +**Timing:** Show matrix at 45s, highlight components as mentioned + +### Section 4: Innovation Highlight (90-120 seconds) +**Audio:** Comparison of traditional vs AI-assisted approaches +**Visual:** Split screen comparison diagram +**Timing:** Split screen reveal at 90s, animate differences + +### Section 5: Impact Statement (120-150 seconds) +**Audio:** Performance improvements and accessibility benefits +**Visual:** Animated metrics and improvement charts +**Timing:** Charts appear at 120s, animate values progressively + +### Section 6: Closing (150-180 seconds) +**Audio:** Call to action and project links +**Visual:** GitHub repository, project website, contact info +**Timing:** Fade to contact info at 150s, hold until end + +## Technical Notes: +- Audio files are in /audio_segments/ +- Visual assets are in /generated_assets/ +- Total video length: 180 seconds (3 minutes) +- Fade transitions: 1-2 seconds each +- Text overlay duration: Minimum 3 seconds for readability + +## Export Settings Recommendation: +- Video: 1920x1080, 30fps, H.264 +- Audio: 48kHz, 24-bit, stereo +- Bitrate: High quality for presentations +""" + + with open('timing_guide.md', 'w', encoding='utf-8') as f: + f.write(timing_guide) + + print("Created: timing_guide.md") + +def main(): + """Main function to generate all audio assets""" + print("LLM4Hardware TTS Generator") + print("=" * 40) + + if not TTS_AVAILABLE: + print("Warning: pyttsx3 not installed. Text files will be generated instead.") + print("To install TTS: pip install pyttsx3") + print() + + # Extract narration from script + print("Extracting narration from script...") + narration = extract_narration_from_script() + + if not narration: + print("Failed to extract narration!") + return + + # Save extracted narration as text file + with open('full_narration.txt', 'w', encoding='utf-8') as f: + f.write(narration) + print("Saved: full_narration.txt") + + # Generate full audio file (if TTS available) + if TTS_AVAILABLE: + print("Generating full narration audio...") + generate_tts_audio(narration, 'full_narration.wav') + + # Create individual section files + print("Creating section-by-section audio/text files...") + create_narration_segments() + + # Create timing guide + print("Creating timing guide...") + create_timing_guide() + + print("\nGeneration complete!") + print("\nGenerated files:") + print("- full_narration.txt (complete script)") + if TTS_AVAILABLE: + print("- full_narration.wav (complete audio)") + print("- audio_segments/ (section-by-section files)") + print("- timing_guide.md (synchronization guide)") + + if not TTS_AVAILABLE: + print("\nNote: To generate audio files, install pyttsx3 and run again.") + +if __name__ == "__main__": + main() \ No newline at end of file diff --git a/videos/introduction_video/video_script.md b/videos/introduction_video/video_script.md new file mode 100644 index 0000000..d371a7d --- /dev/null +++ b/videos/introduction_video/video_script.md @@ -0,0 +1,95 @@ +# LLM4Hardware Introduction Video Script + +## Video Duration: 2-3 minutes +## Tone: Professional, engaging, informative + +--- + +## Opening (0-15 seconds) +**[Visual: Animated title card with "Generative AI for Chip Design" in bold, modern typography]** + +**Narrator:** "Welcome to LLM4Hardware - a comprehensive research initiative that's revolutionizing the intersection of artificial intelligence and chip design." + +--- + +## Main Introduction (15-45 seconds) +**[Visual: Montage of circuit designs, AI neural networks, and chip layouts flowing together]** + +**Narrator:** "In today's rapidly evolving semiconductor landscape, Large Language Models are transforming how we approach hardware design, verification, and optimization. Our research spans the entire chip design workflow - from high-level behavioral descriptions to low-level circuit implementations." + +--- + +## Project Scope Overview (45-90 seconds) +**[Visual: Animated diagram showing the design flow with different components highlighted]** + +**Narrator:** "LLM4Hardware encompasses twelve cutting-edge research projects, each addressing critical challenges in modern chip design: + +- **AutoChip** generates functional Verilog modules with automated error correction +- **VeriThoughts** enables reasoning-based hardware generation with formal verification +- **ROME** introduces hierarchical prompting for complex hardware modules +- **Veritas** provides deterministic synthesis through conjunctive normal form +- **PrefixLLM** optimizes prefix adder circuits for area and delay +- Advanced testbench generation and bug detection for finite-state machines +- Natural language to SystemVerilog assertion translation +- Security-focused assertion generation +- RAG-enhanced SVA generation for OpenTitan +- **LLMPirate** explores IP security implications +- **C2HLSC** bridges software-to-hardware design gaps +- **Masala-CHAI** creates comprehensive SPICE netlist datasets" + +--- + +## Innovation Highlight (90-120 seconds) +**[Visual: Split screen showing traditional vs. AI-assisted design flows]** + +**Narrator:** "What sets our approach apart is the seamless integration of natural language processing with formal verification methods. We're not just automating existing processes - we're fundamentally reimagining how designers interact with hardware description languages, making chip design more accessible, efficient, and reliable." + +--- + +## Impact Statement (120-150 seconds) +**[Visual: Graph showing improvements in design time, error reduction, and accessibility]** + +**Narrator:** "Our research demonstrates significant improvements in design productivity, error reduction, and accessibility for both novice and expert designers. By leveraging the power of Large Language Models, we're democratizing chip design while maintaining the rigor and precision that modern semiconductor applications demand." + +--- + +## Closing (150-180 seconds) +**[Visual: Animated logo with project links and GitHub repository]** + +**Narrator:** "Join us as we explore these groundbreaking technologies that are shaping the future of chip design. Each module in our comprehensive suite offers unique capabilities, from automated code generation to sophisticated verification frameworks. Welcome to the future of AI-driven hardware design." + +**[Visual: Fade to project website/GitHub with soft background music]** + +--- + +## Technical Notes for Video Production: + +### Visual Style Guidelines: +- Use modern, clean graphics with a tech-forward aesthetic +- Color scheme: Deep blues, electric greens, and white for high contrast +- Incorporate circuit board patterns and neural network visualizations +- Use smooth transitions and subtle animations + +### Audio Guidelines: +- Professional, clear narration (male or female voice) +- Subtle background music - ambient tech/electronic style +- Ensure narration pacing allows for visual comprehension +- Include brief pauses at section transitions + +### Graphics to Include: +1. Project logo/title card +2. Circuit design workflow diagram +3. Before/after comparison graphics +4. Performance improvement charts +5. Project component icons +6. GitHub repository showcase + +### Suggested Video Resolution: +- 1920x1080 (Full HD) minimum +- 4K preferred for presentation use +- 16:9 aspect ratio + +### Export Settings: +- MP4 format for compatibility +- High quality settings for presentation use +- Include subtitles/captions for accessibility \ No newline at end of file