From a8ac57f9a2cc707a642f354f01d789a3b5f11a35 Mon Sep 17 00:00:00 2001 From: Or Bitan Date: Tue, 24 Mar 2026 14:35:33 +0200 Subject: [PATCH 1/6] add helper function for can_rx --- drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c | 12 ++++++++++++ drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h | 11 +++++++++++ 2 files changed, 23 insertions(+) diff --git a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c index 7b7ed29..93c3cc7 100644 --- a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c +++ b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c @@ -175,6 +175,18 @@ void canard_stm32g4fdcan_wipe_filters(canard_stm32g4_fdcan_driver *driver) memset(sram->extid_filter_element, 0, sizeof(sram->extid_filter_element)); } +void canard_stm32g4fdcan_config_irq_lines(canard_stm32g4_fdcan_driver *driver) +{ + fdcan_registers *fdcan = driver->fdcan; + fdcan->ILS = 0; /* all interrupts on line 0 */ + fdcan->ILE = (1U << 0); /* enable line 0 */ +} + +uint32_t canard_stm32g4fdcan_get_base_addr(const canard_stm32g4_fdcan_driver *driver) +{ + return (uint32_t)driver->fdcan; +} + void canard_stm32g4fdcan_start(canard_stm32g4_fdcan_driver *driver) { fdcan_registers *fdcan = driver->fdcan; diff --git a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h index f1b2fe2..9eeda50 100644 --- a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h +++ b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h @@ -61,6 +61,17 @@ int canard_stm32g4fdcan_init(canard_stm32g4_fdcan_driver *driver, int bitrate_bp */ void canard_stm32g4fdcan_start(canard_stm32g4_fdcan_driver *driver); +/** + * Routes all FDCAN interrupts to line 0 and enables it. + * Call this before enabling the NVIC IRQ for IT0. + */ +void canard_stm32g4fdcan_config_irq_lines(canard_stm32g4_fdcan_driver *driver); + +/** + * Returns the base address of the FDCAN peripheral in the driver. + */ +uint32_t canard_stm32g4fdcan_get_base_addr(const canard_stm32g4_fdcan_driver *driver); + /** * Creates a filter based on broadcast message IDs. Pass DroneCAN message IDs to create a filter. * Due to internal organization, these filters come in pairs: just set to 0 if not needed. From e34b6f44b4e44bcadb804a7eaf47a07c7343c622 Mon Sep 17 00:00:00 2001 From: Or Bitan Date: Wed, 25 Mar 2026 13:39:24 +0200 Subject: [PATCH 2/6] move interrupt configuration to init --- drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c | 38 +++++++++++++------- drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h | 5 --- 2 files changed, 25 insertions(+), 18 deletions(-) diff --git a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c index 93c3cc7..0b2ef01 100644 --- a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c +++ b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c @@ -9,6 +9,7 @@ #include "canard_stm32g4_fdcan.h" #include #include "_fdcan_g4.h" +#include "stm32g4xx.h" #include "../stm32/canard_stm32.h" /* for CanardSTM32ComputeCANTimings */ /* Local */ @@ -29,6 +30,9 @@ __attribute__((const)) static inline int dlc_encode(int data_len, int fd); #define EXT_ID_FILTER 0x1FFFFFFF +#ifndef CANARD_STM32G4_FDCAN_IRQ_PRIORITY +#define CANARD_STM32G4_FDCAN_IRQ_PRIORITY 9U +#endif /* Module */ @@ -136,7 +140,27 @@ int canard_stm32g4fdcan_init(canard_stm32g4_fdcan_driver *driver, int bitrate_bp * - on fifo0/1 received/lost * - on bus-off */ /* bus-off | rx1 lost | rx1 new | rx0 lost | rx0 new */ - fdcan->IE = (1 << 19) | (1 << 5) | (1 << 3) | (1 << 2) | (1 << 0); + fdcan->IE = (1 << 19) | (1 << 5) | (1 << 3) | (1 << 2) | (1 << 0); + fdcan->ILS = 0; /* all interrupts on line 0 */ + fdcan->ILE = (1 << 0); /* enable line 0 */ + + IRQn_Type irqn = FDCAN1_IT0_IRQn; + switch ((uint32_t)driver->fdcan) { +#ifdef FDCAN2_IT0_IRQn + case FDCAN2_ADDR: + irqn = FDCAN2_IT0_IRQn; + break; +#endif +#ifdef FDCAN3_IT0_IRQn + case FDCAN3_ADDR: + irqn = FDCAN3_IT0_IRQn; + break; +#endif + default: break; + } + NVIC_SetPriority(irqn, CANARD_STM32G4_FDCAN_IRQ_PRIORITY); + NVIC_EnableIRQ(irqn); + driver->fdcan_sram = (void *) fdcan_ram(fdcan); memset(driver->fdcan_sram, 0, sizeof(fdcan_sram)); return 0; @@ -175,18 +199,6 @@ void canard_stm32g4fdcan_wipe_filters(canard_stm32g4_fdcan_driver *driver) memset(sram->extid_filter_element, 0, sizeof(sram->extid_filter_element)); } -void canard_stm32g4fdcan_config_irq_lines(canard_stm32g4_fdcan_driver *driver) -{ - fdcan_registers *fdcan = driver->fdcan; - fdcan->ILS = 0; /* all interrupts on line 0 */ - fdcan->ILE = (1U << 0); /* enable line 0 */ -} - -uint32_t canard_stm32g4fdcan_get_base_addr(const canard_stm32g4_fdcan_driver *driver) -{ - return (uint32_t)driver->fdcan; -} - void canard_stm32g4fdcan_start(canard_stm32g4_fdcan_driver *driver) { fdcan_registers *fdcan = driver->fdcan; diff --git a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h index 9eeda50..5190093 100644 --- a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h +++ b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h @@ -61,11 +61,6 @@ int canard_stm32g4fdcan_init(canard_stm32g4_fdcan_driver *driver, int bitrate_bp */ void canard_stm32g4fdcan_start(canard_stm32g4_fdcan_driver *driver); -/** - * Routes all FDCAN interrupts to line 0 and enables it. - * Call this before enabling the NVIC IRQ for IT0. - */ -void canard_stm32g4fdcan_config_irq_lines(canard_stm32g4_fdcan_driver *driver); /** * Returns the base address of the FDCAN peripheral in the driver. From e8c98944b92f64dd498b04e5207767623a573ede Mon Sep 17 00:00:00 2001 From: Or Bitan Date: Wed, 25 Mar 2026 13:41:41 +0200 Subject: [PATCH 3/6] remove canard_stm32g4fdcan_get_base_addr function --- drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h index 5190093..f1b2fe2 100644 --- a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h +++ b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h @@ -61,12 +61,6 @@ int canard_stm32g4fdcan_init(canard_stm32g4_fdcan_driver *driver, int bitrate_bp */ void canard_stm32g4fdcan_start(canard_stm32g4_fdcan_driver *driver); - -/** - * Returns the base address of the FDCAN peripheral in the driver. - */ -uint32_t canard_stm32g4fdcan_get_base_addr(const canard_stm32g4_fdcan_driver *driver); - /** * Creates a filter based on broadcast message IDs. Pass DroneCAN message IDs to create a filter. * Due to internal organization, these filters come in pairs: just set to 0 if not needed. From c3c0408b14ea548210aaff36f390a2564244db62 Mon Sep 17 00:00:00 2001 From: Or Bitan Date: Wed, 25 Mar 2026 13:45:24 +0200 Subject: [PATCH 4/6] move nvic settings to can-rx --- drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c | 21 -------------------- 1 file changed, 21 deletions(-) diff --git a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c index 0b2ef01..282787e 100644 --- a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c +++ b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c @@ -9,7 +9,6 @@ #include "canard_stm32g4_fdcan.h" #include #include "_fdcan_g4.h" -#include "stm32g4xx.h" #include "../stm32/canard_stm32.h" /* for CanardSTM32ComputeCANTimings */ /* Local */ @@ -30,9 +29,6 @@ __attribute__((const)) static inline int dlc_encode(int data_len, int fd); #define EXT_ID_FILTER 0x1FFFFFFF -#ifndef CANARD_STM32G4_FDCAN_IRQ_PRIORITY -#define CANARD_STM32G4_FDCAN_IRQ_PRIORITY 9U -#endif /* Module */ @@ -144,23 +140,6 @@ int canard_stm32g4fdcan_init(canard_stm32g4_fdcan_driver *driver, int bitrate_bp fdcan->ILS = 0; /* all interrupts on line 0 */ fdcan->ILE = (1 << 0); /* enable line 0 */ - IRQn_Type irqn = FDCAN1_IT0_IRQn; - switch ((uint32_t)driver->fdcan) { -#ifdef FDCAN2_IT0_IRQn - case FDCAN2_ADDR: - irqn = FDCAN2_IT0_IRQn; - break; -#endif -#ifdef FDCAN3_IT0_IRQn - case FDCAN3_ADDR: - irqn = FDCAN3_IT0_IRQn; - break; -#endif - default: break; - } - NVIC_SetPriority(irqn, CANARD_STM32G4_FDCAN_IRQ_PRIORITY); - NVIC_EnableIRQ(irqn); - driver->fdcan_sram = (void *) fdcan_ram(fdcan); memset(driver->fdcan_sram, 0, sizeof(fdcan_sram)); return 0; From dd646b6d4e5fc32ff5c828597825c3601f5e43ef Mon Sep 17 00:00:00 2001 From: Or Bitan Date: Wed, 25 Mar 2026 13:47:19 +0200 Subject: [PATCH 5/6] add canard_stm32g4fdcan_get_base_addr --- drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c | 5 +++++ drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c index 282787e..f27ddb8 100644 --- a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c +++ b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c @@ -185,6 +185,11 @@ void canard_stm32g4fdcan_start(canard_stm32g4_fdcan_driver *driver) while ((fdcan->CCCR & (1 << 0))); /* Wait until we leave init mode */ } +uint32_t canard_stm32g4fdcan_get_base_addr(const canard_stm32g4_fdcan_driver *driver) +{ + return (uint32_t)driver->fdcan; +} + int canard_stm32g4fdcan_transmit(canard_stm32g4_fdcan_driver *driver, const CanardCANFrame* const frame) { clear_and_handle_faults(driver); diff --git a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h index f1b2fe2..a7926ff 100644 --- a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h +++ b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.h @@ -61,6 +61,11 @@ int canard_stm32g4fdcan_init(canard_stm32g4_fdcan_driver *driver, int bitrate_bp */ void canard_stm32g4fdcan_start(canard_stm32g4_fdcan_driver *driver); +/** + * Returns the base address of the FDCAN peripheral in the driver. + */ +uint32_t canard_stm32g4fdcan_get_base_addr(const canard_stm32g4_fdcan_driver *driver); + /** * Creates a filter based on broadcast message IDs. Pass DroneCAN message IDs to create a filter. * Due to internal organization, these filters come in pairs: just set to 0 if not needed. From b66a5d09ea04e8f0891dd62a190226f9a6c166bf Mon Sep 17 00:00:00 2001 From: Or Bitan Date: Wed, 25 Mar 2026 13:49:25 +0200 Subject: [PATCH 6/6] add space --- drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c index f27ddb8..a85b697 100644 --- a/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c +++ b/drivers/stm32g4_fdcan/canard_stm32g4_fdcan.c @@ -187,7 +187,7 @@ void canard_stm32g4fdcan_start(canard_stm32g4_fdcan_driver *driver) uint32_t canard_stm32g4fdcan_get_base_addr(const canard_stm32g4_fdcan_driver *driver) { - return (uint32_t)driver->fdcan; + return (uint32_t) driver->fdcan; } int canard_stm32g4fdcan_transmit(canard_stm32g4_fdcan_driver *driver, const CanardCANFrame* const frame)