`reuseMemoryAllocations` pass needs rewrite

[zasdfgbnm]

First, I don't think it makes sense to alias register tensors, regardless of its size. Modern compilers commonly convert user code into SSA. For CUDA, user C++ code is lowered to NVVM IR, which is based on LLVM IR, which is SSA. Aliasing register tensor at best is a no-op, and at worst, it would increase the compilation time of the C++ -> NVVM IR lowering in nvRTC. So we should only focus on the aliasing of shared memory and global memory.

Currently, reuseMemoryAllocations can only alias tensors with the same size, this does not work well for applications like matmul. For the case of matmul, in prologue, the shared memory tensors has size cta_tile.M x cta_tile.K and cta_tile.N x cta_tile.K. In epilogue, the shared memory tensors has size cta_tile.M x cta_tile.N, which is typically different from the previous shared memory tensor sizes. We need a smarter algorithm to be able to reuse prologue tensors's memory for epilogue.

Reference implementation: csarofeen/pytorch#1979

[zasdfgbnm]

cc @naoyam @drzejan2

[csarofeen]

I actually wonder if we should stop worrying about aliasing, and for smem and global memory focus on a stack of alloc and free's. A reuse pass always seemed a bit suspect to me. Yes in theory it could do more interesting reuse than simply offsetting a pointer with a high water mark, but I've never been sure how much better.