TDoA support: is the FPGA tick counter available in the current bitstream?

[markdouglas-nz]

Hi,

I'm exploring using Web-888 receivers for TDoA (Time Difference of Arrival) geolocation, similar to the KiwiSDR TDoA extension. The Web-888 hardware looks ideal for this — the built-in GPS module and 0.5ppm TCXO are exactly what's needed for time-synchronised IQ recording across multiple receivers.

I noticed that in the current server codebase, the per-buffer FPGA tick counter in rx/data_pump.cpp is set to zero:

rx->ticks[rx->wr_pos] = 0;

The older Beagle_SDR_GPS fork reads actual 48-bit FPGA ticks from hardware at the same location:

rx->ticks[rx->wr_pos] = S16x4_S64(0, rxt->ticks[2], rxt->ticks[1], rxt->ticks[0]);

This tick counter is what allows the gpssec/gpsnsec fields in the IQ packet header (snd_pkt_iq_t) to have sub-second precision — which is essential for TDoA multilateration.

My questions:

1. Does the current Web-888 FPGA bitstream include the tick counter register, or was it removed from the HDL?
2. Is there a technical reason the tick counter was zeroed in data_pump.cpp, or is it just not yet implemented for the Web-888 hardware?
3. Are there any plans to re-enable TDoA support? (The README mentions "Disable TDoA extension for now")

The GPS PPS integration already looks solid (the Chrony PPS fix in the recent firmware is great). If the FPGA tick counter is present, restoring it would enable TDoA across the Web-888 network — which would be a significant feature differentiator.

Happy to help test if there's a development branch with this enabled.

Thanks!