diff --git a/Application/blink/.ccsproject b/Application/blink/.ccsproject new file mode 100644 index 0000000..47819cb --- /dev/null +++ b/Application/blink/.ccsproject @@ -0,0 +1,17 @@ + + + + + + + + + + + + + + + + + diff --git a/Application/blink/.cproject b/Application/blink/.cproject new file mode 100644 index 0000000..cb1ac99 --- /dev/null +++ b/Application/blink/.cproject @@ -0,0 +1,221 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Application/blink/.gitignore b/Application/blink/.gitignore new file mode 100644 index 0000000..3df573f --- /dev/null +++ b/Application/blink/.gitignore @@ -0,0 +1 @@ +/Debug/ diff --git a/Application/blink/.launches/blink.launch b/Application/blink/.launches/blink.launch new file mode 100644 index 0000000..0cfb451 --- /dev/null +++ b/Application/blink/.launches/blink.launch @@ -0,0 +1,16 @@ + + + + + + + + + + + + + + + + diff --git a/Application/blink/.project b/Application/blink/.project new file mode 100644 index 0000000..c83ea79 --- /dev/null +++ b/Application/blink/.project @@ -0,0 +1,27 @@ + + + blink + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + com.ti.ccstudio.core.ccsNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/Application/blink/.settings/org.eclipse.cdt.codan.core.prefs b/Application/blink/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 0000000..f653028 --- /dev/null +++ b/Application/blink/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,3 @@ +eclipse.preferences.version=1 +inEditor=false +onBuild=false diff --git a/Application/blink/.settings/org.eclipse.cdt.debug.core.prefs b/Application/blink/.settings/org.eclipse.cdt.debug.core.prefs new file mode 100644 index 0000000..2adc7b1 --- /dev/null +++ b/Application/blink/.settings/org.eclipse.cdt.debug.core.prefs @@ -0,0 +1,2 @@ +eclipse.preferences.version=1 +org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker diff --git a/Application/blink/.settings/org.eclipse.core.resources.prefs b/Application/blink/.settings/org.eclipse.core.resources.prefs new file mode 100644 index 0000000..093dbb9 --- /dev/null +++ b/Application/blink/.settings/org.eclipse.core.resources.prefs @@ -0,0 +1,6 @@ +eclipse.preferences.version=1 +encoding//Debug/makefile=UTF-8 +encoding//Debug/objects.mk=UTF-8 +encoding//Debug/sources.mk=UTF-8 +encoding//Debug/subdir_rules.mk=UTF-8 +encoding//Debug/subdir_vars.mk=UTF-8 diff --git a/Application/blink/README.md b/Application/blink/README.md new file mode 100644 index 0000000..4b75bde --- /dev/null +++ b/Application/blink/README.md @@ -0,0 +1,20 @@ +## InK blinking LED + +### Hardware requirement +This demo is developed for [MSP430FR5969 LaunchPad](http://www.ti.com/tool/MSP-EXP430FR5969) with [TI Code Composer Studio™ IDE](http://www.ti.com/design-resources/embedded-development/ccs-development-tools.html). + +Mainly the following components on the board are used: + +* Button S1 (P4.5) and S2 (P1.1) +* Red LED 1 (P4.6) and green LED 2 (P1.0) +* A 32-kHz crystal (Y4) + +### Features + +* Pushing button S1 triggers the red LED to blink quickly for four times +* Pushing button S2 triggers the green LED to blink slowly for four times +* The red LED has higher priority over the green LED, so red LED blinking could preempt green LED blinking +* Power failure resilience + * For example, if power is lost at the second blinking of the green LED, after power is back online the green LED will continue blinking and finish the whole process of blinking four times + * Priority and preemption are kept during power failure and could be restored after power recovery +* Ultra low power enabled by using RTC, LFXT and LPM3 \ No newline at end of file diff --git a/Application/blink/appinit.c b/Application/blink/appinit.c new file mode 100644 index 0000000..03ef1a7 --- /dev/null +++ b/Application/blink/appinit.c @@ -0,0 +1,82 @@ +// This file is part of InK. +// +// author = "Philo Tang" +// maintainer = "Philo Tang" +// email = "H.TANG-1@student.tudelft.nl" +// +// copyright = "Copyright 2018 Delft University of Technology" +// license = "LGPL" +// version = "3.0" +// status = "Production" +// +// +// InK is free software: you ca n redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . + +#include "ink.h" + +#define THREAD1 7 +#define THREAD2 15 + +extern void thread1_init(); +extern void thread2_init(); + +// this is the function that will be called only at initial boot by the runtime. +void __app_init(){ + thread1_init(); + thread2_init(); +} + +void __app_reboot(){ + // Configure GPIO + P1OUT = 0; + P4OUT = 0; + P1DIR |= BIT0; + P4DIR |= BIT6; + + P1OUT |= BIT1; // Pull-up resistor on P1.1 + P1REN |= BIT1; // Select pull-up mode for P1.1 + P1DIR &= ~BIT1; + P1IES |= BIT1; // P1.1 Hi/Lo edge + P1IFG = 0; // Clear all P1 interrupt flags + P1IE |= BIT1; // P1.1 interrupt enabled + + P4OUT |= BIT5; // Pull-up resistor on P4.5 + P4REN |= BIT5; // Select pull-up mode for P4.5 + P4DIR &= ~BIT5; + + PJSEL0 = BIT4 | BIT5; // Initialize LFXT pins + + // Configure LFXT 32kHz crystal + CSCTL0_H = CSKEY >> 8; // Unlock CS registers + CSCTL4 &= ~LFXTOFF; // Enable LFXT + do + { + CSCTL5 &= ~LFXTOFFG; // Clear LFXT fault flag + SFRIFG1 &= ~OFIFG; + } while (SFRIFG1 & OFIFG); // Test oscillator fault flag + CSCTL0_H = 0; // Lock CS registers +} + +_interrupt(PORT1_VECTOR) +{ + P1IFG &= ~BIT1; // Clear P1.1 IFG + __SIGNAL((P4IN & BIT5) ? THREAD2 : THREAD1); + LPM3_EXIT; +} + +_interrupt(RTC_VECTOR) +{ + RTCPS1CTL &= ~RT1PSIE; // disable RTC Prescale Timer 1 Interrupt + LPM3_EXIT; +} diff --git a/Application/blink/lnk_msp430fr5969.cmd b/Application/blink/lnk_msp430fr5969.cmd new file mode 100644 index 0000000..e6e384d --- /dev/null +++ b/Application/blink/lnk_msp430fr5969.cmd @@ -0,0 +1,345 @@ +/* ============================================================================ */ +/* Copyright (c) 2017, Texas Instruments Incorporated */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following conditions */ +/* are met: */ +/* */ +/* * Redistributions of source code must retain the above copyright */ +/* notice, this list of conditions and the following disclaimer. */ +/* */ +/* * Redistributions in binary form must reproduce the above copyright */ +/* notice, this list of conditions and the following disclaimer in the */ +/* documentation and/or other materials provided with the distribution. */ +/* */ +/* * Neither the name of Texas Instruments Incorporated nor the names of */ +/* its contributors may be used to endorse or promote products derived */ +/* from this software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ +/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ +/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ +/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ +/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ +/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ +/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ +/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ +/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ +/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ============================================================================ */ + +/******************************************************************************/ +/* lnk_msp430fr5969.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5969 PROGRAMS */ +/* */ +/* Usage: lnk430 -o -m lnk.cmd */ +/* cl430 -z -o -m lnk.cmd */ +/* */ +/*----------------------------------------------------------------------------*/ +/* These linker options are for command line linking only. For IDE linking, */ +/* you should set your linker options in Project Properties */ +/* -c LINK USING C CONVENTIONS */ +/* -stack 0x0100 SOFTWARE STACK SIZE */ +/* -heap 0x0100 HEAP AREA SIZE */ +/* */ +/*----------------------------------------------------------------------------*/ +/* Version: 1.201 */ +/*----------------------------------------------------------------------------*/ + +/****************************************************************************/ +/* Specify the system memory map */ +/****************************************************************************/ + +MEMORY +{ + SFR : origin = 0x0000, length = 0x0010 + PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 + PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 + RAM : origin = 0x1C00, length = 0x0800 + INFOA : origin = 0x1980, length = 0x0080 + INFOB : origin = 0x1900, length = 0x0080 + INFOC : origin = 0x1880, length = 0x0080 + INFOD : origin = 0x1800, length = 0x0080 + FRAM : origin = 0x4400, length = 0xBB80 + FRAM2 : origin = 0x10000,length = 0x4000 + JTAGSIGNATURE : origin = 0xFF80, length = 0x0004, fill = 0xFFFF + BSLSIGNATURE : origin = 0xFF84, length = 0x0004, fill = 0xFFFF + IPESIGNATURE : origin = 0xFF88, length = 0x0008, fill = 0xFFFF + INT00 : origin = 0xFF90, length = 0x0002 + INT01 : origin = 0xFF92, length = 0x0002 + INT02 : origin = 0xFF94, length = 0x0002 + INT03 : origin = 0xFF96, length = 0x0002 + INT04 : origin = 0xFF98, length = 0x0002 + INT05 : origin = 0xFF9A, length = 0x0002 + INT06 : origin = 0xFF9C, length = 0x0002 + INT07 : origin = 0xFF9E, length = 0x0002 + INT08 : origin = 0xFFA0, length = 0x0002 + INT09 : origin = 0xFFA2, length = 0x0002 + INT10 : origin = 0xFFA4, length = 0x0002 + INT11 : origin = 0xFFA6, length = 0x0002 + INT12 : origin = 0xFFA8, length = 0x0002 + INT13 : origin = 0xFFAA, length = 0x0002 + INT14 : origin = 0xFFAC, length = 0x0002 + INT15 : origin = 0xFFAE, length = 0x0002 + INT16 : origin = 0xFFB0, length = 0x0002 + INT17 : origin = 0xFFB2, length = 0x0002 + INT18 : origin = 0xFFB4, length = 0x0002 + INT19 : origin = 0xFFB6, length = 0x0002 + INT20 : origin = 0xFFB8, length = 0x0002 + INT21 : origin = 0xFFBA, length = 0x0002 + INT22 : origin = 0xFFBC, length = 0x0002 + INT23 : origin = 0xFFBE, length = 0x0002 + INT24 : origin = 0xFFC0, length = 0x0002 + INT25 : origin = 0xFFC2, length = 0x0002 + INT26 : origin = 0xFFC4, length = 0x0002 + INT27 : origin = 0xFFC6, length = 0x0002 + INT28 : origin = 0xFFC8, length = 0x0002 + INT29 : origin = 0xFFCA, length = 0x0002 + INT30 : origin = 0xFFCC, length = 0x0002 + INT31 : origin = 0xFFCE, length = 0x0002 + INT32 : origin = 0xFFD0, length = 0x0002 + INT33 : origin = 0xFFD2, length = 0x0002 + INT34 : origin = 0xFFD4, length = 0x0002 + INT35 : origin = 0xFFD6, length = 0x0002 + INT36 : origin = 0xFFD8, length = 0x0002 + INT37 : origin = 0xFFDA, length = 0x0002 + INT38 : origin = 0xFFDC, length = 0x0002 + INT39 : origin = 0xFFDE, length = 0x0002 + INT40 : origin = 0xFFE0, length = 0x0002 + INT41 : origin = 0xFFE2, length = 0x0002 + INT42 : origin = 0xFFE4, length = 0x0002 + INT43 : origin = 0xFFE6, length = 0x0002 + INT44 : origin = 0xFFE8, length = 0x0002 + INT45 : origin = 0xFFEA, length = 0x0002 + INT46 : origin = 0xFFEC, length = 0x0002 + INT47 : origin = 0xFFEE, length = 0x0002 + INT48 : origin = 0xFFF0, length = 0x0002 + INT49 : origin = 0xFFF2, length = 0x0002 + INT50 : origin = 0xFFF4, length = 0x0002 + INT51 : origin = 0xFFF6, length = 0x0002 + INT52 : origin = 0xFFF8, length = 0x0002 + INT53 : origin = 0xFFFA, length = 0x0002 + INT54 : origin = 0xFFFC, length = 0x0002 + RESET : origin = 0xFFFE, length = 0x0002 +} + +/****************************************************************************/ +/* Specify the sections allocation into memory */ +/****************************************************************************/ + +SECTIONS +{ + GROUP(RW_IPE) + { + GROUP(READ_WRITE_MEMORY) + { + .TI.persistent : {} /* For #pragma persistent */ + .cio : {} /* C I/O Buffer */ + .sysmem : {} /* Dynamic memory allocation area */ + } PALIGN(0x0400), RUN_START(fram_rw_start) + + GROUP(IPENCAPSULATED_MEMORY) + { + .ipestruct : {} /* IPE Data structure */ + .ipe : {} /* IPE */ + .ipe_const : {} /* IPE Protected constants */ + .ipe:_isr : {} /* IPE ISRs */ + .ipe_vars : type = NOINIT{} /* IPE variables */ + } PALIGN(0x0400), RUN_START(fram_ipe_start) RUN_END(fram_ipe_end) RUN_END(fram_rx_start) + } > 0x4400 + + .cinit : {} > FRAM /* Initialization tables */ + .pinit : {} > FRAM /* C++ Constructor tables */ + .binit : {} > FRAM /* Boot-time Initialization tables */ + .init_array : {} > FRAM /* C++ Constructor tables */ + .mspabi.exidx : {} > FRAM /* C++ Constructor tables */ + .mspabi.extab : {} > FRAM /* C++ Constructor tables */ +#ifndef __LARGE_DATA_MODEL__ + .const : {} > FRAM /* Constant data */ +#else + .const : {} >> FRAM | FRAM2 /* Constant data */ +#endif + + .text:_isr : {} > FRAM /* Code ISRs */ +#ifndef __LARGE_CODE_MODEL__ + .text : {} > FRAM /* Code */ +#else + .text : {} >> FRAM2 | FRAM /* Code */ +#endif +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + #ifndef __LARGE_CODE_MODEL__ + .TI.ramfunc : {} load=FRAM, run=RAM, table(BINIT) + #else + .TI.ramfunc : {} load=FRAM | FRAM2, run=RAM, table(BINIT) + #endif + #endif +#endif + + .jtagsignature : {} > JTAGSIGNATURE /* JTAG Signature */ + .bslsignature : {} > BSLSIGNATURE /* BSL Signature */ + + GROUP(SIGNATURE_SHAREDMEMORY) + { + .ipesignature : {} /* IPE Signature */ + .jtagpassword : {} /* JTAG Password */ + } > IPESIGNATURE + + .bss : {} > RAM /* Global & static vars */ + .data : {} > RAM /* Global & static vars */ + .TI.noinit : {} > RAM /* For #pragma noinit */ + .stack : {} > RAM (HIGH) /* Software system stack */ + + .infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FRAM Memory segments */ + .infoB (NOLOAD) : {} > INFOB + .infoC (NOLOAD) : {} > INFOC + .infoD (NOLOAD) : {} > INFOD + + /* MSP430 Interrupt vectors */ + .int00 : {} > INT00 + .int01 : {} > INT01 + .int02 : {} > INT02 + .int03 : {} > INT03 + .int04 : {} > INT04 + .int05 : {} > INT05 + .int06 : {} > INT06 + .int07 : {} > INT07 + .int08 : {} > INT08 + .int09 : {} > INT09 + .int10 : {} > INT10 + .int11 : {} > INT11 + .int12 : {} > INT12 + .int13 : {} > INT13 + .int14 : {} > INT14 + .int15 : {} > INT15 + .int16 : {} > INT16 + .int17 : {} > INT17 + .int18 : {} > INT18 + .int19 : {} > INT19 + .int20 : {} > INT20 + .int21 : {} > INT21 + .int22 : {} > INT22 + .int23 : {} > INT23 + .int24 : {} > INT24 + .int25 : {} > INT25 + .int26 : {} > INT26 + .int27 : {} > INT27 + .int28 : {} > INT28 + .int29 : {} > INT29 + AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT + RTC : { * ( .int31 ) } > INT31 type = VECT_INIT + PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT + PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT + TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT + TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT + PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT + TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT + TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT + PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT + TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT + TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT + DMA : { * ( .int42 ) } > INT42 type = VECT_INIT + USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT + TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT + TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT + ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT + USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT + USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT + WDT : { * ( .int49 ) } > INT49 type = VECT_INIT + TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT + TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT + COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT + UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT + SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT + .reset : {} > RESET /* MSP430 Reset vector */ +} + +/****************************************************************************/ +/* MPU/IPE Specific memory segment definitons */ +/****************************************************************************/ + +#ifdef _IPE_ENABLE + #define IPE_MPUIPLOCK 0x0080 + #define IPE_MPUIPENA 0x0040 + #define IPE_MPUIPPUC 0x0020 + + // Evaluate settings for the control setting of IP Encapsulation + #if defined(_IPE_ASSERTPUC1) + #if defined(_IPE_LOCK ) && (_IPE_ASSERTPUC1 == 0x08)) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC |IPE_MPUIPLOCK); + #elif defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #elif (_IPE_ASSERTPUC1 == 0x08) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPPUC); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #else + #if defined(_IPE_LOCK ) + fram_ipe_enable_value = (IPE_MPUIPENA | IPE_MPUIPLOCK); + #else + fram_ipe_enable_value = (IPE_MPUIPENA); + #endif + #endif + + // Segment definitions + #ifdef _IPE_MANUAL // For custom sizes selected in the GUI + fram_ipe_border1 = (_IPE_SEGB1>>4); + fram_ipe_border2 = (_IPE_SEGB2>>4); + #else // Automated sizes generated by the Linker + fram_ipe_border2 = fram_ipe_end >> 4; + fram_ipe_border1 = fram_ipe_start >> 4; + #endif + + fram_ipe_settings_struct_address = Ipe_settingsStruct >> 4; + fram_ipe_checksum = ~((fram_ipe_enable_value & fram_ipe_border2 & fram_ipe_border1) | (fram_ipe_enable_value & ~fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & fram_ipe_border2 & ~fram_ipe_border1) | (~fram_ipe_enable_value & ~fram_ipe_border2 & fram_ipe_border1)); +#endif + +#ifdef _MPU_ENABLE + #define MPUPW (0xA500) /* MPU Access Password */ + #define MPUENA (0x0001) /* MPU Enable */ + #define MPULOCK (0x0002) /* MPU Lock */ + #define MPUSEGIE (0x0010) /* MPU Enable NMI on Segment violation */ + + __mpu_enable = 1; + // Segment definitions + #ifdef _MPU_MANUAL // For custom sizes selected in the GUI + mpu_segment_border1 = _MPU_SEGB1 >> 4; + mpu_segment_border2 = _MPU_SEGB2 >> 4; + mpu_sam_value = (_MPU_SAM0 << 12) | (_MPU_SAM3 << 8) | (_MPU_SAM2 << 4) | _MPU_SAM1; + #else // Automated sizes generated by Linker + #ifdef _IPE_ENABLE //if IPE is used in project too + //seg1 = any read + write persistent variables + //seg2 = ipe = read + write + execute access + //seg3 = code, read + execute only + mpu_segment_border1 = fram_ipe_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1573; // Info R, Seg3 RX, Seg2 RWX, Seg1 RW + #else + mpu_segment_border1 = fram_rx_start >> 4; + mpu_segment_border2 = fram_rx_start >> 4; + mpu_sam_value = 0x1513; // Info R, Seg3 RX, Seg2 R, Seg1 RW + #endif + #endif + #ifdef _MPU_LOCK + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA | MPULOCK; + #endif + #else + #ifdef _MPU_ENABLE_NMI + mpu_ctl0_value = MPUPW | MPUENA | MPUSEGIE; + #else + mpu_ctl0_value = MPUPW | MPUENA; + #endif + #endif +#endif + +/****************************************************************************/ +/* Include peripherals memory map */ +/****************************************************************************/ + +-l msp430fr5969.cmd + diff --git a/Application/blink/targetConfigs/MSP430FR5969.ccxml b/Application/blink/targetConfigs/MSP430FR5969.ccxml new file mode 100644 index 0000000..cdf1381 --- /dev/null +++ b/Application/blink/targetConfigs/MSP430FR5969.ccxml @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/Application/blink/targetConfigs/readme.txt b/Application/blink/targetConfigs/readme.txt new file mode 100644 index 0000000..d783fef --- /dev/null +++ b/Application/blink/targetConfigs/readme.txt @@ -0,0 +1,9 @@ +The 'targetConfigs' folder contains target-configuration (.ccxml) files, automatically generated based +on the device and connection settings specified in your project on the Properties > General page. + +Please note that in automatic target-configuration management, changes to the project's device and/or +connection settings will either modify an existing or generate a new target-configuration file. Thus, +if you manually edit these auto-generated files, you may need to re-apply your changes. Alternatively, +you may create your own target-configuration file for this project and manage it manually. You can +always switch back to automatic target-configuration management by checking the "Manage the project's +target-configuration automatically" checkbox on the project's Properties > General page. \ No newline at end of file diff --git a/Application/blink/thread1.c b/Application/blink/thread1.c new file mode 100644 index 0000000..432c573 --- /dev/null +++ b/Application/blink/thread1.c @@ -0,0 +1,82 @@ +// This file is part of InK. +// +// author = "Philo Tang" +// maintainer = "Philo Tang" +// email = "H.TANG-1@student.tudelft.nl" +// +// copyright = "Copyright 2018 Delft University of Technology" +// license = "LGPL" +// version = "3.0" +// status = "Production" +// +// +// InK is free software: you ca n redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . + +#include "ink.h" + +#define THREAD1 7 + +// define task-shared persistent variables. +__shared( + uint8_t last_out; + uint8_t count; +) + +TASK(t_init); +TASK(t_rtc); +TASK(t_update); + +// called at the very first boot +void thread1_init(){ + // create a thread with priority and entry task t_init + __CREATE(THREAD1,t_init); +// __SIGNAL(THREAD1); +} + +TASK(t_init){ + __SET(last_out, 0); + __SET(count, 0); + + // next task + return t_rtc; +} + +TASK(t_rtc){ + // Configure RTC + RTCCTL01 = RTCHOLD; + RTCPS = 0; + RTCPS1CTL = RT1IP_5 | RT1PSIE; + RTCCTL01 &= ~(RTCHOLD); // Start RTC + + __bis_SR_register(LPM3_bits | GIE); // Enter LPM3 w/interrupt + + RTCCTL01 = RTCHOLD; + // next task + return t_update; +} + +TASK(t_update){ + uint8_t l_count = __GET(count) + 1; + uint8_t out = __GET(last_out) ^ BIT6; + P4OUT = BIT5 | out; // always keep pull-up resistor on P4.5 + __SET(last_out, out); + + if(l_count < 8){ + __SET(count, l_count); + return t_rtc; + } + else{ + return NULL; + } +} diff --git a/Application/blink/thread2.c b/Application/blink/thread2.c new file mode 100644 index 0000000..4e22238 --- /dev/null +++ b/Application/blink/thread2.c @@ -0,0 +1,82 @@ +// This file is part of InK. +// +// author = "Philo Tang" +// maintainer = "Philo Tang" +// email = "H.TANG-1@student.tudelft.nl" +// +// copyright = "Copyright 2018 Delft University of Technology" +// license = "LGPL" +// version = "3.0" +// status = "Production" +// +// +// InK is free software: you ca n redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . + +#include "ink.h" + +#define THREAD2 15 + +// define task-shared persistent variables. +__shared( + uint8_t last_out; + uint8_t count; +) + +TASK(t_init); +TASK(t_rtc); +TASK(t_update); + +// called at the very first boot +void thread2_init(){ + // create a thread with priority and entry task t_init + __CREATE(THREAD2,t_init); +// __SIGNAL(THREAD2); +} + +TASK(t_init){ + __SET(last_out, 0); + __SET(count, 0); + + // next task + return t_rtc; +} + +TASK(t_rtc){ + // Configure RTC + RTCCTL01 = RTCHOLD; + RTCPS = 0; + RTCPS1CTL = RT1IP_6 | RT1PSIE; + RTCCTL01 &= ~(RTCHOLD); // Start RTC + + __bis_SR_register(LPM3_bits | GIE); // Enter LPM3 w/interrupt + + RTCCTL01 = RTCHOLD; + // next task + return t_update; +} + +TASK(t_update){ + uint8_t l_count = __GET(count) + 1; + uint8_t out = __GET(last_out) ^ BIT0; + P1OUT = BIT1 | out; // always keep pull-up resistor on P1.1 + __SET(last_out, out); + + if(l_count < 8){ + __SET(count, l_count); + return t_rtc; + } + else{ + return NULL; + } +} diff --git a/Kernel/.cproject b/Kernel/.cproject index 38a10f3..7c7d1b0 100644 --- a/Kernel/.cproject +++ b/Kernel/.cproject @@ -15,48 +15,49 @@ - - @@ -82,7 +83,7 @@ - + diff --git a/Kernel/scheduler/scheduler.c b/Kernel/scheduler/scheduler.c index 46d777a..7ff7e71 100644 --- a/Kernel/scheduler/scheduler.c +++ b/Kernel/scheduler/scheduler.c @@ -164,7 +164,10 @@ void __scheduler_run() // remain consistent and stable. __task_commit(); +#ifdef TIMERS_ON __reboot_timers(); +#endif + // enable interrupts __enable_interrupt();