From c303b4dabd732cef1c0f8b0e594fe17c2d2534e6 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Thu, 18 Dec 2025 11:47:42 -0600 Subject: [PATCH 1/2] UPSTREAM: soc: ti: k3: Add support for AM62L commit a159d0ee0351a6a43a188b15d06f88ac00527735 upstream. The TI AM62L is a low-power ARM Cortex-A53 based SoC with display for IOT, HMI and general purpose applications. More information here: https://www.ti.com/product/AM62L Add initial SoC and DTS support here. Signed-off-by: Andrew Davis --- dts/arm64/ti/am62l3_a53.dtsi | 173 +++++++++++++++++++ dts/vendor/ti/am62l-main.dtsi | 283 ++++++++++++++++++++++++++++++++ dts/vendor/ti/am62l-wakeup.dtsi | 56 +++++++ soc/ti/k3/am6x/CMakeLists.txt | 2 +- soc/ti/k3/am6x/Kconfig | 1 + soc/ti/k3/am6x/Kconfig.soc | 5 + soc/ti/k3/soc.yml | 3 + 7 files changed, 522 insertions(+), 1 deletion(-) create mode 100644 dts/arm64/ti/am62l3_a53.dtsi create mode 100644 dts/vendor/ti/am62l-main.dtsi create mode 100644 dts/vendor/ti/am62l-wakeup.dtsi diff --git a/dts/arm64/ti/am62l3_a53.dtsi b/dts/arm64/ti/am62l3_a53.dtsi new file mode 100644 index 000000000000..fa450878fc87 --- /dev/null +++ b/dts/arm64/ti/am62l3_a53.dtsi @@ -0,0 +1,173 @@ +/* + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <1>; + }; + }; + + firmware { + psci: psci { + compatible = "arm,psci-1.1"; + method = "smc"; + }; + + scmi { + compatible = "arm,scmi-smc"; + arm,smc-id = <0x82004000>; + shmem = <&scmi_shmem>; + + #address-cells = <1>; + #size-cells = <0>; + + scmi_pds: protocol@11 { + compatible = "arm,scmi-power"; + reg = <0x11>; + #power-domain-cells = <1>; + }; + + scmi_clk: protocol@14 { + compatible = "arm,scmi-clock"; + reg = <0x14>; + #clock-cells = <1>; + }; + }; + }; + + oc_sram: sram@70800000 { + compatible = "mmio-sram"; + reg = <0x70800000 DT_SIZE_K(64)>; + ranges = <0x0 0x70800000 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + + scmi_shmem: sram@0 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x100>; + }; + }; + + arch_timer: timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + interrupt-parent = <&gic>; + }; + + gic: interrupt-controller@1800000 { + compatible = "arm,gic-v3", "arm,gic"; + reg = <0x01800000 0x10000>, /* GICD */ + <0x01840000 0xc0000>; /* GICR */ + interrupt-controller; + #interrupt-cells = <4>; + #address-cells = <1>; + #size-cells = <1>; + status = "okay"; + + its: msi-controller@1820000 { + compatible = "arm,gic-v3-its"; + reg = <0x01820000 0x10000>; + status = "okay"; + }; + }; +}; + +&wkup_timer0 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&wkup_timer1 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&wkup_i2c0 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&main_uart0 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&main_uart1 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&main_uart2 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&main_uart3 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&main_uart4 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&main_uart5 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&main_uart6 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&main_i2c0 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&main_i2c1 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&main_i2c2 { + interrupts = ; + interrupt-parent = <&gic>; +}; + +&main_i2c3 { + interrupts = ; + interrupt-parent = <&gic>; +}; diff --git a/dts/vendor/ti/am62l-main.dtsi b/dts/vendor/ti/am62l-main.dtsi new file mode 100644 index 000000000000..c1e42304a49f --- /dev/null +++ b/dts/vendor/ti/am62l-main.dtsi @@ -0,0 +1,283 @@ +/* + * Device Tree Source for AM62L SoC Family Main Domain peripherals + * + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + main_uart0: serial@2800000 { + compatible = "ns16550"; + reg = <0x02800000 0x100>; + clock-frequency = <48000000>; + current-speed = <115200>; + reg-shift = <2>; + status = "disabled"; + }; + + main_uart1: serial@2810000 { + compatible = "ns16550"; + reg = <0x02810000 0x100>; + clock-frequency = <48000000>; + current-speed = <115200>; + reg-shift = <2>; + status = "disabled"; + }; + + main_uart2: serial@2820000 { + compatible = "ns16550"; + reg = <0x02820000 0x100>; + clock-frequency = <48000000>; + current-speed = <115200>; + reg-shift = <2>; + status = "disabled"; + }; + + main_uart3: serial@2830000 { + compatible = "ns16550"; + reg = <0x02830000 0x100>; + clock-frequency = <48000000>; + current-speed = <115200>; + reg-shift = <2>; + status = "disabled"; + }; + + main_uart4: serial@2840000 { + compatible = "ns16550"; + reg = <0x02840000 0x100>; + clock-frequency = <48000000>; + current-speed = <115200>; + reg-shift = <2>; + status = "disabled"; + }; + + main_uart5: serial@2850000 { + compatible = "ns16550"; + reg = <0x02850000 0x100>; + clock-frequency = <48000000>; + current-speed = <115200>; + reg-shift = <2>; + status = "disabled"; + }; + + main_uart6: serial@2860000 { + compatible = "ns16550"; + reg = <0x02860000 0x100>; + clock-frequency = <48000000>; + current-speed = <115200>; + reg-shift = <2>; + status = "disabled"; + }; + + main_i2c0: i2c@20000000 { + compatible = "ti,omap-i2c"; + reg = <0x20000000 0x100>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + main_i2c1: i2c@20010000 { + compatible = "ti,omap-i2c"; + reg = <0x20010000 0x100>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + main_i2c2: i2c@20020000 { + compatible = "ti,omap-i2c"; + reg = <0x20020000 0x100>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + main_i2c3: i2c@20030000 { + compatible = "ti,omap-i2c"; + reg = <0x20030000 0x100>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + main_gpio0: main-gpio0 { + #gpio-cells = <2>; + gpio-map = <0 0 &main_gpio0_0 0 0>, <1 0 &main_gpio0_0 1 0>, + <2 0 &main_gpio0_0 2 0>, <3 0 &main_gpio0_0 3 0>, + <4 0 &main_gpio0_0 4 0>, <5 0 &main_gpio0_0 5 0>, + <6 0 &main_gpio0_0 6 0>, <7 0 &main_gpio0_0 7 0>, + <8 0 &main_gpio0_0 8 0>, <9 0 &main_gpio0_0 9 0>, + <10 0 &main_gpio0_0 10 0>, <11 0 &main_gpio0_0 11 0>, + <12 0 &main_gpio0_0 12 0>, <13 0 &main_gpio0_0 13 0>, + <14 0 &main_gpio0_0 14 0>, <15 0 &main_gpio0_0 15 0>, + <16 0 &main_gpio0_0 16 0>, <17 0 &main_gpio0_0 17 0>, + <18 0 &main_gpio0_0 18 0>, <19 0 &main_gpio0_0 19 0>, + <20 0 &main_gpio0_0 20 0>, <21 0 &main_gpio0_0 21 0>, + <22 0 &main_gpio0_0 22 0>, <23 0 &main_gpio0_0 23 0>, + <24 0 &main_gpio0_0 24 0>, <25 0 &main_gpio0_0 25 0>, + <26 0 &main_gpio0_0 26 0>, <27 0 &main_gpio0_0 27 0>, + <28 0 &main_gpio0_0 28 0>, <29 0 &main_gpio0_0 29 0>, + <30 0 &main_gpio0_0 30 0>, <31 0 &main_gpio0_0 31 0>, + <32 0 &main_gpio0_1 0 0>, <33 0 &main_gpio0_1 1 0>, + <34 0 &main_gpio0_1 2 0>, <35 0 &main_gpio0_1 3 0>, + <36 0 &main_gpio0_1 4 0>, <37 0 &main_gpio0_1 5 0>, + <38 0 &main_gpio0_1 6 0>, <39 0 &main_gpio0_1 7 0>, + <40 0 &main_gpio0_1 8 0>, <41 0 &main_gpio0_1 9 0>, + <42 0 &main_gpio0_1 10 0>, <43 0 &main_gpio0_1 11 0>, + <44 0 &main_gpio0_1 12 0>, <45 0 &main_gpio0_1 13 0>, + <46 0 &main_gpio0_1 14 0>, <47 0 &main_gpio0_1 15 0>, + <48 0 &main_gpio0_1 16 0>, <49 0 &main_gpio0_1 17 0>, + <50 0 &main_gpio0_1 18 0>, <51 0 &main_gpio0_1 19 0>, + <52 0 &main_gpio0_1 20 0>, <53 0 &main_gpio0_1 21 0>, + <54 0 &main_gpio0_1 22 0>, <55 0 &main_gpio0_1 23 0>, + <56 0 &main_gpio0_1 24 0>, <57 0 &main_gpio0_1 25 0>, + <58 0 &main_gpio0_1 26 0>, <59 0 &main_gpio0_1 27 0>, + <60 0 &main_gpio0_1 28 0>, <61 0 &main_gpio0_1 29 0>, + <62 0 &main_gpio0_1 30 0>, <63 0 &main_gpio0_1 31 0>, + <64 0 &main_gpio0_2 0 0>, <65 0 &main_gpio0_2 1 0>, + <66 0 &main_gpio0_2 2 0>, <67 0 &main_gpio0_2 3 0>, + <68 0 &main_gpio0_2 4 0>, <69 0 &main_gpio0_2 5 0>, + <70 0 &main_gpio0_2 6 0>, <71 0 &main_gpio0_2 7 0>, + <72 0 &main_gpio0_2 8 0>, <73 0 &main_gpio0_2 9 0>, + <74 0 &main_gpio0_2 10 0>, <75 0 &main_gpio0_2 11 0>, + <76 0 &main_gpio0_2 12 0>, <77 0 &main_gpio0_2 13 0>, + <78 0 &main_gpio0_2 14 0>, <79 0 &main_gpio0_2 15 0>, + <80 0 &main_gpio0_2 16 0>, <81 0 &main_gpio0_2 17 0>, + <82 0 &main_gpio0_2 18 0>, <83 0 &main_gpio0_2 17 0>, + <84 0 &main_gpio0_2 20 0>, <85 0 &main_gpio0_2 21 0>, + <86 0 &main_gpio0_2 22 0>, <87 0 &main_gpio0_2 23 0>, + <88 0 &main_gpio0_2 24 0>, <89 0 &main_gpio0_2 25 0>, + <90 0 &main_gpio0_2 26 0>, <91 0 &main_gpio0_2 27 0>, + <92 0 &main_gpio0_2 28 0>, <93 0 &main_gpio0_2 29 0>, + <94 0 &main_gpio0_2 30 0>, <95 0 &main_gpio0_2 31 0>, + <96 0 &main_gpio0_3 0 0>, <97 0 &main_gpio0_3 1 0>, + <98 0 &main_gpio0_3 2 0>, <99 0 &main_gpio0_3 3 0>, + <100 0 &main_gpio0_3 4 0>, <101 0 &main_gpio0_3 5 0>, + <102 0 &main_gpio0_3 6 0>, <103 0 &main_gpio0_3 7 0>, + <104 0 &main_gpio0_3 8 0>, <105 0 &main_gpio0_3 9 0>, + <106 0 &main_gpio0_3 10 0>, <107 0 &main_gpio0_3 11 0>, + <108 0 &main_gpio0_3 12 0>, <109 0 &main_gpio0_3 13 0>, + <110 0 &main_gpio0_3 14 0>, <111 0 &main_gpio0_3 15 0>, + <112 0 &main_gpio0_3 16 0>, <113 0 &main_gpio0_3 17 0>, + <114 0 &main_gpio0_3 18 0>, <115 0 &main_gpio0_3 17 0>, + <116 0 &main_gpio0_3 20 0>, <117 0 &main_gpio0_3 21 0>, + <118 0 &main_gpio0_3 22 0>, <119 0 &main_gpio0_3 23 0>, + <120 0 &main_gpio0_3 24 0>, <121 0 &main_gpio0_3 25 0>, + <122 0 &main_gpio0_3 26 0>, <123 0 &main_gpio0_3 27 0>, + <124 0 &main_gpio0_3 28 0>, <125 0 &main_gpio0_3 29 0>; + gpio-map-mask = <0xffff 0x0>; + gpio-map-pass-thru = <0x0 0x1>; + }; + + main_gpio0_0: gpio@600010 { + compatible = "ti,davinci-gpio"; + reg = <0x00600010 0x28>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + status = "disabled"; + }; + + main_gpio0_1: gpio@600038 { + compatible = "ti,davinci-gpio"; + reg = <0x00600038 0x28>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + status = "disabled"; + }; + + main_gpio0_2: gpio@600060 { + compatible = "ti,davinci-gpio"; + reg = <0x00600060 0x28>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <32>; + status = "disabled"; + }; + + main_gpio0_3: gpio@600088 { + compatible = "ti,davinci-gpio"; + reg = <0x00600088 0x28>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <30>; + status = "disabled"; + }; + + main_rti0: watchdog@e000000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x0e000000 0x100>; + clock-frequency = ; + status = "disabled"; + }; + + main_rti1: watchdog@e010000 { + compatible = "ti,j7-rti-wdt"; + reg = <0x0e010000 0x100>; + clock-frequency = ; + status = "disabled"; + }; + + main_spi0: spi@20100000 { + compatible = "ti,omap-mcspi"; + reg = <0x20100000 0x400>; + interrupts = ; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 72>; + clock-frequency = ; + clocks = <&scmi_clk 299>; + ti,spi-num-cs = <4>; + status = "disabled"; + }; + + main_spi1: spi@20110000 { + compatible = "ti,omap-mcspi"; + reg = <0x20110000 0x400>; + interrupts = ; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 73>; + clock-frequency = ; + clocks = <&scmi_clk 302>; + ti,spi-num-cs = <4>; + status = "disabled"; + }; + + main_spi2: spi@20120000 { + compatible = "ti,omap-mcspi"; + reg = <0x20120000 0x400>; + interrupts = ; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 74>; + clock-frequency = ; + clocks = <&scmi_clk 305>; + ti,spi-num-cs = <4>; + status = "disabled"; + }; + + main_spi3: spi@20130000 { + compatible = "ti,omap-mcspi"; + reg = <0x20130000 0x400>; + interrupts = ; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 75>; + clock-frequency = ; + clocks = <&scmi_clk 308>; + ti,spi-num-cs = <4>; + status = "disabled"; + }; +}; diff --git a/dts/vendor/ti/am62l-wakeup.dtsi b/dts/vendor/ti/am62l-wakeup.dtsi new file mode 100644 index 000000000000..b583b6522056 --- /dev/null +++ b/dts/vendor/ti/am62l-wakeup.dtsi @@ -0,0 +1,56 @@ +/* + * Device Tree Source for AM62L SoC Family Wakeup Domain peripherals + * + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + wkup_pinctrl: pinctrl@4084000 { + compatible = "ti,k3-pinctrl"; + reg = <0x04084000 0x24c>; + status = "disabled"; + }; + + wkup_gpio0: gpio@4201010 { + compatible = "ti,davinci-gpio"; + reg = <0x04201010 0x28>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <7>; + power-domains = <&scmi_pds 36>; + clocks = <&scmi_clk 146>; + clock-names = "gpio"; + status = "disabled"; + }; + + wkup_timer0: timer@2b100000 { + compatible = "ti,am654-timer"; + reg = <0x2b100000 DT_SIZE_K(1)>; + clocks = <&scmi_clk 93>; + clock-names = "fck"; + power-domains = <&scmi_pds 19>; + status = "disabled"; + }; + + wkup_timer1: timer@2b110000 { + compatible = "ti,am654-timer"; + reg = <0x2b110000 DT_SIZE_K(1)>; + clocks = <&scmi_clk 98>; + clock-names = "fck"; + power-domains = <&scmi_pds 20>; + status = "disabled"; + }; + + wkup_i2c0: i2c@2b200000 { + compatible = "ti,omap-i2c"; + reg = <0x2b200000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + power-domains = <&scmi_pds 57>; + clocks = <&scmi_clk 262>; + clock-names = "fck"; + status = "disabled"; + }; +}; diff --git a/soc/ti/k3/am6x/CMakeLists.txt b/soc/ti/k3/am6x/CMakeLists.txt index c20bed681437..206e041f725c 100644 --- a/soc/ti/k3/am6x/CMakeLists.txt +++ b/soc/ti/k3/am6x/CMakeLists.txt @@ -4,7 +4,7 @@ zephyr_include_directories(.) zephyr_sources(common/ctrl_partitions.c) -if(CONFIG_SOC_AM6234_A53 OR CONFIG_SOC_AM6232_A53 OR CONFIG_SOC_AM6254_A53) +if(CONFIG_SOC_AM6234_A53 OR CONFIG_SOC_AM6232_A53 OR CONFIG_SOC_AM6254_A53 OR CONFIG_SOC_AM62L3_A53) zephyr_sources_ifdef(CONFIG_ARM_MMU a53/mmu_regions.c) set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm64/scripts/linker.ld CACHE INTERNAL "") diff --git a/soc/ti/k3/am6x/Kconfig b/soc/ti/k3/am6x/Kconfig index 8a5513d7458e..a619a02a1a56 100644 --- a/soc/ti/k3/am6x/Kconfig +++ b/soc/ti/k3/am6x/Kconfig @@ -39,6 +39,7 @@ config SOC_PART_NUMBER default "AM6234" if SOC_AM6234_A53 default "AM6234" if SOC_AM6234_M4 default "AM6254" if SOC_AM6254_M4 || SOC_AM6254_A53 + default "AM62L3" if SOC_AM62L3_A53 default "AM6442" if SOC_AM6442_M4 default "AM6442" if SOC_AM6442_R5F0_0 default "AM6442" if SOC_AM6442_R5F0_1 diff --git a/soc/ti/k3/am6x/Kconfig.soc b/soc/ti/k3/am6x/Kconfig.soc index dae5216d5531..054215d6e513 100644 --- a/soc/ti/k3/am6x/Kconfig.soc +++ b/soc/ti/k3/am6x/Kconfig.soc @@ -47,6 +47,10 @@ config SOC_AM6232_M4 bool select SOC_SERIES_AM6X_M4 +config SOC_AM62L3_A53 + bool + select SOC_SERIES_AM6X_A53 + config SOC_AM6442_M4 bool select SOC_SERIES_AM6X_M4 @@ -95,6 +99,7 @@ config SOC default "am6232" if SOC_AM6232_M4 || SOC_AM6232_A53 default "am6234" if SOC_AM6234_M4 || SOC_AM6234_A53 default "am6254" if SOC_AM6254_M4 || SOC_AM6254_A53 + default "am62l3" if SOC_AM62L3_A53 default "am6442" if SOC_AM6442_M4 default "am6442" if SOC_AM6442_R5F0_0 default "am6442" if SOC_AM6442_R5F0_1 diff --git a/soc/ti/k3/soc.yml b/soc/ti/k3/soc.yml index 7234dacefa01..3f2cb22e156d 100644 --- a/soc/ti/k3/soc.yml +++ b/soc/ti/k3/soc.yml @@ -15,6 +15,9 @@ family: cpuclusters: - name: m4 - name: a53 + - name: am62l3 + cpuclusters: + - name: a53 - name: am6442 cpuclusters: - name: m4 From 4a8d5b30060122e45a0eaceefb654a3f8ecced91 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Tue, 23 Dec 2025 15:16:21 -0600 Subject: [PATCH 2/2] UPSTREAM: boards: ti: Add support for the AM62L EVM commit 9c3343d00fa208f495a3723f8bf84ec76990dd8c upstream. The AM62L evaluation module (TMDS62LEVM) is designed for low-cost and performance optimized AM62L family of application processors. More information here: https://www.ti.com/tool/TMDS62LEVM Add base board support here. Signed-off-by: Andrew Davis --- boards/ti/am62l_evm/Kconfig.am62l_evm | 8 ++ .../am62l_evm_am62l3_a53-pinctrl.dtsi | 17 +++ boards/ti/am62l_evm/am62l_evm_am62l3_a53.dts | 43 +++++++ boards/ti/am62l_evm/am62l_evm_am62l3_a53.yaml | 15 +++ .../am62l_evm/am62l_evm_am62l3_a53_defconfig | 32 +++++ boards/ti/am62l_evm/board.yml | 6 + boards/ti/am62l_evm/doc/img/am62l_evm.webp | Bin 0 -> 20988 bytes boards/ti/am62l_evm/doc/index.rst | 109 ++++++++++++++++++ 8 files changed, 230 insertions(+) create mode 100644 boards/ti/am62l_evm/Kconfig.am62l_evm create mode 100644 boards/ti/am62l_evm/am62l_evm_am62l3_a53-pinctrl.dtsi create mode 100644 boards/ti/am62l_evm/am62l_evm_am62l3_a53.dts create mode 100644 boards/ti/am62l_evm/am62l_evm_am62l3_a53.yaml create mode 100644 boards/ti/am62l_evm/am62l_evm_am62l3_a53_defconfig create mode 100644 boards/ti/am62l_evm/board.yml create mode 100644 boards/ti/am62l_evm/doc/img/am62l_evm.webp create mode 100644 boards/ti/am62l_evm/doc/index.rst diff --git a/boards/ti/am62l_evm/Kconfig.am62l_evm b/boards/ti/am62l_evm/Kconfig.am62l_evm new file mode 100644 index 000000000000..05a9d9425ab4 --- /dev/null +++ b/boards/ti/am62l_evm/Kconfig.am62l_evm @@ -0,0 +1,8 @@ +# Texas Instruments Sitara AM62L EVM +# +# Copyright (c) 2025 Texas Instruments Incorporated +# +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_AM62L_EVM + select SOC_AM62L3_A53 diff --git a/boards/ti/am62l_evm/am62l_evm_am62l3_a53-pinctrl.dtsi b/boards/ti/am62l_evm/am62l_evm_am62l3_a53-pinctrl.dtsi new file mode 100644 index 000000000000..16a3351009fb --- /dev/null +++ b/boards/ti/am62l_evm/am62l_evm_am62l3_a53-pinctrl.dtsi @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&wkup_pinctrl { + status = "okay"; + + uart0_rx_default: uart0_rx_default { + pinmux = ; /* (D13) UART0_RXD */ + }; + + uart0_tx_default: uart0_tx_default { + pinmux = ; /* (C13) UART0_TXD */ + }; +}; diff --git a/boards/ti/am62l_evm/am62l_evm_am62l3_a53.dts b/boards/ti/am62l_evm/am62l_evm_am62l3_a53.dts new file mode 100644 index 000000000000..3c9170c6c30a --- /dev/null +++ b/boards/ti/am62l_evm/am62l_evm_am62l3_a53.dts @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "am62l_evm_am62l3_a53-pinctrl.dtsi" + +/ { + model = "TI AM62L EVALUATION MODULE (EVM)"; + compatible = "ti,am62l_evm"; + + chosen { + zephyr,console = &main_uart0; + zephyr,shell-uart = &main_uart0; + zephyr,sram = &ddr0; + }; + + cpus { + cpu@0 { + status = "okay"; + }; + + cpu@1 { + status = "okay"; + }; + }; + + ddr0: memory@82000000 { + reg = <0x82000000 (DT_SIZE_G(2) - DT_SIZE_M(32))>; + }; +}; + +&main_uart0 { + current-speed = <115200>; + pinctrl-0 = <&uart0_rx_default>, + <&uart0_tx_default>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/boards/ti/am62l_evm/am62l_evm_am62l3_a53.yaml b/boards/ti/am62l_evm/am62l_evm_am62l3_a53.yaml new file mode 100644 index 000000000000..6d469560df03 --- /dev/null +++ b/boards/ti/am62l_evm/am62l_evm_am62l3_a53.yaml @@ -0,0 +1,15 @@ +identifier: am62l_evm/am62l3/a53 +name: TI AM62L Evaluation Module (EVM) +type: mcu +arch: arm64 +toolchain: + - zephyr + - cross-compile +ram: 2048 +supported: + - uart +testing: + ignore_tags: + - net + - bluetooth +vendor: ti diff --git a/boards/ti/am62l_evm/am62l_evm_am62l3_a53_defconfig b/boards/ti/am62l_evm/am62l_evm_am62l3_a53_defconfig new file mode 100644 index 000000000000..fb49deec39fc --- /dev/null +++ b/boards/ti/am62l_evm/am62l_evm_am62l3_a53_defconfig @@ -0,0 +1,32 @@ +# Texas Instruments Sitara AM62L EVM +# +# Copyright (c) 2025 Texas Instruments Incorporated +# +# SPDX-License-Identifier: Apache-2.0 + +# Zephyr Kernel Configuration +CONFIG_XIP=n + +# Serial Driver +CONFIG_SERIAL=y + +# Enable Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# ARM Options +CONFIG_AARCH64_IMAGE_HEADER=y +CONFIG_ARMV8_A_NS=y +CONFIG_ARM64_VA_BITS_36=y +CONFIG_ARM64_PA_BITS_36=y + +# Cache Options +CONFIG_CACHE_MANAGEMENT=y +CONFIG_DCACHE_LINE_SIZE_DETECT=y +CONFIG_ICACHE_LINE_SIZE_DETECT=y + +# Multicore Support +CONFIG_SMP=y +CONFIG_PM_CPU_OPS=y +CONFIG_MP_MAX_NUM_CPUS=2 diff --git a/boards/ti/am62l_evm/board.yml b/boards/ti/am62l_evm/board.yml new file mode 100644 index 000000000000..c42a8cc6ed73 --- /dev/null +++ b/boards/ti/am62l_evm/board.yml @@ -0,0 +1,6 @@ +board: + name: am62l_evm + full_name: AM62L TMDS62LEVM evaluation module (EVM) + vendor: ti + socs: + - name: am62l3 diff --git a/boards/ti/am62l_evm/doc/img/am62l_evm.webp b/boards/ti/am62l_evm/doc/img/am62l_evm.webp new file mode 100644 index 0000000000000000000000000000000000000000..d9245a843127911b5dae674fc2b05c7a97cdacc8 GIT binary patch literal 20988 zcmZ6wV~{RPu&w#FZQHhO+qP}nwr$(CZSS_ZyLa2&^PPK7Oiav=`csinnNhjwSrJ*v zQsUxIN&tX{n6RR{BBv%a002PzZ)pGnlz;$2vWk*Kr~m-azX-cu;)?HIzI+y*o}ArI zBdByjD0s1$9#9Yc&Yl(Y4h&Qe508y@!9sa#-D5Ou*a5 z@9)R2!S8R3#V}W?T%vnvGR|H(~ zJ*=(3xpr^bcOO?z%{@F;?s|p#9a_hJ4&~>zN_qwfJjUo$!&2hfK4~V^C&lIV(rrAN z==p~0YCOc0`Sg#~eFeSt1XOX&j{WrfT}oZ8V)nxNDIRHVwR@fyC+*rWwB0&)z!Bo% z&hh3kDvMcI=6J#qk0>ZEZDDPq48rz3JYwlsLhU~tdUe;(i-%sw#vL>33E-m*$={7m zdxjWbnF}#oa8Nvm>;`|!`wdB?B!4?mT+p|}9^fc*r?13;aWo|Je%(DKLpN6leM|z5 zn}(#~;bm|h*ipC7oK9jB%`qP6Qdo>orn`wBHf7V;p0#+Oo#D{Jn-eGC{r6qs9|fmw=4Wu+DO%!p0~dJUloSeR-}6_QU(h@BMeC>VMNk$xVy=`S zAxGtDS-GmJ%ZTqO3F`)Iy>mPm8Mc<<9KI}0@IYNJ4vo^)ifi90 z5V)bHF_B#RpC@voCo?pqq*8dCr!gv?Ytfre#B-CHlT-Z-^bVD~-U8S?M-VR6)sL_@ zx~ViokJZX{V~-VB#MF^jHh-wiqE|ix*d3?BI^I*$R?}&Kpi%G8H@%1JKcU2@r5!(v z!c&Gvebz2{elJE4)YX@DgmvzrliPRBN!E3JQp`-;3Fr27q=<;;(|Bfi-&Az-CvQZt zS;o|Wj&^Mj^!dvY-jQ3 zv{kf=h(4;nIrd{_*kxwr%ZlXEFz4%DMpGD;^#$I7{4?!4|=69{lN9EtBL%;BIU|(I~xqZ)@DOZ+LuwI#KW2zWvc*0*_)6*Ko34 zxY9Ex@K3cbo861Q7%Rdh0(6I6O9#1292xelgqE(Bv~?!rcHjMQtqE^cG_>6gyzS)Z zCT$%%bfd(sfNyvJb(An%AUjHo-}O` z*$r!+G5(dn|IF0=Vw4Xt%`OByOWf}7Jccae951-8E-aWjsp*t8y}h##XBjoK01_WE z%tVeXK}mQa6#eI*2NHA}B;X#Ob<;Bf3Li#U)8DloN!9}I$ zz?7fYmzWj37h0h9a0A_OSPUw;snYl^**W5ta7oMx*vTs}B4x$R*OpT#VMtJi^=j8Nk4=(7h(jx;WBob2K|ea+00wM-v4iZLQ& zg3|*RjWt*T=Mgs2k9`R;O?7%zY2yL8nig9ysZ!lhjLggjgt@sS)b@ zzwOk$I&6x~V$OYO;Ouy4qRQM*`dgX0ayhj_#CkI_px>UE;)E`cdOEtxhdh?=N_G;o z?I`@rQ5#EHJYZ=(LfzR?X4)x;aDkE900(?V=>m>2D<4*G=u1=()?oQ4b~3&0TBD2g zI&!hnsZ85Z>Jp|%ZD*r-_lJU^yt~aJB1~_0oC!zW7l-jXr6j zl%`MI_J;6<>~RYnPTPK$gtBxHu2C|=q7o>&JG>W?bKdlfx3)j`8k>DfMo&D>MBx)R zI*hpBulPRcLm&BnjO6gnv#Oq~)3hBd_c9M~X1^XHT&GXEo}JZ#If5Y|bU#r@o)yVx z-ve8&wQYu>_m%Fp9G<5mq}E${jbH*BO;Tu8~U%Q`Q;LzUdF4nT)1Cx-^zpa)nsx4(PEc4`T1Qv2(6zqw|* zKT89dqL{NBV6KOYper_jJ8!$t1XV$h`51Iwa!4^DZ0(yoSE`n7V7i>g;dQ|MR@mVa;C1K&LuAmu6l{DPIDxD5x z*%a%f^;M&6@+tYQ)$JSBx~DCog2?=GM6pU>QOY8fgBqE9MQ@ce4!qTo6s=r?EFM}vv5;@^ z^jtco($?H6sYH^0d*mGdpy6z;Z~961yX$N>IMcNTZn(_7ojLNDrLnZj{k5_u;sPPg zXHYU`&KmRQS6D8_tmF0-AD`|Am~`CnN93rSoyg$XsC`k`Hdd@CX0%V4xue3`p`sEu zS8$_@EdK}_1Y_-;&raE~$yomI7YH%YejMn5m=TLCpVz5n7Hw-7;*{jmY4zhYa>Ze_ z*ug42W@HdW7HJnqXlQH+mv#1B5{sx~GwDWP4hOhsZWc+3!!%>|OTXqgS{79Y>`l&^ zPbaQ>HqvUVZWquq&CY2S3PBs`;+j>;?7N*i1?OZ=CTesW;E;Ikr+>0EMWEsS6NAV= zhiRC=Bz-EPa%r7BVC9^qRSq9iHWm0$3B3S=U4)f2lC=FS15*Iqu>QuF~5@ZA8LEZ1DSJR<UKL=^CMdA9PB}!@Dzps?&bI`|(SE9Msge`jO zL?>*ADVCCvk>+#2%n4@R{Z2A9ow*h)G3#7WNBAhnM;*^RPH7ga zENUDsvKBcD^4mflzD#A{J;PUTfGbAjO`>@l^f~XF+KgLC`dN4g165M|X>(HGp7bAD zE7DL*2~ zu1=J^$`tO!I4w+h`b5P51=PRzMawSdoDNaL0uso;Iz^AqKdJy=YI3(Ks>VtnZGoZn zDEtS>_oj>yprjYIkKfP=cw}rEUdsyG>~r(ftapwSCLndJ|;k)W;rS9$NrnBG8G!A6WxQhb2RhG zd1#ps6mY&3b%E+aZx1R2sC3(nm1X@jTjoSvl$R>(9Id4D@_*E}eun^(fSnxG{HS`& zp(YNj-bF#mc`%^RZwLY$^fF`Qkfyx5g8%_Zj$|M+GmYop<=#;I3id2VDljSFyPcg7 zfPRH4h>vXB^8zOZynSR(grk%Z!lhcF?*Qt*)eYf(ObwPQA@8 zbarp@m=x`QP4-wg3m2_2%W6RL_y&KM7+nUhG{xh%Z!JPiRm((ix5}rI6rClnLEan> zx?3hW#;oo+!|iBbJWPH0*U>_&;ubqZZ5H{De4Rc6^8?x;4 zpctJU5a8FJfPccf@!W)#N2>BCCdMWE{U6~S-&ur?VpMkWh`irYc`e{!-$D>ojKuoq z-}XJ$+_V({La!amDKcASBw^0>ngM{%?iVGro>~Aud#kDhS6QiJKa6i9y_tknM{@yb zX!0C^>N46|;302|b1(}eTwRW}C_W3j&G+IGzy~3zb;&M<#dJPap9D8^=`|?xyy)ti z)QtZZYppak9%PmD$AV0^$V=h%x1u}&1>vIV7CVA+_04%9@aonYUa@tRohDv!>h0xU zAplMSAQRTUK;YPJAyYRc0>6~`@^&z3hzDeQnzM(3B*IGiAXiz&&sk}jM3D8?Bszs3ibjTPm&QMWjEBov1j)wq( zQ}UZs>6L1T4u`Vk%{&F2GxW^0MD4nq_I-Ctda?iIvii}5&}J!lu)okX0O@YfGSA@J zsGqF;zSLA719ofp%b3TLf4+{Ye}LozAF3H#PNUf#$KKzG)N~;Y{ni{vxrojA_}UsZ z67vB^H4)|0@Y&xFH^GV4^}GlC_X74QXv#m2BQ4#aUX_5~HNN7Lkkrqs(cTv{JugL2 zsjN72FG4Khcm*r1DLJs{qDAi9KLM=2&qeohU%6h2sC{SWe|*X-S5$C5xbF*Do#O&Z zUve{jolWID*dU}!uUA!h;{L!gVUVvcAt_Qz&AG7i$TFMt^0QEHMg=Bc^3tdO(Mo1| zUMhlm-r-c_uEAsaqmoSYzBEPU_5_Nm_%~5wRX_Owh2S=OaWMuYtabTTw?~qB^t;i) z8HEErRfXt;W9b$N?(WteXJu3aY`XgH5A3HnwP%3E|EFx=j$oh*U^EHPCa+RhYl3as@q3{>hTE6qqZ6A9N z8yMQ*5{0~HINjIANHVb_Jn%v0gG{kUNES|SudBHxJCOONf7g^C@=}1-N=?0ixDad?YN?Bt`8JG)$EzsCQ97y9m*rU?fFbFsQxWDU2`=V<@0Yddp|Gb%2(}8a+Eg9 zzOMdGQ!QZHt?OEON<{9`!GZ4jqy|__2QyoFSkdJpCFRja9aZp>++Sjr43do^B2Ra- zEmu$w2!nf|m<*JyBAg&^t*AI2By7h*%st9b=H2P8RzA%QG}Wbl$xr)cYnk9SZ?U*H zKd|}s-Aw(S+?=1Av&qa04`?jU!BdB}e>CzQDZM_#tFY}8f)Lagn@-E4^R z!djm(O?c(~){9Wv%mt_7gWCvkG)^{wlc}g22ONZSKw3%qQE0YF!V}zL6(lDB8pL45 zSh(3-V2iIb8wE&WNI9oD24pGo$Mv^R+S-xyg!_jWosCK0^jwd``Vx{8vzuOlLAky6 zRp1s6r4&SB)VyfDSlF(ssi-G>!=30Lv$7yZHYPOl^X05O>6y>VQ5Uw`h~C$Deme&z zeAV@Qs7Q&AKOdcb3em;H?6-Rln3MOTfEkUL>ijtjE#%6}`2ce2Ikr4ZbULBGnUHi- z1}r`q-zGLJ=u9F%XTL9;0s%g?)M!*d9ENyd{u=Ru2+^^2wZ8R-W&N#1MJL?@We})E z`c1&lFTlzDahV&9)7)8wE+B>MXM87I9~&Q+gJ!29AS!zNE#}y!`yVJSx0>JbPp;{d zx1Ybf35Fwp&TaNZ!g%PeL0+NucsNL;a*^$f#F~YapO>{Q2nQ%)Nm&P`l8%DhbtALe z9u!w941K@9zst$ejsqT7PVdh%ocrk@QX1m_JJK`w1Nd)tNLb4U05l>1GWuD2+xU>VzZ+@Td=ohBxeVz3KJaBd7HFlD|AHCQfBjLq z!uT7&O^NP?@bC@x12+=@7vQ$OR49OP*YO?lVd#yD#yDjzD``4H|E3%aBx5)g1)FKM z53MLjWsAi`lmgq6Nb~bz8>_e~BaY=UoQepo1OC6!u9)l}HBoB$MV_#TyKS4GVJu*2 zuxBh%ycGum znTo{1tkClHg)7y^LuVY65->`awe9B#NS0SZ*x5-XZ-Z_(qoRy_ zs3cz37n*eRnZO?XvRcG%Iaw~DUfqj}Xm9*!zimFaDm5_3`B8%&_13qydjEd4Zt5)IOmxc_7{JLXF8g@pP*D&E`3wrGN#ls(~C#`1x4acy0@B2MZh+0RGw4MRZd405#7|Gj?Pg?<}F0ioXa8Zt+0FbB~kGh&vcuNkY)WRDsZ$oohgM6c%6}RcpbU^Xeg8v=b05Ms?Nm(&b!sqwE3}W zfp(LJlL$TUq>IY7t(T}hT_AsopvUv?p_^b^{=1)+@+ZdGK;6155}ow?!e3xIM}wmG z58p8s4MgM@j;)vMJFmC-5?uo7q=V!tY!wKJ!L9?Jkc@0$OamReWAI)n-&{SK*{S1F z!QAtSG8fo|{}Fp~A^eY!-)9WdJsu*b_rE$#R<)T1!XTI2(0!;XL1DCLe}Rdi-vi@& z_{?h9M4u^)eOGg3Q&8aap=75C<2IL= zE+Z+Kr&2-=2MH18TUr|?r(kchu}jy-s#vQn_AX0nh-lxQ{W7|u}(K7jU#PG$5W6aqE4O}7OeT9eJa28~Vp z1%hf5eF@YsN^bkpK(>A@H2eULCe~zu0EPf5CS=(3P3hA8Fqvm#QWgBqf6C_Lesa_o zI7I52>CF@TwQ!iaBP`qh!N&yZXf|@(O)C+7Ypn|sbxqX%mwQ|)|5-~KuSX< zK0(UD*JwH#PWRS;bJ*C`j(oJmOoxo^T0kc?t>tGsJ%0Tv{GbeuWd9M+Ph#{B@~6fA z<(*8{QAODKn#I1esUTf_Kpp|p=FB7MH#F)F`3bsF+sFk)HnRu)P3SUnyHxQ`Ry}D2 zw}f;!s2+yO7n!?6JQrvmm{2YjGBd3r6?z#L54|Tc$AM#YO~S zL&gb8R2YR}x5Z*Sh)2W&4zjlws*3`-5L+MFZ5jE2UsYw+nR|Lb;yuQr1ukE)%P?0@ zb}6vuodQ*SqN|J3#+}U@OdJ|H2E%ifNQ^$Nl8%hwLs-Ji$DAY|j;B^y`hZztsTH=C z)F967-}&sOslQ;&zk~_jKZ{w+pVj}1e&u*6gF~+PBKx&y5IcFlj_=q#0*^CB(xZX0 zIvHIgW(H)hiY>^*M0lLTUBzw(qJHq^wc!PD&AK`uD8TFctxz*d!j5&B4X$6uyZ`AO zcsRzgj-p+Ec;m+Jw8Oh~3wmq7PD0hRPAV}QQP$u8V>aotG8IckG`cMkaZ*(4WR4C% zp(keTeRu1P3;WM10&7J zN32mzZR){I1ke?4+!t=363Xwn<&VJ8fu6)nH|p38(*Ks2;Y%e1P?e#7mEbW@l4l&p zNDh>Gkt++1HkjUizk|3Klu|g7`T4Z`Q}uuK^?$RYww2^H91pyzrKPf$Jq3JSj)XOS zzGwdDuK%4@_CGrOKXGWuS}Dj_j5GbH|7&*S|3Bll1pt0NT?haB#e|Xo-^9axp}O>9 zA4V>S9Z(-?C*^b8ez!ZmUHfX(T6PU61OS*uvPMXh=wZ8=xaN`Hw*n1;tGc2M-pxP+ zTXHHfgH~u`C#*BX} zndk;%oZkgNqCR9g!PV6};K)PjhXl|_qMdBH4gF4H4g$bLv-LoT-0ZZ0i>J{G>&el2JUl+f5T*DGeH0s`(;D%EmyUQuTKPGF+wvb$Y`Z|-@@PploOOgrYHUZ zP?;wOO)8Y5vROup=b@`4N1HV}*yn-A7jtS*i5EBgyxlhM06kc*Ti1|6(OeYnAX=RRiXz)SZ7d?VbN32+O^dZ)a^Nx}-cs zJ9T!=(e+9>ef^C_p|B*=fSFS;LoK70z!iP?}4G?o%BOvzMh zA>S{1Kq8x2L5c!5Kk~aFnQa6aPf+P^aDO__Z#v#@3nX5Bj0-}@YAkP?aF0Ucmw=s1 z3mU2q1ZpwJZZI4jrHCjisRC6dm2#v~q^GyM5e7nPKXbg)wiVTY%bK_TMsRI8%|p$M z%W4E6I}_e>iPl?sB-z~uyP zJ*cxqBhSglW`$5_uYSzNVZM1(R9^BOlc~gVv;)UwD67+U=WB~o!!82rzJXX9tw5& zua59;JiT@MdI&?CK+l>>uLNhCnv9aj|LP&Zh%bD zU!2CU^Hn`-Zj{%^JXbYi83*uUydme85R-%|@&dQ39Vo5{l@GM!IHpy?(iOpc@*a#a zD#({+X4^6&uLh_Q_A6eboo;(EL%hJA>8UZAY_vvNRuIN~?##o8X4bg z)i4tghsoVO)xLdG0bGPzG@fxU3$wYGTpW*We%{!{KDlt}JWbIEGC}7H+QP8?G5N_Q zgkf(lY*VjgHh2G?d`l86CY;e)EoO9GrA=^{s0M^wZmJ$|FQ$pI5)^2e+Cipa;hWYSrzSSwevbF&Hs5$4QstAo5>ARK<(kR^Lya4?Qd{ z^b2M^4&S(xb2p0&(;6&x@tO_)@oJPVWi~k6wc0&97zh* zurFc|fdG+E&W>w}riH0xY#ACl+hOZAs@knHX4tFeaV1p7-&NM@iW~c}BMtfEtquZ( zq{t4VLz}I)h_%tC9YNWoKA&c`oU1y#J`TH3lRsoWQleCKxVK=}O*u`2XT0|vNWO`E@CLJ$`mZ(UTTkZP9>(f13_MNGjd^L2vC?=1sP~sd_W2THu;zK5= z1(RsNK%EQ~eq`INAvf!E{i z;rercWAyftyIYs!{8J!(*EiNwspnIbgGkVcy;!7Kbx~21CW_ZVVr7kUg$7#IH#&Fb zm+wwBPs}hzV!7f<&K^0)Vr5hLd}u=Pubsp}eV3mPMXuigX`WRic?#!D0IIw{-O@d_ zTnf52Rn(QQ&{+jf^0g0;*$HJzA@vi{n-~uytsGR=Wiu5FO5RkiSG^8`#1$kkJ41hL z!pa}F6%4Zh$y1&IrTNw3=8m+}XbEOH6=A+n3qT&tov&eP>@)4<`oiW!-&Q`E*l&Ay z9~_VrGB6EY8JyQSKJu!_ z^>jJK95o}7t-FWy91-m9RRrqgn*ACs&f~^z8w6{jaEApSrR-pV*l z=)521<=hwtkT11u}tFRB)7Ev!y z@7{(9dS{fVy%!7k{$?T8@YtFn0}z%9S=WP-V7DpQ5>@zg@_+B;d3yaVwG)sh&pU)N zy7mNkxM()-hAcDsC`meEE(YaOtl196&qI@Z!Z`S{25w_NHuPGw-?ChzmF*_*x;%GK z#Z~c{SlZ9K{JJCO%x}7ci^Vq-lxC$ zEjTH~(A5!zY0hpu-N{x`2NwzYnU~`?KBVeMonWs%ioSYd;?=v+_n7&C2p~>^H$8o!56yl;q_NJ}j*wR#(06IVPuQ$1 znvWwprNaPsrZEyMT5(lkcZ3!Tet8dHC7VI*r!n>#o%;r*{q(!A^hHPqj*HW`vdQq& zGF2s9J=B3#^E-aG%~Kr#4Byjo=5n&xLK0uG8ba-ON6AmRpcpO9*S`z@5W#duY=8hh ze0^dl7Kc9N&Qx?#8T|5{<>@qtGG|Sv``W$ue$S_C+6eH|n?p zV+n9#7$13gIO;{R#aZ+O18zPul2w*BS(3ew>1^JG2cBo=L5#%^0l%%Xa^^n1M$vC9 zr1m>=HxJSc9dB>jG`)K7;8Fpwwdy9B;Yt^$uM2_}3jbnsYVYlo(XZMhB=IiVp3N`1 z)$R>fBSvX$3<}9utF?<_dja=q1md0DJ@Ddq_5M(BtTt2*|%n%$kxuUNLC+Qy=2Sh z4?+G=#;HIBwN!|`4p--p(IEC{C)InM>z9lvCSCHV*InNti; zE9_6-4`xY*UzewOMO>74eqL@wXU*s$a?#q)i)ecrW^q6rl-)$NF81@sA4#d*_u>*B z0lEH4D_3wp;Fl;vY=GHERY=K^zsAIMoEczx#R)>e%{i>VRdf2`E$D;{ka#m6@uLBV@adQNmkruR0G3xt+Lg^-7dPrv%^oiJ<`4ND1&0w)0zU0WZFZNc za!GYT&4mlfP{UUi8^BbM`sMI1)lmhgN*TW00q#?)K=4_-lk|#Mu5UH~r$FxE4~g>T zBG%$`Ib@yDKXm?*#r7uGJOQG02Ukj`yZPV+?#4l+Tse5+&pgTVsG+qU7fC+Q^*hnq zHTS{0wtC0*xf@G0Tpnw-Sq07gtUVaSY4K@J5)24uv>gVv+V@j#v^pI)hY+(oUh>gc zeOAz#DveFm(G9sOyIi;_Tt-VTc4(|kD>o)zXY_?fZ2$(C|GUWnf)fI~{#9fF?p(^i z)j(w-tG*+ML+>I(T1?byQR?(FeEL8Z)R(J9p#P#4r$nCu&F=0V1+Q=CKg)9|xQ$4h ziH_P6^MfadYlEGm?KU66X^Q1_vz73u$rMHtN4R#^S%>`|qCl;^u*#5eX9KSC1sae_ z%{}MQ15>DF7Mpi-M;{mvIw}xK)|Ws@!)x=d1pkHPpwGn}_CC3+TD(AgmXQUkf+zabwi_00^P1ajRzK7nPZeJLok{yMQ!O>8;RjfuW$I#Z8QReDKX zWz52IlrjeoaG^i8CFGXM`${FHLpjt|5)T_>GO*OIB>wtk)^RCORcr+Uh-ldv!8NE9 zLUfzB+v!~bx9svk(Z%b-84+sV^hQB1;R)rxp-^e}2>nbm} z5=`;W?2il>KFZVAzeQISH7$d%V`U2np4CxRMb-@48v8Wow!K!s&FK?IZz_;PeO=b4 zSZh(19Y}s`qMs-^lKh|vY&=z%ff*r8I%@n)v_Pg~@V)>+4g+)6y;BR>gLGYU+Acp)K5NMG4yCWR?U|6fP%cFChHZQij>PB(!pR9ra6o|u@W^h zLIEe_ktlRne;)9jw27U8e=%Gxu9IQ94Qd6JD>GgPPSe6?F6G>X-CLcj;0Nzz2D%yR zxR#Q(QCP+4dPBMxO%W*q?c*%|c#QIIr%&MQ@D)OHvz&hYS@Rlu?Y)7;{#DV|k>lT$ z%HGi!{s7<|@h``ldBy>7q%FXi-u)ycqoz{4QrMa)Q+)h)17F#l7OGN%vQTY<4ue`> zym&kfPK+Pka=3_a_576ChRYHEA9ZO+VATT-t4T@Tvm{T_v~W4M3|=X)HUD%+AW~h- zO75wL%GA9uly?V>U=4-`@V$>o-6xgRN9NebfTQFORCE^AZb+89bt8=cI@qLChnhaH z(xmmgS7=2E6MCAc))X4Myd31%pdhweSuEIx9Hkuo+c1iYu6LfvPNRh8q<=kqcw+}h z1`s2{q;h=^Aln`k#g!-0K|iYLFpxG^j}}S$cxh;a`RAA&A#qT&$`QNb3r1+9K@qPJ zN0yVQU@Bapav%;2%-1iMM3_6wPM(!bWz2#*h8AYnS_$-S6|Ii^*E zyt#L@a=8fRvF0~f$J|8qaqmhr*JZsZD?EH~&l(lseB79qG}LJo!5j_TK$nWYBCiPM z*V(S-4%q-m?7+4=10x=58$#A4H=D7g!(alsQF@1?EnbC4TpSmWq;HfvZY1_VnMgPL za6aJC5ZaI8?^9H{=bv!oDTGx|^|Wtbh2nH9mxZCZt!U;2+;fXk6T2~J0Uy#fZ3e}5 zsCBcVA15m8FdUr(ct;1Sa%u3fm8~xa2gS}tOK>bss)df;Yw6YQPj$)OP&5S&q47e0 zMi5&dC+vRj8kS5$&sjKat~uS8<)e~?c%jSRlPUZo;A1L!7rBZ?Rx^Ek`!@EU0Nw4~Z?(3TIwq)Ji1G z{hIqL;UsUI$@i<{B#3r1qO*S=cI_cZdUqs(5{|v31SXMKYo6Jq|##Fld5AeqH;R{XGdkQ-p&E_k~fU4A?-Y|jl^=>p9J9*~xx@e{)Dt!xM- z8vU`LPYIMYtKJYU4-dk-ga5Kc)Wt#d=d*0fH0-rL5iDgr2FNn^F?_##7QsaauzRgHMRqWS$5_uqkYJ zV!}8dJ~sMqUfW*~w9$xlQtIqQd zRd#C4aQw5Ja>obuDIV~hy^AAx;wC_b0xI47vCkgFyE21r&$NkB<<}WV5j2I@>{OH) zXN2A}eK^*gmG;l5^9vxsEAGg0B^UV5O93J?X_^{<&S~!TGX*hBj(ruJSD2$o!QoJ( zfQO7?>#c9B@gs}z%L;lITZo_s#GlcGP^HIEA9ghzUmDa^{+U=KB$@u{^7+v46x?d}_b4_UdOm($ccN%_+^YaUu?THqe_iYR`Y$G~ z2rN-P7Zh;H z?=Mr@31bD?UPg{Cf&8BxSUg{}H?KT_@FM;mu1203nwx!obUJVzNwlYkioa_j>;Q!g z!9#G>H4c00msC#jYAwsU%MD#c+jT^wCm$B@v#RYc$Wj-$kz%zvr6rMAFa^M74|qDw zMU;A%X}8~X8>lU4it=d+YBY(Vhgc`cHbRh4JK3Nl{CXCkYEpu)+{7e4K8F^jsT&TU zC7S`K6lGLxO1QfGej&2o35gsM)^)Dw4>Jw@e6$uK;8%c-GBV(mol;VfZyE^C3eX%P z8QA82(C1n`EXdt`RwRyH`6UkjBUVA)Bo8ZwGv{6wa5*w^GarP!L?Hz6_{|{2s$nDt zt8fIaF|d5=B!Oii$2g?K%NzTikyiKLy(5Oq2^u*ZlD-{d?Ip$T!H8nlyVY3Aw4(V9t2?YqSUc+#dL(b)fo zSGBL2bFFaYoHN!rFQsXB4#`Vo=O%ipH%C;pPT;JIMc3!ocJ7cWeQB-XR@t0?^GX_k z*7_@?qbb+-rjPIj8I>tp>sEu(ju%b^5p5N&t*rIPQYG$|*?Hm8r#L9Pp*$}VY@5qX zBdoz%Bp!@dt>h7JAXhWv2oXqOR9Kn1zDmtgLdptxj6LALn7F6@Tx z)qm&+bXV;vC^s|9{7~>UfC;)MR6gN$(N#D8(@4~Ce>CU{DX=m1z_(S#q-#CU(PH}X zT$85o8R&lvU+iVq{aIFrVV7squH*(*aW{z&(xOdQMP{%v+z&Rx`(14khIwpoZ%&fm z#GLXT(sDt&QEU(dE$18g^e&`hobo*#V^I%C!0zQby@`M-?khG1QEYL&pjsPx zK3-bRg1&xijMWx08N9ExewBhe44y~K2m2W=l$9qGBtgm$DqV(uF4Gm;7#ugm^P@uQ zqE7>CdHZ3^g55|q(`BM+I?)d?oHYJ9zKxLFf}nVIn21O+YFbWc#1MKW>DZYNc7qE5 zp93)K?Ub<#7OO#i2`g>ib!eY(pni;x)o|qWdNww7IHMTbqq_%&FL9jUR7!4?3A%Be z^gq{6s%gqiHJ><}k0w}3;AvKwm?c=c+;I(p@tp@N){gzFdOp9bG{wb}iL_8;-Z5u2 z@c7}Ca0^TAR819w$r3s9)O<}j{w-FT{Y#pc%j*W8q%WGK-U|uQ6)s)gPIZjDzN;&S z5TyhkXs~a%Z;1s{xH?7o1Hs2W*ldPX3?z@j7+#9iNxbnO+;z)`yuzgEu1W_?sO+v8 zwf&*~Ez~y7E|7-e!pw53+B^N*5yOLru&ub5-CB^iSvAF+?TSLaeM420lroL-^H{VV ztsRj(@=e>fqWxry#&}H**Wr1#8&_@uqbdAV-pRbb!N2YVpDsB8Rq)W&W+Gof zDfSl>vgo1XND0<_K+d(GMk19S6Jr#^7%aGD9lm8PSH z`gHKi{1614wsoyWS_h1Xv8jb3L&OnOA1$pLt$y?M#K5; zS^}+iSZE=xsXUWuC3fG;MGmg^tspK}d=SJR$7n_ul!PRacQ^lZ#!8ldN12o^numb* zM79Xl==64fWwxLl`V*jmtA;xO?U1q&IK+ST-~^bIOsK55oO#Gy$bE9E4E@@ln!Z^5S`<%%MMsVX9F5$bN?cC}fj^Cfh09Fz zioH!JH;D#{y&dh}Xxa?b0<&u%wp=xx5A`vW{yu{vF~I%wL47e7 z;-lKchIg=7b(^Xez+2gzh$%Dv)bfnazqxzzWdKKlbVk4GFJdTotR1$+SsDAi8%8|S znI6-W*J!r~I#ZQThMaWgU&0PSh|sB}b~r#A6Tsf7*S%!MQLW3q5>vZlSaq@bdq&aM;u8IFBOY&sl!$kGFyI~Z%HXkW3#k|*Cv zcg5)VYKrAb&pp;8jB=ODwW!JIm@Oi;wz~F(GIY1*K-6jy1$3# z(>K@c9`j7(3a`3d*FD@H3beSEM4T+AENH|gZ>bO%?dALg48iKA@$g41{ zv#;DF#MWgbQn{|GoJ`R-2s%DwbSU0B2kW&&_((d5=DvAMY{md7N;c(|x?utDN>W>$ zb|d|f^1ehO%VtKt9vE!IEs@Pm z-?TYM&<4}~d$v?Nvq&W;Vn@lxp&}C?k$S?h*S;e#O=vi&Pvy_xw0XL)=Mcmw`*1&i}10N$~^*NsvaNs78V=!S8{Z95!o;Uk8LW1Xey;W z>QS18cQmR&wGhm1@cI2h)IF)AcU4ypTzfpnNx3y?>DSik0Ns*Nnn_=(L{BR|!D#J-g#0>m12$1#Ghw zeg8pzu;{5YppcKWkW-S~7m`rWVu*%J2(XEQ9WhpbU5&stqbk3yRv8O7nKN2I*yaQJ z887pbF@1sC^BY&#W@G}23vt%pzf>cha-OUg2f}LH5)PT-Mn_~pVbMO0>>IMJ+2w0= zOj989u20-G{H@@H{7-Uzor?Nd-!8qLc0vF7Ky})D#l2T;N9{IBUW9Hu3C2UwL+m*4 zue|E$90ojUdPr`jxD?iw+ymS~N1*B{yM48N0@P%IhNdH7+(PmhJ*~@%wGbr*9mu`( zhM+Nqtie=Pjv{%25~UXq=*lvY-qh^~&=Xk$+IytDMD?5u3PraAWy~K)P(OEG`;}!| z!zU4zQI$<#rllRX|0jPDfbK`_&j(}dsmC&?N7Pr;S;MR_D3M350EFn;9!pkdR~Jv> z5mj)bUHvK0HtoTI%xtW(?6Wt_HI9Vl`$FKR+A($xCFD1rcmJLlsW#ysE2F()$2L z$q4rI!4jEUDVfA@V6e4K1?`xF>H!h-e`#R&K#B_t4to<~d%;!gG1&p$vK~18lMzfn z(mbdvodE;7Bo3=p9*mG&Q=RiP>Nuok3h-Byq1wn-`MG|o#r^wufkEgi>mxqG4)o$F9(PxQbd01{rcJLrLYqLKmVbOuCJ=5VqABnJHiVm;EV;uxY8X{* zx!cBBgP}C3dcQ}(KlYoGKO-z=wX+U4*Q5dzAKvn&>g@|)_3Dk~O3_*7RIq=WuKkFq zW(T?&nJPVFUm?OTq6qL{^q6y?m>&}nYjh4rETVUES2Li=!(!8c1YW9xSWe|+6(-Um zK}BqN$2MtlXdF+cAJ}wZ-1>{u%2K)wQZ^_QaXSq?jN%Dp)y&zT*}8TR@TTB~tb@~s zdG>7m@n`>jWMh=A2)sLOEbx53YhbgjOV`h2ktdG$*yV~Hp}_jguG*+TM|juCujnQX zYx>JEqsVnhu1popR>?q`p!K8Iy>_0f6U=a)_iqHug(!FZ6p}An{g{@3Qf`IQZYzXSF}+*aZFtIbI*{xf~6Q zFkIgmc&}AoPf!W2jik+muzMfWdS*XPxKX9bG2M0l>!Gl`VYs*6^(G}LL6&6a&AaSC z4OEcL1@UBH<4zCMSh7|u2p;3u*@IB z+UggkO{hm=d8kjD5AtuCj4u|R&QW&=m`S%G3;YzNB<^9?`)F3?uvmU|Z^``i!2}9$ zq!~)EkI3M+3__)7KFEJ&eFj@wz^{BNn8!m->|eGF?se(Q4e<$Fd80G3(#UIN1Qp6G zv#)y#3A+M~1mr5L0L(VKpMLT(VIpRLTI(E7Ggtf0ePltBUV%GX7D#CcBba7UMUa=o zO*5B?wn5Fa%Zyw>hw`mtUE02UOyDfoyIq9{82krPOl+CnDfYOjnNsJp*^&xnfp4qZ z;ZK1A3qLpi!NPzQoVlG44oxx0A1JHFx`ACC$SlKZR0TNbVV=BhN+6Lj$Cfy?gl5!H z-sI?f8|f!f&Ff%GRwy)P(+Y0>8=h9yt5C32BPk99SP{r*r@W5brh@MohD`lyyO2n? zP+w%OtRl}^ukuL|qpK=8NyzK`6DSd^cRg8k5+iTmfyF?x*Y3UbwaxwSejGSAfulIF zT!A|j@M4W3%*$u+SmzFZD^CtEo!wv2NiXhy+H&Tibu*!dEsHBHnfZ%j1aI?JcH9OR z2hm}-LpoJx5BHO(=!9yt-O$5OwNR>7anKI+1YdddNyuKoF9B%zun^iIR6H@Ku;iAV)C^H_in+m?Q2Y5$ z+-}HZ=8p!+9vzb|br*Gz7_Z@~dz|Wz5!tMZ@T;X!LpLS4($zfwEMcV4K+$2xF=_QP zQn5H-H3IUyPJ7uMn2Ed$?=VIh$bg+HCQz`7OsT7>Th73xU>C;eko)9zawUw|YPvaK z!@tdN`67+i7D2=AB^A`$-2*d>)odJ}qmUTHs0f*NFtq{1(QnT(@;&u8)*%4a5=*+@ZN{t)=VA7O-@Y3oOlkg*z zM`GTh*6N_&P3fkgqxShp5n4H?E8gD@+I@VhZo7`^6o$sdeVDyZNKMwnT0#isMtC7u3k(MoWdImNU*_r@`Fano)Hbe`odI&by6E8o z|L#a^c06asjLSHi3cQZ$S;@W6tRT?xc37$Cbb^F@6#*~o1<2Fed|&Ut+UbN7 znO{~{*tv4;KjZJu*thkeNwM=F($BA{F+YsI8?7nYO9DbWd+`32w-$E|{XAm$WuEz8JiL2v0ZUwK5kTsdO*qWzr zQ?n$3u6mC^J(yed;Z1kRoysD42w+dcVC(&)GyC``KI9=U6cOb+14!z9sH<-EN2|Ntmd%;Cy|-nG}t3BP&A~%Kb@9?F*m)F9hM6F1HW;JDPR5mSGb5_cA1ME z+s#8zT<;9L|J|9({N;9PoOY?s^VN1aDKVq47S|!kpb@lR$=TP&ZT>3^AI4rDatn{i zZTrKT$Ze#OmyLpg=##Sv=xDsH5Ph(O&0NHfC|!6D;r8PU;0Aku&lRtC_24$HHSGDB z6M9ZnEXcHQxcyAj)%dkPqMDBg`4sBt)j=8VamMXRmQ{hFO}~x`D_=i}xLNaMOo;vi zLdCA*z0}eP_loVZuf)d6`GZnNvr25HeUG&`9MZQY&2xlFW|di@3`}?zBN+T3=E|E; z2sKLbDZBt-P-67BJFN1o<;!q47;7rF0CuZuLc}uOU;J>N#|cw*i#nKjs!lQ3fIAmB zs;Jip-ZZp@Ic@;-TP!YLcD1;V5Mtp$4y2}D&aabY35NJ`hKc`P<~^1CLR>C$c{ZkA zqzHv`Ku>qPNjcv&SI*on+@bCIV>*)vOc`E5+jfQHOhqDB2Nvxk&V}qu7spIsyE9f} zTT=}|hOZKlr)hZ^)(n6MKYmoP#|ROQ{XCcWOn{oc5qJ$fmZ?vx#EjPCCW!YG#Ke_-;`Gh^P?AKydZW7^>RTY|T z^#s*9#;J%u$c0Y0<|Q}ab`dwov1hA%i@_kWajhKVmrUVKpPUVSNS%~PewTX9TJ&;n z7zUXxD-uEVg4S6-tYe(R=!$u8dvLp?q9lj*GFGc*zM$5oRnl7vi~HrIPPFHmzaIdJV466 zM0_q^X#T9MN?-^{wgX9MI{+4X6)Nk0+1UcQDhn_JhnOMOZ|6c@t4Yzd#q}{~p`GVS z-8#Eibd?K`0wy|JV>^?B7M+_jG^I|a>!C}@j&@}f*k5 zy<{C;A7~0u_==D&iHr)y4b(oGXLk?aeX5x4CTlrg4xINn81@1yh6;g$=0-3}ORb;C zQd8Ee)tzm*BUY)i(jTgBQwz_ni%dp)4tRCpyPg{-4?COHzUo=BM+kT#N1mC)CM6d2 z{3T=QQ9!{A79RS`9^H5mA+QkkqT5{Nq}Qh3Qx&fM+g|ZBWx_;F)KU`3qG`KJbr2tJ z=%Iq$FIobcOE*unu}UkkxC(&$vZM~++LFr0V|;&h=+&{ysj_~6HggvAKlFs|!%wnv zX4Vle+*;hsE?ysy^f!K0y`XXkFhWTb2D8LcxlHtm3urzJHbSWY5DLrS%;=GZFGCOr zZ??M(7C>s-l9|}JM}$DK^RRH<6J9Z_quFT&@I}o^OUeJas^0|pFM|Wgm36bP)Im4@ z1644n$aIseoViD?ah!+f1ssjV+1>{x4a_Ump=+3z+B~Pj>zJ>27p|O3N+6PqkGfTZ zPp8)BuTL?*l_5kLPIv!CNz`+-9hGkxHrtT1%Po3K7bOANuQM^L8qsOox4cMFJO70@ z2Mm%8bFaD^2%ww-C=V(m)VziHq~Jkbk#U4C^rN*UK1kII$p8Q!WngiCxR()#0008eA)jG{4106B z)1v8!#zU{UQkDk@DkdPK+HEY%V-jQ0yd{Y;atS@@N=L6Ps>BP2H>eQk3UT(gQ7 z)#V&P4gKPDWSI;LdvB}J|Lw+OmU0ravm`aiW}ECbTLjrcM(<7)EjnD`c@}a{?iV5)Glk)`-eW z>OTp{LnaW{kzNJHYk&NWO|~zc2ibtT5mH3c8@Hr9uORv zoCk5F{`ZNiV5!+Q88Oa~MjXCoaGS0)I_V407e1`J6n3Ux?^re6Gj5VkwhhhSp@)DI z+)*s)pd8m36X%{eRX%U*+Fa+U2gNPKxMam=r=$TIvify00RGuZ7%`zJFDEpPudJQG zF;OjGX#NX-^7j^qC$hg<-DUXzN2?=U(y|}G_J>7@butzCg^PjfNL6M0;T6R^s^}-t zzhIhKuQ-TBc*=2T((#TK&p8H*^X?yD7c?75ohb~*HcKZ52g6$@wn$^3S6EC|cnH~L z&JZ!C3Eq93yKU(Kn5fxSOs)<`B`V+*@(y~apVb-yKi6%=#CDsaX}i;#{QE!uvZ4R% zl|TQn^LA%ftHL>B+%pSGU;qJhCnf2zCp6<-rNjxKWz50{Vh@JY{G+bj2E(7wvKYcV z^uSc;ol!b}JaVo?n|$I;!lAA#2G&5FKohZ>L;4lMjZ8VLzh;7BjAFkt90SBx@Req; c%aNzR000000000007oV2&;S4c literal 0 HcmV?d00001 diff --git a/boards/ti/am62l_evm/doc/index.rst b/boards/ti/am62l_evm/doc/index.rst new file mode 100644 index 000000000000..211843dc20c2 --- /dev/null +++ b/boards/ti/am62l_evm/doc/index.rst @@ -0,0 +1,109 @@ +.. zephyr:board:: am62l_evm + +Overview +******** + +The AM62L EVM board configuration is used by Zephyr applications that run on +the TI AM62L platform. The board configuration provides support for: + +- ARM Cortex-A53 core and the following features: + + - General Interrupt Controller (GIC) + - ARM Generic Timer (arch_timer) + - On-chip SRAM (oc_sram) + - UART interfaces (uart0 to uart6) + +The board configuration also enables support for the semihosting debugging console. + +See the `TI AM62L Product Page`_ for details. + +Hardware +******** +The AM62L EVM features the AM62L SoC, which is composed of a dual Cortex-A53 +cluster. The following listed hardware specifications are used: + +- High-performance ARM Cortex-A53 +- Memory + + - 160KB of SRAM + - 2GB of DDR4 + +- Debug + + - XDS110 based JTAG + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +Devices +======== +System Clock +------------ + +This board configuration uses a system clock frequency of 1250 MHz. + +DDR RAM +------- + +The board has 2GB of DDR RAM available. + +Serial Port +----------- + +This board configuration uses a single serial communication channel with the +MAIN domain UART (main_uart0). + +SD Card +******* + +Download TI's official `WIC`_ and flash the WIC file with an etching software +onto an SD-card. + +Copy the compiled ``zephyr.bin`` to the first FAT partition of the SD card and +plug the SD card into the board. Power it up and stop the u-boot execution at +prompt. + +Use U-Boot to load and start zephyr.bin: + +.. code-block:: console + + fatload mmc 1:1 0x82000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0x82000000 + +The Zephyr application should start running on the A53 core. + +Debugging +********* + +The board is equipped with an XDS110 JTAG debugger. To debug a binary, utilize the ``debug`` build target: + +.. zephyr-app-commands:: + :app: + :board: am62l_evm/am62l3/a53 + :maybe-skip-config: + :goals: debug + +.. hint:: + To utilize this feature, you'll need OpenOCD version 0.12 or higher. Due to the possibility of + older versions being available in package feeds, it's advisable to `build OpenOCD from source`_. + +References +********** + +https://www.ti.com/tool/TMDS62LEVM + +.. _AM62L EVM TRM: + https://www.ti.com/lit/pdf/SPRUJG8 + +.. _TI AM62L Product Page: + https://www.ti.com/product/AM62L + +.. _WIC: + https://dr-download.ti.com/software-development/software-development-kit-sdk/MD-PvdSyIiioq/10.01.10.04/tisdk-default-image-am62xx-evm-10.01.10.04.rootfs.wic.xz + +.. _EVM User's Guide: + https://www.ti.com/lit/pdf/SPRUJG8 + +.. _build OpenOCD from source: + https://docs.u-boot.org/en/latest/board/ti/k3.html#building-openocd-from-source