diff --git a/docs/user/FlowVariables.md b/docs/user/FlowVariables.md index 0ebd3722ef..e90aee5375 100644 --- a/docs/user/FlowVariables.md +++ b/docs/user/FlowVariables.md @@ -192,7 +192,39 @@ configuration file. | PLATFORM| Specifies process design kit or technology node to be used.| | | PLATFORM_TCL| Specifies a Tcl script with commands to run before loading design.| | | POST_CTS_TCL| Specifies a Tcl script with commands to run after CTS is completed.| | +| POST_DENSITY_FILL_TCL| Specifies a Tcl script with commands to run after density fill.| | +| POST_DETAIL_PLACE_TCL| Specifies a Tcl script with commands to run after detailed placement.| | +| POST_DETAIL_ROUTE_TCL| Specifies a Tcl script with commands to run after detailed route.| | +| POST_FILLCELL_TCL| Specifies a Tcl script with commands to run after fillcell insertion.| | +| POST_FINAL_REPORT_TCL| Specifies a Tcl script with commands to run after final report generation.| | +| POST_FLOORPLAN_TCL| Specifies a Tcl script with commands to run after floorplan is completed.| | +| POST_GLOBAL_PLACE_SKIP_IO_TCL| Specifies a Tcl script with commands to run after global placement (skip IO).| | +| POST_GLOBAL_PLACE_TCL| Specifies a Tcl script with commands to run after global placement.| | +| POST_GLOBAL_ROUTE_TCL| Specifies a Tcl script with commands to run after global route.| | +| POST_IO_PLACEMENT_TCL| Specifies a Tcl script with commands to run after IO placement.| | +| POST_MACRO_PLACE_TCL| Specifies a Tcl script with commands to run after macro placement.| | +| POST_PDN_TCL| Specifies a Tcl script with commands to run after PDN generation.| | +| POST_REPAIR_TIMING_POST_PLACE_TCL| Specifies a Tcl script with commands to run after post-place timing repair.| | +| POST_RESIZE_TCL| Specifies a Tcl script with commands to run after resize.| | +| POST_SYNTH_TCL| Specifies a Tcl script with commands to run after synthesis ODB generation.| | +| POST_TAPCELL_TCL| Specifies a Tcl script with commands to run after tapcell.| | +| PRE_CTS_TCL| Specifies a Tcl script with commands to run before CTS.| | +| PRE_DENSITY_FILL_TCL| Specifies a Tcl script with commands to run before density fill.| | +| PRE_DETAIL_PLACE_TCL| Specifies a Tcl script with commands to run before detailed placement.| | +| PRE_DETAIL_ROUTE_TCL| Specifies a Tcl script with commands to run before detailed route.| | +| PRE_FILLCELL_TCL| Specifies a Tcl script with commands to run before fillcell insertion.| | +| PRE_FINAL_REPORT_TCL| Specifies a Tcl script with commands to run before final report generation.| | +| PRE_FLOORPLAN_TCL| Specifies a Tcl script with commands to run before floorplan.| | +| PRE_GLOBAL_PLACE_SKIP_IO_TCL| Specifies a Tcl script with commands to run before global placement (skip IO).| | +| PRE_GLOBAL_PLACE_TCL| Specifies a Tcl script with commands to run before global placement.| | | PRE_GLOBAL_ROUTE_TCL| Specifies a Tcl script with commands to run before global route.| | +| PRE_IO_PLACEMENT_TCL| Specifies a Tcl script with commands to run before IO placement.| | +| PRE_MACRO_PLACE_TCL| Specifies a Tcl script with commands to run before macro placement.| | +| PRE_PDN_TCL| Specifies a Tcl script with commands to run before PDN generation.| | +| PRE_REPAIR_TIMING_POST_PLACE_TCL| Specifies a Tcl script with commands to run before post-place timing repair.| | +| PRE_RESIZE_TCL| Specifies a Tcl script with commands to run before resize.| | +| PRE_SYNTH_TCL| Specifies a Tcl script with commands to run before synthesis ODB generation.| | +| PRE_TAPCELL_TCL| Specifies a Tcl script with commands to run before tapcell.| | | PROCESS| Technology node or process in use.| | | PWR_NETS_VOLTAGES| Used for IR Drop calculation.| | | RCX_RULES| RC Extraction rules file path.| | @@ -291,6 +323,8 @@ configuration file. - [DFF_MAP_FILE](#DFF_MAP_FILE) - [LATCH_MAP_FILE](#LATCH_MAP_FILE) - [MIN_BUF_CELL_AND_PORTS](#MIN_BUF_CELL_AND_PORTS) +- [POST_SYNTH_TCL](#POST_SYNTH_TCL) +- [PRE_SYNTH_TCL](#PRE_SYNTH_TCL) - [SDC_FILE](#SDC_FILE) - [SDC_GUT](#SDC_GUT) - [SYNTH_ARGS](#SYNTH_ARGS) @@ -349,6 +383,14 @@ configuration file. - [PLACE_DENSITY](#PLACE_DENSITY) - [PLACE_DENSITY_LB_ADDON](#PLACE_DENSITY_LB_ADDON) - [PLACE_SITE](#PLACE_SITE) +- [POST_FLOORPLAN_TCL](#POST_FLOORPLAN_TCL) +- [POST_MACRO_PLACE_TCL](#POST_MACRO_PLACE_TCL) +- [POST_PDN_TCL](#POST_PDN_TCL) +- [POST_TAPCELL_TCL](#POST_TAPCELL_TCL) +- [PRE_FLOORPLAN_TCL](#PRE_FLOORPLAN_TCL) +- [PRE_MACRO_PLACE_TCL](#PRE_MACRO_PLACE_TCL) +- [PRE_PDN_TCL](#PRE_PDN_TCL) +- [PRE_TAPCELL_TCL](#PRE_TAPCELL_TCL) - [REMOVE_ABC_BUFFERS](#REMOVE_ABC_BUFFERS) - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT) - [RTLMP_AREA_WT](#RTLMP_AREA_WT) @@ -408,6 +450,18 @@ configuration file. - [PLACE_DENSITY](#PLACE_DENSITY) - [PLACE_DENSITY_LB_ADDON](#PLACE_DENSITY_LB_ADDON) - [PLACE_PINS_ARGS](#PLACE_PINS_ARGS) +- [POST_DETAIL_PLACE_TCL](#POST_DETAIL_PLACE_TCL) +- [POST_GLOBAL_PLACE_SKIP_IO_TCL](#POST_GLOBAL_PLACE_SKIP_IO_TCL) +- [POST_GLOBAL_PLACE_TCL](#POST_GLOBAL_PLACE_TCL) +- [POST_IO_PLACEMENT_TCL](#POST_IO_PLACEMENT_TCL) +- [POST_REPAIR_TIMING_POST_PLACE_TCL](#POST_REPAIR_TIMING_POST_PLACE_TCL) +- [POST_RESIZE_TCL](#POST_RESIZE_TCL) +- [PRE_DETAIL_PLACE_TCL](#PRE_DETAIL_PLACE_TCL) +- [PRE_GLOBAL_PLACE_SKIP_IO_TCL](#PRE_GLOBAL_PLACE_SKIP_IO_TCL) +- [PRE_GLOBAL_PLACE_TCL](#PRE_GLOBAL_PLACE_TCL) +- [PRE_IO_PLACEMENT_TCL](#PRE_IO_PLACEMENT_TCL) +- [PRE_REPAIR_TIMING_POST_PLACE_TCL](#PRE_REPAIR_TIMING_POST_PLACE_TCL) +- [PRE_RESIZE_TCL](#PRE_RESIZE_TCL) - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT) - [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS) - [TNS_END_PERCENT](#TNS_END_PERCENT) @@ -430,6 +484,7 @@ configuration file. - [MATCH_CELL_FOOTPRINT](#MATCH_CELL_FOOTPRINT) - [MAX_REPAIR_TIMING_ITER](#MAX_REPAIR_TIMING_ITER) - [POST_CTS_TCL](#POST_CTS_TCL) +- [PRE_CTS_TCL](#PRE_CTS_TCL) - [REMOVE_CELLS_FOR_EQY](#REMOVE_CELLS_FOR_EQY) - [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW) - [SETUP_REPAIR_SEQUENCE](#SETUP_REPAIR_SEQUENCE) @@ -453,6 +508,7 @@ configuration file. - [MAX_REPAIR_TIMING_ITER](#MAX_REPAIR_TIMING_ITER) - [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER) - [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER) +- [POST_GLOBAL_ROUTE_TCL](#POST_GLOBAL_ROUTE_TCL) - [PRE_GLOBAL_ROUTE_TCL](#PRE_GLOBAL_ROUTE_TCL) - [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW) - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT) @@ -478,6 +534,10 @@ configuration file. - [MAX_REPAIR_ANTENNAS_ITER_DRT](#MAX_REPAIR_ANTENNAS_ITER_DRT) - [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER) - [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER) +- [POST_DETAIL_ROUTE_TCL](#POST_DETAIL_ROUTE_TCL) +- [POST_FILLCELL_TCL](#POST_FILLCELL_TCL) +- [PRE_DETAIL_ROUTE_TCL](#PRE_DETAIL_ROUTE_TCL) +- [PRE_FILLCELL_TCL](#PRE_FILLCELL_TCL) - [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW) - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT) - [SKIP_ANTENNA_REPAIR_POST_DRT](#SKIP_ANTENNA_REPAIR_POST_DRT) @@ -491,6 +551,10 @@ configuration file. - [GND_NETS_VOLTAGES](#GND_NETS_VOLTAGES) - [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER) - [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER) +- [POST_DENSITY_FILL_TCL](#POST_DENSITY_FILL_TCL) +- [POST_FINAL_REPORT_TCL](#POST_FINAL_REPORT_TCL) +- [PRE_DENSITY_FILL_TCL](#PRE_DENSITY_FILL_TCL) +- [PRE_FINAL_REPORT_TCL](#PRE_FINAL_REPORT_TCL) - [PWR_NETS_VOLTAGES](#PWR_NETS_VOLTAGES) - [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW) - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT) diff --git a/flow/scripts/cts.tcl b/flow/scripts/cts.tcl index 293206121d..13700382e0 100644 --- a/flow/scripts/cts.tcl +++ b/flow/scripts/cts.tcl @@ -1,5 +1,6 @@ utl::set_metrics_stage "cts__{}" source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE CTS source $::env(SCRIPTS_DIR)/lec_check.tcl erase_non_stage_variables cts load_design 3_place.odb 3_place.sdc @@ -86,7 +87,7 @@ if { !$::env(SKIP_CTS_REPAIR_TIMING) } { report_metrics 4 "cts final" -source_env_var_if_exists POST_CTS_TCL +source_step_tcl POST CTS orfs_write_db $::env(RESULTS_DIR)/4_1_cts.odb orfs_write_sdc $::env(RESULTS_DIR)/4_cts.sdc diff --git a/flow/scripts/density_fill.tcl b/flow/scripts/density_fill.tcl index a0f45f7276..6ea31e4a7a 100644 --- a/flow/scripts/density_fill.tcl +++ b/flow/scripts/density_fill.tcl @@ -1,4 +1,5 @@ source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE DENSITY_FILL erase_non_stage_variables final load_design 5_route.odb 5_route.sdc @@ -13,3 +14,5 @@ if { $::env(USE_FILL) } { log_cmd exec cp $::env(RESULTS_DIR)/5_route.odb $::env(RESULTS_DIR)/6_1_fill.odb # There is no 5_route.v file to copy } + +source_step_tcl POST DENSITY_FILL diff --git a/flow/scripts/detail_place.tcl b/flow/scripts/detail_place.tcl index 2a0babb8d6..ce066e6511 100644 --- a/flow/scripts/detail_place.tcl +++ b/flow/scripts/detail_place.tcl @@ -1,5 +1,6 @@ utl::set_metrics_stage "detailedplace__{}" source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE DETAIL_PLACE erase_non_stage_variables place load_design 3_4_place_resized.odb 2_floorplan.sdc @@ -38,4 +39,6 @@ if { $result != 0 } { report_metrics 3 "detailed place" true false +source_step_tcl POST DETAIL_PLACE + orfs_write_db $::env(RESULTS_DIR)/3_5_place_dp.odb diff --git a/flow/scripts/detail_route.tcl b/flow/scripts/detail_route.tcl index e38a03089c..68aa47c756 100644 --- a/flow/scripts/detail_route.tcl +++ b/flow/scripts/detail_route.tcl @@ -1,5 +1,6 @@ utl::set_metrics_stage "detailedroute__{}" source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE DETAIL_ROUTE load_design 5_1_grt.odb 5_1_grt.sdc if { ![grt::have_routes] } { error "Global routing failed, run `make gui_grt` and load $::global_route_congestion_report \ @@ -69,7 +70,7 @@ if { utl::metric_int "antenna_diodes_count" -1 } -source_env_var_if_exists POST_DETAIL_ROUTE_TCL +source_step_tcl POST DETAIL_ROUTE check_antennas -report_file $env(REPORTS_DIR)/drt_antennas.log diff --git a/flow/scripts/fillcell.tcl b/flow/scripts/fillcell.tcl index ba4b96912e..6d56cc30a0 100644 --- a/flow/scripts/fillcell.tcl +++ b/flow/scripts/fillcell.tcl @@ -1,4 +1,5 @@ source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE FILLCELL erase_non_stage_variables route if { [env_var_exists_and_non_empty FILL_CELLS] } { load_design 5_2_route.odb 5_1_grt.sdc @@ -12,3 +13,5 @@ if { [env_var_exists_and_non_empty FILL_CELLS] } { } else { log_cmd exec cp $::env(RESULTS_DIR)/5_2_route.odb $::env(RESULTS_DIR)/5_3_fillcell.odb } + +source_step_tcl POST FILLCELL diff --git a/flow/scripts/final_report.tcl b/flow/scripts/final_report.tcl index 48b30b74ff..420034d7e4 100644 --- a/flow/scripts/final_report.tcl +++ b/flow/scripts/final_report.tcl @@ -1,5 +1,6 @@ utl::set_metrics_stage "finish__{}" source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE FINAL_REPORT erase_non_stage_variables final load_design 6_1_fill.odb 6_1_fill.sdc @@ -68,3 +69,5 @@ report_metrics 6 "finish" if { [ord::openroad_gui_compiled] && [env_var_exists_and_non_empty DISPLAY] } { gui::show "source $::env(SCRIPTS_DIR)/save_images.tcl" false } + +source_step_tcl POST FINAL_REPORT diff --git a/flow/scripts/floorplan.tcl b/flow/scripts/floorplan.tcl index c439174bc5..69a99f2b9e 100644 --- a/flow/scripts/floorplan.tcl +++ b/flow/scripts/floorplan.tcl @@ -1,5 +1,6 @@ utl::set_metrics_stage "floorplan__{}" source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE FLOORPLAN erase_non_stage_variables floorplan load_design 1_synth.odb 1_synth.sdc @@ -148,7 +149,7 @@ report_units report_units_metric report_metrics 2 "floorplan final" false false -source_env_var_if_exists POST_FLOORPLAN_TCL +source_step_tcl POST FLOORPLAN source_env_var_if_exists IO_CONSTRAINTS orfs_write_db $::env(RESULTS_DIR)/2_1_floorplan.odb diff --git a/flow/scripts/global_place.tcl b/flow/scripts/global_place.tcl index 6ef3df9a34..e7f92089e8 100644 --- a/flow/scripts/global_place.tcl +++ b/flow/scripts/global_place.tcl @@ -1,5 +1,6 @@ utl::set_metrics_stage "globalplace__{}" source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE GLOBAL_PLACE erase_non_stage_variables place load_design 3_2_place_iop.odb 2_floorplan.sdc @@ -74,4 +75,6 @@ if { $::env(CLUSTER_FLOPS) } { report_metrics 3 "global place" false false +source_step_tcl POST GLOBAL_PLACE + orfs_write_db $::env(RESULTS_DIR)/3_3_place_gp.odb diff --git a/flow/scripts/global_place_skip_io.tcl b/flow/scripts/global_place_skip_io.tcl index 550df07fb6..e0eb0b078f 100644 --- a/flow/scripts/global_place_skip_io.tcl +++ b/flow/scripts/global_place_skip_io.tcl @@ -1,4 +1,5 @@ source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE GLOBAL_PLACE_SKIP_IO erase_non_stage_variables place load_design 2_floorplan.odb 2_floorplan.sdc @@ -13,4 +14,6 @@ if { [env_var_exists_and_non_empty FLOORPLAN_DEF] } { {*}[env_var_or_empty GLOBAL_PLACEMENT_ARGS] } +source_step_tcl POST GLOBAL_PLACE_SKIP_IO + orfs_write_db $::env(RESULTS_DIR)/3_1_place_gp_skip_io.odb diff --git a/flow/scripts/global_route.tcl b/flow/scripts/global_route.tcl index ba95205db6..ddc5e90c0b 100644 --- a/flow/scripts/global_route.tcl +++ b/flow/scripts/global_route.tcl @@ -6,7 +6,7 @@ load_design 4_cts.odb 4_cts.sdc # This proc is here to allow us to use 'return' to return early from this # file which is sourced proc global_route_helper { } { - source_env_var_if_exists PRE_GLOBAL_ROUTE_TCL + source_step_tcl PRE GLOBAL_ROUTE set res_aware "" append_env_var res_aware ENABLE_RESISTANCE_AWARE -resistance_aware 0 @@ -113,6 +113,7 @@ proc global_route_helper { } { source [file join $::env(SCRIPTS_DIR) "write_ref_sdc.tcl"] write_guides $::env(RESULTS_DIR)/route.guide + source_step_tcl POST GLOBAL_ROUTE orfs_write_db $::env(RESULTS_DIR)/5_1_grt.odb orfs_write_sdc $::env(RESULTS_DIR)/5_1_grt.sdc } diff --git a/flow/scripts/io_placement.tcl b/flow/scripts/io_placement.tcl index 0ec25dc545..29731bbafb 100644 --- a/flow/scripts/io_placement.tcl +++ b/flow/scripts/io_placement.tcl @@ -1,4 +1,5 @@ source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE IO_PLACEMENT erase_non_stage_variables place if { @@ -16,3 +17,5 @@ if { } else { log_cmd exec cp $::env(RESULTS_DIR)/3_1_place_gp_skip_io.odb $::env(RESULTS_DIR)/3_2_place_iop.odb } + +source_step_tcl POST IO_PLACEMENT diff --git a/flow/scripts/macro_place.tcl b/flow/scripts/macro_place.tcl index 302dd7b9c7..c2fdc21e30 100644 --- a/flow/scripts/macro_place.tcl +++ b/flow/scripts/macro_place.tcl @@ -1,8 +1,11 @@ source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE MACRO_PLACE erase_non_stage_variables floorplan load_design 2_1_floorplan.odb 2_1_floorplan.sdc source $::env(SCRIPTS_DIR)/macro_place_util.tcl +source_step_tcl POST MACRO_PLACE + orfs_write_db $::env(RESULTS_DIR)/2_2_floorplan_macro.odb write_macro_placement $::env(RESULTS_DIR)/2_2_floorplan_macro.tcl diff --git a/flow/scripts/pdn.tcl b/flow/scripts/pdn.tcl index 977fe71f1e..18a4822b50 100644 --- a/flow/scripts/pdn.tcl +++ b/flow/scripts/pdn.tcl @@ -1,11 +1,12 @@ source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE PDN erase_non_stage_variables floorplan load_design 2_3_floorplan_tapcell.odb 2_1_floorplan.sdc source $::env(PDN_TCL) pdngen -source_env_var_if_exists POST_PDN_TCL +source_step_tcl POST PDN # Check all supply nets set block [ord::get_db_block] diff --git a/flow/scripts/repair_timing_post_place.tcl b/flow/scripts/repair_timing_post_place.tcl index 88757727ea..5d43db8a02 100644 --- a/flow/scripts/repair_timing_post_place.tcl +++ b/flow/scripts/repair_timing_post_place.tcl @@ -1,5 +1,6 @@ utl::set_metrics_stage "place_repair_timing__{}" source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE REPAIR_TIMING_POST_PLACE erase_non_stage_variables place load_design 3_5_place_dp.odb 3_place.sdc @@ -18,4 +19,6 @@ puts "Estimate parasitics" log_cmd estimate_parasitics -placement report_metrics 3 "place repair timing" true false +source_step_tcl POST REPAIR_TIMING_POST_PLACE + orfs_write_db $::env(RESULTS_DIR)/3_6_place_repair_timing.odb diff --git a/flow/scripts/resize.tcl b/flow/scripts/resize.tcl index b1d8ca5aa9..0738314da5 100644 --- a/flow/scripts/resize.tcl +++ b/flow/scripts/resize.tcl @@ -1,5 +1,6 @@ utl::set_metrics_stage "placeopt__{}" source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE RESIZE erase_non_stage_variables place load_design 3_3_place_gp.odb 2_floorplan.sdc @@ -35,4 +36,6 @@ report_metrics 3 "resizer" true false puts "Instance count before $instance_count_before, after [sta::network_leaf_instance_count]" puts "Pin count before $pin_count_before, after [sta::network_leaf_pin_count]" +source_step_tcl POST RESIZE + orfs_write_db $::env(RESULTS_DIR)/3_4_place_resized.odb diff --git a/flow/scripts/synth_odb.tcl b/flow/scripts/synth_odb.tcl index ad56b542e8..a30278ff63 100644 --- a/flow/scripts/synth_odb.tcl +++ b/flow/scripts/synth_odb.tcl @@ -1,8 +1,11 @@ utl::set_metrics_stage "floorplan__{}" source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE SYNTH erase_non_stage_variables synth load_design 1_2_yosys.v 1_2_yosys.sdc +source_step_tcl POST SYNTH + orfs_write_db $::env(RESULTS_DIR)/1_synth.odb # Canonicalize 1_synth.sdc. The original SDC_FILE provided by # the user could have dependencies, such as sourcing util.tcl, diff --git a/flow/scripts/tapcell.tcl b/flow/scripts/tapcell.tcl index cbd4ede9fc..7a0b9abd56 100644 --- a/flow/scripts/tapcell.tcl +++ b/flow/scripts/tapcell.tcl @@ -1,4 +1,5 @@ source $::env(SCRIPTS_DIR)/load.tcl +source_step_tcl PRE TAPCELL erase_non_stage_variables floorplan load_design 2_2_floorplan_macro.odb 2_1_floorplan.sdc @@ -9,4 +10,6 @@ if { [env_var_exists_and_non_empty TAPCELL_TCL] } { cut_rows } +source_step_tcl POST TAPCELL + orfs_write_db $::env(RESULTS_DIR)/2_3_floorplan_tapcell.odb diff --git a/flow/scripts/util.tcl b/flow/scripts/util.tcl index 04b4d3727e..b1446e920d 100644 --- a/flow/scripts/util.tcl +++ b/flow/scripts/util.tcl @@ -192,6 +192,11 @@ proc source_env_var_if_exists { env_var } { } } +proc source_step_tcl { hook_type step_name } { + set env_var "${hook_type}_${step_name}_TCL" + source_env_var_if_exists $env_var +} + # Feature toggle for now, eventually the -hier option # will be default and this code will be deleted. proc hier_options { } { diff --git a/flow/scripts/variables.yaml b/flow/scripts/variables.yaml index 7fcc3fb9c4..d707f6b6d1 100644 --- a/flow/scripts/variables.yaml +++ b/flow/scripts/variables.yaml @@ -1313,6 +1313,657 @@ REMOVE_CELLS_FOR_LEC: String patterns directly passed to write_verilog -remove_cells <> for lec checks. type: string +ASAP7_USE_VT: + description: > + A space separated list of VT options to use with the ASAP7 standard cell library: + RVT, LVT, SLVT. + stages: + - All stages + default: RVT + Weight for violating the fixed outline constraint, meaning that all + clusters should be placed within the shape of their parent cluster. + default: 100.00 + stages: + - floorplan +RTLMP_BOUNDARY_WT: + description: > + Weight for the boundary or how far the hard macro clusters are from + boundaries. + default: 50.0 + stages: + - floorplan +RTLMP_NOTCH_WT: + description: > + Weight for the notch, or the existence of dead space that cannot be used + for placement and routing. + default: 50.0 + stages: + - floorplan +RTLMP_RPT_DIR: + description: > + Path to the directory where reports are saved. + stages: + - floorplan +RTLMP_FENCE_LX: + description: > + Defines the lower left X coordinate for the global fence bounding box in + microns. + default: 0.0 + stages: + - floorplan +RTLMP_FENCE_LY: + description: > + Defines the lower left Y coordinate for the global fence bounding box in + microns. + default: 0.0 + stages: + - floorplan +RTLMP_FENCE_UX: + description: > + Defines the upper right X coordinate for the global fence bounding box in + microns. + default: 0.0 + stages: + - floorplan +RTLMP_FENCE_UY: + description: > + Defines the upper right Y coordinate for the global fence bounding box in + microns. + default: 0.0 + stages: + - floorplan +RTLMP_ARGS: + description: > + Overrides all other RTL macro placer arguments. + stages: + - floorplan +GDS_ALLOW_EMPTY: + description: > + Single regular expression of module names of macros that have no .gds file + stages: + - final +RUN_SCRIPT: + description: > + Path to script to run from `make run`, python or tcl script detected by + .py or .tcl extension. +RUN_LOG_NAME_STEM: + description: > + Stem of the log file name, the log file will be named + `$(LOG_DIR)/$(RUN_LOG_NAME_STEM).log`. + default: run +YOSYS_FLAGS: + description: > + Flags to pass to yosys. + stages: + - synth + default: -v 3 +FOOTPRINT: + description: | + Custom footprint definition file for ICeWall-based floorplan initialization. Mutually exclusive with FLOORPLAN_DEF or DIE_AREA/CORE_AREA or CORE_UTILIZATION. + stages: + - floorplan +FOOTPRINT_TCL: + description: | + Specifies a Tcl script with custom footprint-related commands for floorplan setup. + stages: + - floorplan +FLOW_VARIANT: + description: > + Flow variant to use, used in the flow variant directory name. + default: base +RULES_JSON: + description: > + json files with the metrics baseline regression rules. + In the ORFS Makefile, this defaults to $DESIGN_DIR/rules-base.json, + but ORFS does not mandate the users source directory layout and + this can be placed elsewhere when the user sets up an ORFS + config.mk or from bazel-orfs. + stages: + - test +SKIP_ANTENNA_REPAIR_PRE_GRT: + default: 0 + description: > + Skips antenna repair pre-global routing. + stages: + - grt +SKIP_ANTENNA_REPAIR_POST_DRT: + default: 0 + description: > + Skips antenna repair post-detailed routing. + stages: + - route +SKIP_ANTENNA_REPAIR: + default: 0 + description: > + Skips antenna repair entirely. + stages: + - grt +SKIP_DETAILED_ROUTE: + default: 0 + description: > + Skips detailed route. + stages: + - route + - final +MAX_REPAIR_ANTENNAS_ITER_DRT: + default: 5 + description: > + Defines the maximum number of iterations post-detailed routing repair + antennas will run. + stages: + - route +MAX_REPAIR_ANTENNAS_ITER_GRT: + default: 5 + description: > + Defines the maximum number of iterations post global routing repair + antennas will run. + stages: + - grt +OPENROAD_HIERARCHICAL: + description: > + Feature toggle to enable to run OpenROAD in hierarchical mode, + otherwise considered flat. Will eventually be the default and + this option will be retired. + default: 0 + stages: + - All stages +MAX_REPAIR_TIMING_ITER: + description: > + Maximum number of iterations for repair setup and repair hold. + stages: + - cts + - floorplan + - grt + - place +NUM_CORES: + description: > + Passed to `openroad -threads $(NUM_CORES)`, defaults to numbers + of cores in system as determined by system specific code in Makefile, + `nproc` is tried first. + OpenROAD does not limit itself to this number of cores across + OpenROAD running instances, which can lead to overprovisioning + in contexts such as bazel-orfs where there could be many + routing, or place jobs running at the same time. + stages: + - All stages +KEEP_VARS: + description: > + Feature toggle to keep intermediate variables during the flow. + This is useful for the single-run flow, where all stages of the flow + are run in a single OpenROAD instance. + default: 0 + stages: + - All stages +WRITE_ODB_AND_SDC_EACH_STAGE: + description: > + Save out .sdc and .odb file after each stage, useful to disable + when using a single OpenROAD instance to run all stages of the flow. + stages: + - All stages + default: 1 +LEC_CHECK: + description: > + Perform a formal equivalence check between before and after netlists. + If this fails, report an issue to OpenROAD. + default: 0 + stages: + - cts +REMOVE_CELLS_FOR_LEC: + description: > + String patterns directly passed to write_verilog -remove_cells <> for + lec checks. + type: string +ASAP7_USE_VT: + description: > + A space separated list of VT options to use with the ASAP7 standard cell library: + RVT, LVT, SLVT. + stages: + - All stages + default: RVT +PRE_SYNTH_TCL: + description: | + Specifies a Tcl script with commands to run before synthesis ODB generation. + stages: + - synth +POST_SYNTH_TCL: + description: | + Specifies a Tcl script with commands to run after synthesis ODB generation. + stages: + - synth +PRE_FLOORPLAN_TCL: + description: | + Specifies a Tcl script with commands to run before floorplan. + stages: + - floorplan +POST_FLOORPLAN_TCL: + description: | + Specifies a Tcl script with commands to run after floorplan is completed. + stages: + - floorplan +PRE_MACRO_PLACE_TCL: + description: | + Specifies a Tcl script with commands to run before macro placement. + stages: + - floorplan +POST_MACRO_PLACE_TCL: + description: | + Specifies a Tcl script with commands to run after macro placement. + stages: + - floorplan +PRE_TAPCELL_TCL: + description: | + Specifies a Tcl script with commands to run before tapcell. + stages: + - floorplan +POST_TAPCELL_TCL: + description: | + Specifies a Tcl script with commands to run after tapcell. + stages: + - floorplan +PRE_PDN_TCL: + description: | + Specifies a Tcl script with commands to run before PDN generation. + stages: + - floorplan +POST_PDN_TCL: + description: | + Specifies a Tcl script with commands to run after PDN generation. + stages: + - floorplan +PRE_GLOBAL_PLACE_SKIP_IO_TCL: + description: | + Specifies a Tcl script with commands to run before global placement (skip IO). + stages: + - place +POST_GLOBAL_PLACE_SKIP_IO_TCL: + description: | + Specifies a Tcl script with commands to run after global placement (skip IO). + stages: + - place +PRE_IO_PLACEMENT_TCL: + description: | + Specifies a Tcl script with commands to run before IO placement. + stages: + - place +POST_IO_PLACEMENT_TCL: + description: | + Specifies a Tcl script with commands to run after IO placement. + stages: + - place +PRE_GLOBAL_PLACE_TCL: + description: | + Specifies a Tcl script with commands to run before global placement. + stages: + - place +POST_GLOBAL_PLACE_TCL: + description: | + Specifies a Tcl script with commands to run after global placement. + stages: + - place +PRE_RESIZE_TCL: + description: | + Specifies a Tcl script with commands to run before resize. + stages: + - place +POST_RESIZE_TCL: + description: | + Specifies a Tcl script with commands to run after resize. + stages: + - place +PRE_DETAIL_PLACE_TCL: + description: | + Specifies a Tcl script with commands to run before detailed placement. + stages: + - place +POST_DETAIL_PLACE_TCL: + description: | + Specifies a Tcl script with commands to run after detailed placement. + stages: + - place +PRE_REPAIR_TIMING_POST_PLACE_TCL: + description: | + Specifies a Tcl script with commands to run before post-place timing repair. + stages: + - place +POST_REPAIR_TIMING_POST_PLACE_TCL: + description: | + Specifies a Tcl script with commands to run after post-place timing repair. + stages: + - place +PRE_CTS_TCL: + description: | + Specifies a Tcl script with commands to run before CTS. + stages: + - cts +POST_CTS_TCL: + description: | + Specifies a Tcl script with commands to run after CTS is completed. + stages: + - cts +FASTROUTE_TCL: + description: | + Specifies a Tcl script with commands to run before FastRoute. +USE_FILL: + description: > + Whether to perform metal density filling. + default: 0 +SEAL_GDS: + description: | + Seal macro to place around the design. +ABSTRACT_SOURCE: + description: | + Which .odb file to use to create abstract + stages: + - generate_abstract +PRE_GLOBAL_ROUTE_TCL: + description: | + Specifies a Tcl script with commands to run before global route. + stages: + - grt +POST_GLOBAL_ROUTE_TCL: + description: | + Specifies a Tcl script with commands to run after global route. + stages: + - grt +PRE_DETAIL_ROUTE_TCL: + description: | + Specifies a Tcl script with commands to run before detailed route. + stages: + - route +POST_DETAIL_ROUTE_TCL: + description: | + Specifies a Tcl script with commands to run after detailed route. + stages: + - route +PRE_FILLCELL_TCL: + description: | + Specifies a Tcl script with commands to run before fillcell insertion. + stages: + - route +POST_FILLCELL_TCL: + description: | + Specifies a Tcl script with commands to run after fillcell insertion. + stages: + - route +PRE_DENSITY_FILL_TCL: + description: | + Specifies a Tcl script with commands to run before density fill. + stages: + - final +POST_DENSITY_FILL_TCL: + description: | + Specifies a Tcl script with commands to run after density fill. + stages: + - final +PRE_FINAL_REPORT_TCL: + description: | + Specifies a Tcl script with commands to run before final report generation. + stages: + - final +POST_FINAL_REPORT_TCL: + description: | + Specifies a Tcl script with commands to run after final report generation. + stages: + - final +GLOBAL_ROUTE_ARGS: + description: > + Replaces default arguments for global route. + stages: + - grt + default: -congestion_iterations 30 -congestion_report_iter_step 5 -verbose +MATCH_CELL_FOOTPRINT: + description: > + Enforce sizing operations to only swap cells that have the same layout + boundary. + stages: + - floorplan + - place + - cts + - route + default: 0 +RTLMP_MAX_LEVEL: + description: > + Maximum depth of the physical hierarchy tree. + default: 2 + stages: + - floorplan +RTLMP_MAX_INST: + description: > + Maximum number of standard cells in a cluster. If unset, rtl_macro_placer + will calculate a value based on the design attributes. + stages: + - floorplan +RTLMP_MIN_INST: + description: > + Minimum number of standard cells in a cluster. If unset, rtl_macro_placer + will calculate a value based on the design attributes. + stages: + - floorplan +RTLMP_MAX_MACRO: + description: > + Maximum number of macros in a cluster. If unset, rtl_macro_placer will + calculate a value based on the design attributes. + stages: + - floorplan +RTLMP_MIN_MACRO: + description: > + Minimum number of macros in a cluster. If unset, rtl_macro_placer will + calculate a value based on the design attributes. + stages: + - floorplan +RTLMP_MIN_AR: + description: > + Specifies the minimum aspect ratio (height/width). + default: 0.33 + stages: + - floorplan +RTLMP_AREA_WT: + description: > + Weight for the area of the current floorplan. + default: 0.1 + stages: + - floorplan +RTLMP_WIRELENGTH_WT: + description: > + Weight for half-perimiter wirelength. + default: 100.0 + stages: + - floorplan +RTLMP_OUTLINE_WT: + description: > + Weight for violating the fixed outline constraint, meaning that all + clusters should be placed within the shape of their parent cluster. + default: 100.00 + stages: + - floorplan +RTLMP_BOUNDARY_WT: + description: > + Weight for the boundary or how far the hard macro clusters are from + boundaries. + default: 50.0 + stages: + - floorplan +RTLMP_NOTCH_WT: + description: > + Weight for the notch, or the existence of dead space that cannot be used + for placement and routing. + default: 50.0 + stages: + - floorplan +RTLMP_RPT_DIR: + description: > + Path to the directory where reports are saved. + stages: + - floorplan +RTLMP_FENCE_LX: + description: > + Defines the lower left X coordinate for the global fence bounding box in + microns. + default: 0.0 + stages: + - floorplan +RTLMP_FENCE_LY: + description: > + Defines the lower left Y coordinate for the global fence bounding box in + microns. + default: 0.0 + stages: + - floorplan +RTLMP_FENCE_UX: + description: > + Defines the upper right X coordinate for the global fence bounding box in + microns. + default: 0.0 + stages: + - floorplan +RTLMP_FENCE_UY: + description: > + Defines the upper right Y coordinate for the global fence bounding box in + microns. + default: 0.0 + stages: + - floorplan +RTLMP_ARGS: + description: > + Overrides all other RTL macro placer arguments. + stages: + - floorplan +GDS_ALLOW_EMPTY: + description: > + Single regular expression of module names of macros that have no .gds file + stages: + - final +RUN_SCRIPT: + description: > + Path to script to run from `make run`, python or tcl script detected by + .py or .tcl extension. +RUN_LOG_NAME_STEM: + description: > + Stem of the log file name, the log file will be named + `$(LOG_DIR)/$(RUN_LOG_NAME_STEM).log`. + default: run +YOSYS_FLAGS: + description: > + Flags to pass to yosys. + stages: + - synth + default: -v 3 +FOOTPRINT: + description: | + Custom footprint definition file for ICeWall-based floorplan initialization. Mutually exclusive with FLOORPLAN_DEF or DIE_AREA/CORE_AREA or CORE_UTILIZATION. + stages: + - floorplan +FOOTPRINT_TCL: + description: | + Specifies a Tcl script with custom footprint-related commands for floorplan setup. + stages: + - floorplan +FLOW_VARIANT: + description: > + Flow variant to use, used in the flow variant directory name. + default: base +RULES_JSON: + description: > + json files with the metrics baseline regression rules. + In the ORFS Makefile, this defaults to $DESIGN_DIR/rules-base.json, + but ORFS does not mandate the users source directory layout and + this can be placed elsewhere when the user sets up an ORFS + config.mk or from bazel-orfs. + stages: + - test +SKIP_ANTENNA_REPAIR_PRE_GRT: + default: 0 + description: > + Skips antenna repair pre-global routing. + stages: + - grt +SKIP_ANTENNA_REPAIR_POST_DRT: + default: 0 + description: > + Skips antenna repair post-detailed routing. + stages: + - route +SKIP_ANTENNA_REPAIR: + default: 0 + description: > + Skips antenna repair entirely. + stages: + - grt +SKIP_DETAILED_ROUTE: + default: 0 + description: > + Skips detailed route. + stages: + - route + - final +MAX_REPAIR_ANTENNAS_ITER_DRT: + default: 5 + description: > + Defines the maximum number of iterations post-detailed routing repair + antennas will run. + stages: + - route +MAX_REPAIR_ANTENNAS_ITER_GRT: + default: 5 + description: > + Defines the maximum number of iterations post global routing repair + antennas will run. + stages: + - grt +OPENROAD_HIERARCHICAL: + description: > + Feature toggle to enable to run OpenROAD in hierarchical mode, + otherwise considered flat. Will eventually be the default and + this option will be retired. + default: 0 + stages: + - All stages +MAX_REPAIR_TIMING_ITER: + description: > + Maximum number of iterations for repair setup and repair hold. + stages: + - cts + - floorplan + - grt + - place +NUM_CORES: + description: > + Passed to `openroad -threads $(NUM_CORES)`, defaults to numbers + of cores in system as determined by system specific code in Makefile, + `nproc` is tried first. + OpenROAD does not limit itself to this number of cores across + OpenROAD running instances, which can lead to overprovisioning + in contexts such as bazel-orfs where there could be many + routing, or place jobs running at the same time. + stages: + - All stages +KEEP_VARS: + description: > + Feature toggle to keep intermediate variables during the flow. + This is useful for the single-run flow, where all stages of the flow + are run in a single OpenROAD instance. + default: 0 + stages: + - All stages +WRITE_ODB_AND_SDC_EACH_STAGE: + description: > + Save out .sdc and .odb file after each stage, useful to disable + when using a single OpenROAD instance to run all stages of the flow. + stages: + - All stages + default: 1 +LEC_CHECK: + description: > + Perform a formal equivalence check between before and after netlists. + If this fails, report an issue to OpenROAD. + default: 0 + stages: + - cts +REMOVE_CELLS_FOR_LEC: + description: > + String patterns directly passed to write_verilog -remove_cells <> for + lec checks. + type: string ASAP7_USE_VT: description: > A space separated list of VT options to use with the ASAP7 standard cell library: