From e76a969a6ac595e1a3159cc7ffc7ec7036ad03ed Mon Sep 17 00:00:00 2001 From: Wiktor Kwiatkowski Date: Thu, 25 Jun 2026 17:06:12 +0200 Subject: [PATCH] linker: rename .bssnz to .noinit to fix linker wildcard conflicts Previously, the .bss.core.nz section was placed before .bss to avoid the *(.bss*) linker wildcard. This placement assigned it a low RAM address, causing the bootloader to accidentally overwrite these variables during startup. Moving the section after .bss was not an option because the wildcard would still catch it. Renaming the section to .noinit solves this problem. It allows the section to be safely placed after .bss at a higher memory address, ensuring the variables survive system resets. --- boot/startup/include/mynewt_config.ld.h | 4 ++-- boot/startup/mynewt_cortex_m0.ld | 18 +++++++-------- boot/startup/mynewt_cortex_m3.ld | 18 +++++++-------- boot/startup/mynewt_cortex_m33.ld | 18 +++++++-------- boot/startup/mynewt_cortex_m4.ld | 18 +++++++-------- boot/startup/mynewt_cortex_m7.ld | 18 +++++++-------- .../ada_feather_nrf52_no_boot.ld | 22 +++++++++---------- hw/bsp/ada_feather_nrf52/include/bsp/bsp.h | 4 ++-- .../split_ada_feather_nrf52.ld | 22 +++++++++---------- .../ada_feather_stm32f405/include/bsp/bsp.h | 4 ++-- .../link/include/mcu_config.ld.h | 4 ++-- hw/bsp/apollo2_evb/include/bsp/bsp.h | 4 ++-- hw/bsp/apollo3_evb/include/bsp/bsp.h | 4 ++-- hw/bsp/arduino_primo_nrf52/include/bsp/bsp.h | 4 ++-- hw/bsp/arduino_primo_nrf52/primo_no_boot.ld | 22 +++++++++---------- hw/bsp/arduino_primo_nrf52/split-primo.ld | 22 +++++++++---------- hw/bsp/b-l072z-lrwan1/include/bsp/bsp.h | 4 ++-- hw/bsp/b-l475e-iot01a/include/bsp/bsp.h | 4 ++-- hw/bsp/bbc_microbit/split-microbit.ld | 4 ++-- hw/bsp/black_vet6/include/bsp/bsp.h | 4 ++-- .../black_vet6/link/include/mcu_config.ld.h | 4 ++-- hw/bsp/blackpill401cc/include/bsp/bsp.h | 4 ++-- hw/bsp/blackpill411ce/include/bsp/bsp.h | 4 ++-- hw/bsp/ble400/ble400_no_boot.ld | 4 ++-- hw/bsp/ble400/split-ble400.ld | 4 ++-- hw/bsp/bluepill/include/bsp/bsp.h | 4 ++-- hw/bsp/bmd200/nrf51dk_no_boot.ld | 4 ++-- hw/bsp/bmd200/split-nrf51dk.ld | 4 ++-- hw/bsp/bmd300eval/bmd300eval_no_boot.ld | 22 +++++++++---------- hw/bsp/bmd300eval/include/bsp/bsp.h | 4 ++-- hw/bsp/bmd300eval/split-bmd300eval.ld | 22 +++++++++---------- hw/bsp/calliope_mini/split-calliope_mini.ld | 4 ++-- .../dialog_da14695-dk-usb/include/bsp/bsp.h | 4 ++-- .../dialog_da1469x-dk-pro/include/bsp/bsp.h | 4 ++-- hw/bsp/dwm1001-dev/dwm1001-dev_no_boot.ld | 22 +++++++++---------- hw/bsp/dwm1001-dev/include/bsp/bsp.h | 4 ++-- hw/bsp/dwm1001-dev/split-dwm1001-dev.ld | 22 +++++++++---------- .../fanstel-ev-bt840_no_boot.ld | 22 +++++++++---------- hw/bsp/fanstel-ev-bt840/include/bsp/bsp.h | 4 ++-- .../split-fanstel-ev-bt840.ld | 22 +++++++++---------- hw/bsp/fanstel_ev_bt40e/include/bsp/bsp.h | 4 ++-- hw/bsp/fanstel_ev_bt40e/net/include/bsp/bsp.h | 4 ++-- hw/bsp/hifive1/hifive1.ld | 18 +++++++-------- hw/bsp/hifive1/include/bsp/bsp.h | 4 ++-- hw/bsp/native-armv7/include/bsp/bsp.h | 2 +- hw/bsp/native/include/bsp/bsp.h | 2 +- hw/bsp/nina-b1/include/bsp/bsp.h | 4 ++-- hw/bsp/nina-b1/nrf52dk_no_boot.ld | 22 +++++++++---------- hw/bsp/nina-b1/split-nrf52dk.ld | 22 +++++++++---------- .../nordic_pca10028-16k_no_boot.ld | 4 ++-- .../split-nordic_pca10028-16k.ld | 4 ++-- .../nordic_pca10028_no_boot.ld | 4 ++-- .../nordic_pca10028/split-nordic_pca10028.ld | 4 ++-- hw/bsp/nordic_pca10040/include/bsp/bsp.h | 4 ++-- .../nordic_pca10040_no_boot.ld | 22 +++++++++---------- .../nordic_pca10040/split-nordic_pca10040.ld | 22 +++++++++---------- hw/bsp/nordic_pca10056/include/bsp/bsp.h | 4 ++-- .../nordic_pca10056_no_boot.ld | 22 +++++++++---------- .../nordic_pca10056/split-nordic_pca10056.ld | 22 +++++++++---------- hw/bsp/nordic_pca10059/include/bsp/bsp.h | 4 ++-- .../nordic_pca10059_no_boot.ld | 22 +++++++++---------- .../nordic_pca10059/split-nordic_pca10059.ld | 22 +++++++++---------- hw/bsp/nordic_pca10090/include/bsp/bsp.h | 4 ++-- .../nordic_pca10090_no_boot.ld | 22 +++++++++---------- .../nordic_pca10090/split-nordic_pca10090.ld | 22 +++++++++---------- hw/bsp/nordic_pca10095/include/bsp/bsp.h | 4 ++-- .../nordic_pca10095_no_boot.ld | 22 +++++++++---------- hw/bsp/nordic_pca10095_net/include/bsp/bsp.h | 4 ++-- .../nordic_pca10095_net_no_boot.ld | 22 +++++++++---------- hw/bsp/nordic_pca10121/include/bsp/bsp.h | 4 ++-- hw/bsp/nordic_pca10121/net/include/bsp/bsp.h | 4 ++-- hw/bsp/nordic_pca10121/net/no_boot.ld | 22 +++++++++---------- hw/bsp/nordic_pca10121/no_boot.ld | 22 +++++++++---------- hw/bsp/nordic_pca10156/include/bsp/bsp.h | 4 ++-- hw/bsp/nordic_pca20020/include/bsp/bsp.h | 4 ++-- .../nordic_pca20020_no_boot.ld | 22 +++++++++---------- .../nordic_pca20020/split-nordic_pca20020.ld | 22 +++++++++---------- hw/bsp/nordic_thingy53/include/bsp/bsp.h | 4 ++-- .../nrf51dk-16kbram_no_boot.ld | 4 ++-- hw/bsp/nrf51-blenano/nrf51dk_no_boot.ld | 4 ++-- hw/bsp/nrf51-blenano/split-nrf51dk.ld | 4 ++-- hw/bsp/nucleo-f030r8/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-f072rb/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-f103rb/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-f303k8/include/bsp/bsp.h | 4 ++-- .../link/include/mcu_config.ld.h | 4 ++-- hw/bsp/nucleo-f303re/include/bsp/bsp.h | 4 ++-- .../link/include/mcu_config.ld.h | 4 ++-- hw/bsp/nucleo-f401re/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-f411re/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-f413zh/include/bsp/bsp.h | 4 ++-- .../link/include/mcu_config.ld.h | 4 ++-- hw/bsp/nucleo-f439zi/include/bsp/bsp.h | 4 ++-- .../link/include/mcu_config.ld.h | 4 ++-- hw/bsp/nucleo-f746zg/include/bsp/bsp.h | 4 ++-- .../link/include/mcu_config.ld.h | 4 ++-- hw/bsp/nucleo-f767zi/include/bsp/bsp.h | 4 ++-- .../link/include/mcu_config.ld.h | 4 ++-- hw/bsp/nucleo-g0b1re/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-g491re/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-h563zi/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-h723zg/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-h753zi/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-l073rz/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-l476rg/include/bsp/bsp.h | 4 ++-- hw/bsp/nucleo-u575zi-q/include/bsp/bsp.h | 4 ++-- hw/bsp/olimex-p103/include/bsp/bsp.h | 4 ++-- hw/bsp/olimex-pic32-emz64/include/bsp/bsp.h | 4 ++-- hw/bsp/olimex-pic32-hmz144/include/bsp/bsp.h | 4 ++-- .../include/bsp/bsp.h | 4 ++-- .../link/include/mcu_config.ld.h | 4 ++-- .../p-nucleo-wb55-usbdongle/include/bsp/bsp.h | 4 ++-- hw/bsp/p-nucleo-wb55/include/bsp/bsp.h | 4 ++-- .../pic32mx470_6lp_clicker/include/bsp/bsp.h | 4 ++-- hw/bsp/pic32mz2048_wi-fire/include/bsp/bsp.h | 4 ++-- hw/bsp/pinetime/include/bsp/bsp.h | 4 ++-- hw/bsp/puckjs/include/bsp/bsp.h | 4 ++-- hw/bsp/puckjs/puckjs_no_boot.ld | 22 +++++++++---------- hw/bsp/puckjs/split_puckjs.ld | 22 +++++++++---------- hw/bsp/rb-blend2/include/bsp/bsp.h | 4 ++-- hw/bsp/rb-blend2/rb-blend2_no_boot.ld | 22 +++++++++---------- hw/bsp/rb-blend2/split-rb-blend2.ld | 22 +++++++++---------- hw/bsp/rb-nano2/include/bsp/bsp.h | 4 ++-- hw/bsp/rb-nano2/rb-nano2_no_boot.ld | 22 +++++++++---------- hw/bsp/rb-nano2/split-rb-nano2.ld | 22 +++++++++---------- hw/bsp/reel_board/include/bsp/bsp.h | 4 ++-- hw/bsp/reel_board/reel_board_no_boot.ld | 22 +++++++++---------- hw/bsp/reel_board/split-reel_board.ld | 22 +++++++++---------- hw/bsp/ruuvitag_rev_b/include/bsp/bsp.h | 4 ++-- .../ruuvitag_rev_b/ruuvitag_rev_b_no_boot.ld | 22 +++++++++---------- hw/bsp/ruuvitag_rev_b/split-ruuvitag_rev_b.ld | 22 +++++++++---------- hw/bsp/stm32f3discovery/include/bsp/bsp.h | 4 ++-- .../link/include/mcu_config.ld.h | 4 ++-- hw/bsp/stm32f411discovery/include/bsp/bsp.h | 4 ++-- hw/bsp/stm32f429discovery/include/bsp/bsp.h | 4 ++-- .../link/include/mcu_config.ld.h | 4 ++-- hw/bsp/stm32f4discovery/include/bsp/bsp.h | 4 ++-- hw/bsp/stm32f7discovery/include/bsp/bsp.h | 4 ++-- .../link/include/mcu_config.ld.h | 4 ++-- hw/bsp/stm32l152discovery/include/bsp/bsp.h | 4 ++-- hw/bsp/telee02/include/bsp/bsp.h | 4 ++-- hw/bsp/telee02/split-telee02.ld | 22 +++++++++---------- hw/bsp/telee02/telee02_no_boot.ld | 22 +++++++++---------- hw/bsp/ublox_bmd_345/include/bsp/bsp.h | 4 ++-- hw/bsp/ublox_bmd_345/split-ublox_bmd_345.ld | 22 +++++++++---------- hw/bsp/ublox_bmd_345/ublox_bmd_345_no_boot.ld | 22 +++++++++---------- hw/bsp/ublox_mini_nora_b1/include/bsp/bsp.h | 4 ++-- .../ublox_mini_nora_b1/net/include/bsp/bsp.h | 4 ++-- hw/bsp/vbluno51/split-vbluno51.ld | 4 ++-- hw/bsp/vbluno51/vbluno51_no_boot.ld | 4 ++-- hw/bsp/vbluno52/include/bsp/bsp.h | 4 ++-- hw/bsp/vbluno52/split-vbluno52.ld | 22 +++++++++---------- hw/bsp/vbluno52/vbluno52_no_boot.ld | 22 +++++++++---------- hw/bsp/weact_g431cb/include/bsp/bsp.h | 4 ++-- hw/mcu/ambiq/apollo2/apollo2.ld | 22 +++++++++---------- hw/mcu/dialog/cmac/cmac.ld | 8 +++---- hw/mcu/dialog/da1469x/da1469x.ld | 22 +++++++++---------- hw/mcu/dialog/da1469x/da1469x_ram_resident.ld | 18 +++++++-------- hw/mcu/nordic/nrf51xxx/nrf51.ld | 4 ++-- hw/mcu/nordic/nrf52xxx/nrf52.ld | 22 +++++++++---------- hw/mcu/nordic/nrf52xxx/nrf52_ram_resident.ld | 22 +++++++++---------- hw/mcu/nordic/nrf5340/nrf5340.ld | 22 +++++++++---------- hw/mcu/nordic/nrf5340/nrf5340_ram_resident.ld | 22 +++++++++---------- hw/mcu/nordic/nrf5340_net/nrf5340_net.ld | 22 +++++++++---------- .../nrf5340_net/nrf5340_net_ram_resident.ld | 22 +++++++++---------- hw/mcu/nordic/nrf91xx/nrf91.ld | 22 +++++++++---------- hw/mcu/nordic/nrf91xx/nrf91_ram_resident.ld | 22 +++++++++---------- .../stm32h7xx/link/include/mcu_config.ld.h | 2 +- sys/defs/include/defs/sections.h | 4 ++-- .../btshell_nrf52840_coverity/nrf52.ld | 4 ++-- 170 files changed, 856 insertions(+), 856 deletions(-) diff --git a/boot/startup/include/mynewt_config.ld.h b/boot/startup/include/mynewt_config.ld.h index 623b1e51aa..658dcb50e3 100644 --- a/boot/startup/include/mynewt_config.ld.h +++ b/boot/startup/include/mynewt_config.ld.h @@ -41,8 +41,8 @@ #ifndef BSS_RAM #define BSS_RAM RAM #endif -#ifndef BSSNZ_RAM -#define BSSNZ_RAM RAM +#ifndef NOINIT_RAM +#define NOINIT_RAM RAM #endif #ifndef MYNEWT_VAL_RESET_HANDLER diff --git a/boot/startup/mynewt_cortex_m0.ld b/boot/startup/mynewt_cortex_m0.ld index 00a13e75f6..130d31ce1f 100644 --- a/boot/startup/mynewt_cortex_m0.ld +++ b/boot/startup/mynewt_cortex_m0.ld @@ -261,15 +261,6 @@ SECTIONS __data_image__ = LOADADDR(.data); _sidata = LOADADDR(.data); - .bssnz (NOLOAD) : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > BSSNZ_RAM - #ifdef COREBSS_RAM .corebss (NOLOAD): { @@ -296,6 +287,15 @@ SECTIONS __bss_end__ = .; } > BSS_RAM + .noinit (NOLOAD) : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > NOINIT_RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/boot/startup/mynewt_cortex_m3.ld b/boot/startup/mynewt_cortex_m3.ld index 7554cdd666..0d1cf319ff 100644 --- a/boot/startup/mynewt_cortex_m3.ld +++ b/boot/startup/mynewt_cortex_m3.ld @@ -261,15 +261,6 @@ SECTIONS __data_image__ = LOADADDR(.data); _sidata = LOADADDR(.data); - .bssnz (NOLOAD) : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > BSSNZ_RAM - #ifdef COREBSS_RAM .corebss (NOLOAD): { @@ -296,6 +287,15 @@ SECTIONS __bss_end__ = .; } > BSS_RAM + .noinit (NOLOAD) : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > NOINIT_RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/boot/startup/mynewt_cortex_m33.ld b/boot/startup/mynewt_cortex_m33.ld index 7554cdd666..0d1cf319ff 100644 --- a/boot/startup/mynewt_cortex_m33.ld +++ b/boot/startup/mynewt_cortex_m33.ld @@ -261,15 +261,6 @@ SECTIONS __data_image__ = LOADADDR(.data); _sidata = LOADADDR(.data); - .bssnz (NOLOAD) : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > BSSNZ_RAM - #ifdef COREBSS_RAM .corebss (NOLOAD): { @@ -296,6 +287,15 @@ SECTIONS __bss_end__ = .; } > BSS_RAM + .noinit (NOLOAD) : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > NOINIT_RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/boot/startup/mynewt_cortex_m4.ld b/boot/startup/mynewt_cortex_m4.ld index 7554cdd666..0d1cf319ff 100644 --- a/boot/startup/mynewt_cortex_m4.ld +++ b/boot/startup/mynewt_cortex_m4.ld @@ -261,15 +261,6 @@ SECTIONS __data_image__ = LOADADDR(.data); _sidata = LOADADDR(.data); - .bssnz (NOLOAD) : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > BSSNZ_RAM - #ifdef COREBSS_RAM .corebss (NOLOAD): { @@ -296,6 +287,15 @@ SECTIONS __bss_end__ = .; } > BSS_RAM + .noinit (NOLOAD) : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > NOINIT_RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/boot/startup/mynewt_cortex_m7.ld b/boot/startup/mynewt_cortex_m7.ld index 7554cdd666..0d1cf319ff 100644 --- a/boot/startup/mynewt_cortex_m7.ld +++ b/boot/startup/mynewt_cortex_m7.ld @@ -261,15 +261,6 @@ SECTIONS __data_image__ = LOADADDR(.data); _sidata = LOADADDR(.data); - .bssnz (NOLOAD) : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > BSSNZ_RAM - #ifdef COREBSS_RAM .corebss (NOLOAD): { @@ -296,6 +287,15 @@ SECTIONS __bss_end__ = .; } > BSS_RAM + .noinit (NOLOAD) : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > NOINIT_RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/ada_feather_nrf52/ada_feather_nrf52_no_boot.ld b/hw/bsp/ada_feather_nrf52/ada_feather_nrf52_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/ada_feather_nrf52/ada_feather_nrf52_no_boot.ld +++ b/hw/bsp/ada_feather_nrf52/ada_feather_nrf52_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/ada_feather_nrf52/include/bsp/bsp.h b/hw/bsp/ada_feather_nrf52/include/bsp/bsp.h index 91b3dc6abe..ff304e5d8a 100644 --- a/hw/bsp/ada_feather_nrf52/include/bsp/bsp.h +++ b/hw/bsp/ada_feather_nrf52/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/ada_feather_nrf52/split_ada_feather_nrf52.ld b/hw/bsp/ada_feather_nrf52/split_ada_feather_nrf52.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/ada_feather_nrf52/split_ada_feather_nrf52.ld +++ b/hw/bsp/ada_feather_nrf52/split_ada_feather_nrf52.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/ada_feather_stm32f405/include/bsp/bsp.h b/hw/bsp/ada_feather_stm32f405/include/bsp/bsp.h index 26e00b6576..195f025ca1 100644 --- a/hw/bsp/ada_feather_stm32f405/include/bsp/bsp.h +++ b/hw/bsp/ada_feather_stm32f405/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; extern uint8_t _ccram_start; diff --git a/hw/bsp/ada_feather_stm32f405/link/include/mcu_config.ld.h b/hw/bsp/ada_feather_stm32f405/link/include/mcu_config.ld.h index 3596fc2cc1..4f364ef5bb 100644 --- a/hw/bsp/ada_feather_stm32f405/link/include/mcu_config.ld.h +++ b/hw/bsp/ada_feather_stm32f405/link/include/mcu_config.ld.h @@ -21,13 +21,13 @@ * Memory regions placed in CCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION */ -#define BSSNZ_RAM CCM +#define NOINIT_RAM CCM #define COREBSS_RAM CCM #define COREDATA_RAM CCM #define STACK_REGION CCM diff --git a/hw/bsp/apollo2_evb/include/bsp/bsp.h b/hw/bsp/apollo2_evb/include/bsp/bsp.h index 828cc33a78..d22d6ce8ce 100644 --- a/hw/bsp/apollo2_evb/include/bsp/bsp.h +++ b/hw/bsp/apollo2_evb/include/bsp/bsp.h @@ -28,10 +28,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/apollo3_evb/include/bsp/bsp.h b/hw/bsp/apollo3_evb/include/bsp/bsp.h index 8ee1e27239..decefcf765 100644 --- a/hw/bsp/apollo3_evb/include/bsp/bsp.h +++ b/hw/bsp/apollo3_evb/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/arduino_primo_nrf52/include/bsp/bsp.h b/hw/bsp/arduino_primo_nrf52/include/bsp/bsp.h index ed0b513278..07e1041d6b 100644 --- a/hw/bsp/arduino_primo_nrf52/include/bsp/bsp.h +++ b/hw/bsp/arduino_primo_nrf52/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/arduino_primo_nrf52/primo_no_boot.ld b/hw/bsp/arduino_primo_nrf52/primo_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/arduino_primo_nrf52/primo_no_boot.ld +++ b/hw/bsp/arduino_primo_nrf52/primo_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/arduino_primo_nrf52/split-primo.ld b/hw/bsp/arduino_primo_nrf52/split-primo.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/arduino_primo_nrf52/split-primo.ld +++ b/hw/bsp/arduino_primo_nrf52/split-primo.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/b-l072z-lrwan1/include/bsp/bsp.h b/hw/bsp/b-l072z-lrwan1/include/bsp/bsp.h index 55c6ce1037..426d62fe22 100644 --- a/hw/bsp/b-l072z-lrwan1/include/bsp/bsp.h +++ b/hw/bsp/b-l072z-lrwan1/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stack sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/b-l475e-iot01a/include/bsp/bsp.h b/hw/bsp/b-l475e-iot01a/include/bsp/bsp.h index e68beed19f..5512114a22 100644 --- a/hw/bsp/b-l475e-iot01a/include/bsp/bsp.h +++ b/hw/bsp/b-l475e-iot01a/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stack sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/bbc_microbit/split-microbit.ld b/hw/bsp/bbc_microbit/split-microbit.ld index c9c4675e6c..92c8e8ce73 100644 --- a/hw/bsp/bbc_microbit/split-microbit.ld +++ b/hw/bsp/bbc_microbit/split-microbit.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) diff --git a/hw/bsp/black_vet6/include/bsp/bsp.h b/hw/bsp/black_vet6/include/bsp/bsp.h index 06f056b9d1..a34a5d1040 100644 --- a/hw/bsp/black_vet6/include/bsp/bsp.h +++ b/hw/bsp/black_vet6/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; extern uint8_t _ccram_start; diff --git a/hw/bsp/black_vet6/link/include/mcu_config.ld.h b/hw/bsp/black_vet6/link/include/mcu_config.ld.h index 3596fc2cc1..4f364ef5bb 100644 --- a/hw/bsp/black_vet6/link/include/mcu_config.ld.h +++ b/hw/bsp/black_vet6/link/include/mcu_config.ld.h @@ -21,13 +21,13 @@ * Memory regions placed in CCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION */ -#define BSSNZ_RAM CCM +#define NOINIT_RAM CCM #define COREBSS_RAM CCM #define COREDATA_RAM CCM #define STACK_REGION CCM diff --git a/hw/bsp/blackpill401cc/include/bsp/bsp.h b/hw/bsp/blackpill401cc/include/bsp/bsp.h index bafe2ba7b4..4f409541a4 100644 --- a/hw/bsp/blackpill401cc/include/bsp/bsp.h +++ b/hw/bsp/blackpill401cc/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/blackpill411ce/include/bsp/bsp.h b/hw/bsp/blackpill411ce/include/bsp/bsp.h index bafe2ba7b4..4f409541a4 100644 --- a/hw/bsp/blackpill411ce/include/bsp/bsp.h +++ b/hw/bsp/blackpill411ce/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/ble400/ble400_no_boot.ld b/hw/bsp/ble400/ble400_no_boot.ld index 8ff1e69152..88653f7919 100644 --- a/hw/bsp/ble400/ble400_no_boot.ld +++ b/hw/bsp/ble400/ble400_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) diff --git a/hw/bsp/ble400/split-ble400.ld b/hw/bsp/ble400/split-ble400.ld index b980804402..334a84ff0e 100644 --- a/hw/bsp/ble400/split-ble400.ld +++ b/hw/bsp/ble400/split-ble400.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) diff --git a/hw/bsp/bluepill/include/bsp/bsp.h b/hw/bsp/bluepill/include/bsp/bsp.h index 34d3f9999e..8f858d901d 100644 --- a/hw/bsp/bluepill/include/bsp/bsp.h +++ b/hw/bsp/bluepill/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/bmd200/nrf51dk_no_boot.ld b/hw/bsp/bmd200/nrf51dk_no_boot.ld index 8ff1e69152..88653f7919 100644 --- a/hw/bsp/bmd200/nrf51dk_no_boot.ld +++ b/hw/bsp/bmd200/nrf51dk_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) diff --git a/hw/bsp/bmd200/split-nrf51dk.ld b/hw/bsp/bmd200/split-nrf51dk.ld index b980804402..334a84ff0e 100644 --- a/hw/bsp/bmd200/split-nrf51dk.ld +++ b/hw/bsp/bmd200/split-nrf51dk.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) diff --git a/hw/bsp/bmd300eval/bmd300eval_no_boot.ld b/hw/bsp/bmd300eval/bmd300eval_no_boot.ld index 5294c7ff73..b92d918bd0 100644 --- a/hw/bsp/bmd300eval/bmd300eval_no_boot.ld +++ b/hw/bsp/bmd300eval/bmd300eval_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -153,15 +153,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in STM32F40x errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -172,6 +163,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/bmd300eval/include/bsp/bsp.h b/hw/bsp/bmd300eval/include/bsp/bsp.h index b4044401ee..a9b83cbefd 100644 --- a/hw/bsp/bmd300eval/include/bsp/bsp.h +++ b/hw/bsp/bmd300eval/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/bmd300eval/split-bmd300eval.ld b/hw/bsp/bmd300eval/split-bmd300eval.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/bmd300eval/split-bmd300eval.ld +++ b/hw/bsp/bmd300eval/split-bmd300eval.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/calliope_mini/split-calliope_mini.ld b/hw/bsp/calliope_mini/split-calliope_mini.ld index b5dc492b97..f51bdc37f2 100644 --- a/hw/bsp/calliope_mini/split-calliope_mini.ld +++ b/hw/bsp/calliope_mini/split-calliope_mini.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) diff --git a/hw/bsp/dialog_da14695-dk-usb/include/bsp/bsp.h b/hw/bsp/dialog_da14695-dk-usb/include/bsp/bsp.h index 5c0b572a67..489d22e0ef 100644 --- a/hw/bsp/dialog_da14695-dk-usb/include/bsp/bsp.h +++ b/hw/bsp/dialog_da14695-dk-usb/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x80000 diff --git a/hw/bsp/dialog_da1469x-dk-pro/include/bsp/bsp.h b/hw/bsp/dialog_da1469x-dk-pro/include/bsp/bsp.h index ca5260e031..7dbdf7ad48 100644 --- a/hw/bsp/dialog_da1469x-dk-pro/include/bsp/bsp.h +++ b/hw/bsp/dialog_da1469x-dk-pro/include/bsp/bsp.h @@ -30,10 +30,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/dwm1001-dev/dwm1001-dev_no_boot.ld b/hw/bsp/dwm1001-dev/dwm1001-dev_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/dwm1001-dev/dwm1001-dev_no_boot.ld +++ b/hw/bsp/dwm1001-dev/dwm1001-dev_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/dwm1001-dev/include/bsp/bsp.h b/hw/bsp/dwm1001-dev/include/bsp/bsp.h index 6635a7490e..f4c6b3f930 100644 --- a/hw/bsp/dwm1001-dev/include/bsp/bsp.h +++ b/hw/bsp/dwm1001-dev/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/dwm1001-dev/split-dwm1001-dev.ld b/hw/bsp/dwm1001-dev/split-dwm1001-dev.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/dwm1001-dev/split-dwm1001-dev.ld +++ b/hw/bsp/dwm1001-dev/split-dwm1001-dev.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/fanstel-ev-bt840/fanstel-ev-bt840_no_boot.ld b/hw/bsp/fanstel-ev-bt840/fanstel-ev-bt840_no_boot.ld index 4ddd42c2ab..f48a80d536 100644 --- a/hw/bsp/fanstel-ev-bt840/fanstel-ev-bt840_no_boot.ld +++ b/hw/bsp/fanstel-ev-bt840/fanstel-ev-bt840_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/fanstel-ev-bt840/include/bsp/bsp.h b/hw/bsp/fanstel-ev-bt840/include/bsp/bsp.h index 26a0c42794..d86743e35c 100644 --- a/hw/bsp/fanstel-ev-bt840/include/bsp/bsp.h +++ b/hw/bsp/fanstel-ev-bt840/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x40000 diff --git a/hw/bsp/fanstel-ev-bt840/split-fanstel-ev-bt840.ld b/hw/bsp/fanstel-ev-bt840/split-fanstel-ev-bt840.ld index 526108c46a..60f83f8dc6 100644 --- a/hw/bsp/fanstel-ev-bt840/split-fanstel-ev-bt840.ld +++ b/hw/bsp/fanstel-ev-bt840/split-fanstel-ev-bt840.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -158,15 +158,6 @@ INCLUDE "link_tables.ld.h" * caveats: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -177,6 +168,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/fanstel_ev_bt40e/include/bsp/bsp.h b/hw/bsp/fanstel_ev_bt40e/include/bsp/bsp.h index ee66354b83..2f6ff364cc 100644 --- a/hw/bsp/fanstel_ev_bt40e/include/bsp/bsp.h +++ b/hw/bsp/fanstel_ev_bt40e/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x80000 diff --git a/hw/bsp/fanstel_ev_bt40e/net/include/bsp/bsp.h b/hw/bsp/fanstel_ev_bt40e/net/include/bsp/bsp.h index 85e979b556..6ed0bf194b 100644 --- a/hw/bsp/fanstel_ev_bt40e/net/include/bsp/bsp.h +++ b/hw/bsp/fanstel_ev_bt40e/net/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/hifive1/hifive1.ld b/hw/bsp/hifive1/hifive1.ld index 3676d39f99..f9b82da294 100644 --- a/hw/bsp/hifive1/hifive1.ld +++ b/hw/bsp/hifive1/hifive1.ld @@ -158,15 +158,6 @@ INCLUDE "link_tables.ld.h" PROVIDE( _edata = . ); PROVIDE( edata = . ); - .bssnz : - { - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - . = ALIGN(4); - } >ram - PROVIDE( _fbss = . ); PROVIDE( __bss_start = . ); .bss : @@ -179,6 +170,15 @@ INCLUDE "link_tables.ld.h" . = ALIGN(4); } >ram + .noinit : + { + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + . = ALIGN(4); + } >ram + . = ALIGN(8); PROVIDE( _end = . ); PROVIDE( end = . ); diff --git a/hw/bsp/hifive1/include/bsp/bsp.h b/hw/bsp/hifive1/include/bsp/bsp.h index 67528b24d2..12ff469bb8 100644 --- a/hw/bsp/hifive1/include/bsp/bsp.h +++ b/hw/bsp/hifive1/include/bsp/bsp.h @@ -28,10 +28,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit #define HIFIVE_PIN_0 (16) #define HIFIVE_PIN_1 (17) diff --git a/hw/bsp/native-armv7/include/bsp/bsp.h b/hw/bsp/native-armv7/include/bsp/bsp.h index 5b961b7bf9..db39820f8e 100644 --- a/hw/bsp/native-armv7/include/bsp/bsp.h +++ b/hw/bsp/native-armv7/include/bsp/bsp.h @@ -27,7 +27,7 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core #define sec_bss_core -#define sec_bss_nz_core +#define sec_noinit /* More convenient section placement macros. */ #define bssnz_t diff --git a/hw/bsp/native/include/bsp/bsp.h b/hw/bsp/native/include/bsp/bsp.h index 9368bd2b36..ebec51b865 100644 --- a/hw/bsp/native/include/bsp/bsp.h +++ b/hw/bsp/native/include/bsp/bsp.h @@ -26,7 +26,7 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core #define sec_bss_core -#define sec_bss_nz_core +#define sec_noinit /* More convenient section placement macros. */ #define bssnz_t diff --git a/hw/bsp/nina-b1/include/bsp/bsp.h b/hw/bsp/nina-b1/include/bsp/bsp.h index 10ae8c9016..fdde9302b9 100644 --- a/hw/bsp/nina-b1/include/bsp/bsp.h +++ b/hw/bsp/nina-b1/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/nina-b1/nrf52dk_no_boot.ld b/hw/bsp/nina-b1/nrf52dk_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/nina-b1/nrf52dk_no_boot.ld +++ b/hw/bsp/nina-b1/nrf52dk_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nina-b1/split-nrf52dk.ld b/hw/bsp/nina-b1/split-nrf52dk.ld index ddb09e59f7..0fb597e0ab 100644 --- a/hw/bsp/nina-b1/split-nrf52dk.ld +++ b/hw/bsp/nina-b1/split-nrf52dk.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10028-16k/nordic_pca10028-16k_no_boot.ld b/hw/bsp/nordic_pca10028-16k/nordic_pca10028-16k_no_boot.ld index 3160f2d115..1e1530589c 100644 --- a/hw/bsp/nordic_pca10028-16k/nordic_pca10028-16k_no_boot.ld +++ b/hw/bsp/nordic_pca10028-16k/nordic_pca10028-16k_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) diff --git a/hw/bsp/nordic_pca10028-16k/split-nordic_pca10028-16k.ld b/hw/bsp/nordic_pca10028-16k/split-nordic_pca10028-16k.ld index c9c4675e6c..92c8e8ce73 100644 --- a/hw/bsp/nordic_pca10028-16k/split-nordic_pca10028-16k.ld +++ b/hw/bsp/nordic_pca10028-16k/split-nordic_pca10028-16k.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) diff --git a/hw/bsp/nordic_pca10028/nordic_pca10028_no_boot.ld b/hw/bsp/nordic_pca10028/nordic_pca10028_no_boot.ld index 8ff1e69152..88653f7919 100644 --- a/hw/bsp/nordic_pca10028/nordic_pca10028_no_boot.ld +++ b/hw/bsp/nordic_pca10028/nordic_pca10028_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) diff --git a/hw/bsp/nordic_pca10028/split-nordic_pca10028.ld b/hw/bsp/nordic_pca10028/split-nordic_pca10028.ld index b980804402..334a84ff0e 100644 --- a/hw/bsp/nordic_pca10028/split-nordic_pca10028.ld +++ b/hw/bsp/nordic_pca10028/split-nordic_pca10028.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) diff --git a/hw/bsp/nordic_pca10040/include/bsp/bsp.h b/hw/bsp/nordic_pca10040/include/bsp/bsp.h index c096b887c2..f76a7a0eb7 100644 --- a/hw/bsp/nordic_pca10040/include/bsp/bsp.h +++ b/hw/bsp/nordic_pca10040/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/nordic_pca10040/nordic_pca10040_no_boot.ld b/hw/bsp/nordic_pca10040/nordic_pca10040_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/nordic_pca10040/nordic_pca10040_no_boot.ld +++ b/hw/bsp/nordic_pca10040/nordic_pca10040_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10040/split-nordic_pca10040.ld b/hw/bsp/nordic_pca10040/split-nordic_pca10040.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/nordic_pca10040/split-nordic_pca10040.ld +++ b/hw/bsp/nordic_pca10040/split-nordic_pca10040.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10056/include/bsp/bsp.h b/hw/bsp/nordic_pca10056/include/bsp/bsp.h index 92364570f1..4215ff27e3 100644 --- a/hw/bsp/nordic_pca10056/include/bsp/bsp.h +++ b/hw/bsp/nordic_pca10056/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x40000 diff --git a/hw/bsp/nordic_pca10056/nordic_pca10056_no_boot.ld b/hw/bsp/nordic_pca10056/nordic_pca10056_no_boot.ld index 4ddd42c2ab..f48a80d536 100644 --- a/hw/bsp/nordic_pca10056/nordic_pca10056_no_boot.ld +++ b/hw/bsp/nordic_pca10056/nordic_pca10056_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10056/split-nordic_pca10056.ld b/hw/bsp/nordic_pca10056/split-nordic_pca10056.ld index 526108c46a..60f83f8dc6 100644 --- a/hw/bsp/nordic_pca10056/split-nordic_pca10056.ld +++ b/hw/bsp/nordic_pca10056/split-nordic_pca10056.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -158,15 +158,6 @@ INCLUDE "link_tables.ld.h" * caveats: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -177,6 +168,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10059/include/bsp/bsp.h b/hw/bsp/nordic_pca10059/include/bsp/bsp.h index a7e265e9dc..576a78eb6a 100644 --- a/hw/bsp/nordic_pca10059/include/bsp/bsp.h +++ b/hw/bsp/nordic_pca10059/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x40000 diff --git a/hw/bsp/nordic_pca10059/nordic_pca10059_no_boot.ld b/hw/bsp/nordic_pca10059/nordic_pca10059_no_boot.ld index 4ddd42c2ab..f48a80d536 100644 --- a/hw/bsp/nordic_pca10059/nordic_pca10059_no_boot.ld +++ b/hw/bsp/nordic_pca10059/nordic_pca10059_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10059/split-nordic_pca10059.ld b/hw/bsp/nordic_pca10059/split-nordic_pca10059.ld index 526108c46a..60f83f8dc6 100644 --- a/hw/bsp/nordic_pca10059/split-nordic_pca10059.ld +++ b/hw/bsp/nordic_pca10059/split-nordic_pca10059.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -158,15 +158,6 @@ INCLUDE "link_tables.ld.h" * caveats: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -177,6 +168,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10090/include/bsp/bsp.h b/hw/bsp/nordic_pca10090/include/bsp/bsp.h index 1b1291a9ff..04d937cbca 100644 --- a/hw/bsp/nordic_pca10090/include/bsp/bsp.h +++ b/hw/bsp/nordic_pca10090/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x40000 diff --git a/hw/bsp/nordic_pca10090/nordic_pca10090_no_boot.ld b/hw/bsp/nordic_pca10090/nordic_pca10090_no_boot.ld index a50bc28c54..43c5b6246a 100644 --- a/hw/bsp/nordic_pca10090/nordic_pca10090_no_boot.ld +++ b/hw/bsp/nordic_pca10090/nordic_pca10090_no_boot.ld @@ -49,8 +49,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -151,15 +151,6 @@ SECTIONS * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -170,6 +161,15 @@ SECTIONS __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10090/split-nordic_pca10090.ld b/hw/bsp/nordic_pca10090/split-nordic_pca10090.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/nordic_pca10090/split-nordic_pca10090.ld +++ b/hw/bsp/nordic_pca10090/split-nordic_pca10090.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10095/include/bsp/bsp.h b/hw/bsp/nordic_pca10095/include/bsp/bsp.h index ee66354b83..2f6ff364cc 100644 --- a/hw/bsp/nordic_pca10095/include/bsp/bsp.h +++ b/hw/bsp/nordic_pca10095/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x80000 diff --git a/hw/bsp/nordic_pca10095/nordic_pca10095_no_boot.ld b/hw/bsp/nordic_pca10095/nordic_pca10095_no_boot.ld index ad449838c2..64afe97e4e 100644 --- a/hw/bsp/nordic_pca10095/nordic_pca10095_no_boot.ld +++ b/hw/bsp/nordic_pca10095/nordic_pca10095_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10095_net/include/bsp/bsp.h b/hw/bsp/nordic_pca10095_net/include/bsp/bsp.h index caff50db58..db21aedbf6 100644 --- a/hw/bsp/nordic_pca10095_net/include/bsp/bsp.h +++ b/hw/bsp/nordic_pca10095_net/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/nordic_pca10095_net/nordic_pca10095_net_no_boot.ld b/hw/bsp/nordic_pca10095_net/nordic_pca10095_net_no_boot.ld index 1b0dd456d3..deda602752 100644 --- a/hw/bsp/nordic_pca10095_net/nordic_pca10095_net_no_boot.ld +++ b/hw/bsp/nordic_pca10095_net/nordic_pca10095_net_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10121/include/bsp/bsp.h b/hw/bsp/nordic_pca10121/include/bsp/bsp.h index 259a688feb..ab9b65db83 100644 --- a/hw/bsp/nordic_pca10121/include/bsp/bsp.h +++ b/hw/bsp/nordic_pca10121/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x80000 diff --git a/hw/bsp/nordic_pca10121/net/include/bsp/bsp.h b/hw/bsp/nordic_pca10121/net/include/bsp/bsp.h index 4fb1bca078..bc9114c291 100644 --- a/hw/bsp/nordic_pca10121/net/include/bsp/bsp.h +++ b/hw/bsp/nordic_pca10121/net/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/nordic_pca10121/net/no_boot.ld b/hw/bsp/nordic_pca10121/net/no_boot.ld index 1b0dd456d3..deda602752 100644 --- a/hw/bsp/nordic_pca10121/net/no_boot.ld +++ b/hw/bsp/nordic_pca10121/net/no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10121/no_boot.ld b/hw/bsp/nordic_pca10121/no_boot.ld index ad449838c2..64afe97e4e 100644 --- a/hw/bsp/nordic_pca10121/no_boot.ld +++ b/hw/bsp/nordic_pca10121/no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca10156/include/bsp/bsp.h b/hw/bsp/nordic_pca10156/include/bsp/bsp.h index 10bdbf719b..5d4b1d20fd 100644 --- a/hw/bsp/nordic_pca10156/include/bsp/bsp.h +++ b/hw/bsp/nordic_pca10156/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x40000 diff --git a/hw/bsp/nordic_pca20020/include/bsp/bsp.h b/hw/bsp/nordic_pca20020/include/bsp/bsp.h index 0f56b38874..1f934069b4 100644 --- a/hw/bsp/nordic_pca20020/include/bsp/bsp.h +++ b/hw/bsp/nordic_pca20020/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/nordic_pca20020/nordic_pca20020_no_boot.ld b/hw/bsp/nordic_pca20020/nordic_pca20020_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/nordic_pca20020/nordic_pca20020_no_boot.ld +++ b/hw/bsp/nordic_pca20020/nordic_pca20020_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_pca20020/split-nordic_pca20020.ld b/hw/bsp/nordic_pca20020/split-nordic_pca20020.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/nordic_pca20020/split-nordic_pca20020.ld +++ b/hw/bsp/nordic_pca20020/split-nordic_pca20020.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/nordic_thingy53/include/bsp/bsp.h b/hw/bsp/nordic_thingy53/include/bsp/bsp.h index 2fe246da0c..7e52648adb 100644 --- a/hw/bsp/nordic_thingy53/include/bsp/bsp.h +++ b/hw/bsp/nordic_thingy53/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x80000 diff --git a/hw/bsp/nrf51-arduino_101/nrf51dk-16kbram_no_boot.ld b/hw/bsp/nrf51-arduino_101/nrf51dk-16kbram_no_boot.ld index 748c00ca26..97a0eadce7 100644 --- a/hw/bsp/nrf51-arduino_101/nrf51dk-16kbram_no_boot.ld +++ b/hw/bsp/nrf51-arduino_101/nrf51dk-16kbram_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) diff --git a/hw/bsp/nrf51-blenano/nrf51dk_no_boot.ld b/hw/bsp/nrf51-blenano/nrf51dk_no_boot.ld index 8ff1e69152..88653f7919 100644 --- a/hw/bsp/nrf51-blenano/nrf51dk_no_boot.ld +++ b/hw/bsp/nrf51-blenano/nrf51dk_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) diff --git a/hw/bsp/nrf51-blenano/split-nrf51dk.ld b/hw/bsp/nrf51-blenano/split-nrf51dk.ld index b980804402..334a84ff0e 100644 --- a/hw/bsp/nrf51-blenano/split-nrf51dk.ld +++ b/hw/bsp/nrf51-blenano/split-nrf51dk.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) diff --git a/hw/bsp/nucleo-f030r8/include/bsp/bsp.h b/hw/bsp/nucleo-f030r8/include/bsp/bsp.h index 6c917d9d0b..e92a46d3ce 100644 --- a/hw/bsp/nucleo-f030r8/include/bsp/bsp.h +++ b/hw/bsp/nucleo-f030r8/include/bsp/bsp.h @@ -30,10 +30,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit /* * Symbols from linker script. diff --git a/hw/bsp/nucleo-f072rb/include/bsp/bsp.h b/hw/bsp/nucleo-f072rb/include/bsp/bsp.h index e1556d1299..bfce054a53 100644 --- a/hw/bsp/nucleo-f072rb/include/bsp/bsp.h +++ b/hw/bsp/nucleo-f072rb/include/bsp/bsp.h @@ -30,10 +30,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit /* * Symbols from linker script. diff --git a/hw/bsp/nucleo-f103rb/include/bsp/bsp.h b/hw/bsp/nucleo-f103rb/include/bsp/bsp.h index c472629de4..39bc7864ee 100644 --- a/hw/bsp/nucleo-f103rb/include/bsp/bsp.h +++ b/hw/bsp/nucleo-f103rb/include/bsp/bsp.h @@ -30,10 +30,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/nucleo-f303k8/include/bsp/bsp.h b/hw/bsp/nucleo-f303k8/include/bsp/bsp.h index ad20f09385..cabecf50cd 100644 --- a/hw/bsp/nucleo-f303k8/include/bsp/bsp.h +++ b/hw/bsp/nucleo-f303k8/include/bsp/bsp.h @@ -30,10 +30,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit /* * Symbols from linker script. diff --git a/hw/bsp/nucleo-f303k8/link/include/mcu_config.ld.h b/hw/bsp/nucleo-f303k8/link/include/mcu_config.ld.h index 3596fc2cc1..4f364ef5bb 100644 --- a/hw/bsp/nucleo-f303k8/link/include/mcu_config.ld.h +++ b/hw/bsp/nucleo-f303k8/link/include/mcu_config.ld.h @@ -21,13 +21,13 @@ * Memory regions placed in CCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION */ -#define BSSNZ_RAM CCM +#define NOINIT_RAM CCM #define COREBSS_RAM CCM #define COREDATA_RAM CCM #define STACK_REGION CCM diff --git a/hw/bsp/nucleo-f303re/include/bsp/bsp.h b/hw/bsp/nucleo-f303re/include/bsp/bsp.h index 79e497bc00..2a1a7994e5 100644 --- a/hw/bsp/nucleo-f303re/include/bsp/bsp.h +++ b/hw/bsp/nucleo-f303re/include/bsp/bsp.h @@ -30,10 +30,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit /* * Symbols from linker script. diff --git a/hw/bsp/nucleo-f303re/link/include/mcu_config.ld.h b/hw/bsp/nucleo-f303re/link/include/mcu_config.ld.h index 3596fc2cc1..4f364ef5bb 100644 --- a/hw/bsp/nucleo-f303re/link/include/mcu_config.ld.h +++ b/hw/bsp/nucleo-f303re/link/include/mcu_config.ld.h @@ -21,13 +21,13 @@ * Memory regions placed in CCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION */ -#define BSSNZ_RAM CCM +#define NOINIT_RAM CCM #define COREBSS_RAM CCM #define COREDATA_RAM CCM #define STACK_REGION CCM diff --git a/hw/bsp/nucleo-f401re/include/bsp/bsp.h b/hw/bsp/nucleo-f401re/include/bsp/bsp.h index 7a1fc6c5b4..9a0a806884 100644 --- a/hw/bsp/nucleo-f401re/include/bsp/bsp.h +++ b/hw/bsp/nucleo-f401re/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/nucleo-f411re/include/bsp/bsp.h b/hw/bsp/nucleo-f411re/include/bsp/bsp.h index 037aab0017..0a30ec57bc 100644 --- a/hw/bsp/nucleo-f411re/include/bsp/bsp.h +++ b/hw/bsp/nucleo-f411re/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/nucleo-f413zh/include/bsp/bsp.h b/hw/bsp/nucleo-f413zh/include/bsp/bsp.h index d168a3f15d..9b1987dbb4 100644 --- a/hw/bsp/nucleo-f413zh/include/bsp/bsp.h +++ b/hw/bsp/nucleo-f413zh/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; extern uint8_t _ccram_start; diff --git a/hw/bsp/nucleo-f413zh/link/include/mcu_config.ld.h b/hw/bsp/nucleo-f413zh/link/include/mcu_config.ld.h index 3596fc2cc1..4f364ef5bb 100644 --- a/hw/bsp/nucleo-f413zh/link/include/mcu_config.ld.h +++ b/hw/bsp/nucleo-f413zh/link/include/mcu_config.ld.h @@ -21,13 +21,13 @@ * Memory regions placed in CCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION */ -#define BSSNZ_RAM CCM +#define NOINIT_RAM CCM #define COREBSS_RAM CCM #define COREDATA_RAM CCM #define STACK_REGION CCM diff --git a/hw/bsp/nucleo-f439zi/include/bsp/bsp.h b/hw/bsp/nucleo-f439zi/include/bsp/bsp.h index d30e069f5f..77e869e50f 100644 --- a/hw/bsp/nucleo-f439zi/include/bsp/bsp.h +++ b/hw/bsp/nucleo-f439zi/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; extern uint8_t _ccram_start; diff --git a/hw/bsp/nucleo-f439zi/link/include/mcu_config.ld.h b/hw/bsp/nucleo-f439zi/link/include/mcu_config.ld.h index 3596fc2cc1..4f364ef5bb 100644 --- a/hw/bsp/nucleo-f439zi/link/include/mcu_config.ld.h +++ b/hw/bsp/nucleo-f439zi/link/include/mcu_config.ld.h @@ -21,13 +21,13 @@ * Memory regions placed in CCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION */ -#define BSSNZ_RAM CCM +#define NOINIT_RAM CCM #define COREBSS_RAM CCM #define COREDATA_RAM CCM #define STACK_REGION CCM diff --git a/hw/bsp/nucleo-f746zg/include/bsp/bsp.h b/hw/bsp/nucleo-f746zg/include/bsp/bsp.h index bde2851bf3..d659d80166 100644 --- a/hw/bsp/nucleo-f746zg/include/bsp/bsp.h +++ b/hw/bsp/nucleo-f746zg/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; extern uint8_t _dtcm_start[]; diff --git a/hw/bsp/nucleo-f746zg/link/include/mcu_config.ld.h b/hw/bsp/nucleo-f746zg/link/include/mcu_config.ld.h index cdf034b785..c172f37640 100644 --- a/hw/bsp/nucleo-f746zg/link/include/mcu_config.ld.h +++ b/hw/bsp/nucleo-f746zg/link/include/mcu_config.ld.h @@ -21,14 +21,14 @@ * Memory regions placed in DTCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION * #undef VECTOR_RELOCATION_RAM DTCM */ -#define BSSNZ_RAM DTCM +#define NOINIT_RAM DTCM #define COREBSS_RAM DTCM #define COREDATA_RAM DTCM #define STACK_REGION DTCM diff --git a/hw/bsp/nucleo-f767zi/include/bsp/bsp.h b/hw/bsp/nucleo-f767zi/include/bsp/bsp.h index 2c1d0efefa..224bff4077 100644 --- a/hw/bsp/nucleo-f767zi/include/bsp/bsp.h +++ b/hw/bsp/nucleo-f767zi/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; extern uint8_t _dtcm_start[]; diff --git a/hw/bsp/nucleo-f767zi/link/include/mcu_config.ld.h b/hw/bsp/nucleo-f767zi/link/include/mcu_config.ld.h index cdf034b785..2c993cb18e 100644 --- a/hw/bsp/nucleo-f767zi/link/include/mcu_config.ld.h +++ b/hw/bsp/nucleo-f767zi/link/include/mcu_config.ld.h @@ -21,14 +21,14 @@ * Memory regions placed in DTCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION * #undef VECTOR_RELOCATION_RAM DTCM */ -#define BSSNZ_RAM DTCM +#define NOINIT_RAM DTCM #define COREBSS_RAM DTCM #define COREDATA_RAM DTCM #define STACK_REGION DTCM diff --git a/hw/bsp/nucleo-g0b1re/include/bsp/bsp.h b/hw/bsp/nucleo-g0b1re/include/bsp/bsp.h index 5a3328cdc2..692dbb9189 100644 --- a/hw/bsp/nucleo-g0b1re/include/bsp/bsp.h +++ b/hw/bsp/nucleo-g0b1re/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; diff --git a/hw/bsp/nucleo-g491re/include/bsp/bsp.h b/hw/bsp/nucleo-g491re/include/bsp/bsp.h index 76d1c608ec..12709af0d9 100644 --- a/hw/bsp/nucleo-g491re/include/bsp/bsp.h +++ b/hw/bsp/nucleo-g491re/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; diff --git a/hw/bsp/nucleo-h563zi/include/bsp/bsp.h b/hw/bsp/nucleo-h563zi/include/bsp/bsp.h index 406a09bc95..c76ff83740 100644 --- a/hw/bsp/nucleo-h563zi/include/bsp/bsp.h +++ b/hw/bsp/nucleo-h563zi/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; extern uint8_t _dtcmram_start; diff --git a/hw/bsp/nucleo-h723zg/include/bsp/bsp.h b/hw/bsp/nucleo-h723zg/include/bsp/bsp.h index f58ddddc81..a24150a769 100644 --- a/hw/bsp/nucleo-h723zg/include/bsp/bsp.h +++ b/hw/bsp/nucleo-h723zg/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; extern uint8_t _dtcm_start; diff --git a/hw/bsp/nucleo-h753zi/include/bsp/bsp.h b/hw/bsp/nucleo-h753zi/include/bsp/bsp.h index d72ea005ae..7c39fe0e7e 100644 --- a/hw/bsp/nucleo-h753zi/include/bsp/bsp.h +++ b/hw/bsp/nucleo-h753zi/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; extern uint8_t _dtcm_start[]; diff --git a/hw/bsp/nucleo-l073rz/include/bsp/bsp.h b/hw/bsp/nucleo-l073rz/include/bsp/bsp.h index da80eebeee..1e32691522 100644 --- a/hw/bsp/nucleo-l073rz/include/bsp/bsp.h +++ b/hw/bsp/nucleo-l073rz/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stack sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/nucleo-l476rg/include/bsp/bsp.h b/hw/bsp/nucleo-l476rg/include/bsp/bsp.h index b11292119c..f36af10804 100644 --- a/hw/bsp/nucleo-l476rg/include/bsp/bsp.h +++ b/hw/bsp/nucleo-l476rg/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stack sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/nucleo-u575zi-q/include/bsp/bsp.h b/hw/bsp/nucleo-u575zi-q/include/bsp/bsp.h index a9e6f71046..dfb371ee7e 100644 --- a/hw/bsp/nucleo-u575zi-q/include/bsp/bsp.h +++ b/hw/bsp/nucleo-u575zi-q/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; diff --git a/hw/bsp/olimex-p103/include/bsp/bsp.h b/hw/bsp/olimex-p103/include/bsp/bsp.h index 501ecbb3ef..15e9e3eca0 100644 --- a/hw/bsp/olimex-p103/include/bsp/bsp.h +++ b/hw/bsp/olimex-p103/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/olimex-pic32-emz64/include/bsp/bsp.h b/hw/bsp/olimex-pic32-emz64/include/bsp/bsp.h index e522ea0943..c1f61821ad 100644 --- a/hw/bsp/olimex-pic32-emz64/include/bsp/bsp.h +++ b/hw/bsp/olimex-pic32-emz64/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; diff --git a/hw/bsp/olimex-pic32-hmz144/include/bsp/bsp.h b/hw/bsp/olimex-pic32-hmz144/include/bsp/bsp.h index 6fecddfb86..bd2b28bb27 100644 --- a/hw/bsp/olimex-pic32-hmz144/include/bsp/bsp.h +++ b/hw/bsp/olimex-pic32-hmz144/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; diff --git a/hw/bsp/olimex_stm32-e407_devboard/include/bsp/bsp.h b/hw/bsp/olimex_stm32-e407_devboard/include/bsp/bsp.h index effa894bab..917e7605a3 100644 --- a/hw/bsp/olimex_stm32-e407_devboard/include/bsp/bsp.h +++ b/hw/bsp/olimex_stm32-e407_devboard/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; extern uint8_t _ccram_start; diff --git a/hw/bsp/olimex_stm32-e407_devboard/link/include/mcu_config.ld.h b/hw/bsp/olimex_stm32-e407_devboard/link/include/mcu_config.ld.h index 3596fc2cc1..4f364ef5bb 100644 --- a/hw/bsp/olimex_stm32-e407_devboard/link/include/mcu_config.ld.h +++ b/hw/bsp/olimex_stm32-e407_devboard/link/include/mcu_config.ld.h @@ -21,13 +21,13 @@ * Memory regions placed in CCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION */ -#define BSSNZ_RAM CCM +#define NOINIT_RAM CCM #define COREBSS_RAM CCM #define COREDATA_RAM CCM #define STACK_REGION CCM diff --git a/hw/bsp/p-nucleo-wb55-usbdongle/include/bsp/bsp.h b/hw/bsp/p-nucleo-wb55-usbdongle/include/bsp/bsp.h index 95c2d1f544..ce64ed3921 100644 --- a/hw/bsp/p-nucleo-wb55-usbdongle/include/bsp/bsp.h +++ b/hw/bsp/p-nucleo-wb55-usbdongle/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stack sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/p-nucleo-wb55/include/bsp/bsp.h b/hw/bsp/p-nucleo-wb55/include/bsp/bsp.h index 1994222ee7..52a777048f 100644 --- a/hw/bsp/p-nucleo-wb55/include/bsp/bsp.h +++ b/hw/bsp/p-nucleo-wb55/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stack sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/pic32mx470_6lp_clicker/include/bsp/bsp.h b/hw/bsp/pic32mx470_6lp_clicker/include/bsp/bsp.h index 824028e91c..8e480b17bc 100644 --- a/hw/bsp/pic32mx470_6lp_clicker/include/bsp/bsp.h +++ b/hw/bsp/pic32mx470_6lp_clicker/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; extern uint8_t _ccram_start; diff --git a/hw/bsp/pic32mz2048_wi-fire/include/bsp/bsp.h b/hw/bsp/pic32mz2048_wi-fire/include/bsp/bsp.h index d0c15dfb41..c362f50e4b 100644 --- a/hw/bsp/pic32mz2048_wi-fire/include/bsp/bsp.h +++ b/hw/bsp/pic32mz2048_wi-fire/include/bsp/bsp.h @@ -30,10 +30,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; extern uint8_t _ccram_start; diff --git a/hw/bsp/pinetime/include/bsp/bsp.h b/hw/bsp/pinetime/include/bsp/bsp.h index 93d4d82c01..595f9488f9 100644 --- a/hw/bsp/pinetime/include/bsp/bsp.h +++ b/hw/bsp/pinetime/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit /** Defined in MCU linker script. */ extern uint8_t _ram_start; diff --git a/hw/bsp/puckjs/include/bsp/bsp.h b/hw/bsp/puckjs/include/bsp/bsp.h index 261e38df3b..912443791c 100644 --- a/hw/bsp/puckjs/include/bsp/bsp.h +++ b/hw/bsp/puckjs/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/puckjs/puckjs_no_boot.ld b/hw/bsp/puckjs/puckjs_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/puckjs/puckjs_no_boot.ld +++ b/hw/bsp/puckjs/puckjs_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/puckjs/split_puckjs.ld b/hw/bsp/puckjs/split_puckjs.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/puckjs/split_puckjs.ld +++ b/hw/bsp/puckjs/split_puckjs.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/rb-blend2/include/bsp/bsp.h b/hw/bsp/rb-blend2/include/bsp/bsp.h index 6b7eab5ca0..a60e86e26c 100644 --- a/hw/bsp/rb-blend2/include/bsp/bsp.h +++ b/hw/bsp/rb-blend2/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/rb-blend2/rb-blend2_no_boot.ld b/hw/bsp/rb-blend2/rb-blend2_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/rb-blend2/rb-blend2_no_boot.ld +++ b/hw/bsp/rb-blend2/rb-blend2_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/rb-blend2/split-rb-blend2.ld b/hw/bsp/rb-blend2/split-rb-blend2.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/rb-blend2/split-rb-blend2.ld +++ b/hw/bsp/rb-blend2/split-rb-blend2.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/rb-nano2/include/bsp/bsp.h b/hw/bsp/rb-nano2/include/bsp/bsp.h index bd3f279981..cc7bca695e 100644 --- a/hw/bsp/rb-nano2/include/bsp/bsp.h +++ b/hw/bsp/rb-nano2/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/rb-nano2/rb-nano2_no_boot.ld b/hw/bsp/rb-nano2/rb-nano2_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/rb-nano2/rb-nano2_no_boot.ld +++ b/hw/bsp/rb-nano2/rb-nano2_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/rb-nano2/split-rb-nano2.ld b/hw/bsp/rb-nano2/split-rb-nano2.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/rb-nano2/split-rb-nano2.ld +++ b/hw/bsp/rb-nano2/split-rb-nano2.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/reel_board/include/bsp/bsp.h b/hw/bsp/reel_board/include/bsp/bsp.h index 0ee495440f..4ad2885a7a 100644 --- a/hw/bsp/reel_board/include/bsp/bsp.h +++ b/hw/bsp/reel_board/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x40000 diff --git a/hw/bsp/reel_board/reel_board_no_boot.ld b/hw/bsp/reel_board/reel_board_no_boot.ld index 4ddd42c2ab..f48a80d536 100644 --- a/hw/bsp/reel_board/reel_board_no_boot.ld +++ b/hw/bsp/reel_board/reel_board_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/reel_board/split-reel_board.ld b/hw/bsp/reel_board/split-reel_board.ld index 526108c46a..60f83f8dc6 100644 --- a/hw/bsp/reel_board/split-reel_board.ld +++ b/hw/bsp/reel_board/split-reel_board.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -158,15 +158,6 @@ INCLUDE "link_tables.ld.h" * caveats: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -177,6 +168,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/ruuvitag_rev_b/include/bsp/bsp.h b/hw/bsp/ruuvitag_rev_b/include/bsp/bsp.h index 2e5c758c26..f6cd87971b 100644 --- a/hw/bsp/ruuvitag_rev_b/include/bsp/bsp.h +++ b/hw/bsp/ruuvitag_rev_b/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/ruuvitag_rev_b/ruuvitag_rev_b_no_boot.ld b/hw/bsp/ruuvitag_rev_b/ruuvitag_rev_b_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/ruuvitag_rev_b/ruuvitag_rev_b_no_boot.ld +++ b/hw/bsp/ruuvitag_rev_b/ruuvitag_rev_b_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/ruuvitag_rev_b/split-ruuvitag_rev_b.ld b/hw/bsp/ruuvitag_rev_b/split-ruuvitag_rev_b.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/ruuvitag_rev_b/split-ruuvitag_rev_b.ld +++ b/hw/bsp/ruuvitag_rev_b/split-ruuvitag_rev_b.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/stm32f3discovery/include/bsp/bsp.h b/hw/bsp/stm32f3discovery/include/bsp/bsp.h index 35099ff70b..ecc866a8ee 100644 --- a/hw/bsp/stm32f3discovery/include/bsp/bsp.h +++ b/hw/bsp/stm32f3discovery/include/bsp/bsp.h @@ -30,10 +30,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit /* * Symbols from linker script. diff --git a/hw/bsp/stm32f3discovery/link/include/mcu_config.ld.h b/hw/bsp/stm32f3discovery/link/include/mcu_config.ld.h index 3596fc2cc1..4f364ef5bb 100644 --- a/hw/bsp/stm32f3discovery/link/include/mcu_config.ld.h +++ b/hw/bsp/stm32f3discovery/link/include/mcu_config.ld.h @@ -21,13 +21,13 @@ * Memory regions placed in CCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION */ -#define BSSNZ_RAM CCM +#define NOINIT_RAM CCM #define COREBSS_RAM CCM #define COREDATA_RAM CCM #define STACK_REGION CCM diff --git a/hw/bsp/stm32f411discovery/include/bsp/bsp.h b/hw/bsp/stm32f411discovery/include/bsp/bsp.h index 8e2ac83ac7..bda62589a2 100644 --- a/hw/bsp/stm32f411discovery/include/bsp/bsp.h +++ b/hw/bsp/stm32f411discovery/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/stm32f429discovery/include/bsp/bsp.h b/hw/bsp/stm32f429discovery/include/bsp/bsp.h index 71dd9c6f5c..45e0be37b8 100644 --- a/hw/bsp/stm32f429discovery/include/bsp/bsp.h +++ b/hw/bsp/stm32f429discovery/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; extern uint8_t _ccram_start; diff --git a/hw/bsp/stm32f429discovery/link/include/mcu_config.ld.h b/hw/bsp/stm32f429discovery/link/include/mcu_config.ld.h index 3596fc2cc1..4f364ef5bb 100644 --- a/hw/bsp/stm32f429discovery/link/include/mcu_config.ld.h +++ b/hw/bsp/stm32f429discovery/link/include/mcu_config.ld.h @@ -21,13 +21,13 @@ * Memory regions placed in CCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION */ -#define BSSNZ_RAM CCM +#define NOINIT_RAM CCM #define COREBSS_RAM CCM #define COREDATA_RAM CCM #define STACK_REGION CCM diff --git a/hw/bsp/stm32f4discovery/include/bsp/bsp.h b/hw/bsp/stm32f4discovery/include/bsp/bsp.h index 8d31d19a0d..adefd078fc 100644 --- a/hw/bsp/stm32f4discovery/include/bsp/bsp.h +++ b/hw/bsp/stm32f4discovery/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; extern uint8_t _ccram_start; diff --git a/hw/bsp/stm32f7discovery/include/bsp/bsp.h b/hw/bsp/stm32f7discovery/include/bsp/bsp.h index ce9b4bc99a..ccf69fb09a 100644 --- a/hw/bsp/stm32f7discovery/include/bsp/bsp.h +++ b/hw/bsp/stm32f7discovery/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; extern uint8_t _dtcm_start[]; diff --git a/hw/bsp/stm32f7discovery/link/include/mcu_config.ld.h b/hw/bsp/stm32f7discovery/link/include/mcu_config.ld.h index bf87b06bc4..a6e90836c2 100644 --- a/hw/bsp/stm32f7discovery/link/include/mcu_config.ld.h +++ b/hw/bsp/stm32f7discovery/link/include/mcu_config.ld.h @@ -21,14 +21,14 @@ * Memory regions placed in DTCM * If stack or core data or other section should be place in RAM * /link/include/target_config.ld.h should just do: - * #undef BSSNZ_RAM + * #undef NOINIT_RAM * #undef COREBSS_RAM * #undef COREDATA_RAM * #undef STACK_REGION * #undef VECTOR_RELOCATION_RAM DTCM */ -#define BSSNZ_RAM DTCM +#define NOINIT_RAM DTCM #define COREBSS_RAM DTCM #define COREDATA_RAM DTCM #define STACK_REGION DTCM diff --git a/hw/bsp/stm32l152discovery/include/bsp/bsp.h b/hw/bsp/stm32l152discovery/include/bsp/bsp.h index 3ff05315af..ed9272baba 100644 --- a/hw/bsp/stm32l152discovery/include/bsp/bsp.h +++ b/hw/bsp/stm32l152discovery/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; diff --git a/hw/bsp/telee02/include/bsp/bsp.h b/hw/bsp/telee02/include/bsp/bsp.h index d2d14881e5..a50617e429 100644 --- a/hw/bsp/telee02/include/bsp/bsp.h +++ b/hw/bsp/telee02/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/telee02/split-telee02.ld b/hw/bsp/telee02/split-telee02.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/telee02/split-telee02.ld +++ b/hw/bsp/telee02/split-telee02.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/telee02/telee02_no_boot.ld b/hw/bsp/telee02/telee02_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/telee02/telee02_no_boot.ld +++ b/hw/bsp/telee02/telee02_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/ublox_bmd_345/include/bsp/bsp.h b/hw/bsp/ublox_bmd_345/include/bsp/bsp.h index 92364570f1..4215ff27e3 100644 --- a/hw/bsp/ublox_bmd_345/include/bsp/bsp.h +++ b/hw/bsp/ublox_bmd_345/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x40000 diff --git a/hw/bsp/ublox_bmd_345/split-ublox_bmd_345.ld b/hw/bsp/ublox_bmd_345/split-ublox_bmd_345.ld index 526108c46a..60f83f8dc6 100644 --- a/hw/bsp/ublox_bmd_345/split-ublox_bmd_345.ld +++ b/hw/bsp/ublox_bmd_345/split-ublox_bmd_345.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -158,15 +158,6 @@ INCLUDE "link_tables.ld.h" * caveats: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -177,6 +168,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/ublox_bmd_345/ublox_bmd_345_no_boot.ld b/hw/bsp/ublox_bmd_345/ublox_bmd_345_no_boot.ld index 4ddd42c2ab..f48a80d536 100644 --- a/hw/bsp/ublox_bmd_345/ublox_bmd_345_no_boot.ld +++ b/hw/bsp/ublox_bmd_345/ublox_bmd_345_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/ublox_mini_nora_b1/include/bsp/bsp.h b/hw/bsp/ublox_mini_nora_b1/include/bsp/bsp.h index 2402671598..67866a43e5 100644 --- a/hw/bsp/ublox_mini_nora_b1/include/bsp/bsp.h +++ b/hw/bsp/ublox_mini_nora_b1/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x80000 diff --git a/hw/bsp/ublox_mini_nora_b1/net/include/bsp/bsp.h b/hw/bsp/ublox_mini_nora_b1/net/include/bsp/bsp.h index 85e979b556..6ed0bf194b 100644 --- a/hw/bsp/ublox_mini_nora_b1/net/include/bsp/bsp.h +++ b/hw/bsp/ublox_mini_nora_b1/net/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/vbluno51/split-vbluno51.ld b/hw/bsp/vbluno51/split-vbluno51.ld index b980804402..334a84ff0e 100644 --- a/hw/bsp/vbluno51/split-vbluno51.ld +++ b/hw/bsp/vbluno51/split-vbluno51.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) diff --git a/hw/bsp/vbluno51/vbluno51_no_boot.ld b/hw/bsp/vbluno51/vbluno51_no_boot.ld index 8ff1e69152..88653f7919 100644 --- a/hw/bsp/vbluno51/vbluno51_no_boot.ld +++ b/hw/bsp/vbluno51/vbluno51_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) diff --git a/hw/bsp/vbluno52/include/bsp/bsp.h b/hw/bsp/vbluno52/include/bsp/bsp.h index 951c8f2e98..0b090ed55d 100644 --- a/hw/bsp/vbluno52/include/bsp/bsp.h +++ b/hw/bsp/vbluno52/include/bsp/bsp.h @@ -31,10 +31,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start; #define RAM_SIZE 0x10000 diff --git a/hw/bsp/vbluno52/split-vbluno52.ld b/hw/bsp/vbluno52/split-vbluno52.ld index af231bdda5..5376e689ab 100644 --- a/hw/bsp/vbluno52/split-vbluno52.ld +++ b/hw/bsp/vbluno52/split-vbluno52.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler_split) @@ -162,15 +162,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -181,6 +172,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/vbluno52/vbluno52_no_boot.ld b/hw/bsp/vbluno52/vbluno52_no_boot.ld index a627bf105a..1aa7feb9a7 100644 --- a/hw/bsp/vbluno52/vbluno52_no_boot.ld +++ b/hw/bsp/vbluno52/vbluno52_no_boot.ld @@ -47,8 +47,8 @@ MEMORY * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -149,15 +149,6 @@ INCLUDE "link_tables.ld.h" * caveat: * 1. It does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -168,6 +159,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/bsp/weact_g431cb/include/bsp/bsp.h b/hw/bsp/weact_g431cb/include/bsp/bsp.h index ab27fc35d8..5504293466 100644 --- a/hw/bsp/weact_g431cb/include/bsp/bsp.h +++ b/hw/bsp/weact_g431cb/include/bsp/bsp.h @@ -29,10 +29,10 @@ extern "C" { /* Define special stackos sections */ #define sec_data_core __attribute__((section(".data.core"))) #define sec_bss_core __attribute__((section(".bss.core"))) -#define sec_bss_nz_core __attribute__((section(".bss.core.nz"))) +#define sec_noinit __attribute__((section(".noinit"))) /* More convenient section placement macros. */ -#define bssnz_t sec_bss_nz_core +#define bssnz_t sec_noinit extern uint8_t _ram_start[]; diff --git a/hw/mcu/ambiq/apollo2/apollo2.ld b/hw/mcu/ambiq/apollo2/apollo2.ld index 421b1c1879..be9481c344 100644 --- a/hw/mcu/ambiq/apollo2/apollo2.ld +++ b/hw/mcu/ambiq/apollo2/apollo2.ld @@ -41,8 +41,8 @@ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -153,15 +153,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -172,6 +163,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/mcu/dialog/cmac/cmac.ld b/hw/mcu/dialog/cmac/cmac.ld index f5097f4420..c2e257a24d 100644 --- a/hw/mcu/dialog/cmac/cmac.ld +++ b/hw/mcu/dialog/cmac/cmac.ld @@ -124,13 +124,13 @@ INCLUDE "link_tables.ld.h" _edata = ABSOLUTE(.); } > RAM AT > ROM - .bssnz (NOLOAD) : + .noinit (NOLOAD) : { . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) + __noinit_start__ = .; + *(.noinit*) . = ALIGN(4); - __bssnz_end__ = .; + __noinit_end__ = .; } > RAM .bss (NOLOAD) : diff --git a/hw/mcu/dialog/da1469x/da1469x.ld b/hw/mcu/dialog/da1469x/da1469x.ld index 4345d18e47..4b916c8b85 100644 --- a/hw/mcu/dialog/da1469x/da1469x.ld +++ b/hw/mcu/dialog/da1469x/da1469x.ld @@ -41,8 +41,8 @@ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -174,15 +174,6 @@ INCLUDE "link_tables.ld.h" __data_end__ = .; } > RAM AT > FLASH - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -193,6 +184,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + .cmac (NOLOAD) : { . = ALIGN(0x400); diff --git a/hw/mcu/dialog/da1469x/da1469x_ram_resident.ld b/hw/mcu/dialog/da1469x/da1469x_ram_resident.ld index 8e3ed7dc48..bbda802f54 100644 --- a/hw/mcu/dialog/da1469x/da1469x_ram_resident.ld +++ b/hw/mcu/dialog/da1469x/da1469x_ram_resident.ld @@ -120,15 +120,6 @@ INCLUDE "link_tables.ld.h" __data_end__ = .; } > RAM - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -139,6 +130,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/mcu/nordic/nrf51xxx/nrf51.ld b/hw/mcu/nordic/nrf51xxx/nrf51.ld index 710407c127..36d7298608 100644 --- a/hw/mcu/nordic/nrf51xxx/nrf51.ld +++ b/hw/mcu/nordic/nrf51xxx/nrf51.ld @@ -41,8 +41,8 @@ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) diff --git a/hw/mcu/nordic/nrf52xxx/nrf52.ld b/hw/mcu/nordic/nrf52xxx/nrf52.ld index 4c25985d50..c07978199a 100644 --- a/hw/mcu/nordic/nrf52xxx/nrf52.ld +++ b/hw/mcu/nordic/nrf52xxx/nrf52.ld @@ -41,8 +41,8 @@ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -160,15 +160,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -179,6 +170,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/mcu/nordic/nrf52xxx/nrf52_ram_resident.ld b/hw/mcu/nordic/nrf52xxx/nrf52_ram_resident.ld index 9cc5b105b3..669d2316e3 100644 --- a/hw/mcu/nordic/nrf52xxx/nrf52_ram_resident.ld +++ b/hw/mcu/nordic/nrf52xxx/nrf52_ram_resident.ld @@ -41,8 +41,8 @@ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -148,15 +148,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -167,6 +158,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/mcu/nordic/nrf5340/nrf5340.ld b/hw/mcu/nordic/nrf5340/nrf5340.ld index 82ef26c16c..379a063b29 100644 --- a/hw/mcu/nordic/nrf5340/nrf5340.ld +++ b/hw/mcu/nordic/nrf5340/nrf5340.ld @@ -41,8 +41,8 @@ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -172,15 +172,6 @@ INCLUDE "link_tables.ld.h" /* Non-zeroed BSS. This section is similar to BSS, but does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -191,6 +182,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/mcu/nordic/nrf5340/nrf5340_ram_resident.ld b/hw/mcu/nordic/nrf5340/nrf5340_ram_resident.ld index ef482672c6..4d950194fa 100644 --- a/hw/mcu/nordic/nrf5340/nrf5340_ram_resident.ld +++ b/hw/mcu/nordic/nrf5340/nrf5340_ram_resident.ld @@ -41,8 +41,8 @@ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -142,15 +142,6 @@ INCLUDE "link_tables.ld.h" /* Non-zeroed BSS. This section is similar to BSS, but does not get zeroed at init-time. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -161,6 +152,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/mcu/nordic/nrf5340_net/nrf5340_net.ld b/hw/mcu/nordic/nrf5340_net/nrf5340_net.ld index 74a20ff494..9c48cb0f7e 100644 --- a/hw/mcu/nordic/nrf5340_net/nrf5340_net.ld +++ b/hw/mcu/nordic/nrf5340_net/nrf5340_net.ld @@ -41,8 +41,8 @@ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -166,15 +166,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -185,6 +176,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/mcu/nordic/nrf5340_net/nrf5340_net_ram_resident.ld b/hw/mcu/nordic/nrf5340_net/nrf5340_net_ram_resident.ld index 9cc5b105b3..669d2316e3 100644 --- a/hw/mcu/nordic/nrf5340_net/nrf5340_net_ram_resident.ld +++ b/hw/mcu/nordic/nrf5340_net/nrf5340_net_ram_resident.ld @@ -41,8 +41,8 @@ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -148,15 +148,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -167,6 +158,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/mcu/nordic/nrf91xx/nrf91.ld b/hw/mcu/nordic/nrf91xx/nrf91.ld index 4c25985d50..c07978199a 100644 --- a/hw/mcu/nordic/nrf91xx/nrf91.ld +++ b/hw/mcu/nordic/nrf91xx/nrf91.ld @@ -41,8 +41,8 @@ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -160,15 +160,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -179,6 +170,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/mcu/nordic/nrf91xx/nrf91_ram_resident.ld b/hw/mcu/nordic/nrf91xx/nrf91_ram_resident.ld index 9cc5b105b3..669d2316e3 100644 --- a/hw/mcu/nordic/nrf91xx/nrf91_ram_resident.ld +++ b/hw/mcu/nordic/nrf91xx/nrf91_ram_resident.ld @@ -41,8 +41,8 @@ OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") * __StackLimit * __StackTop * __stack - * __bssnz_start__ - * __bssnz_end__ + * __noinit_start__ + * __noinit_end__ */ ENTRY(Reset_Handler) @@ -148,15 +148,6 @@ INCLUDE "link_tables.ld.h" * This section exists because of a hardware defect; see errata 33 and 34 * in nrf52 errata sheet. */ - .bssnz : - { - . = ALIGN(4); - __bssnz_start__ = .; - *(.bss.core.nz*) - . = ALIGN(4); - __bssnz_end__ = .; - } > RAM - .bss : { . = ALIGN(4); @@ -167,6 +158,15 @@ INCLUDE "link_tables.ld.h" __bss_end__ = .; } > RAM + .noinit : + { + . = ALIGN(4); + __noinit_start__ = .; + *(.noinit*) + . = ALIGN(4); + __noinit_end__ = .; + } > RAM + /* Heap starts after BSS */ . = ALIGN(8); __HeapBase = .; diff --git a/hw/mcu/stm/stm32h7xx/link/include/mcu_config.ld.h b/hw/mcu/stm/stm32h7xx/link/include/mcu_config.ld.h index 68394e489a..370ad3552c 100644 --- a/hw/mcu/stm/stm32h7xx/link/include/mcu_config.ld.h +++ b/hw/mcu/stm/stm32h7xx/link/include/mcu_config.ld.h @@ -19,6 +19,6 @@ #define VECTOR_RELOCATION_RAM DTCM #define COREDATA_RAM DTCM -#define BSSNZ_RAM DTCM +#define NOINIT_RAM DTCM #define COREBSS_RAM DTCM #define TEXT_RAM ITCM diff --git a/sys/defs/include/defs/sections.h b/sys/defs/include/defs/sections.h index d43a26d693..43552d69dc 100644 --- a/sys/defs/include/defs/sections.h +++ b/sys/defs/include/defs/sections.h @@ -41,8 +41,8 @@ extern "C" { #ifndef sec_bss_core #define sec_bss_core #endif -#ifndef sec_bss_nz_core -#define sec_bss_nz_core +#ifndef sec_noinit +#define sec_noinit #endif /* Code which should be placed and executed from RAM */ diff --git a/targets/coverity/btshell_nrf52840_coverity/nrf52.ld b/targets/coverity/btshell_nrf52840_coverity/nrf52.ld index df0fe54b9f..7ca63bdad6 100644 --- a/targets/coverity/btshell_nrf52840_coverity/nrf52.ld +++ b/targets/coverity/btshell_nrf52840_coverity/nrf52.ld @@ -65,12 +65,12 @@ SECTIONS } > RAM AT > FLASH - .bssnz : + .bss : { } > RAM - .bss : + .noinit : { } > RAM