From 444697fc132aaf93d75f22e376e26cbebf8b3560 Mon Sep 17 00:00:00 2001 From: Marco Casaroli Date: Thu, 23 Jul 2026 08:24:48 +0200 Subject: [PATCH 1/2] arch/arm: Stop boards silently discarding --fixed-r10. Toolchain.defs adds --fixed-r10 to CFLAGS under CONFIG_PIC, but nearly every board Make.defs includes that file and then assigns CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) ... with ':=', which discards it. 266 of the 269 ARM board files assign CFLAGS that way; the remaining three delegate to a shared makefile that does the same thing. The flag is what keeps the base firmware from allocating r10, the register a PIC module reaches its own data through. Losing it is silent and the symptom is remote from the cause: the build succeeds, and only a callback from base firmware into module code -- qsort() with a module comparison function is the standard case -- misbehaves, reading its data through a register the firmware has since felt free to reuse. mps3-an547:picostest is the only defconfig in the tree that enables CONFIG_PIC, so it is the only board fixed here. It re-applies the flag after the ':=' and filters it back out of CPICFLAGS and CELFFLAGS, because GCC rejects --fixed-r10 alongside the -mpic-register=r10 those carry ("unable to use 'r10' for PIC register"). That filtering is also why the flag cannot simply move to ARCHCPUFLAGS to survive the ':=': the module flags derive from CFLAGS, so it would land in exactly that rejected combination. Toolchain.defs now says so, since the next board to enable CONFIG_PIC will otherwise hit this again. Before, with CONFIG_PIC=y: CFLAGS has --fixed-r10: NO After: CFLAGS has --fixed-r10: YES CPICFLAGS/CELFFLAGS: NO Assisted-by: Claude Code:claude-opus-4-8 Signed-off-by: Marco Casaroli --- arch/arm/src/common/Toolchain.defs | 19 ++++++++++++++++++ boards/arm/mps/mps3-an547/scripts/Make.defs | 22 ++++++++++++++++++++- 2 files changed, 40 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/common/Toolchain.defs b/arch/arm/src/common/Toolchain.defs index f7c4e6a15c351..12854d9c1860e 100644 --- a/arch/arm/src/common/Toolchain.defs +++ b/arch/arm/src/common/Toolchain.defs @@ -584,6 +584,25 @@ CELFFLAGS = $(CFLAGS) -fvisibility=hidden -mlong-calls # --target1-abs CXXELFFLAGS = $(CXXFLAGS)-fvisibility=hidden -mlong-calls ifeq ($(CONFIG_PIC),y) + # NOTE: nearly every board Make.defs includes this file and then assigns + # + # CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) ... + # + # with ':=', which silently discards this flag. A board enabling + # CONFIG_PIC has to re-apply it after that assignment, and then filter it + # back out of CPICFLAGS and CELFFLAGS, because GCC rejects --fixed-r10 + # alongside the -mpic-register=r10 those carry. See + # boards/arm/mps/mps3-an547/scripts/Make.defs for the pattern. + # + # The flag cannot simply move to ARCHCPUFLAGS to survive the ':=', because + # the module flags derive from CFLAGS and would then hit exactly that + # rejected combination. + # + # Losing it is silent and the symptom is remote from the cause: the build + # succeeds, and only a callback from base firmware into module code + # misbehaves, reading its data through a register the firmware has since + # felt free to reuse. + CFLAGS += --fixed-r10 CELFFLAGS += $(PICFLAGS) -mpic-register=r10 CXXELFFLAGS += $(PICFLAGS) -mpic-register=r10 diff --git a/boards/arm/mps/mps3-an547/scripts/Make.defs b/boards/arm/mps/mps3-an547/scripts/Make.defs index 02706d8f16ca1..78d8e16cd1b01 100644 --- a/boards/arm/mps/mps3-an547/scripts/Make.defs +++ b/boards/arm/mps/mps3-an547/scripts/Make.defs @@ -28,7 +28,27 @@ LDSCRIPT = flash.ld ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) + +ifeq ($(CONFIG_PIC),y) + # Toolchain.defs adds this, but the ':=' above discards it. + # + # A PIC module reaches its own data through r10, and that register has to + # survive a call into the base firmware: a base firmware routine that + # calls back into module code -- qsort() with a module comparison function + # is the standard case -- must arrive there with the module's data base + # still in r10, which it will not if the compiler was free to allocate r10 + # while building the base firmware. + + CFLAGS += --fixed-r10 +endif + +# The module itself already reserves r10 via -mpic-register=r10, and GCC +# rejects a command line carrying both that and --fixed-r10 ("unable to use +# 'r10' for PIC register"). Since both of these derive from CFLAGS, the +# flag has to be filtered back out of them. + +CPICFLAGS = $(ARCHPICFLAGS) $(filter-out --fixed-r10,$(CFLAGS)) +CELFFLAGS := $(filter-out --fixed-r10,$(CELFFLAGS)) CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) From 3f626145575c544a29e4fd482bf2bd04539e2c27 Mon Sep 17 00:00:00 2001 From: Marco Casaroli Date: Thu, 23 Jul 2026 08:55:06 +0200 Subject: [PATCH 2/2] tools: Exempt the "*.siz" gsize comment from codespell. codespell reads "siz" in # instruct the gsize to generate a "*.siz" file that contains the # detailed section size as a misspelling of "size" or "six". It is neither: ".siz" is the filename extension gsize produces. The hit predates this branch and fires for anyone who touches arch/arm/src/common/Toolchain.defs, because checkpatch scans whole files rather than changed lines, so any PR editing that file fails CI on it. Recorded in .codespell-ignore-lines, which the config documents as the place for exotic-but-correct word occurrences, rather than in ignore-words-list, which is reserved for frequently used words. Assisted-by: Claude Code:claude-opus-4-8 Signed-off-by: Marco Casaroli --- .codespell-ignore-lines | 1 + 1 file changed, 1 insertion(+) diff --git a/.codespell-ignore-lines b/.codespell-ignore-lines index 9e5f1a392d112..5bc7c6cec1df9 100644 --- a/.codespell-ignore-lines +++ b/.codespell-ignore-lines @@ -179,3 +179,4 @@ libs/libc/tre-mem.c /* Followed by one or more ND options */ * message using the Neighbor Discovery (ND) protocol. It then listens PIO DUE SCHEM. PIN MAPPING SAM3X DUE SCHEM. BOARD LABEL + # instruct the gsize to generate a "*.siz" file that contains the detailed section size