GraphIR currently creates many pairwise edges between all components sharing a net, especially on GND and power rails. This becomes noisy fast and will be hard to render cleanly in later UI.
Goal:
Add a graph mode suitable for visualization where important nets can be represented as nodes.
Example:
Instead of:
U1 -- U2 -- R1 -- R2 all pairwise on GND
Prefer:
U1 -> GND_NET
U2 -> GND_NET
R1 -> GND_NET
R2 -> GND_NET
Acceptance criteria:
- Keep current GraphIR behavior if needed for compatibility.
- Add either a filtered graph mode or net-node mode.
- GND/power nets should not explode into pairwise edges.
- I2C/SPI/UART interfaces should remain easy to visualize.
- Later UI should be able to render this without custom cleanup logic.
GraphIR currently creates many pairwise edges between all components sharing a net, especially on GND and power rails. This becomes noisy fast and will be hard to render cleanly in later UI.
Goal:
Add a graph mode suitable for visualization where important nets can be represented as nodes.
Example:
Instead of:
U1 -- U2 -- R1 -- R2 all pairwise on GND
Prefer:
U1 -> GND_NET
U2 -> GND_NET
R1 -> GND_NET
R2 -> GND_NET
Acceptance criteria: