framebuffers -- overlays -- managers -- displays
FB0 --- GFX --\ LCD ---- (none)
VID1 \ TV ----- (none)
VID2 \- LCD2 --- LCD2
VID3
Timings (pixclock in kHz,xres/hfp/hbp/hsw,yres/vfp/vbp/vsw): 51200,1024/160/150/10,600/12/20/3
dpll4_ck (?) = 1536000000 Hz
DSS_FCLK = (dpll4_ck / 9) = 170666666 Hz
DSS_CLK = DSS_FCLK = 170666666 Hz (?)
PLL2_CLK1 = 153600000 Hz
DISPC_FCLK = PLL2_CLK1 = 153600000 Hz
LCD2_CLK (DSI2 functional clock) = PLL2_CLK1 = 153600000 Hz
LCD2 (lck div) = DISPC_DIVISOR2[23:16] = 1
PCD2 (pck div) = DISPC_DIVISOR2[7:0] = 3
LC2_PCLK = (LCD2_CLK / LCD2) / PCD2 = 51200000 Hz
Resources:
Device tree resources:
Documentation/devicetree/bindings/display/panel/panel-dpi.yamlDocumentation/devicetree/bindings/display/panel/panel-simple.yamlDocumentation/devicetree/bindings/display/panel/panel-common.yamlHardware details:
0x9fec4000(reported by U-Boot)Notes:
DSS configuration (from 3.4.48):