@@ -4428,7 +4428,14 @@ static int zend_jit_math_double_long(dasm_State **Dst,
44284428 zend_jit_addr res_addr,
44294429 uint32_t res_use_info)
44304430{
4431- zend_reg result_reg, tmp_reg;
4431+ zend_reg result_reg, tmp_reg_gp;
4432+
4433+ if (Z_MODE(res_addr) == IS_MEM_ZVAL && Z_REG(res_addr) == ZREG_R0) {
4434+ /* ASSIGN_DIM_OP */
4435+ tmp_reg_gp = ZREG_R1;
4436+ } else {
4437+ tmp_reg_gp = ZREG_R0;
4438+ }
44324439
44334440 if (zend_is_commutative(opcode)
44344441 && (Z_MODE(res_addr) != IS_REG || Z_MODE(op1_addr) != IS_REG || Z_REG(res_addr) != Z_REG(op1_addr))) {
@@ -4437,13 +4444,7 @@ static int zend_jit_math_double_long(dasm_State **Dst,
44374444 } else {
44384445 result_reg = ZREG_XMM0;
44394446 }
4440- if (Z_MODE(res_addr) == IS_MEM_ZVAL && Z_REG(res_addr) == ZREG_R0) {
4441- /* ASSIGN_DIM_OP */
4442- tmp_reg = ZREG_R1;
4443- } else {
4444- tmp_reg = ZREG_R0;
4445- }
4446- | SSE_GET_ZVAL_LVAL result_reg, op2_addr, tmp_reg
4447+ | SSE_GET_ZVAL_LVAL result_reg, op2_addr, tmp_reg_gp
44474448 if (Z_MODE(res_addr) == IS_MEM_ZVAL && Z_REG(res_addr) == ZREG_R0) {
44484449 /* ASSIGN_DIM_OP */
44494450 if (CAN_USE_AVX()) {
@@ -4485,7 +4486,7 @@ static int zend_jit_math_double_long(dasm_State **Dst,
44854486 && Z_LVAL_P(Z_ZV(op2_addr)) == 0) {
44864487 /* +/- 0 */
44874488 } else {
4488- | SSE_GET_ZVAL_LVAL tmp_reg, op2_addr, ZREG_R0
4489+ | SSE_GET_ZVAL_LVAL tmp_reg, op2_addr, tmp_reg_gp
44894490 | AVX_MATH_REG opcode, result_reg, op1_reg, tmp_reg
44904491 }
44914492 } else {
@@ -4495,7 +4496,7 @@ static int zend_jit_math_double_long(dasm_State **Dst,
44954496 && Z_LVAL_P(Z_ZV(op2_addr)) == 0) {
44964497 /* +/- 0 */
44974498 } else {
4498- | SSE_GET_ZVAL_LVAL tmp_reg, op2_addr, ZREG_R0
4499+ | SSE_GET_ZVAL_LVAL tmp_reg, op2_addr, tmp_reg_gp
44994500 | SSE_MATH_REG opcode, result_reg, tmp_reg
45004501 }
45014502 }
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