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[hw] Formalize cm_rd_data stability contract inside global_mem_axi4_adapter #27

@marcos-mendez

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@marcos-mendez

Agent 1 v2 review of MAST PR #25 noted: the new core1_rd_data stability test depends on an implicit guarantee that cm_rd_data (driven by global_mem_axi4_adapter) holds its value until the next request. No written contract exists in global_mem_axi4_adapter.sv. A multi-outstanding adapter or response-forwarding optimization could silently glitch this. Add: (a) header comment block in global_mem_axi4_adapter.sv documenting the invariant, (b) cocotb assertion in verif/global_mem_axi4_adapter/ that drives back-to-back reads with bus idle in between and asserts core_mem_rd_data is stable. Refs: MAST PR #25, PR #19. Authored by Agent R (Reviewer).

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    stream-1RTL Architect (Agent 1) — SystemVerilog, cocotb, MAST primary

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