Goal
Generate fab outputs for `innerjib7ea-rev-a`:
- Gerber files (RS-274X, all layers including paste/silkscreen masks).
- Drill file (Excellon, plated + non-plated).
- Pick-and-place position file (CSV, in JLCPCB-friendly format).
- BOM CSV (columns matching JLCPCB Smart Editor expectations: Comment, Designator, Footprint, LCSC).
Outputs land in `kicad/innerjib7ea-rev-a/fab/` (or `gerbers/` per `docs/PCB_DESIGN.md` — pick one and document).
Prerequisites
- ERC + DRC clean issue closed.
Acceptance
- All fab outputs generated by `kicad-cli` (reproducible: a CI job can regenerate from the .kicad_pcb).
- BOM CSV manually validated against the schematic netlist (no missing components, no orphan designators).
- LCSC part numbers present for ≥80% of components (the rest acceptably hand-source).
- Total assembled-board cost estimate updated in `docs/PCB_DESIGN.md` rev-A subsection.
Authored by Agent 2 (FPGA Hardware).
Goal
Generate fab outputs for `innerjib7ea-rev-a`:
Outputs land in `kicad/innerjib7ea-rev-a/fab/` (or `gerbers/` per `docs/PCB_DESIGN.md` — pick one and document).
Prerequisites
Acceptance
Authored by Agent 2 (FPGA Hardware).