board: enable 64 bits timestamp support on intel platforms

RanderWang · RanderWang · commit e8fa8932e08f · 2023-12-06T15:39:32.000+08:00
TGL, TGL-H and ACE platforms will use 64 bits timestamp.

Signed-off-by: Rander Wang &lt;rander.wang@intel.com&gt;
diff --git a/app/boards/intel_adsp_ace15_mtpm.conf b/app/boards/intel_adsp_ace15_mtpm.conf
@@ -90,3 +90,4 @@ CONFIG_DEBUG_COREDUMP_MEMORY_DUMP_MIN=y
 
 CONFIG_PROBE=y
 CONFIG_PROBE_DMA_MAX=2
+CONFIG_LOG_TIMESTAMP_64BIT=y
diff --git a/app/boards/intel_adsp_ace20_lnl.conf b/app/boards/intel_adsp_ace20_lnl.conf
@@ -75,3 +75,4 @@ CONFIG_COMP_KPB=y
 CONFIG_COMP_ARIA=y
 CONFIG_CLOCK_CONTROL_ADSP=y
 CONFIG_CLOCK_CONTROL=y
+CONFIG_LOG_TIMESTAMP_64BIT=y
diff --git a/app/boards/intel_adsp_cavs25.conf b/app/boards/intel_adsp_cavs25.conf
@@ -75,3 +75,4 @@ CONFIG_DMA_DW_FIFO_PARTITION=y
 CONFIG_DMA_INTEL_ADSP_GPDMA_HAS_LLP=y
 
 CONFIG_HEAP_MEM_POOL_SIZE=8192
+CONFIG_LOG_TIMESTAMP_64BIT=y
diff --git a/app/boards/intel_adsp_cavs25_tgph.conf b/app/boards/intel_adsp_cavs25_tgph.conf
@@ -74,3 +74,4 @@ CONFIG_DMA_DW_FIFO_PARTITION=y
 CONFIG_DMA_INTEL_ADSP_GPDMA_HAS_LLP=y
 
 CONFIG_HEAP_MEM_POOL_SIZE=8192
+CONFIG_LOG_TIMESTAMP_64BIT=y

Original file line number	Diff line number	Diff line change
`@@ -90,3 +90,4 @@ CONFIG_DEBUG_COREDUMP_MEMORY_DUMP_MIN=y`
`90`	`90`
`91`	`91`	`CONFIG_PROBE=y`
`92`	`92`	`CONFIG_PROBE_DMA_MAX=2`
	`93`	`+CONFIG_LOG_TIMESTAMP_64BIT=y`
Original file line number	Diff line number	Diff line change
`@@ -75,3 +75,4 @@ CONFIG_DMA_DW_FIFO_PARTITION=y`
`75`	`75`	`CONFIG_DMA_INTEL_ADSP_GPDMA_HAS_LLP=y`
`76`	`76`
`77`	`77`	`CONFIG_HEAP_MEM_POOL_SIZE=8192`
	`78`	`+CONFIG_LOG_TIMESTAMP_64BIT=y`
Original file line number	Diff line number	Diff line change
`@@ -74,3 +74,4 @@ CONFIG_DMA_DW_FIFO_PARTITION=y`
`74`	`74`	`CONFIG_DMA_INTEL_ADSP_GPDMA_HAS_LLP=y`
`75`	`75`
`76`	`76`	`CONFIG_HEAP_MEM_POOL_SIZE=8192`
	`77`	`+CONFIG_LOG_TIMESTAMP_64BIT=y`