Skip to content

refactor(pal): rename PAL print wrappers #381

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
prashymh merged 1 commit into from
Apr 29, 2026
Merged

refactor(pal): rename PAL print wrappers #381

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 0 additions & 2 deletions pal/baremetal/base/include/pal_common_support.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -62,8 +62,6 @@ void *pal_aligned_alloc( uint32_t alignment, uint32_t size );

void *mem_alloc(size_t alignment, size_t size);
void pal_warn_not_implemented(const char *api_name);
#define print(verbose, string, ...) \
PAL_PRINT_LITERAL((verbose), string, ##__VA_ARGS__)

#define PCIE_CREATE_BDF(Seg, Bus, Dev, Func) ((Seg << 24) | (Bus << 16) | (Dev << 8) | Func)

Expand Down
13 changes: 9 additions & 4 deletions pal/baremetal/base/src/pal_cxl.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -30,14 +30,16 @@ pal_cxl_create_info_table(CXL_INFO_TABLE *CxlTable)
uint32_t max_windows;

if (CxlTable == NULL) {
print(ACS_PRINT_ERR, "Input CXL Table Pointer is NULL. Cannot create CXL INFO Table\n");
pal_print_msg(ACS_PRINT_ERR,
"Input CXL Table Pointer is NULL. Cannot create CXL INFO Table\n");
return;
}

CxlTable->num_entries = 0;

if (platform_cxl_cfg.num_entries == 0) {
print(ACS_PRINT_ERR, "Number of HB is 0. Cannot create CXL INFO\n");
pal_print_msg(ACS_PRINT_ERR,
"Number of HB is 0. Cannot create CXL INFO\n");
return;
}

Expand All @@ -55,7 +57,8 @@ pal_cxl_create_info_table(CXL_INFO_TABLE *CxlTable)
window_count = platform_cxl_cfg.device[i].cfmws_count;
if (window_count > max_windows) {
window_count = max_windows;
print(ACS_PRINT_WARN, "CFMWS count exceeds per-host capacity. Truncating\n");
pal_print_msg(ACS_PRINT_WARN,
"CFMWS count exceeds per-host capacity. Truncating\n");
}
CxlTable->device[i].cfmws_count = window_count;

Expand Down Expand Up @@ -84,6 +87,8 @@ pal_cxl_get_host_bridge_uid(uint32_t bdf, uint32_t *uid)
if (uid != NULL)
*uid = 0;
else
print(ACS_PRINT_ERR, " pal_cxl_get_host_bridge_uid UID pointer NULL ");
pal_print_msg(ACS_PRINT_ERR,
" %s UID pointer NULL ",
__func__);
return 1;
}
18 changes: 13 additions & 5 deletions pal/baremetal/base/src/pal_hmat.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -38,11 +38,18 @@ void pal_hmat_dump_info_table(HMAT_INFO_TABLE *HmatTable)
return;

curr_entry = HmatTable->bw_info;
print(ACS_PRINT_INFO, "\n*** HMAT info table entries ***\n");
pal_print_msg(ACS_PRINT_INFO,
"\n*** HMAT info table entries ***\n");
for (i = 0 ; i < HmatTable->num_of_mem_prox_domain ; i++) {
print(ACS_PRINT_INFO, "\nMemory Proximity domain : 0x%llx", curr_entry->mem_prox_domain);
print(ACS_PRINT_INFO, "\n Write bandwidth : 0x%llx", curr_entry->write_bw);
print(ACS_PRINT_INFO, "\n Read bandwidth : 0x%llx\n", curr_entry->read_bw);
pal_print_msg(ACS_PRINT_INFO,
"\nMemory Proximity domain : 0x%llx",
curr_entry->mem_prox_domain);
pal_print_msg(ACS_PRINT_INFO,
"\n Write bandwidth : 0x%llx",
curr_entry->write_bw);
pal_print_msg(ACS_PRINT_INFO,
"\n Read bandwidth : 0x%llx\n",
curr_entry->read_bw);
curr_entry++;
}
}
Expand All @@ -64,7 +71,8 @@ void pal_hmat_create_info_table(HMAT_INFO_TABLE *HmatTable)
HMAT_BW_ENTRY *curr_info_entry;

if (HmatTable == NULL) {
print(ACS_PRINT_ERR, " Unable to create HMAT info table, input pointer is NULL\n");
pal_print_msg(ACS_PRINT_ERR,
" Unable to create HMAT info table, input pointer is NULL\n");
return;
}

Expand Down
76 changes: 49 additions & 27 deletions pal/baremetal/base/src/pal_iovirt.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -63,8 +63,9 @@ pal_iovirt_get_rc_smmu_base (
}

if (!mapping_found) {
print(ACS_PRINT_ERR,
"\n RID to Stream ID/Dev ID map not found ", 0);
pal_print_msg(ACS_PRINT_ERR,
"\n RID to Stream ID/Dev ID map not found ",
0);
return 0xFFFFFFFF;

}
Expand All @@ -79,8 +80,9 @@ pal_iovirt_get_rc_smmu_base (
if(sid >= (*map).map.input_base && sid <= ((*map).map.input_base +
(*map).map.id_count))
{
print(ACS_PRINT_DEBUG,
"\n find RC block->data.smmu.base : %llx", block->data.smmu.base);
pal_print_msg(ACS_PRINT_DEBUG,
"\n find RC block->data.smmu.base : %llx",
block->data.smmu.base);
return block->data.smmu.base;
}
}
Expand All @@ -89,8 +91,9 @@ pal_iovirt_get_rc_smmu_base (
/* The Root Complex represented by rc_seg_num
* is not behind any SMMU. Return NULL pointer
*/
print(ACS_PRINT_DEBUG,
" No SMMU found behind the RootComplex with segment :%x", RcSegmentNum);
pal_print_msg(ACS_PRINT_DEBUG,
" No SMMU found behind the RootComplex with segment :%x",
RcSegmentNum);
return 0;
}

Expand Down Expand Up @@ -124,39 +127,55 @@ dump_block(IOVIRT_BLOCK *block) {
NODE_DATA_MAP *map = &(block->data_map[0]);
switch(block->type) {
case IOVIRT_NODE_ITS_GROUP:
print(ACS_PRINT_INFO, "\n ITS Group: Num ITS:%d\n", (*map).id[0]);
pal_print_msg(ACS_PRINT_INFO,
"\n ITS Group: Num ITS:%d\n",
(*map).id[0]);
for(i = 0; i < block->data.its_count; i++)
print(ACS_PRINT_INFO, " ITS ID : %d\n", (*map).id[i]);
pal_print_msg(ACS_PRINT_INFO,
" ITS ID : %d\n",
(*map).id[i]);
return;
case IOVIRT_NODE_NAMED_COMPONENT:
print(ACS_PRINT_INFO,
" Named Component:\n Device Name:%s", block->data.named_comp.name);
print(ACS_PRINT_INFO, "\n CCA Attribute: 0x%lx\n", block->data.named_comp.cca);
pal_print_msg(ACS_PRINT_INFO,
" Named Component:\n Device Name:%s",
block->data.named_comp.name);
pal_print_msg(ACS_PRINT_INFO,
"\n CCA Attribute: 0x%lx\n",
block->data.named_comp.cca);
break;
case IOVIRT_NODE_PCI_ROOT_COMPLEX:
print(ACS_PRINT_INFO,
" Root Complex: PCI segment number:%d\n", block->data.rc.segment);
pal_print_msg(ACS_PRINT_INFO,
" Root Complex: PCI segment number:%d\n",
block->data.rc.segment);
break;
case IOVIRT_NODE_SMMU:
case IOVIRT_NODE_SMMU_V3:
print(ACS_PRINT_INFO, " SMMU: Major Rev:%d Base Address:0x%llx\n",
block->data.smmu.arch_major_rev, block->data.smmu.base);
pal_print_msg(ACS_PRINT_INFO,
" SMMU: Major Rev:%d Base Address:0x%llx\n",
block->data.smmu.arch_major_rev,
block->data.smmu.base);
break;
case IOVIRT_NODE_PMCG:
print(ACS_PRINT_INFO,
" PMCG: Base:0x%x\n Overflow GSIV:0x%x Node Reference:0x%x\n",
block->data.pmcg.base, block->data.pmcg.overflow_gsiv, block->data.pmcg.node_ref);
pal_print_msg(ACS_PRINT_INFO,
" PMCG: Base:0x%x\n Overflow GSIV:0x%x Node Reference:0x%x\n",
block->data.pmcg.base,
block->data.pmcg.overflow_gsiv,
block->data.pmcg.node_ref);
break;
}
print(ACS_PRINT_INFO,
" Number of ID Mappings:%d\n", block->num_data_map);
pal_print_msg(ACS_PRINT_INFO,
" Number of ID Mappings:%d\n",
block->num_data_map);
for(i = 0; i < block->num_data_map; i++, map++) {
print(ACS_PRINT_INFO,
" input_base:0x%x id_count:0x%x\n output_base:0x%x output ref:0x%x\n",
(*map).map.input_base, (*map).map.id_count,
(*map).map.output_base, (*map).map.output_ref);
pal_print_msg(ACS_PRINT_INFO,
" input_base:0x%x id_count:0x%x\n output_base:0x%x output ref:0x%x\n",
(*map).map.input_base,
(*map).map.id_count,
(*map).map.output_base,
(*map).map.output_ref);
}
print(ACS_PRINT_INFO, "\n");
pal_print_msg(ACS_PRINT_INFO,
"\n");
}

void
Expand Down Expand Up @@ -248,7 +267,8 @@ pal_iovirt_create_info_table(IOVIRT_INFO_TABLE *IoVirtTable)
p++;
break;
default:
print(ACS_PRINT_ERR, "Invalid IORT node type\n");
pal_print_msg(ACS_PRINT_ERR,
"Invalid IORT node type\n");
return;
}
node[i] = (uint8_t*)(block) - (uint8_t*)IoVirtTable;
Expand Down Expand Up @@ -288,7 +308,9 @@ pal_iovirt_create_info_table(IOVIRT_INFO_TABLE *IoVirtTable)
}

block = &(IoVirtTable->blocks[0]);
print(ACS_PRINT_DEBUG, " Number of IOVIRT blocks = %d\n", IoVirtTable->num_blocks);
pal_print_msg(ACS_PRINT_DEBUG,
" Number of IOVIRT blocks = %d\n",
IoVirtTable->num_blocks);

if (acs_policy_get_print_level() <= ACS_PRINT_INFO) {
for (i = 0; i < IoVirtTable->num_blocks; i++, block = IOVIRT_NEXT_BLOCK(block))
Expand Down
64 changes: 50 additions & 14 deletions pal/baremetal/base/src/pal_misc.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,11 @@ pal_mmio_read8(uint64_t addr)

data = (*(volatile uint8_t *)addr);
if (acs_policy_get_print_mmio() || (g_curr_module & g_enable_module))
print(ACS_PRINT_INFO, " pal_mmio_read8 Address = %llx Data = %lx\n", addr, data);
pal_print_msg(ACS_PRINT_INFO,
" %s Address = %llx Data = %lx\n",
__func__,
addr,
data);

return data;
}
Expand All @@ -69,7 +73,11 @@ pal_mmio_read16(uint64_t addr)

data = (*(volatile uint16_t *)addr);
if (acs_policy_get_print_mmio() || (g_curr_module & g_enable_module))
print(ACS_PRINT_INFO, " pal_mmio_read16 Address = %llx Data = %lx\n", addr, data);
pal_print_msg(ACS_PRINT_INFO,
" %s Address = %llx Data = %lx\n",
__func__,
addr,
data);

return data;
}
Expand All @@ -89,7 +97,11 @@ pal_mmio_read64(uint64_t addr)

data = (*(volatile uint64_t *)addr);
if (acs_policy_get_print_mmio() || (g_curr_module & g_enable_module))
print(ACS_PRINT_INFO, " pal_mmio_read64 Address = %llx Data = %llx\n", addr, data);
pal_print_msg(ACS_PRINT_INFO,
" %s Address = %llx Data = %llx\n",
__func__,
addr,
data);

return data;
}
Expand All @@ -110,7 +122,11 @@ pal_mmio_read(uint64_t addr)

data = (*(volatile uint32_t *)addr);
if (acs_policy_get_print_mmio() || (g_curr_module & g_enable_module))
print(ACS_PRINT_INFO, " pal_mmio_read Address = %8x Data = %x\n", addr, data);
pal_print_msg(ACS_PRINT_INFO,
" %s Address = %8x Data = %x\n",
__func__,
addr,
data);

return data;

Expand All @@ -129,7 +145,11 @@ void
pal_mmio_write8(uint64_t addr, uint8_t data)
{
if (acs_policy_get_print_mmio() || (g_curr_module & g_enable_module))
print(ACS_PRINT_INFO, " pal_mmio_write8 Address = %llx Data = %lx\n", addr, data);
pal_print_msg(ACS_PRINT_INFO,
" %s Address = %llx Data = %lx\n",
__func__,
addr,
data);

*(volatile uint8_t *)addr = data;
}
Expand All @@ -147,7 +167,11 @@ void
pal_mmio_write16(uint64_t addr, uint16_t data)
{
if (acs_policy_get_print_mmio() || (g_curr_module & g_enable_module))
print(ACS_PRINT_INFO, " pal_mmio_write16 Address = %llx Data = %lx\n", addr, data);
pal_print_msg(ACS_PRINT_INFO,
" %s Address = %llx Data = %lx\n",
__func__,
addr,
data);

*(volatile uint16_t *)addr = data;
}
Expand All @@ -165,7 +189,11 @@ void
pal_mmio_write64(uint64_t addr, uint64_t data)
{
if (acs_policy_get_print_mmio() || (g_curr_module & g_enable_module))
print(ACS_PRINT_INFO, " pal_mmio_write64 Address = %llx Data = %llx\n", addr, data);
pal_print_msg(ACS_PRINT_INFO,
" %s Address = %llx Data = %llx\n",
__func__,
addr,
data);

*(volatile uint64_t *)addr = data;
}
Expand All @@ -184,7 +212,11 @@ pal_mmio_write(uint64_t addr, uint32_t data)
{

if (acs_policy_get_print_mmio() || (g_curr_module & g_enable_module))
print(ACS_PRINT_INFO, " pal_mmio_write Address = %8x Data = %x\n", addr, data);
pal_print_msg(ACS_PRINT_INFO,
" %s Address = %8x Data = %x\n",
__func__,
addr,
data);

*(volatile uint32_t *)addr = data;
}
Expand Down Expand Up @@ -242,11 +274,13 @@ pal_warn_not_implemented(const char *api_name)
if (api_name == NULL)
return;

print(ACS_PRINT_WARN,
"\n %s is not implemented."
"\n Please implement the PAL function in test suite or"
"\n conduct an offline review for this rule.",
api_name);
pal_print_msg(ACS_PRINT_WARN,
"\n %s is not implemented.",
api_name);
pal_print_msg(ACS_PRINT_WARN,
"\n Please implement the PAL function in test suite or");
pal_print_msg(ACS_PRINT_WARN,
"\n conduct an offline review for this rule.");
}

/**
Expand Down Expand Up @@ -644,7 +678,9 @@ void pal_uart_print(int log, const char *fmt, ...)
void
pal_dump_dtb()
{
print(ACS_PRINT_ERR, " DTB dump not available for platform initialized with ACPI table\n", 0);
pal_print_msg(ACS_PRINT_ERR,
" DTB dump not available for platform initialized with ACPI table\n",
0);
}

/**
Expand Down
Loading
Loading