test(library-selection): #205 add pass-2 reconciliation regression + CI badges#222
test(library-selection): #205 add pass-2 reconciliation regression + CI badges#222
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…nsylc env, add CI badges Three final polish items before closing #205. ## test — `r04_pass2_reconciliation_catches_cpp_only_dependency` The canonical "why 2-pass beats single-pass BFS" scenario, which the existing 16-test suite was missing as an explicit guard: - Project includes `<SPI.h>`. `SPI.h` is silent (no transitive includes). - `SPI.cpp` is the *only* place that includes `<Wire.h>`. A single-pass BFS over headers selects {SPI} and silently misses Wire — link-time undefined symbols. The LDF's pass 2 re-seeds with each selected lib's full source set, so Wire is reached and selected. Test asserts {SPI, Wire} and is the regression guard against accidentally collapsing the resolver back to a single pass. Brings the resolver test count to 17 (10 LDF + 7 cache). ## fix — teensylc acceptance gate env name `tests/teensylc_acceptance.rs` passed `env_name: "teensyLC"` (camelCase) and looked up `compile_commands.json` under `<build>/teensyLC/`. The actual env in `tests/platform/teensylc/platformio.ini` is `[env:teensylc]` (lowercase) — same case-sensitivity bug fixed in #220 / #221 for `measure_baseline_205.py`. The acceptance gate has been failing on every run (including main) for this reason. ## badges Adds badges for the two #205 workflows to README.md's CI status block: - `acceptance-205.yml` — AC#1 (teensyLC) and AC#4 (stm32 SPI) gates - `bench-205.yml` — P-02 (cold) / P-03 (scanner) / P-01-mini (warm) perf gates Both have been live since #211 / #210 but were not discoverable from the README. Refs: #205. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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Summary
Two final polish items before closing #205.
Test —
r04_pass2_reconciliation_catches_cpp_only_dependencyThe canonical "why 2-pass beats single-pass BFS" scenario, which the existing 16-test suite was missing as an explicit guard:
<SPI.h>.SPI.his silent (no transitive includes).SPI.cppis the only place that includes<Wire.h>.A single-pass BFS over headers selects
{SPI}and silently misses Wire — link-time undefined symbols. The LDF's pass 2 re-seeds with each selected lib's full source set, so Wire is reached and selected. Test asserts{SPI, Wire}and is the regression guard against accidentally collapsing the resolver back to a single pass.Brings the resolver test count to 17 (10 LDF + 7 cache).
README badges
Adds badges for the two #205 workflows to the CI status block:
acceptance-205.yml— AC#1 (teensyLC) and AC#4 (stm32 SPI) gatesbench-205.yml— P-02 (cold) / P-03 (scanner) / P-01-mini (warm) perf gatesBoth have been live since #211 / #210 but were not discoverable from the README.
Test plan
uv run soldr cargo test -p fbuild-library-select --lib— 17/17 passRefs: #205. After this lands, all six AC's are met:
stm32_acceptancetest gates this inacceptance-205.ymlbench-fastled-examples(feat(library-selection): #218 add bench-fastled-examples Phase 7 warm-cache harness #219)resolve_coldbench (feat(library-selection): #205 Phase 7 perf benchmarks (P-02, P-03) #210)🤖 Generated with Claude Code