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My VHDL Learning Journey

Welcome! This Repository documents my exploration into the world of VHDL and digital logic design. It serves as a personal portfolio of the projects, exercises, and designs iI create as i develop my skills with FPGAs and hardware description languages.

What will be Inside?

  • Foundational Concepts: Code covering VHDL fundamentals like entities, architectures, signals, processes, and data types.
  • Combinational & Sequential Logic: Implementations of basic circuits like multiplexers, decoders, adders, flip-flops, and counters.
  • Mini-Projects
  • Testbenches: Simulation files used to verify the functionality and timing of my VHDL modules.

Goals

My primary goal is to build a strong foundation in digital design and gain practical experience for future projects.

Feel free to explore my code

About

A collection of my projects and code created while learning VHDL. This repository tracks my progress in digital logic design and FPGA programming, from basic concepts to more complex circuits.

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