TinyML Accelerator

This repository (Started at 2025-06-29) is my code output for learning FPGA and hardware acceleration of machine learning from scratch.

Relevant materials can be found at: TinyML Project.

What you need

We will use two FPGA development boards:

• iCESugar: An open source FPGA development board based on iCE40UP5K, used to learn the principles of FPGA.
• Arty A7-100T: Used to run Google's CFU-Playground for learning how to accelerate machine learning models on FPGA.

Environment Setup for CFU-playground and iCESugar

Env setup lang-cn

Generate Schematics for Visualization

# Manual for generating schematics
make -f schgen.mk help
# For example, you want to visualize `decoder` module in `./gpu`:
make -f schgen.mk module MODULE=decoder VSRC=./gpu

If you write your circuit in SystemVerilog (.sv), you can convert them to Verilog (.v) first using the open source tool sv2v:

# Generate schematic for .sv, you should convert them to .v first
make -f schgen.mk convert VSRC=./gpu
# Then do this:
make -f schgen.mk module MODULE=decoder VSRC=./gpu