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Implement memory regions iterators#104

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moojek wants to merge 12 commits intoOperacja-System:mainfrom
moojek:memory_regions
Open

Implement memory regions iterators#104
moojek wants to merge 12 commits intoOperacja-System:mainfrom
moojek:memory_regions

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@moojek moojek commented Apr 26, 2026

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Co-authored-by: Copilot <copilot@github.com>
@Kamilosok Kamilosok added the new feature Added new functionality label Apr 28, 2026
moojek and others added 4 commits May 2, 2026 23:46
Co-authored-by: Copilot <copilot@github.com>
Co-authored-by: Copilot <copilot@github.com>
Co-authored-by: Copilot <copilot@github.com>
@moojek moojek marked this pull request as ready for review May 2, 2026 23:18
Comment thread src/lib/hal/arch/riscv/memory_region.c Outdated
Comment on lines +239 to +242
fdt_t fdt;
error_t err = hal_riscv_init_fdt(&fdt);
if (err)
return err;
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I don't think I like reinitializing the fdt on every step

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I added file-level static fdt variable, is it a correct approach?

Comment thread src/lib/hal/arch/riscv/memory_region.c Outdated
Comment thread src/lib/hal/arch/riscv/memory_region.c
Comment thread src/lib/hal/arch/riscv/memory_region.c Outdated
Comment thread src/lib/hal/arch/riscv/memory_region.c Outdated
Comment thread src/lib/hal/arch/riscv/memory_region.c Outdated
Comment thread src/lib/hal/arch/riscv/memory_region.c Outdated
Comment thread src/lib/hal/arch/riscv/memory_region.c
@moojek moojek requested a review from qbojj May 3, 2026 23:57
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The dt logic looks fine, didn't find anything wrong with memory stuff at a glance, though requesting a review from @frogrammer9 on this is a good idea. Noticed a few consistency issues.

Comment thread src/lib/dt/dt_access.c

dt_prop_t address_cells_prop;
error_t err = dt_get_prop_by_name(fdt, node, "#address-cells", &address_cells_prop);
if (err == ERR_NONE) {
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I prefer maintaining a logic flow where errors are handled first, and normal execution continues afterward, like other dt_ functions


error_t err = dt_get_node_sibling(fdt, node, &node);
error_t err;
if (node != 0)
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When doing special behavior like this document it well


typedef struct {
u32 idx;
u32 memreserve_idx;
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reserve or reserved?

u64 size;
err = hal_riscv_read_reg_entry(fdt, next_iter.resmem_current_node, next_iter.resmem_reg_idx,
next_iter.resmem_address_cells, next_iter.resmem_size_cells, &addr, &size);
if (err == ERR_NONE) {
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Same with error handling flow here

u64 addr;
u64 size;
err = hal_riscv_read_reg_entry(fdt, next_iter.node, next_iter.reg_idx, address_cells, size_cells, &addr, &size);
if (err == ERR_NONE) {
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Lastly here

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3 participants