Skip to content

RK3566: add suspend mode configuration driver#2361

Open
Zetarancio wants to merge 2 commits intoROCKNIX:nextfrom
Zetarancio:pr-suspend-driver
Open

RK3566: add suspend mode configuration driver#2361
Zetarancio wants to merge 2 commits intoROCKNIX:nextfrom
Zetarancio:pr-suspend-driver

Conversation

@Zetarancio
Copy link

Suspend driver (all RK3566 devices)

Configures BL31 deep-sleep flags via SMC so vdd_logic-off and deepest sleep work. Requires BL31 in U-Boot (already present upstream for RK3566).

Files:

What File
Kernel config projects/ROCKNIX/devices/RK3566/linux/linux.aarch64.confCONFIG_RK3568_SUSPEND_MODE=y
Kernel patch projects/ROCKNIX/devices/RK3566/patches/linux/1013-soc-rockchip-add-suspend-mode-configuration-driver.patch
U-Boot BL31 already used in projects/ROCKNIX/devices/RK3566/packages/u-boot-Specific/package.mk (upstream). No change needed for suspend driver.

DTS (per device): Each board needs one node:

  • rk3568-suspend with compatible = "rk3568,pm-config", rockchip,sleep-mode-config, rockchip,wakeup-config (and optionally rockchip,sleep-debug-en). The driver looks up by node name "rk3568-suspend".

So a minimal "suspend config for RK3566" change is: kernel config + patch + this small DTS node (can be in a shared dtsi or each board).
See https://github.com/Zetarancio/distribution/blob/flip/projects/ROCKNIX/devices/RK3566/linux/dts/rockchip/rk3566-miyoo-flip.dts for an example.

+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#define SIP_SUSPEND_MODE 0x82000003
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This isn't defined a defined mode in mainline. This SIP SMC function ID is BSP-specific and not registered in the upstream ARM SMCCC/SIP space.

Copy link
Author

@Zetarancio Zetarancio Feb 27, 2026

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

You’re right that 0x82000003 is not a defined or registered SMC in mainline ARM SMCCC/SIP. It is a Rockchip BSP SiP (Silicon Provider) SMC.
It works because Rockchip’s BL31 (the ATF binary from rkbin that U-Boot loads as BL31) implements this function ID. When the kernel issues this SMC, the trap goes to EL3 and that vendor BL31 handles 0x82000003 and configures the deep-sleep/wakeup flags. So the “contract” is between this driver and the Rockchip BSP firmware, not with upstream SMCCC.
For logs see here.

@Zetarancio Zetarancio requested a review from aenertia February 27, 2026 02:46
- Add driver that configures BL31 deep-sleep flags via SIP SMC
  (SIP_SUSPEND_MODE 0x82000003) using DT properties from the
  rk3568-suspend node; matches BSP suspend configuration protocol.
- Comments generalized to refer to BSP interface without naming
  specific repos or devices.
@aenertia
Copy link
Contributor

aenertia commented Mar 4, 2026

Am working through freq scaling issues atm ; once that's stable and in a PR'able/workable state I'll have at look at this

@aenertia
Copy link
Contributor

aenertia commented Mar 6, 2026

heya - am having a look at this tonight - Now I validated out the DMC patches separately with power measurements; should give us an idea of how much this actually save and if it's stable

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants