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commit a159d0e upstream. The TI AM62L is a low-power ARM Cortex-A53 based SoC with display for IOT, HMI and general purpose applications. More information here: https://www.ti.com/product/AM62L Add initial SoC and DTS support here. Signed-off-by: Andrew Davis <afd@ti.com>
commit 9c3343d upstream. The AM62L evaluation module (TMDS62LEVM) is designed for low-cost and performance optimized AM62L family of application processors. More information here: https://www.ti.com/tool/TMDS62LEVM Add base board support here. Signed-off-by: Andrew Davis <afd@ti.com>
commit 6557337 upstream. The SK-AM62 and SK-AM62B-P1 board variants both use the AM6254 SoC, not AM6234. Update board configuration to reference the correct SoC variant. This changes the board identifiers from sk_am62/am6234/* to sk_am62/am6254/* for both M4 and A53 cores. Documentation updated to mention both board variants: - SK-AM62 (base variant) - SK-AM62B-P1 (variant with integrated PMIC) Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
commit 1f0c37e upstream. Enable all four Cortex-A53 cores in the AM6254 device tree and update documentation to reflect the expected multi-core boot sequence output. Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
commit 5ca8185 upstream. Update AM62L EVM documentation references to point to correct technical resources: - Update TRM link (correct AM62L SoC TRM) - Update correct link to linux SDK WIC image for am62l_evm Ensures users access accurate AM62L-specific documentation and software resources. Signed-off-by: Soumya Tripathy <s-tripathy@ti.com>
commit 267e3f3 upstream. Allow using other references by removing the hard requirement on it being internal. To be able to use internal voltage, the DT property ti,vrefp can be used, otherwise it is ignored. Signed-off-by: Amneesh Singh <amneesh@ti.com>
commit 187e2a7 upstream. Remove custom DT property ti,vrefp and change reference voltage from INTERNAL to VDD_1 for all channels Signed-off-by: Amneesh Singh <amneesh@ti.com>
commit 8134b3b upstream. Support configuration of pins for ADC channels in the driver. Signed-off-by: Amneesh Singh <amneesh@ti.com>
commit 138d2bd upstream. Bind registers to the local variable in the ti_adc_init() function after mapping the address space via DEVICE_MMIO_MAP. Signed-off-by: Amneesh Singh <amneesh@ti.com>
commit 8e1b214 upstream. Add the missing pins for ADC0 channels in the main domain. Signed-off-by: Amneesh Singh <amneesh@ti.com>
commit 7eb1cf2 upstream. The driver was not correctly extracting FIFO byte counts from the BUFSTAT register, causing multi-byte I2C transfers to fail. The BUFSTAT register layout is: - Bits [13:8]: RX FIFO byte count - Bits [5:0]: TX FIFO byte count Also, the driver didnot update the remaining bytes after each transfer which is fixed by decrementing the remaining message length after each transfer. This fix aligns the driver implementation with Linux. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit 809ca43 upstream. The driver used a decrement loop to check for time out during message transfer, which was not sufficient. The newer implementation uses a fixed time of 1000ms for timeout to be consistent with the Linux kernel. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit 945894c upstream. This commit fixes the inconsistent type usage. Functions which initialised i2c registers as uint16_t, changed to uint32_t to match with register definition struct. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit 33a7ed0 upstream. - Add callback support for the watchdog driver. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit da0d857 upstream. - Change the dtsi to include only r5f0_0 - Add main_rti0 and main_rti1 for a53 cores - Add main_rti8 through main_rti11 for respective r5 cores - Use main_rti8 for the r5f0_0 core - Add mcu_rti0 for the m4 core Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
commit 28b98c9 upstream. Add scmi_cpu_reset_vector API for NXP SCMI CPU domain protocol. This API allows setting CPU reset vector addresses using the CPU_RESET_VECTOR_SET command. The vector address must point to the initial address of the vector table Supports 64-bit addresses and boot/start/resume vector flags. Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
commit dfe2c26 upstream. Add scmi_cpu_info_get API to query CPU information via NXP SCMI CPU domain protocol. Retrieves run mode, sleep mode, and reset vector addresses for the specified CPU ID using CPU_INFO_GET command. Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
commit c77b4ba upstream. Add SCMI generic power state definitions for ON and OFF as specified by the SCMI Power Domain protocol. These constants will be used when setting or querying power states. Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
…tions commit d0e9d95 upstream. Add standardized SCMI protocol common interface functions that can be reused across different SCMI protocol implementations: - scmi_protocol_get_version(): Query protocol version - scmi_protocol_attributes_get(): Get protocol-specific attributes - scmi_protocol_message_attributes_get(): Query message capabilities - scmi_protocol_version_negotiate(): Negotiate protocol version support Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
commit 9d163c7 upstream. Add version field to struct scmi_protocol and update protocol macros to accept version parameter. Protocol versions added: - Clock Control: v3.0.0 (SCMI v3.2 DEN0056E) - Pin Control: v1.0.0 (SCMI v3.2 DEN0056E) - Power Domain: v3.0.1 (SCMI v3.2 DEN0056E) - NXP CPU: v1.0.0 (vendor extension) Updated macros: - DT_SCMI_PROTOCOL_DATA_DEFINE - DT_SCMI_PROTOCOL_DEFINE - DT_SCMI_PROTOCOL_DEFINE_NODEV - DT_INST_SCMI_PROTOCOL_DEFINE Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
commit ada5840 upstream. Add SCMI protocol version negotiation to handle compatibility between different agent and platform versions. The negotiation automatically downgrades to supported version when needed and maintains backward compatibility with legacy systems. Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
commit cc069c0 upstream. Add SCMI System Power Domain Protocol support with: - System power state set operations - Standard SCMI power states (shutdown, cold/warm reset, suspend) - Graceful and forceful power transitions - Optional NXP vendor-specific power states - Device tree binding for "arm,scmi-system" This enables system-wide power management through standardized SCMI interfaces for reboot and power control operations. Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
commit 2d3c40d upstream. Implement sys_arch_reboot() using SCMI system power protocol for warm and cold reset operations on SCMI-enabled platforms. Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
commit 90f2a22 upstream. During reboot operations, interrupts are disabled but k_is_pre_kernel() returns false, causing SCMI communication to fail when using interrupt mode. Force polling mode to ensure reliable operation in all contexts. Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
commit b96c49d upstream. Fix incorrect indentation that caused some elements to render as defintion lists. Added proper nesting of the various headings as everything was top-level Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
commit 0081169 upstream. There is an implementation of the System power management protocol in the SCMI driver, so mention it. Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
commit 66d6eda upstream. This adds proper doxygen groups for all public SCMI headers Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
commit c2d201d upstream. arch reboot is not included in PM flow, so drop the option CONFIG_PM_LOG_LEVEL to fix build issue: - error: CONFIG_PM_LOG_LEVEL undeclared here (not in a function) Signed-off-by: Biwen Li <biwen.li@nxp.com>
commit 52c712d upstream. Protect scmi_send_message_polling() with channel mutex to prevent concurrent access with interrupt-driven transfers. Without this fix, PM subsystem could send polling-mode messages while an interrupt-mode transfer was in progress, corrupting the shared channel state. Fixes hang on i.MX943 during I2C initialization when PM attempted to send power state notifications concurrently. Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
commit 93bf06a upstream. As per coding guidelines, "sanity check" must be avoided. Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
commit fd72085 upstream Some counters, such as those that use fractional adders, tick at resolutions greater than 4294967295Hz. This changes the freq in the common info to a uint64_t. This adds a KConfig that can be selected by a driver. This also has the counter ticks to sec (and vice versa) helper functions call the get frequency for 64 bits if the kconfig is selected. Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
commit ac8f220 upstream. Run clang-format on counter.h Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
commit 779383e upstream. Add apis for 64 bits. Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
…n 64b commit c07454f upstream. Add inline helpers to convert nanoseconds or microseconds to 64b ticks and vice versa. Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
- This is the counter based rtc module used in k3 devices. PR: 104048 Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
This commit adds the counter RTC driver used in TI k3 devices. PR: 104048 Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
- Add RTC node in am62-main.dtsi which can also be used as a counter - Add child counter_rtc node which can be used as a virtual rtc. - Add interrupts in am62x_a53.dtsi PR: 104048 Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
Enable RTC node for a53 core. PR: 104048 Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
- Set RTC init priority to initialise zephyr,rtc-counter driver after counter driver is initialsed whose default priority is 60. PR: 104048 Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
PR: 105112 - Add SCMI power domain for RTC - Add RTC node and a counter child node which can use rtc-counter wrapper to use the RTC node. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
PR: 105112 - Enable rtc node for AM62L board Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
PR: 106162 - Add GPIO led node and pinmux Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
PR: 106162 - Add I2C0 and I2C1 pinmux - Add EEPROM and IO expander as child nodes of I2C0 and I2C1 respectively. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
PR: 106162 Add DM timer nodes for main domain with scmi clocks, pds and Interrupts. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
PR: 105913 Currently all boards use the driver which only configures NMI mode for a window violation. With this change: - If interrupts are present in the DT, hardware is NMI capable - If reset-capable property is true, hardware can generate a reset By this we can define the capabilities of the hardware based on which the driver can configure NMI or Reset mode. The existing nodes in the boards which support NMI will not be affected since all of them provide IRQ numbers. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
PR: 105913 If DT has IRQ defined, the board supports NMI mode, if reset-capable property is set then the board can support reset as well. Based on these DT properties and the flags passed by the application, NMI mode or Reset mode can be set. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
PR: 105913 - Add scmi clocks for both RTI0 and RTI1 nodes. - Add reset-capable property so that the driver can configure reset mode supported by AM62L boards. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
PR: 105913 Set status for watchdog node and also add an alias for watchdog. Signed-off-by: Sunil Hegde <s-hegde3@ti.com>
Use uint32_t to allow larger offsets in place of the existing uint16_t configuration. PR: 106755 Signed-off-by: Amneesh Singh <amneesh@ti.com> --- Backport notes: - Dropped syscon_shell.c changes since it is not present on 4.3.0
Add a specifier space for configuring timebase clock for TI's Enhanced PWM via syscon. PR: 88757 Signed-off-by: Amneesh Singh <amneesh@ti.com>
This is the driver for EPWM/EHRPWM module of TI SoCs. It only uses Action Qualifier submodule currently. PR: 88757 Signed-off-by: Amneesh Singh <amneesh@ti.com> --- Backport notes: - Fixed conflicts in Kconfig and CMakeLists.txt
Add DT nodes for TI's Enhanced PWM. This requires addition of a syscon node as well to configure the timebase clock. PR: 88757 Signed-off-by: Amneesh Singh <amneesh@ti.com> --- Backport notes: - Resolved device tree conflicts
Add DT nodes for TI's Enhanced PWM. This requires addition of a syscon node as well to configure the timebase clock. PR: 88757 Signed-off-by: Amneesh Singh <amneesh@ti.com> --- Backport notes: - Resolved device tree conflicts
commit 9f4a015 upstream. After trying out a few different approaches, I think having separate nodes for each bank in devicetree and having a GPIO proxy node for the controller is the best solution right now. To be more specific, GPIO proxy solution still allows for bank level GPIO toggling. The linux kernel GPIO davinci driver is currently limited to single pin operations. This might not be a problem in Linux, but I feel like embedded systems would prefer having support for bank level operations. This also does not pose a problem for the future implementation of interrupts due to that fact that the interrupt router is separate device and will require a separate driver. In fact, the GPIO interrupt router is shared between main_gpio0 and main_gpio1. This patch also reverts the previous bank offset related work on GPIO davinci driver. The patch has been tested on PocketBeagle 2. Signed-off-by: Ayush Singh <ayush@beagleboard.org>
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