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UPSTREAM: am62l_evm: am62l3: a53: add TI AM335x ADC support. #36

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UPSTREAM: am62l_evm: am62l3: a53: add TI AM335x ADC support. #36

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17cd42f
UPSTREAM: soc: ti: k3: am6x: update NUM_IRQ for A53
natto1784 Mar 23, 2026
2d2d581
UPSTREAM: am62l_evm: am62l3: a53: add TI AM335x ADC node
natto1784 Mar 23, 2026
d5daafc
UPSTREAM: samples: drivers: adc_dt: Add overlay for AM62Lx EVM
natto1784 Mar 23, 2026
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8 changes: 8 additions & 0 deletions boards/ti/am62l_evm/am62l_evm_am62l3_a53-pinctrl.dtsi
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Expand Up @@ -192,4 +192,12 @@
main_i2c1_sda: i2c1_sda_default {
pinmux = <K3_PINMUX(0x01d8, PIN_INPUT_PULLUP, MUX_MODE_0)>; /* (A6) I2C1_SDA */
};

adc0_ext_trigger0: adc0-ext-trigger0-default {
pinmux = <K3_PINMUX(0x1e4, PIN_INPUT, MUX_MODE_9)>; /* (D16) ADC_EXT_TRIGGER0 */
};

adc0_ext_trigger1: adc0-ext-trigger1-default {
pinmux = <K3_PINMUX(0x0f0, PIN_INPUT, MUX_MODE_5)>; /* (M22) ADC_EXT_TRIGGER1 */
};
};
56 changes: 56 additions & 0 deletions boards/ti/am62l_evm/am62l_evm_am62l3_a53.dts
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Expand Up @@ -34,6 +34,10 @@
};
};

aliases {
adc0 = &main_adc0;
};

cpus {
cpu@0 {
status = "okay";
Expand Down Expand Up @@ -208,3 +212,55 @@
&main_rti0 {
status = "okay";
};

&main_adc0 {
ti,fifo = <0>;
pinctrl-0 = <&adc0_ext_trigger0>,
<&adc0_ext_trigger1>;
pinctrl-names = "default";
status = "okay";

channel@0 {
reg = <0>;
ti,open-delay = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_VDD_1";
zephyr,acquisition-time = <0>;
zephyr,resolution = <12>;
zephyr,oversampling = <4>;
zephyr,vref-mv = <1800>;
};

channel@1 {
reg = <1>;
ti,open-delay = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_VDD_1";
zephyr,acquisition-time = <0>;
zephyr,resolution = <12>;
zephyr,oversampling = <4>;
zephyr,vref-mv = <1800>;
};

channel@2 {
reg = <2>;
ti,open-delay = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_VDD_1";
zephyr,acquisition-time = <0>;
zephyr,resolution = <12>;
zephyr,oversampling = <4>;
zephyr,vref-mv = <1800>;
};

channel@3 {
reg = <3>;
ti,open-delay = <0>;
zephyr,gain = "ADC_GAIN_1";
zephyr,reference = "ADC_REF_VDD_1";
zephyr,acquisition-time = <0>;
zephyr,resolution = <12>;
zephyr,oversampling = <4>;
zephyr,vref-mv = <1800>;
};
};
1 change: 1 addition & 0 deletions boards/ti/am62l_evm/am62l_evm_am62l3_a53.yaml
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Expand Up @@ -7,6 +7,7 @@ toolchain:
- cross-compile
ram: 2048
supported:
- adc
- uart
testing:
ignore_tags:
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5 changes: 5 additions & 0 deletions dts/arm64/ti/am62l3_a53.dtsi
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Expand Up @@ -236,3 +236,8 @@
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&gic>;
};

&main_adc0 {
interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&gic>;
};
11 changes: 11 additions & 0 deletions dts/vendor/ti/am62l-main.dtsi
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Expand Up @@ -507,4 +507,15 @@
power-domains = <&main_timer3_pd>;
status = "disabled";
};

main_adc0: adc@28001000 {
compatible = "ti,am335x-adc";
reg = <0x28001000 DT_SIZE_K(1)>;
status = "disabled";
power-domains = <&main_adc0_pd>;
clocks = <&scmi_clk 4>;
#io-channel-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
};
6 changes: 6 additions & 0 deletions dts/vendor/ti/am62l_power_domains.dtsi
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Expand Up @@ -8,6 +8,12 @@
#address-cells = <1>;
#size-cells = <0>;

main_adc0_pd: power-domain@0 {
compatible = "arm,scmi-power-domain";
reg = <0>;
#power-domain-cells = <0>;
};

main_uart0_pd: power-domain@59 {
compatible = "arm,scmi-power-domain";
reg = <89>;
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11 changes: 11 additions & 0 deletions samples/drivers/adc/adc_dt/boards/am62l_evm_am62l3_a53.overlay
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@@ -0,0 +1,11 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2026 Texas Instruments
*/

/ {
zephyr,user {
io-channels = <&main_adc0 0>, <&main_adc0 1>, <&main_adc0 2>, <&main_adc0 3>;
};
};
2 changes: 1 addition & 1 deletion soc/ti/k3/am6x/Kconfig.defconfig
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Expand Up @@ -17,7 +17,7 @@ config FLASH_BASE_ADDRESS

config NUM_IRQS
default 64 if SOC_SERIES_AM6X_M4
default 280 if SOC_SERIES_AM6X_A53
default 992 if SOC_SERIES_AM6X_A53
default 512 if SOC_SERIES_AM6X_R5

config SYS_CLOCK_HW_CYCLES_PER_SEC
Expand Down
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