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Fix/qdma partial transfer#148

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amd-vserbu wants to merge 3 commits into
Xilinx:devfrom
amd-vserbu:fix/qdma-partial-transfer
Open

Fix/qdma partial transfer#148
amd-vserbu wants to merge 3 commits into
Xilinx:devfrom
amd-vserbu:fix/qdma-partial-transfer

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@amd-vserbu

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Summary

Fix QDMA exact-length transfers by clipping the final scatter-gather entry per transfer instead of requiring callers to pad all transfer lengths to 4 KiB page multiples.

  • Keep BUF_CREATE buffers page-multiple and keep the reusable per-buffer SGL unchanged.
  • Add a per-transfer clipped SGL path for requests whose byte count ends inside the final page, while preserving the existing cached-SGL fast path for page-multiple transfers.
  • Update the QDMA ABI documentation and UAPI comments to describe exact byte-count transfers, with a note that non-4 KiB-multiple transfers are not speed-optimized and should currently be reserved for PDI-style exact byte streams.
  • Add regression coverage for partial-length transfers in the driver kselftest and libslash wrapper tests.

Motivation

The design-writer path needs to send exact PDI byte counts. Padding a PDI stream with trailing zeroes is not something we should rely on as a general programming contract, but the QDMA ioctl previously documented page-multiple transfer lengths and effectively forced callers toward padding.

This change lets vrtd continue submitting the real PDI length while keeping normal application DMA buffers on the optimized 4 KiB-multiple path.

Draft

This PR is a draft now as it still needs to be tested on hardware.

Signed-off-by: Vlad-Gabriel Serbu <Vlad-Gabriel.Serbu@amd.com>
…e transfers

Signed-off-by: Vlad-Gabriel Serbu <Vlad-Gabriel.Serbu@amd.com>
@amd-vserbu amd-vserbu marked this pull request as draft July 6, 2026 09:10
Signed-off-by: Vlad-Gabriel Serbu <Vlad-Gabriel.Serbu@amd.com>
@JOOpdenhoevel

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I've tested the changes in hardware with the base design from commit 4c79427 (Gitlab CI pipeline 133074), and it works without issues.

@taraxacum45e9a

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Tested examples 00 and 02 on this branch with the base design built from 4c79427. Both examples run successfully on hardware.

@amd-vserbu amd-vserbu marked this pull request as ready for review July 8, 2026 13:42
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3 participants