Add basic riscv64 architecture support#370
Draft
vhaudiquet wants to merge 5 commits into
Draft
Conversation
Scoped nvidia-smi part to amd64/arm64, with wrapper error message on riscv64
Member
|
This is a great addition, @vhaudiquet. Would you mind adding this to https://github.com/canonical/lscompute? We've moved the hardware_info package to a separate module and will just be referencing it here. We could merge and migrate it ourselves, but it would be better if it were authored by you directly. |
Author
|
Sure! That works for me. Should I close this then? EDIT: Ah, maybe we need to keep the modification to snapcraft.yaml here. I can remove the other modifications and send them to lscompute |
Member
|
I suggest focusing on the "lscompute" snap that is on the other side. We can then add anything that's useful to stack-utils. The stack-utils snap is only used for dev testing. Thank you! |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
This adds basic riscv64 architecture support.
It allows building the snap on riscv64, and then running basic commands:
The CPU detection shows available RISC-V ISA extensions, allowing for future riscv64 vector/matrix engine detection.
We can also run the engine selection code on test data: