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Fix RGBLINK scrambling algorithm to work for SRAM#2023

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Rangi42 merged 2 commits into
gbdev:masterfrom
Rangi42:scramble-sram
Jul 14, 2026
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Fix RGBLINK scrambling algorithm to work for SRAM#2023
Rangi42 merged 2 commits into
gbdev:masterfrom
Rangi42:scramble-sram

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@Rangi42 Rangi42 commented Jul 13, 2026

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Since SRAM sections start from 0, we had been using a signed int8_t curScrambleSRAM counter to allow 0 as a scrambled bank, but this actually just placed all floating SRAM sections in bank 0.

The region spec size is now explicitly documented as a count of banks, not as a maximum bank value. This does not actually change its behavior for ROMX or WRAMX, and is not a breaking change, since scrambling had not placed any guarantees on where sections get placed. (In practice it does predictably place them from the highest to lowest bank, just as the regular placement algorithm is also predictable, and some of our test cases rely on it; but it's always been an implementation detail, and has changed before.)

@Rangi42 Rangi42 added this to the 1.0.2 milestone Jul 13, 2026
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Rangi42 requested a review from ISSOtm July 13, 2026 16:32
@Rangi42 Rangi42 added bug Unexpected behavior / crashes; to be fixed ASAP! rgblink This affects RGBLINK labels Jul 13, 2026
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Rangi42 commented Jul 13, 2026

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The scramble-specs test case's section bank dbs start at 0000c000 (i.e. ROMX bank 3) in the ROM output. They demonstrate that all three section types have working "count down from N, then underflow and repeat" behavior.

$ xxd test/link/scramble-specs/out.gb
00000000: 0000 0000 0000 0000 0000 0000 0000 0000  ................
...
00003ff0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00004000: 0404 0404 0404 0404 0404 0404 0404 0404  ................
...
00005ff0: 0404 0404 0404 0404 0404 0404 0404 0404  ................
00006000: 0202 0202 0202 0202 0202 0202 0202 0202  ................
...
00007ff0: 0202 0202 0202 0202 0202 0202 0202 0202  ................
00008000: 0505 0505 0505 0505 0505 0505 0505 0505  ................
...
00009ff0: 0505 0505 0505 0505 0505 0505 0505 0505  ................
0000a000: 0303 0303 0303 0303 0303 0303 0303 0303  ................
...
0000bff0: 0303 0303 0303 0303 0303 0303 0303 0303  ................
0000c000: 0401 0201 0203 0304 0102 0304 0203 0001  ................
0000c010: 0203 ffff ffff ffff ffff ffff ffff ffff  ................
0000c020: ffff ffff ffff ffff ffff ffff ffff ffff  ................
...
0000cff0: ffff ffff ffff ffff ffff ffff ffff ffff  ................
0000d000: 0606 0606 0606 0606 0606 0606 0606 0606  ................
...
0000eff0: 0606 0606 0606 0606 0606 0606 0606 0606  ................
0000f000: 0000 0000 0000 0000 0000 0000 0000 0000  ................
...
0000fff0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
00010000: 0101 0101 0101 0101 0101 0101 0101 0101  ................
...
00011ff0: 0101 0101 0101 0101 0101 0101 0101 0101  ................
00012000: 0000 0000 0000 0000 0000 0000 0000 0000  ................
...
00013ff0: 0000 0000 0000 0000 0000 0000 0000 0000  ................

Rangi42 added 2 commits July 13, 2026 21:54
Since SRAM sections start from 0, we had been using a signed
`int8_t curScrambleSRAM` counter to allow 0 as a scrambled bank,
but this actually just placed all floating SRAM sections in bank 0.
@Rangi42
Rangi42 merged commit 5869e0d into gbdev:master Jul 14, 2026
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@Rangi42
Rangi42 deleted the scramble-sram branch July 14, 2026 02:39
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bug Unexpected behavior / crashes; to be fixed ASAP! rgblink This affects RGBLINK

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