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It seems that with NX devices, simply sending LSC_REFRESH is not enough to reboot the FPGA (it stays in a blank state). With trial and error, I found out that doing a no-op (with 0xFF) after LSC_REFRESH seems to be enough to actually trigger the refresh. Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
During my tests with the CertusPro-NX evaluation board, I found that the current program command doesn't work reliably: the JTAG usually doesn't have access to the flash (reports an ID full of zeroes, and the operations don't work). I noticed that in contrast, the test operation always reported correct flash IDs, so using the usleep() calls in between the JTAG commands seems to help getting the flash command to work reliably. Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
It seems that using the current SRAM programming sequence on an already programmed NX FPGA leaves the on-chip memories un-initialized. The Radiant programmer sends an LSC_REFRESH command before the SRAM programming sequence, and it does seem to help, so do it here as well. Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
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Thanks! I'll confirm the ECP5 still operates correctly, the diff looks like ECP5 should be fine. |
Author
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Hello, As a follow-up for this, I recently tested ecpprog with these changes on an ECP5 board: it seems to be working OK. |
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While testing this great tool on the CrossLink-NX VVML and CertusPro-NX Evaluation boards, I had to make some tweaks in order to get the flash and SRAM programming and the reboot command working reliably.
I explained in more details in each commit message. Unfortunately I don't have access to ECP5 boards in order to check that I didn't break anything!