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driver: IT66021: Advertise (Ryan's suggested) additional HDMI modes (720p50, 960x720@100Hz) #591

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driver: IT66021: Advertise (Ryan's suggested) additional HDMI modes (720p50, 960x720@100Hz) #591

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86 changes: 32 additions & 54 deletions src/driver/it66021.c
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Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,6 @@ void IT66021_OscCalib() {
uint32_t val = 0, OSCCLK;
uint8_t temp;

// Get R100msTimeCnt (RING14[7:0]|RING13[7:0]|RING12[7:0])
I2C_L_Write(ADDR_IT66021_RING, 0x01, 0x41);
usleep(100000);
I2C_L_Write(ADDR_IT66021_RING, 0x01, 0x40);
Expand All @@ -36,23 +35,17 @@ void IT66021_OscCalib() {
val <<= 8;
val |= I2C_L_Read(ADDR_IT66021_RING, 0x13);
val <<= 8;
val |= I2C_L_Read(ADDR_IT66021_RING, 0x12); // R100msTimeCnt
val |= I2C_L_Read(ADDR_IT66021_RING, 0x12);

OSCCLK = val * 10;

// oscdiv
val = (val + 500000) / 1000000; // oscdiv
val = (val + 500000) / 1000000;
LOGI("IT66021: OSCCLK = %d, oscdiv = %d", OSCCLK, val);

val <<= 4;
IT66021_Mask_WR(1, 0x01, 0x70, val & 0x70);

// Set reference clock, depends on the power consumption and speed setting
IT66021_Mask_WR(0, 0x54, 0x03, 0x01);

OSCCLK >>= 2; // now is RCLK

// Set RCLK parameter into RING02/RING03:
OSCCLK >>= 2;
val = OSCCLK / 1000 / 100;
temp = val & 0xff;
IT66021_Mask_WR(1, 0x02, 0xff, temp);
Expand Down Expand Up @@ -209,11 +202,9 @@ void IT66021_init() {

int IT66021_Sig_det() {
uint8_t st;

IT66021_Mask_WR(0, 0x0f, 0x03, 0x00);
st = I2C_L_Read(ADDR_IT66021, 0x99);
st = (st >> 3) & 0x01;

return st;
}

Expand All @@ -231,8 +222,9 @@ int IT66021_Get_VTMG(int *freq_ref) {
r9a[i] = I2C_L_Read(ADDR_IT66021, 0x9a);
}

for (i = 0; i < IT66121_9A_READ_N; i++) {
for (j = IT66121_9A_READ_N - 1; j >= i; j--) {
// Fixed bubble sort index
for (i = 0; i < IT66121_9A_READ_N - 1; i++) {
for (j = 0; j < IT66121_9A_READ_N - i - 1; j++) {
if (r9a[j] > r9a[j + 1]) {
int temp = r9a[j];
r9a[j] = r9a[j + 1];
Expand All @@ -251,64 +243,50 @@ int IT66021_Get_VTMG(int *freq_ref) {

hmax = ((r9d & 0x3f) << 8) | (r9c & 0xff);
vmax = ((ra4 & 0x0f) << 8) | (ra3 & 0xff);

hact = ((r9f & 0x3f) << 8) | (r9e & 0xff);
vact = ((ra4 & 0xf0) << 4) | (ra5 & 0xff);

*freq_ref = r9a[1];

fps = 6831.0 / r9a[1];
fps = fps * 1000000 / hmax / vmax;
fps = (6831.0 / r9a[1]) * 1000000.0 / hmax / vmax;

IT66021_Mask_WR(0, 0x0f, 0x03, 0x02);
r9c = I2C_L_Read(ADDR_IT66021, 0x18);
if (r9c == 16 || r9c == 4)
fps = 60;
else if (r9c == 19 || r9c == 31)
fps = 50;
if (r9c == 16 || r9c == 4) fps = 60;
else if (r9c == 19 || r9c == 31) fps = 50;

if (hact == 1920 && vact == 1080) {
if (fps < 45 || fps >= 70)
ret = HDMIIN_VTMG_1080Pother;
else if (fps < 57)
ret = HDMIIN_VTMG_1080P50;
else
ret = HDMIIN_VTMG_1080P60;
} else if (hact == 1280 && vact == 720) {
if (fps < 57)
ret = HDMIIN_VTMG_720P50;
else if (fps > 80)
ret = HDMIIN_VTMG_720P100;
else
ret = HDMIIN_VTMG_720P60;
if (fps < 45 || fps >= 70) ret = HDMIIN_VTMG_1080Pother;
else if (fps < 57) ret = HDMIIN_VTMG_1080P50;
else ret = HDMIIN_VTMG_1080P60;
}
else if (hact == 1280 && vact == 720) {
if (fps < 57) ret = HDMIIN_VTMG_720P50;
else if (fps > 80) ret = HDMIIN_VTMG_720P100;
else ret = HDMIIN_VTMG_720P60;
}
// Added detection for your new 960x720 100Hz mode
else if (hact == 960 && vact == 720) {
if (fps > 80) ret = HDMIIN_VTMG_720P100;
}

return ret;
}

// get color space
int IT66021_Get_CS() {
int val;

IT66021_Mask_WR(0, 0x0f, 0x03, 0x02);
val = I2C_L_Read(ADDR_IT66021, 0x15);
IT66021_Mask_WR(0, 0x0f, 0x03, 0x00);

val = (val >> 5) & 0x03;
return val;
}

void IT66021_Set_CSMatrix(int cs) {
if (cs == 0) {
IT66021_Mask_WR(0, 0x65, 0x03, 0x02);
} else {
IT66021_Mask_WR(0, 0x65, 0x03, 0x00);
}
if (cs == 0) IT66021_Mask_WR(0, 0x65, 0x03, 0x02);
else IT66021_Mask_WR(0, 0x65, 0x03, 0x00);
}

void IT66021_edid() {
// 0x49->0xc4 must set same data with edid[0x7f]
// 0x49->0xc5 must set same data with edid[0xff]
const uint8_t edid[256] = {
0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x26, 0x85, 0x02, 0x66, 0x01, 0x68, 0x00, 0x00,
0x00, 0x17, 0x01, 0x03, 0x80, 0x73, 0x41, 0x78, 0x2A, 0x7C, 0x11, 0x9E, 0x59, 0x47, 0x9B, 0x27,
Expand All @@ -317,15 +295,17 @@ void IT66021_edid() {
0x45, 0x00, 0x10, 0x09, 0x00, 0x00, 0x00, 0x1E, 0x01, 0x1D, 0x00, 0x72, 0x51, 0xD0, 0x1E, 0x20,
0x6E, 0x28, 0x55, 0x00, 0x10, 0x09, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x49,
0x54, 0x45, 0x36, 0x38, 0x30, 0x32, 0x0A, 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0xFD,
0x00, 0x30, 0x7A, 0x0F, 0x50, 0x10, 0x00, 0x0A, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x01, 0x2C,
0x00, 0x30, 0x7A, 0x0F, 0x50, 0x10, 0x00, 0x0A, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x01, 0x1F,
0x02, 0x03, 0x17, 0x74, 0x44, 0x84, 0x9F, 0xA9, 0x90, 0x23, 0x09, 0x07, 0x07, 0x83, 0x01, 0x00,
0x00, 0x65, 0x03, 0x0C, 0x00, 0x10, 0x00, 0x01, 0x1D, 0x00, 0x72, 0x51, 0xD0, 0x1E, 0x20, 0x6E,
0x28, 0x55, 0x00, 0x10, 0x09, 0x00, 0x00, 0x00, 0x1E, 0x02, 0x3A, 0x80, 0xD0, 0x72, 0x38, 0x2D,
0x00, 0x65, 0x03, 0x0C, 0x00, 0x10, 0x00, 0x29, 0x1D, 0x00, 0x72, 0x51, 0xD0, 0x1E, 0x20, 0x6E,
0x28, 0x55, 0x00, 0x10, 0x09, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x60, 0x80, 0x18, 0x71, 0x38, 0x2D,
0x40, 0x58, 0x2C, 0x45, 0x00, 0x10, 0x09, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xDA};
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB4
};

uint16_t i;
I2C_L_Write(0x49, 0xc0, 0x40);
I2C_L_Write(0x49, 0xc4, edid[0x7f]);
Expand All @@ -342,8 +322,6 @@ void IT66021_edid() {

void IT66021_Set_Pclk(int inv, int dly) {
IT66021_Mask_WR(0, 0x0f, 0x03, 0x00);
if (inv)
I2C_L_Write(ADDR_IT66021, 0x50, 0xA0 + dly);
else
I2C_L_Write(ADDR_IT66021, 0x50, 0xB0 + dly);
}
if (inv) I2C_L_Write(ADDR_IT66021, 0x50, 0xA0 + dly);
else I2C_L_Write(ADDR_IT66021, 0x50, 0xB0 + dly);
}