A from-scratch embedded ecosystem for the HiSilicon WS63 (Wi-Fi 6 + BLE + SLE/NearLink)
and BS2X / BS21 (BLE 5.4 + SLE, no Wi-Fi) RISC-V chips: peripheral-access crates, a safe
HAL, a runtime, a custom Rust toolchain, full-system QEMU machine models, probe-rs
debug support, and vendor-SDK forks — all built and CI-tested entirely in emulation.
ws63-svd / bs2x-svd (CMSIS-SVD register descriptions)
│ svd2rust
▼
ws63-pac / bs2x-pac (peripheral-access crates: raw RegisterBlocks)
│
▼
hisi-riscv-hal (safe embedded-hal 1.0 drivers + async/embassy)
│
hisi-riscv-rt ────┤ (startup, linker scripts, interrupt vectors)
▼
ws63-examples (blinky, uart_hello, dma, spi, i2c, embassy, net_ping, …)
│ cargo build (riscv32imfc, custom `ws63` toolchain)
▼
hisi-riscv-qemu ◀── runs the firmware with no board: -M ws63 / -M bs21 / -M bs22 / -M bs20
probe-rs (fork) ◀── on-chip debugging (RISC-V Debug Module behind a CoreSight DAP)
| Repo | What it is |
|---|---|
| hisi-riscv-rs | The monorepo — aggregates the whole stack as submodules + docs + ROADMAP |
| ws63-pac · bs2x-pac | svd2rust-generated peripheral-access crates |
| ws63-svd · bs2x-svd | CMSIS-SVD sources (the PAC generation inputs) |
| hisi-riscv-hal | Hand-written safe HAL — GPIO/UART/SPI/I2C/DMA/timers/… + async/embassy |
| hisi-riscv-rt | Runtime: startup assembly, linker scripts, interrupt vectors |
| hisi-riscv-qemu | QEMU machine models (-M ws63/bs21/bs22/bs20) — runs the firmware without silicon |
| ws63-rust-toolchain | Stable rustc with the riscv32imfc-unknown-none-elf target baked in as a builtin |
| riscv32-ws63-gcc730-toolchain | GCC 7.3.0 cross-toolchain for the WS63 |
| ws63-examples | Example applications |
| ws63-guide · bs2x-guide | Chip user guides (Sphinx) |
| probe-rs | Fork adding WS63 debug support (mem-AP DTM, vendor DebugSequence, flash algorithm) |
| hisiflash | Firmware flashing tool |
| fbb_ws63-qemu · fbb_bs2x-qemu | QEMU-runnable forks of the vendor C SDKs |
- ✅ Full QEMU bring-up —
blinky+uart_helloand the whole peripheral set boot and self-validate on-M ws63and on the BS2X family (-M bs21 / bs22 / bs20). - ✅ BS2X multi-chip — BS21/BS22/BS20 machines; every functional peripheral (SPI, GADC, I²C, KEYSCAN, QDEC, RTC, TRNG, WDT, DMA, PDM, USB) exercised on QEMU.
- ✅ probe-rs WS63 support (software-complete) — RISC-V-over-CoreSight DTM, vendor debug sequence, and a flash-algorithm crate; pending on-silicon validation.
- 🟡 Hardware-in-the-loop — scaffolding ready; awaiting a board to validate clock/timing.
- 🔴 Connectivity (Wi-Fi / BLE / SLE) — the north star; deferred behind HIL (the radio is a closed analog/PHY blob — see the connectivity-feasibility notes).
git clone --recursive https://github.com/hispark-rs/hisi-riscv-rs
cd hisi-riscv-rs
# install the custom toolchain (see ws63-rust-toolchain), then:
cargo build # libraries + blinky for riscv32imfc
# run it with no hardware (see hisi-riscv-qemu):
qemu-system-riscv32 -M ws63 -nographic -kernel target/.../uart_helloReverse-engineered from the public HiSilicon
fbb_ws63 / fbb_bs2x SDKs. Not affiliated with HiSilicon.