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Pull requests: lnis-uofu/OpenFPGA

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Pull requests list

Bump vtr-verilog-to-routing from 33c2900 to 2b18fef dependencies Pull requests that update a dependency file submodules Pull requests that update Submodules code
#2421 opened Mar 16, 2026 by dependabot bot Loading…
[WIP] Remapping Bitstream architecture-description documentation flow-scripts openfpga-bitstream openfpga-tools tests
#2414 opened Mar 6, 2026 by ganeshgore • Draft
@amin1377
2
Combine routing modules with --group_routing argument architecture-description documentation flow-scripts openfpga-bitstream openfpga-tools openfpga-verilog tests
#2410 opened Mar 4, 2026 by ganeshgore Loading…
@ganeshgore @saaramahmoudi @amin1377
Refactored and documented GSB file format and writer code architecture-description documentation flow-scripts openfpga-tools tests VPR
#2408 opened Mar 4, 2026 by ganeshgore Loading…
@saaramahmoudi @amin1377
15
Sort OPIN connections to the driver node documentation flow-scripts openfpga-tools tests
#2407 opened Mar 3, 2026 by ganeshgore Loading…
@saaramahmoudi @amin1377
1
Pcf segment followup documentation tests VPR
#2401 opened Feb 28, 2026 by treelin611 Loading…
3
Bump yosys from 407d425 to 679156d dependencies Pull requests that update a dependency file submodules Pull requests that update Submodules code
#2392 opened Feb 20, 2026 by dependabot bot Loading…
[openfpga][utils] Introduce RRGraphInEdges and RRGSBEdges; move OpenFPGA-specific edge functions out of RRGSB openfpga-bitstream openfpga-sdc openfpga-spice openfpga-tools openfpga-verilog tests VPR
#2389 opened Feb 18, 2026 by amin1377 Loading…
25
patch to support split reverse tests VPR
#2376 opened Feb 12, 2026 by treelin611 Loading…
Reordering Edges openfpga-bitstream openfpga-tools
#2308 opened Jan 9, 2026 by amin1377 Loading…
7
[fabric_bitstream] Adding custom bitstream remap openfpga-bitstream openfpga-tools
#2022 opened Jun 4, 2025 by amin1377 Loading…
4
Use hierarchical block names openfpga-tools VPR wontfix This will not be worked on
#1976 opened Apr 7, 2025 by amin1377 Loading…
Add command to generate repack design constraints openfpga-tools
#1889 opened Nov 6, 2024 by fkosar-ql • Draft
@amin1377
8
Add behavior to handle unmapped muxes without constant inputs better documentation openfpga-bitstream openfpga-tools
#1869 opened Oct 17, 2024 by fkosar-ql Loading…
25
Make sure net is valid before setting it as wire LUT output openfpga-tools
#1719 opened Jun 19, 2024 by chungshien Loading…
7
Preserve escaped names openfpga-tools openfpga-verilog
#1589 opened Mar 4, 2024 by alaindargelas Loading…
3
Update FindTBB.cmake
#1238 opened Jun 27, 2023 by yppah56 Loading…
Update FindTBB.cmake
#1161 opened May 10, 2023 by zaidtahirbutt Loading…
2
Arch exploration architecture-description benchmarks cell-library flow-scripts tests
#448 opened Dec 16, 2021 by apond308 • Draft
Timing annotation architecture-description benchmarks flow-scripts tests
#362 opened Jul 22, 2021 by apond308 Loading…
12
Vexriscv BRAM support benchmarks flow-scripts tests
#352 opened Jul 1, 2021 by apond308 Loading…
7
Relative paths in run_modelsim.py and other changes to make Modelsim work on non-Utah machines architecture-description flow-scripts
#247 opened Feb 20, 2021 by nachiket Loading…
3 of 16 tasks
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