A fully implemented CPU capable of executing various instruction types, including i-type, r-type, and j-type instructions, each encoded within a 16-bit format. The CPU efficiently performs functions such as loading words (load word) and storing words (store word), effectively managing data within its memory subsystem. Through meticulous design and implementation, the CPU seamlessly integrates these functionalities, enabling robust execution of complex programs and operations.
| Instruction | op | rd | rs | rt / immediate | Value |
| ADDI R3,R0,5 | 4 | 3 | 0 | 5 | 5 |
| SLT R4,R3,R4 | 7 | b | 3 | 4 | 0 |
| SW R3, 0(R0) | c | 3 | 0 | 0 | 5 |
| LW R7, 0(R6) | 8 | 7 | 6 | 0 | 2 |
| SUBI R10, R5, 7 | 5 | a | 5 | 7 | 0 |
