Topic/rb3gen2 iabu

arch/arm64/boot/dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso

@@ -7,6 +7,95 @@
 /plugin/;
 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/sound/qcom,q6afe.h>
+
+&{/} {
+	wcd9370: audio-codec-0 {
+		compatible = "qcom,wcd9370-codec";
+
+		pinctrl-0 = <&wcd_default>;
+		pinctrl-names = "default";
+
+		reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>;
+		qcom,always-on-supply;
+		qcom,micbias1-microvolt = <1800000>;
+		qcom,micbias2-microvolt = <1800000>;
+		qcom,micbias3-microvolt = <1800000>;
+		qcom,micbias4-microvolt = <1800000>;
+		qcom,hphl-jack-type-normally-closed = <1>;
+		qcom,ground-jack-type-normally-closed = <1>;
+		qcom,rx-device = <&wcd937x_rx>;
+		qcom,tx-device = <&wcd937x_tx>;
+
+		#sound-dai-cells = <1>;
+	};
+};
+
+&tlmm {
+        wcd_default: wcd-reset-n-active-state {
+                pins = "gpio83";
+                function = "gpio";
+                drive-strength = <16>;
+                bias-disable;
+        };
+};
+
+&swr0 {
+	status = "okay";
+
+	wcd937x_rx: codec@0,4 {
+	compatible = "sdw20217010a00";
+	reg = <0 4>;
+
+	/*
+	* WCD9370 RX Port 1 (HPH_L/R)       <==>    SWR1 Port 1 (HPH_L/R)
+	* WCD9370 RX Port 2 (CLSH)          <==>    SWR1 Port 2 (CLSH)
+	* WCD9370 RX Port 3 (COMP_L/R)      <==>    SWR1 Port 3 (COMP_L/R)
+	* WCD9370 RX Port 4 (LO)            <==>    SWR1 Port 4 (LO)
+	* WCD9370 RX Port 5 (DSD_L/R)       <==>    SWR1 Port 5 (DSD)
+	*/
+	qcom,rx-port-mapping = <1 2 3 4 5>;
+
+	/*
+	* Static channels mapping between slave and master rx port channels.
+	* In the order of slave port channels, which is
+	* hph_l, hph_r, clsh, comp_l, comp_r, lo, dsd_r, dsd_l.
+	*/
+	qcom,rx-channel-mapping = /bits/ 8 <1 2 1 1 2 1 1 2>;
+	};
+};
+
+&swr1 {
+	status = "okay";
+	wcd937x_tx: codec@0,3 {
+	compatible = "sdw20217010a00";
+	reg = <0 3>;
+
+	/*
+	* WCD9370 TX Port 1 (ADC1)               <=> SWR2 Port 2
+	* WCD9370 TX Port 2 (ADC2, 3)            <=> SWR2 Port 2
+	* WCD9370 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3
+	* WCD9370 TX Port 4 (DMIC4,5,6,7)        <=> SWR2 Port 4
+	*/
+	qcom,tx-port-mapping = <1 1 2 3>;
+
+	/*
+	* Static channel mapping between slave and master tx port channels.
+	* In the order of slave port channels which is adc1, adc2, adc3,
+	* mic0, dmic1, mbhc, dmic2, dmic3, dmci4, dmic5, dmic6, dmic7.
+	*/
+	qcom,tx-channel-mapping = /bits/ 8 <1 2 1 1 2 3 3 4 1 2 3 4>;
+	};
+};
+
+&lpass_tx_macro {
+	status = "okay";
+};
+
+&lpass_rx_macro {
+	status = "okay";
+};
 
 &spi11 {
 	#address-cells = <1>;
@@ -19,3 +108,49 @@
 		spi-max-frequency = <20000000>;
 	};
 };
+
+&sound {
+	model = "qcs6490-rb3gen2-ia-snd-card";
+	audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
+		"SpkrRight IN", "WSA_SPK2 OUT",
+		"IN1_HPHL", "HPHL_OUT",
+		"IN2_HPHR", "HPHR_OUT",
+		"AMIC2", "MIC BIAS2",
+		"TX SWR_ADC1", "ADC2_OUTPUT",
+		"VA DMIC0", "vdd-micb",
+		"VA DMIC1", "vdd-micb",
+		"VA DMIC2", "vdd-micb",
+		"VA DMIC3", "vdd-micb";
+
+	wcd-playback-dai-link {
+		link-name = "WCD Playback";
+
+		codec {
+			sound-dai = <&wcd9370 0>, <&swr0 0>, <&lpass_rx_macro 0>;
+		};
+
+		cpu {
+			sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
+		};
+
+		platform {
+			sound-dai = <&q6apm>;
+		};
+	};
+
+	wcd-capture-dai-link {
+		link-name = "WCD Capture";
+
+		codec {
+			sound-dai = <&wcd9370 1>, <&swr1 0>, <&lpass_tx_macro 0>;
+		};
+
+		cpu {
+			sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
+		};
+
+		platform {
+			sound-dai = <&q6apm>;
+		};
+	};
+};

sound/soc/qcom/Kconfig

@@ -230,6 +230,7 @@ config SND_SOC_SC7280
 	select SND_SOC_LPASS_SC7280
 	select SND_SOC_MAX98357A
 	select SND_SOC_WCD938X_SDW
+	select SND_SOC_WCD937X_SDW
 	select SND_SOC_LPASS_MACRO_COMMON
 	imply SND_SOC_LPASS_RX_MACRO
 	imply SND_SOC_LPASS_TX_MACRO

sound/soc/qcom/sc8280xp.c

@@ -127,7 +127,7 @@ static void sc8280xp_add_be_ops(struct snd_soc_card *card)
 	int i;
 
 	for_each_card_prelinks(card, i, link) {
-		if (link->no_pcm == 1) {
+		if (link->no_pcm == 1 || link->num_codecs) {
 			link->init = sc8280xp_snd_init;
 			link->be_hw_params_fixup = sc8280xp_be_hw_params_fixup;
 			link->ops = &sc8280xp_be_ops;