fix(vivado): property usage for simulation files - #550
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Closes #474
Based on @rbrglez hard-work from this PR #475
I have updated Vivado tests. Original commit with @rbrglez as co-author is preserved.
Additionally, I have fixed another issue. When adding Verilog/SystemVerilog header file/include directory with the simulation tag, the property was set on non-existing path because header file/include directory was not added. I have moved the whole logic inside the
if not self._add_include_dir():block. Now, it is also working for Verilog/SystemVerilog header files/include directories when thesimulationtag was set.