Bump common_cells to v2

Bender.lock

@@ -1,30 +1,30 @@
 packages:
   apb:
-    revision: 77ddf073f194d44b9119949d2421be59789e69ae
-    version: 0.2.4
+    revision: c36e398b5e9b02f3a5fb1511be02764c94e1c413
+    version: null
     source:
       Git: https://github.com/pulp-platform/apb.git
     dependencies:
     - common_cells
   axi:
-    revision: a256a3b86394fedf19e361047fccfdd7f6ef83e4
-    version: 0.39.9
+    revision: 9ccb07756ab579344a7ad9105a17707bc4bc9855
+    version: null
     source:
       Git: https://github.com/pulp-platform/axi.git
     dependencies:
     - common_cells
     - common_verification
     - tech_cells_generic
   axi_stream:
-    revision: 54891ff40455ca94a37641b9da4604647878cc07
-    version: 0.1.1
+    revision: 180250023ba50ecb7da13e4ff232bf0abad8c1d5
+    version: null
     source:
       Git: https://github.com/pulp-platform/axi_stream.git
     dependencies:
     - common_cells
   common_cells:
-    revision: 9ca8a7655f741e7dd5736669a20a301325194c28
-    version: 1.39.0
+    revision: f45fafdf7262148b7984c511553a970a7a074076
+    version: null
     source:
       Git: https://github.com/pulp-platform/common_cells.git
     dependencies:
@@ -37,16 +37,16 @@ packages:
       Git: https://github.com/pulp-platform/common_verification.git
     dependencies: []
   obi:
-    revision: 0155fc34e900c7c884e081c0a1114a247937ff69
-    version: 0.1.7
+    revision: ddeced68bf1d180750171384eed809628eb890c7
+    version: null
     source:
       Git: https://github.com/pulp-platform/obi.git
     dependencies:
     - common_cells
     - common_verification
   register_interface:
-    revision: d6e1d4cdaab7870f4faf3f88a1c788eaf5ac129d
-    version: 0.4.7
+    revision: f04dc815b72e32ae483b2abafcb87a8f4b6c37e7
+    version: null
     source:
       Git: https://github.com/pulp-platform/register_interface.git
     dependencies:

Bender.yml

@@ -14,13 +14,13 @@ package:
     - "Axel Vanoni <axvanoni@ethz.ch>"
 
 dependencies:
-  axi:                 { git: "https://github.com/pulp-platform/axi.git",                 version: 0.39.1 }
-  axi_stream:          { git: "https://github.com/pulp-platform/axi_stream.git",          version: 0.1.1  }
-  common_cells:        { git: "https://github.com/pulp-platform/common_cells.git",        version: 1.33.0 }
-  common_verification: { git: "https://github.com/pulp-platform/common_verification.git", version: 0.2.3  }
-  register_interface:  { git: "https://github.com/pulp-platform/register_interface.git",  version: 0.4.3  }
-  apb:                 { git: "https://github.com/pulp-platform/apb.git",                 version: 0.2.4  }
-  obi:                 { git: "https://github.com/pulp-platform/obi.git",                 version: 0.1.2  }
+  axi:                 { git: "https://github.com/pulp-platform/axi.git",                 rev: common-cells-v2 }
+  axi_stream:          { git: "https://github.com/pulp-platform/axi_stream.git",          rev: common-cells-v2 }
+  common_cells:        { git: "https://github.com/pulp-platform/common_cells.git",        rev: v2-dev }
+  common_verification: { git: "https://github.com/pulp-platform/common_verification.git", version: 0.2.5  }
+  register_interface:  { git: "https://github.com/pulp-platform/register_interface.git",  rev: common-cells-v2 }
+  apb:                 { git: "https://github.com/pulp-platform/apb.git",                 rev: common-cells-v2 }
+  obi:                 { git: "https://github.com/pulp-platform/obi.git",                 rev: common-cells-v2 }
 
 export_include_dirs:
   - src/include

idma.mk

@@ -42,6 +42,7 @@ IDMA_FE_IDS      := $(IDMA_BASE_FE_IDS) $(IDMA_ADD_FE_IDS)
 IDMA_ROOT     ?= $(shell $(BENDER) path idma)
 IDMA_UTIL_DIR := $(IDMA_ROOT)/util
 IDMA_RTL_DIR  := $(IDMA_ROOT)/target/rtl
+IDMA_HAL_DIR  := $(IDMA_ROOT)/target/hal
 
 # job file
 IDMA_JOBS_JSON := jobs/jobs.json
@@ -67,6 +68,7 @@ IDMA_VLOGAN_REL_PATHS    := | grep -v "ROOT=" | sed '3 i ROOT="../../.."'
 # All RTL files
 IDMA_INCLUDE_ALL :=
 IDMA_RTL_ALL     :=
+IDMA_HAL_ALL     :=
 IDMA_PICKLE_ALL  :=
 IDMA_TB_ALL      :=
 IDMA_WAVE_ALL    :=
@@ -159,6 +161,10 @@ regwidth = $(word 1,$(subst _, ,$1))
 dimension = $(word 2,$(subst _, ,$1))
 log2dimension = $(shell echo $$(( $$( echo "obase=2;$$(($(1)-1))" | bc | wc -c ) - 1 )) )
 
+# Shared SPDX license header (raw-header takes plain text; c-header gets the //-prefixed variant)
+IDMA_LICENSE   := Copyright 2026 ETH Zurich and University of Bologna.\nSolderpad Hardware License, Version 0.51, see LICENSE for details.\nSPDX-License-Identifier: SHL-0.51
+IDMA_C_HDR_LIC := // $(subst \n,\n// ,$(IDMA_LICENSE))\n
+
 $(IDMA_RTL_DIR)/idma_reg%d_reg_pkg.sv $(IDMA_RTL_DIR)/idma_reg%d_reg_top.sv $(IDMA_RTL_DIR)/idma_reg%d_addrmap_pkg.sv:
 	$(PEAKRDL) regblock $(IDMA_FE_DIR)/reg/idma_reg.rdl -o $(IDMA_RTL_DIR) \
 	  --default-reset arst_n --cpuif apb4-flat \
@@ -171,7 +177,7 @@ $(IDMA_RTL_DIR)/idma_reg%d_reg_pkg.sv $(IDMA_RTL_DIR)/idma_reg%d_reg_top.sv $(ID
 	  --format svpkg \
 	  -o $(IDMA_RTL_DIR)/idma_reg$*d_addrmap_pkg.sv \
 	  --base_name idma_reg$*d \
-	  --license_str="Copyright 2025 ETH Zurich and University of Bologna.\nSolderpad Hardware License, Version 0.51, see LICENSE for details.\nSPDX-License-Identifier: SHL-0.51" \
+	  --license_str="$(IDMA_LICENSE)" \
 	  -P SysAddrWidth=$(call regwidth,$*) \
 	  -P NumDims=$(call dimension,$*) \
 	  -P Log2NumDims=$(call log2dimension,$(call dimension,$*))
@@ -185,7 +191,23 @@ $(IDMA_RTL_DIR)/idma_desc64_reg_pkg.sv $(IDMA_RTL_DIR)/idma_desc64_reg_top.sv $(
 	  --format svpkg \
 	  -o $(IDMA_RTL_DIR)/idma_desc64_addrmap_pkg.sv \
 	  --base_name idma_desc64 \
-	  --license_str="Copyright 2025 ETH Zurich and University of Bologna.\nSolderpad Hardware License, Version 0.51, see LICENSE for details.\nSPDX-License-Identifier: SHL-0.51"
+	  --license_str="$(IDMA_LICENSE)"
+
+# SW HAL C headers
+$(IDMA_HAL_DIR)/regs/idma_reg%d_reg.h:
+	mkdir -p $(IDMA_HAL_DIR)/regs
+	$(PEAKRDL) c-header $(IDMA_FE_DIR)/reg/idma_reg.rdl -o $@ \
+	  -b ltoh --type-style hier --rename idma_reg$*d \
+	  -P SysAddrWidth=$(call regwidth,$*) \
+	  -P NumDims=$(call dimension,$*) \
+	  -P Log2NumDims=$(call log2dimension,$(call dimension,$*))
+	sed -i '1i$(IDMA_C_HDR_LIC)' $@
+
+$(IDMA_HAL_DIR)/regs/idma_desc64_reg.h:
+	mkdir -p $(IDMA_HAL_DIR)/regs
+	$(PEAKRDL) c-header $(IDMA_FE_DIR)/desc64/idma_desc64_reg.rdl -o $@ \
+	  -b ltoh --type-style hier --rename idma_desc64
+	sed -i '1i$(IDMA_C_HDR_LIC)' $@
 
 $(IDMA_RTL_DIR)/idma_%_top.sv: $(IDMA_GEN) $(IDMA_FE_DIR)/reg/tpl/idma_reg.sv.tpl
 	$(call idma_gen,reg_top,$(IDMA_FE_DIR)/reg/tpl/idma_reg.sv.tpl,,,$*,$@)
@@ -201,6 +223,7 @@ $(IDMA_HTML_DIR)/regs/idma_desc64_reg/index.html:
 
 idma_reg_clean:
 	rm -rf $(IDMA_HTML_DIR)/regs
+	rm -rf $(IDMA_HAL_DIR)/regs
 	rm -f  $(IDMA_RTL_DIR)/*_reg_top.sv
 	rm -f  $(IDMA_RTL_DIR)/*_reg_pkg.sv
 	rm -f  $(IDMA_RTL_DIR)/Bender.yml
@@ -211,6 +234,7 @@ IDMA_RTL_ALL     += $(foreach Y,$(IDMA_FE_REGS),$(IDMA_RTL_DIR)/idma_$Y_reg_pkg.
 IDMA_RTL_ALL     += $(foreach Y,$(IDMA_FE_REGS),$(IDMA_RTL_DIR)/idma_$Y_reg_top.sv)
 IDMA_RTL_ALL     += $(foreach Y,$(IDMA_FE_REGS),$(IDMA_RTL_DIR)/idma_$Y_addrmap_pkg.sv)
 IDMA_RTL_ALL     += $(foreach Y,$(IDMA_FE_REGS),$(IDMA_RTL_DIR)/idma_$Y_top.sv)
+IDMA_HAL_ALL     += $(foreach Y,$(IDMA_FE_REGS),$(IDMA_HAL_DIR)/regs/idma_$Y_reg.h)
 IDMA_RTL_DOC_ALL += $(foreach Y,$(IDMA_FE_REGS),$(IDMA_HTML_DIR)/regs/idma_$Y_reg/index.html)
 
 
@@ -476,14 +500,16 @@ idma_nuke: idma_clean idma_nonfree_clean
 # Phony Targets
 # --------------
 
-.PHONY: idma_all idma_doc_all idma_pickle_all idma_rtl_all idma_sim_all
+.PHONY: idma_all idma_doc_all idma_pickle_all idma_rtl_all idma_sim_all idma_hal_all
 
 idma_doc_all: idma_spinx_doc
 
 idma_pickle_all: $(IDMA_PICKLE_ALL)
 
 idma_hw_all: $(IDMA_FULL_RTL) $(IDMA_INCLUDE_ALL) $(IDMA_FULL_TB) $(IDMA_HJSON_ALL) $(IDMA_WAVE_ALL)
 
+idma_hal_all: $(IDMA_HAL_ALL)
+
 idma_sim_all: $(IDMA_VCS_DIR)/compile.sh $(IDMA_VSIM_DIR)/compile.tcl
 
-idma_all: idma_hw_all idma_sim_all idma_doc_all idma_pickle_all
+idma_all: idma_hw_all idma_hal_all idma_sim_all idma_doc_all idma_pickle_all

pyproject.toml

@@ -20,4 +20,5 @@ dependencies = [
     "pylint",
     "peakrdl>=1.5.0",
     "peakrdl-rawheader>=0.2.4",
+    "peakrdl-cheader>=1.0.0",
 ]

src/backend/idma_channel_coupler.sv

@@ -28,8 +28,6 @@ module idma_channel_coupler #(
     input  logic clk_i,
     /// Asynchronous reset, active low
     input  logic rst_ni,
-    /// Testmode in
-    input  logic testmode_i,
 
     /// R response valid
     input  logic r_rsp_valid_i,
@@ -60,7 +58,7 @@ module idma_channel_coupler #(
 );
 
     /// The width of the credit counter keeping track of the transfers
-    localparam int unsigned CounterWidth = cf_math_pkg::idx_width(NumAxInFlight);
+    localparam int unsigned CounterWidth = cc_pkg::idx_width(NumAxInFlight);
 
     /// Credit counter type
     typedef logic [CounterWidth-1:0] cnt_t;
@@ -91,14 +89,14 @@ module idma_channel_coupler #(
     assign first = r_rsp_valid_i & r_rsp_ready_i & r_rsp_first_i & !r_decouple_aw_i;
 
     // stream fifo to hold AWs back
-    stream_fifo_optimal_wrap #(
+    cc_stream_fifo_optimal_wrap #(
         .Depth        ( NumAxInFlight ),
-        .type_t       ( axi_aw_chan_t ),
+        .data_t       ( axi_aw_chan_t ),
         .PrintInfo    ( PrintFifoInfo )
     ) i_aw_store (
         .clk_i,
         .rst_ni,
-        .testmode_i,
+        .clr_i        ( 1'b0                ),
         .flush_i      ( 1'b0                ),
         .usage_o      ( /* NOT CONNECTED */ ),
         .data_i       ( aw_req_i            ),
@@ -109,14 +107,14 @@ module idma_channel_coupler #(
         .ready_i      ( aw_ready            )
     );
 
-    stream_fifo_optimal_wrap #(
+    cc_stream_fifo_optimal_wrap #(
         .Depth        ( NumAxInFlight ),
-        .type_t       ( logic         ),
+        .data_t       ( logic         ),
         .PrintInfo    ( PrintFifoInfo )
     ) i_aw_decoupled_store (
         .clk_i,
         .rst_ni,
-        .testmode_i,
+        .clr_i        ( 1'b0                ),
         .flush_i      ( 1'b0                ),
         .usage_o      ( /* NOT CONNECTED */ ),
         .data_i       ( aw_decouple_aw_i    ),
@@ -160,12 +158,11 @@ module idma_channel_coupler #(
 
     // fall through register to decouple the aw valid signal from the aw ready
     // now payload is required; just the decoupling of the handshaking signals
-    fall_through_register #(
-        .T ( logic [0:0] )
+    cc_fall_through_register #(
+        .data_t ( logic [0:0] )
     ) i_fall_through_register_decouple_aw_valid (
         .clk_i,
         .rst_ni,
-        .testmode_i,
         .clr_i       ( 1'b0                ),
         .valid_i     ( aw_sent             ),
         .ready_o     ( aw_ready_decoupled  ),

src/backend/idma_dataflow_element.sv

@@ -21,7 +21,6 @@ module idma_dataflow_element #(
 )(
     input  logic clk_i,
     input  logic rst_ni,
-    input  logic testmode_i,
 
     input  byte_t [StrbWidth-1:0] data_i,
     input  strb_t valid_i,
@@ -34,14 +33,14 @@ module idma_dataflow_element #(
 
     // buffer is implemented as an array of FIFOs
     for (genvar i = 0; i < StrbWidth; i++) begin : gen_fifo_buffer
-        passthrough_stream_fifo #(
-            .type_t       ( byte_t        ),
+        cc_passthrough_stream_fifo #(
+            .data_t       ( byte_t        ),
             .Depth        ( BufferDepth   ),
             .PrintInfo    ( PrintFifoInfo )
         ) i_passthrough_stream_fifo (
             .clk_i,
             .rst_ni,
-            .testmode_i,
+            .clr_i        ( 1'b0        ),
             .flush_i      ( 1'b0        ),
             .data_i       ( data_i  [i] ),
             .valid_i      ( valid_i [i] ),

src/backend/idma_error_handler.sv

@@ -33,8 +33,6 @@ module idma_error_handler #(
     input  logic clk_i,
     /// Asynchronous reset, active low
     input  logic rst_ni,
-    /// Testmode in
-    input  logic testmode_i,
 
     /// 1D iDMA response
     output idma_rsp_t rsp_o,
@@ -136,14 +134,14 @@ module idma_error_handler #(
     // FIFO: read address
     // the read address FIFO is synchronized with the `i_w_last` FIFO in the backend. So at this
     // point now full handshaking is required.
-    stream_fifo_optimal_wrap #(
+    cc_stream_fifo_optimal_wrap #(
         .Depth        ( MetaFifoDepth ),
-        .type_t       ( addr_t        ),
+        .data_t       ( addr_t        ),
         .PrintInfo    ( PrintFifoInfo )
     ) i_r_addr_store (
         .clk_i,
         .rst_ni,
-        .testmode_i,
+        .clr_i        ( 1'b0                ),
         .flush_i      ( 1'b0                ),
         .usage_o      ( /* NOT CONNECTED */ ),
         .data_i       ( r_addr_i            ),
@@ -157,14 +155,14 @@ module idma_error_handler #(
     // FIFO: w address
     // the read address FIFO is synchronized with the `i_w_last` FIFO in the backend. So at this
     // point now full handshaking is required.
-    stream_fifo_optimal_wrap #(
+    cc_stream_fifo_optimal_wrap #(
         .Depth        ( MetaFifoDepth ),
-        .type_t       ( addr_t        ),
+        .data_t       ( addr_t        ),
         .PrintInfo    ( PrintFifoInfo )
     ) i_w_addr_store (
         .clk_i,
         .rst_ni,
-        .testmode_i,
+        .clr_i        ( 1'b0                ),
         .flush_i      ( 1'b0                ),
         .usage_o      ( /* NOT CONNECTED */ ),
         .data_i       ( w_addr_i            ),