ci: cross-check RTL vs GVSoC cycle counts per tile

[diaconuccalin]

What

Adds a CI gate that compares per-tile cycle counts between the RTL (Modelsim) and GVSoC simulators for the same test binary, failing if any tile diverges by more than ±10%. Runs on the 14 RTL-CI tests for the 1×1 and 4×4 tile configs.

How

The same binary runs on both sims, so the instrumentation is platform-agnostic and read out differently per platform:

• RTL — sentinel_start()/sentinel_end() are no-ops on the core but detected by the MAGIA testbench (magia_vip.sv, PROFILE_SENTINEL, requires build_mode=profile), which prints per-tile (<N> clock cycles).
• GVSoC — xperf_end() prints the mcycle CSR delta as [XPERF] mhartid <id> CYCLES <n> (perf_get_cycles() does not work on RTL).

Both lines are keyed by mhartid → per-tile comparison.

Changes

• xperf_start/xperf_end helper (targets/magia_v{1,2}/include/utils/performance_utils.h), gated by the new PROFILE_XPERF flag (default off; threaded through Makefile and both CMakeLists.txt like the existing PROFILE_* flags). When off, both calls compile to nothing, so default builds (regression, gvtest, other RTL tests) are byte-identical and emit no [XPERF] lines.
• One xperf pair around the work region of the 14 tests.
• scripts/ci/compare_cycles.py — per-tile ±10% comparison, hard fail.
• .gitlab-ci.yml — build RTL with build_mode=profile, build tests with profile_xperf=1, namespace sim logs (.rtl.log/.gvsoc.log), add compare_tiles_4 / compare_tiles_1 stages.

Granularity

v1 is one region per test (one cycle number per tile). The path to ordered multi-segment profiling is documented but not implemented (the RTL testbench only decodes the generic sentinel pair, not the per-category sentinels).

To watch on first run

• build_mode=profile + fast_sim=1 coexistence, and the testbench (clock cycles) lines landing in captured stdout.
• test_helloworld's tiny cycle count may be noisy at ±10% — easy to widen or drop.

🤖 Generated with Claude Code