h2: restore DEVICE_PAGE_SIZE to SIZE_4M for correct subsystem register mapping - #71
Open
Brian Cain (androm3da) wants to merge 2 commits into
Open
h2: restore DEVICE_PAGE_SIZE to SIZE_4M for correct subsystem register mapping#71Brian Cain (androm3da) wants to merge 2 commits into
Brian Cain (androm3da) wants to merge 2 commits into
Conversation
…r mapping The device-page TLB entry maps Q6_SS_BASE_VA to the subsystem public- register base (PUB_BASE). Both the L2VIC (at PRIV_BASE + 0x10000) and the H2 hardware timer (at PRIV_BASE + 0x20000) are accessed through this mapping. With DEVICE_PAGE_SIZE = SIZE_1M (1 MB), the mapped window covers only 0xfc800000..0xfc8fffff (physical). L2VIC at 0xfc910000 and the timer at 0xfc920000 fall outside this window, so writes to those registers are silently lost. The L2VIC never receives the interrupt-enable configuration and the H2 timer MMIO is never reachable, so the guest kernel never receives timer interrupts and hangs after the angel0 console is disabled. Restore DEVICE_PAGE_SIZE to SIZE_4M so the 4 MB device-page covers 0xfc800000..0xfcbfffff, which includes L2VIC and the timer. Update BOOT_TLBLO_DEV in boot.h and the MAKE_TLBLO_DEV / MAKE_TLBHI macro calls in boot.ref.S to use SIZE_4M / BOOT_TLB_OFFSET_BITS_4M / BOOT_TLB_SHIFT_4M to match the new page size. Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
Brian Cain (androm3da)
requested review from
andreykarpenko-qc and
Bryan Bayerdorffer (bryanb-h2)
July 3, 2026 16:27
Member
Author
1 similar comment
Member
Author
Contributor
|
I don't understand this. We map the priv base with a 1M page. The pub-priv offset is 0x80000, plus 0x20000 for the timer gives 0xa0000, which is often < 0x00100000. 1M page is working in all h2 timer tests. |
Contributor
|
" the mapped window covers only 0xfc800000..0xfc8fffff (physical)." |
Bryan Bayerdorffer (bryanb-h2)
requested changes
Jul 28, 2026
Bryan Bayerdorffer (bryanb-h2)
left a comment
Contributor
There was a problem hiding this comment.
Can't see how this is needed.
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
The device-page TLB entry maps Q6_SS_BASE_VA to the subsystem public- register base (PUB_BASE). Both the L2VIC (at PRIV_BASE + 0x10000) and the H2 hardware timer (at PRIV_BASE + 0x20000) are accessed through this mapping.
With DEVICE_PAGE_SIZE = SIZE_1M (1 MB), the mapped window covers only 0xfc800000..0xfc8fffff (physical). L2VIC at 0xfc910000 and the timer at 0xfc920000 fall outside this window, so writes to those registers are silently lost. The L2VIC never receives the interrupt-enable configuration and the H2 timer MMIO is never reachable, so the guest kernel never receives timer interrupts and hangs after the angel0 console is disabled.
Restore DEVICE_PAGE_SIZE to SIZE_4M so the 4 MB device-page covers 0xfc800000..0xfcbfffff, which includes L2VIC and the timer.
Update BOOT_TLBLO_DEV in boot.h and the MAKE_TLBLO_DEV / MAKE_TLBHI macro calls in boot.ref.S to use SIZE_4M / BOOT_TLB_OFFSET_BITS_4M / BOOT_TLB_SHIFT_4M to match the new page size.