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feat: support SM90 FP8 × FP4 grouped GEMM#60

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feat: support SM90 FP8 × FP4 grouped GEMM#60
shiyang814-cpu wants to merge 53 commits into
sgl-project:mainfrom
shiyang814-cpu:sm90-fp8-fp4-g128-cleanup

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@shiyang814-cpu shiyang814-cpu commented Jul 15, 2026

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Co-authored-by: https://github.com/zhangxiaolei123456

This PR adds full support for SM90 FP8 × FP4 grouped GEMM kernels with FP4 scales stored in FP32, covering both group_size=32 (fast path) and group_size=128 configurations.

Kernels Included

  • 1d2d kernel: standard SM90 FP8 × FP4 grouped GEMM
  • 1d2d_rs kernel: register-shared variant for better occupancy
  • Contiguous path: for regular batched GEMM workloads
  • Masked path: with cooperative prefetch + sfb→smem routing

Group Size Support

  • group_size=32 (g32): E8M0 FP32 scale fast path with K/32 granularity
  • group_size=128 (g128): FP32 scale layout with K/128 granularity, validated for both contiguous and masked modes

Benchmark

python /sgl-workspace/sglang/test_sm90_fp8_fp4_g128.py --repo-root /sgl-workspace/DeepGEMM

Contiguous FP8xFP4(g128) benchmark

groups m/group n k W4 us W4 GB/s W4 diff FP8 us FP8 GB/s FP8 diff Speedup
8 1 4096 7168 327 431 0.0000 240 1074 0.0184 0.74x
8 1 7168 2048 178 444 0.0000 134 1030 0.0185 0.75x
8 1 4096 4096 195 430 0.0000 145 1045 0.0185 0.74x
8 4 4096 7168 326 431 0.0000 240 1076 0.0180 0.74x
8 4 7168 2048 179 444 0.0000 132 1042 0.0182 0.74x
8 4 4096 4096 197 427 0.0000 145 1039 0.0183 0.74x
8 8 4096 7168 326 432 0.0000 240 1075 0.0182 0.74x
8 8 7168 2048 178 444 0.0000 132 1044 0.0182 0.74x
8 8 4096 4096 196 428 0.0000 146 1036 0.0185 0.74x
8 16 4096 7168 327 430 0.0000 241 1073 0.0183 0.74x
8 16 7168 2048 179 443 0.0000 132 1043 0.0181 0.74x
8 16 4096 4096 196 429 0.0000 145 1044 0.0186 0.74x
8 32 4096 7168 326 432 0.0000 241 1073 0.0184 0.74x
8 32 7168 2048 178 444 0.0000 134 1033 0.0184 0.75x
8 32 4096 4096 196 429 0.0000 145 1042 0.0184 0.74x
8 64 4096 7168 327 431 0.0000 240 1076 0.0187 0.73x
8 64 7168 2048 179 442 0.0000 133 1037 0.0184 0.74x
8 64 4096 4096 197 427 0.0000 146 1039 0.0186 0.74x
16 1 4096 7168 637 442 0.0000 513 1006 0.0184 0.81x
16 1 7168 2048 334 474 0.0000 252 1095 0.0182 0.75x
16 1 4096 4096 380 442 0.0000 303 996 0.0183 0.80x
16 4 4096 7168 638 441 0.0000 514 1005 0.0182 0.81x
16 4 7168 2048 335 474 0.0000 252 1095 0.0185 0.75x
16 4 4096 4096 380 442 0.0000 303 996 0.0183 0.80x
16 8 4096 7168 638 441 0.0000 514 1005 0.0184 0.81x
16 8 7168 2048 334 475 0.0000 253 1090 0.0184 0.76x
16 8 4096 4096 380 442 0.0000 304 994 0.0182 0.80x
16 16 4096 7168 639 440 0.0000 514 1005 0.0183 0.80x
16 16 7168 2048 334 475 0.0000 252 1095 0.0184 0.76x
16 16 4096 4096 380 442 0.0000 303 996 0.0183 0.80x
16 32 4096 7168 639 441 0.0000 514 1005 0.0182 0.80x
16 32 7168 2048 335 473 0.0000 253 1091 0.0185 0.76x
16 32 4096 4096 381 442 0.0000 304 996 0.0181 0.80x
16 64 4096 7168 639 441 0.0000 515 1004 0.0182 0.81x
16 64 7168 2048 334 475 0.0000 252 1094 0.0182 0.76x
16 64 4096 4096 381 441 0.0000 304 995 0.0183 0.80x
32 1 4096 7168 1222 461 0.0000 937 1102 0.0182 0.77x
32 1 7168 2048 656 483 0.0000 491 1124 0.0181 0.75x
32 1 4096 4096 722 465 0.0000 548 1104 0.0184 0.76x
32 4 4096 7168 1221 461 0.0000 935 1104 0.0183 0.77x
32 4 7168 2048 656 483 0.0000 491 1124 0.0185 0.75x
32 4 4096 4096 722 465 0.0000 549 1102 0.0183 0.76x
32 8 4096 7168 1222 461 0.0000 937 1102 0.0183 0.77x
32 8 7168 2048 657 483 0.0000 491 1124 0.0183 0.75x
32 8 4096 4096 722 465 0.0000 549 1102 0.0183 0.76x
32 16 4096 7168 1222 461 0.0000 937 1102 0.0183 0.77x
32 16 7168 2048 657 483 0.0000 491 1124 0.0182 0.75x
32 16 4096 4096 722 465 0.0000 548 1104 0.0184 0.76x
32 32 4096 7168 1222 461 0.0000 937 1103 0.0184 0.77x
32 32 7168 2048 657 482 0.0000 491 1123 0.0184 0.75x
32 32 4096 4096 723 465 0.0000 548 1103 0.0184 0.76x
32 64 4096 7168 1224 460 0.0000 938 1101 0.0183 0.77x
32 64 7168 2048 658 482 0.0000 491 1123 0.0182 0.75x
32 64 4096 4096 726 463 0.0000 550 1100 0.0185 0.76x

Masked FP8xFP4(g128) benchmark

groups m/group n k W4 us W4 GB/s W4 diff FP8 us FP8 GB/s FP8 diff Speedup
8 1 4096 7168 99 1264 0.0000 142 1706 0.0196 1.44x
8 1 7168 2048 53 1180 0.0000 78 1552 0.0199 1.47x
8 1 4096 4096 62 1145 0.0000 88 1574 0.0189 1.41x
8 4 4096 7168 100 1256 0.0000 141 1717 0.0195 1.42x
8 4 7168 2048 53 1184 0.0000 79 1547 0.0189 1.48x
8 4 4096 4096 63 1137 0.0000 88 1575 0.0197 1.40x
8 8 4096 7168 99 1277 0.0000 141 1722 0.0190 1.43x
8 8 7168 2048 53 1204 0.0000 78 1562 0.0188 1.48x
8 8 4096 4096 63 1145 0.0000 88 1577 0.0195 1.40x
8 16 4096 7168 104 1220 0.0000 141 1730 0.0189 1.36x
8 16 7168 2048 55 1178 0.0000 78 1574 0.0193 1.43x
8 16 4096 4096 64 1130 0.0000 88 1594 0.0192 1.36x
8 32 4096 7168 114 1126 0.0000 142 1738 0.0184 1.24x
8 32 7168 2048 60 1114 0.0000 78 1603 0.0191 1.31x
8 32 4096 4096 71 1046 0.0000 88 1615 0.0185 1.23x
8 64 4096 7168 198 669 0.0000 142 1765 0.0189 0.71x
8 64 7168 2048 115 614 0.0000 78 1653 0.0190 0.68x
8 64 4096 4096 123 633 0.0000 88 1644 0.0189 0.72x
16 1 4096 7168 184 1357 0.0000 271 1791 0.0202 1.47x
16 1 7168 2048 94 1332 0.0000 144 1681 0.0194 1.54x
16 1 4096 4096 112 1271 0.0000 165 1683 0.0192 1.46x
16 4 4096 7168 184 1363 0.0000 269 1802 0.0193 1.47x
16 4 7168 2048 95 1326 0.0000 145 1681 0.0192 1.53x
16 4 4096 4096 113 1265 0.0000 166 1672 0.0191 1.46x
16 8 4096 7168 184 1368 0.0000 271 1797 0.0191 1.47x
16 8 7168 2048 93 1371 0.0000 144 1691 0.0191 1.56x
16 8 4096 4096 112 1283 0.0000 165 1686 0.0189 1.47x
16 16 4096 7168 196 1296 0.0000 270 1808 0.0187 1.38x
16 16 7168 2048 97 1325 0.0000 144 1707 0.0193 1.48x
16 16 4096 4096 115 1266 0.0000 165 1700 0.0194 1.43x
16 32 4096 7168 215 1197 0.0000 270 1827 0.0191 1.25x
16 32 7168 2048 107 1248 0.0000 144 1738 0.0198 1.35x
16 32 4096 4096 129 1158 0.0000 165 1713 0.0191 1.29x
16 64 4096 7168 379 700 0.0000 270 1853 0.0190 0.71x
16 64 7168 2048 213 664 0.0000 146 1779 0.0189 0.68x
16 64 4096 4096 231 672 0.0000 165 1755 0.0187 0.71x
32 1 4096 7168 318 1571 0.0000 506 1916 0.0202 1.59x
32 1 7168 2048 175 1432 0.0000 277 1751 0.0202 1.59x
32 1 4096 4096 190 1502 0.0000 302 1834 0.0198 1.59x
32 4 4096 7168 320 1567 0.0000 507 1915 0.0198 1.59x
32 4 7168 2048 176 1430 0.0000 278 1750 0.0192 1.58x
32 4 4096 4096 191 1498 0.0000 301 1842 0.0195 1.57x
32 8 4096 7168 319 1575 0.0000 508 1916 0.0191 1.59x
32 8 7168 2048 174 1461 0.0000 278 1760 0.0197 1.60x
32 8 4096 4096 190 1516 0.0000 302 1845 0.0196 1.59x
32 16 4096 7168 339 1496 0.0000 506 1932 0.0190 1.49x
32 16 7168 2048 182 1417 0.0000 277 1777 0.0195 1.52x
32 16 4096 4096 195 1493 0.0000 302 1856 0.0190 1.55x
32 32 4096 7168 374 1378 0.0000 508 1940 0.0192 1.36x
32 32 7168 2048 202 1319 0.0000 278 1806 0.0195 1.37x
32 32 4096 4096 220 1357 0.0000 302 1877 0.0193 1.37x
32 64 4096 7168 726 731 0.0000 507 1975 0.0189 0.70x
32 64 7168 2048 416 681 0.0000 278 1864 0.0194 0.67x
32 64 4096 4096 436 713 0.0000 301 1921 0.0192 0.69x

@shiyang814-cpu shiyang814-cpu changed the title feat: support SM90 FP8 × FP4 grouped GEMM (group_size=32 & group_size=128) feat: support SM90 FP8 × FP4 grouped GEMM Jul 15, 2026
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