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Fix: Correct byte order in address representation for 'xx1527' model#124

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Fix: Correct byte order in address representation for 'xx1527' model#124
aKaReZa75 wants to merge 1 commit intosigrokproject:masterfrom
aKaReZa75:master

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@aKaReZa75
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Summary

This pull request fixes a bug in the xx1527 model where the address bytes were displayed in the wrong order.

Problem

The original code incorrectly formats the 24-bit address by reversing the byte order:

address = 'Address 0x%X %X %X' % (addr & 0xFF, (addr >> 8) & 0xFF, addr >> 16)

This results in the least significant byte appearing first, which is misleading and inconsistent with common address representations.

Fix

Replaced the line with:

address = 'Address 0x%X %X %X' % (addr >> 16, (addr >> 8) & 0xFF, addr & 0xFF)

This correctly displays the most significant byte first, ensuring the address is shown in standard big-endian order (MSB → LSB).

Impact

  • The address output is now correctly formatted.
  • No other functionality is affected.

@guilin007
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Hello,
I want to add an analyzer to the SIF protocol.
768f65dfdc7078e6c59c31b1ae111850

6fa53d0fd3b4467eb0701ab6ab8658ab

The line status is low when idle.
Each frame of data consists of three parts: synchronization signal + 12-bit (12*8bit) data+end signal.
The data signal uses the high and low level duty cycle to send data packets.
Data 0: (32 Tosc for low level, 64 Tosc for high level);
Data 1: (64 Tosc for low level, 32 Tosc for high level);

Stop signal :(5-10ms low)

The ratio of high and low levels is generally 0.5ms and 1ms

I need a master to help me complete the writing, because I only know a little bit of C programming and other programming languages

Thank you very much for your help

@aKaReZa75
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Author

Hello,
I’ve previously implemented a similar signal decoding system for the EV1527 protocol, utilizing both the Input Capture peripheral and a combination of External Interrupts and Timers on an AVR microcontroller. The approach involved precise timing measurement of pulse widths to distinguish between logical “0” and “1” based on duty cycle characteristics, very similar to what you’ve described for the SIF protocol.

If you believe it could be useful, I can share the complete source code of that project and assist you step by step in adapting or developing an analyzer specifically for the SIF protocol.

Best regards, and I’ll be glad to support you throughout the process.

@guilin007
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Thank you very much for your help, I really need the full source code of the EV1527 project, they are very similar.

@aKaReZa75
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You're very welcome!
I’ll share the repository link with you soon. The project is currently stored locally on my system, but I’ll push it to my repository shortly and send you the link as soon as it’s available.

@aKaReZa75
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The project is now ready, you can check it out here: https://github.com/aKaReZa75/AVR_ev1527
I haven’t uploaded the YouTube video for it yet, but I’ve made sure the documentation is clear and detailed so you can easily follow and understand the code. If you have any questions, feel free to open an Issue on the repository. I’ll be happy to reply and help you there.
Wishing you the best of success in your project.

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2 participants