Add section on memory consistency models#19
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This introduces a "Memory consistency models" subsection that walks via sequential consistency, total store order, and relaxed/weak ordering using four litmus tests (Message Passing, Store Buffer, IRIW, and Coherence) and three hardware-model figures. The SC/TSO/relaxed progression, the choice of litmus tests, and the hardware diagrams are adapted from Russ Cox's essay "Hardware Memory Models" (https://research.swtch.com/hwmm); a citation has been added to the Additional Resources appendix. The Lamport SC paper, Sewell et al.'s x86-TSO CACM paper, and the diy/herdtools7 toolchain are also cited. The existing memory_order_* discussion is renested under a new "C11/C++11 atomics" subsection so the chapter reads model -> API.
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This introduces a "Memory consistency models" subsection that walks via sequential consistency, total store order, and relaxed/weak ordering using four litmus tests (Message Passing, Store Buffer, IRIW, and Coherence) and three hardware-model figures.
The SC/TSO/relaxed progression, the choice of litmus tests, and the hardware diagrams are adapted from Russ Cox's essay "Hardware Memory Models" (https://research.swtch.com/hwmm); a citation has been added to the Additional Resources appendix. The Lamport SC paper, Sewell et al.'s x86-TSO CACM paper, and the diy/herdtools7 toolchain are also cited.
The existing memory_order_* discussion is renested under a new "C11/C++11 atomics" subsection so the chapter reads model -> API.
Summary by cubic
Added a “Memory consistency models” subsection that explains SC, TSO, and relaxed/weak ordering with four litmus tests and three hardware diagrams. Restructured the chapter so it flows model → API by moving
memory_order_*content under a new “C11/C++11 atomics” subsection.New Features
hw-seq-cst.pdf,hw-tso.pdf,hw-relaxed.pdf.diyandherdtools7.Refactors
memory_order_*discussion under “C11/C++11 atomics” to emphasize model-first explanations.Written for commit 46f6a7a. Summary will update on new commits.