feat(sitl): bring latest upstream SITL updates from am32-firmware#394#37
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AlexKlimaj wants to merge 6 commits into
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feat(sitl): bring latest upstream SITL updates from am32-firmware#394#37AlexKlimaj wants to merge 6 commits into
AlexKlimaj wants to merge 6 commits into
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Port the latest SITL work from am32-firmware#394 onto ark-release. Highlights: - Calibrated motor models and bench captures (SEQURE GT2215, VimDrones L431/1404, Nano 2216) with expected.json regression gates - Physics improvements: persistent diodes, inertial comparator, progress lease, energy ledger, saturating supply sink, tone/audio support - Four-way bootloader protocol helpers, calibration CI workflow and esc_*.py measurement/plot/report tools - DroneCAN FlexDebug v2 fields and heartbeat keep-alive fix so the 1 kHz inject no longer resets the RawCommand timeout - SITL CAN: drop own TX loopbacks; file-backed RTC backup as .bkup - Keep ARK pytest harness/CI, macOS SIGPIPE/SO_REUSEPORT hardening, and CURRENT_AUTO_OFFSET on AM32_SITL_CAN
Upstream gui_ci_test imported fixed INPUT_PORT/STATE_PORT and Sitl from run_ci_tests; ARK's runner re-exports harness Sitl (dynamic free ports) and no longer defines those constants. Point the GUI test at sitl_harness and wire the allocated ports into the GUI process.
pydronecan only parses a single bus number after "mcast:". A URI of mcast:7:lo is treated as bus 0 (239.65.82.0), while SITL correctly joins bus 7 (239.65.82.7). The tools and simulator never shared a bus, so every calibration check saw no esc.Status (no-data / missing / err=1e9) and the ESC soft-reset every 2s on signaltimeout. Use mcast:7 for both sides. Require dronecan>=1.0.20 so the mcast driver is present on CI.
CI runners often run wall-paced SITL at ~0.2x realtime. The ESC needs ~1 s of sim-time zero throttle to arm, but the tools only slept a fixed wall arm-time, so throttle never latched and every steady/square check saw rpm=0 (no-data / missing). Poll FlexDebug.armed until the arming window completes, require dronecan>=1.0.27 for FlexDebug DSDL, skip square (timing-sensitive) when sim/wall ratio is low, and treat a never-started chirp as a skip or fail instead of a false desync pass.
esc_measure clamps demand to --max-throttle (default 0.6). The nano dataset checks 0.70/0.80/0.90, so those steps were silently held at 0.6 and the comparison reported no-data. Pass a cap derived from the expected steady levels.
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Summary
Update the SITL port already on
ark-release(merged via #34) with the latest work from upstream am32-firmware/AM32#394 (tridge).The earlier ARK port stopped at an earlier revision of that PR. This brings in motor-model calibration, physics fixes, tones/fourway, measurement tools, and related DroneCAN/SITL CAN updates while keeping ARK-specific pieces (pytest harness, macOS hardening, Makefile/
VERSION_TAGtoolchain).Brought from upstream
expected.jsongates;run_calibration_tests.py+SITL-calibration.ymlscripts/esc_{measure,chirp,square,plot,report,analyze}.py,CALIBRATION.md,sitl_tones.py,sitl_fourway.py, TIMING-DESIGN notes--bootloader)last_raw_command_us(was masking the 250 ms command-loss timeout)<eeprom>.bkupPreserved ARK integration
Mcu/SITL/tests/+sitl_harness.py+requirements-ci.txt/SITL.ymlentrypointSO_NOSIGPIPE,SO_REUSEPORT, INADDR_ANY bind for mcastCURRENT_AUTO_OFFSETonAM32_SITL_CANVERSION_TAG/ HWCI (untouched)Verification
make AM32_SITL_CANbuildsmake ARK_4IN1_F051still buildsUpstream source
am32-firmware#394
Test plan