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Tune PyHPC power iteration for H100#227

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brycelelbach merged 1 commit into
NVIDIA:event/2026-07-cscs-summer-schoolfrom
robobryce:update/power-iteration-config
Jul 25, 2026
Merged

Tune PyHPC power iteration for H100#227
brycelelbach merged 1 commit into
NVIDIA:event/2026-07-cscs-summer-schoolfrom
robobryce:update/power-iteration-config

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@robobryce

@robobryce robobryce commented Jul 24, 2026

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Summary

Tune only the H100-backed PyHPC power-iteration notebooks.

Memory-spaces defaults:

  • dim = 10000
  • dominance = 0.05
  • max_steps = 1000
  • check_frequency = 25
  • progress = True
  • residual_threshold = 1e-10

Asynchrony defaults:

  • dim = 19000
  • dominance = 0.05
  • max_steps = 400
  • check_frequency = 25, overrideable with the first command-line argument
  • progress = True
  • residual_threshold = 1e-10

All seven inner iteration loops in the four PyHPC exercise/solution notebooks cap their stop at cfg.max_steps. This includes the two indexed loops and five equivalent loops whose index is unused.

The asynchrony exercise now asks students to sweep check frequencies 20 through 30 and balance CPU checkpoint I/O against GPU compute. Its solution runs the complete command-line sweep, prints the timings, displays an annotated performance graph in notebook 01 style, selects the fastest frequency, and captures, exports, and opens a final Nsight Systems profile for that setting.

The accelerated-python tutorial remains unchanged because it targets different hardware.

The memory-spaces solution contained saved results from the old 4096 / 0.1 / 400 / 10 configuration, so those stale outputs remain cleared rather than presenting incorrect shapes, residuals, and timings. Its 8192 experiment is relabeled as a smaller configuration.

Validation

  • verified both memory-spaces and all four asynchrony config definitions
  • verified the command-line default/override expression and sys import in all four generated asynchrony scripts
  • verified all seven inner loops stop at cfg.max_steps
  • validated the 20–30 sweep, optimum selection, plot, and final profile wiring with synthetic timings
  • validated all four changed notebooks with nbformat
  • passed the canonical format check for all 152 repository notebooks
  • confirmed the diff contains exactly four PyHPC notebooks and no accelerated-python files
  • confirmed all changed notebooks have no saved outputs
  • git diff --check

Full notebook execution was not run locally because these defaults require the H100 tutorial environment.

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👋 Thank you for your contribution!

This pull request is from a forked repository so GitHub Actions will not be able to run CI. A maintainer will review your changes shortly and manually trigger the CI.

@maintainers Please review this PR when you have a chance and follow the instructions in the CONTRIBUTING.md file to trigger the CI.

@robobryce
robobryce force-pushed the update/power-iteration-config branch from 5e617b7 to ea974f1 Compare July 24, 2026 18:24
@robobryce robobryce changed the title Unify power iteration notebook configurations Tune PyHPC power iteration for H100 Jul 24, 2026
@robobryce
robobryce force-pushed the update/power-iteration-config branch 2 times, most recently from 4cbdca6 to 1b9e4e0 Compare July 25, 2026 09:42
@robobryce
robobryce force-pushed the update/power-iteration-config branch from 1b9e4e0 to 2f3250c Compare July 25, 2026 10:00
@brycelelbach
brycelelbach merged commit 9a361c7 into NVIDIA:event/2026-07-cscs-summer-school Jul 25, 2026
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2 participants