perilus

A RISC-V RV32I processor written with Chisel as a learning exercise. Basically the same design as the multi-cycle processor from Harris and Harris, but extended to cover the entire base instruction set.

Usage

1. Install dependencies¹
   • Scala 2 (not 3 because Chisel isn't compatible with it)
   • sbt
   • Verilator
   • just
   • Rust
2. just test chisel verilate simulate

The controls for the standalone simulator aren't documented yet, but the source code makes them at least mildly clear. vim users will feel somewhat at home.

Footnotes

1. If you use the nix package manager, you can use the shell.nix file in the project root with nix-shell. ↩