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Use saturating arithmetic in key places CI #19: Commit 0ff5ee0 pushed by bmgxyz
5m 10s main
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5m 10s
Add scrollable memory and jump-to-selection CI #18: Commit 9fa7a67 pushed by bmgxyz
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6m 33s
Update README CI #17: Commit 12443c4 pushed by bmgxyz
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Add system diagram CI #16: Commit 81c4e92 pushed by bmgxyz
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5m 19s
Add support for all remaining B-type instructions in RV32I CI #15: Commit f8f8f5a pushed by bmgxyz
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Add support for all load and store instructions in RV32I CI #14: Commit fe59fd0 pushed by bmgxyz
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5m 18s
Add support for slli, sltiu, xori, srli, and srai CI #13: Commit 212101e pushed by bmgxyz
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4m 32s
Add Fibonacci test program CI #12: Commit 969640a pushed by bmgxyz
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2m 59s
Add support for add, sub, slt, or, and and instructions CI #11: Commit cfed332 pushed by bmgxyz
2m 36s main
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2m 36s
Fix register file tests CI #10: Commit fd7229b pushed by bmgxyz
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Create zip archive containing all Verilog output CI #9: Commit 176dfe4 pushed by bmgxyz
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2m 27s
Dynamically write memory files for tests instead of keeping them in a… CI #8: Commit 8aa667d pushed by bmgxyz
2m 20s main
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beq test not working. need to check imm extender CI #7: Commit ed4fa0d pushed by mbbutler
2m 50s mbb/beq-not-working
mbb/beq-not-working
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Add 'sw' test and 'just' project mgmt CI #6: Commit 19e5758 pushed by mbbutler
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Fix assets paths in PerilusTests that were pointing to my local files… CI #5: Commit 48947a9 pushed by bmgxyz
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Add memory/reg init from file, add optional debug interfaces, and exe… CI #4: Commit 5323af8 pushed by bmgxyz
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Connect data path and control unit IO CI #3: Commit ad41caa pushed by bmgxyz
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Update README CI #2: Commit 0b093e9 pushed by bmgxyz
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Add better CI, updated .gitignore, add scalafmt as sbt plugin CI #1: Commit 5ce26af pushed by bmgxyz
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Implement ExtendUnit Continuous Integration #2: Commit b2e69ab pushed by bmgxyz
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Copy parts of chisel-template and add control unit stub Continuous Integration #1: Commit fd91da0 pushed by bmgxyz
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