[ExecuTorch][WebGPU] Add optimized linear_fp32 op#20847
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[ExecuTorch][WebGPU] Add relu op (shared unary handler; sigmoid adopts make_compute_pipeline)
#20863
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This was referenced Jul 10, 2026
This was referenced Jul 16, 2026
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Stack from ghstack (oldest at bottom):
fp32
aten.linear.defaultnow runs on the WebGPU backend as a shared-memory-tiled GEMM (with an optional bias), so the dense projections in the Florence-2 BART decoder and DaViT vision encoder execute on-device instead of falling back.aten.linear.defaultis the projection primitive throughout those attention stacks; without a WebGPU kernel it AOT-delegates but throws at graph load.Problem — The WebGPU backend had no
aten.linear.defaultkernel. The op partitions into the delegate at export time, but at runtime there was no registered handler, so any graph containing an fp32 linear could not run. A naive one-thread-per-output GEMM would also be memory-bound: every output element would re-read a full row of the input and a full column of the weight from global memory with no reuse.Solution — Before:
aten.linear.defaulthad no runtime kernel (load-time failure). After: the handler bindsin, the prepacked[N,K]weight, an optionalbias, and an output, then dispatches a tiled GEMM that computesout[m,n] = sum_k in[m,k] * weight[n,k] (+ bias[n]). The 32x32 output tile is staged through workgroup shared memory: each workgroup cooperatively loads a 32x32 slab of A (input) and B (weight) intovar<workgroup>arrays,workgroupBarrier-syncs, then accumulates acrossceil(K/32)k-tiles so each loaded value is reused across the tile instead of re-fetched from global memory. WhenK % 4 == 0the handler routes to a vec4 variant that views the input and weight buffers asarray<vec4<f32>>over K and reduces withdot, halving the shared-memory traffic and issuing wide 16-byte loads.Implementation — Shared-memory tiling:
TILE = 32,@workgroup_size(8, 8, 1), each of the 64 threads owns a 4x4 register sub-tile (RPT = 4) so one 8x8 workgroup covers the full 32x32 output tile; twovar<workgroup>arraysa_sub/b_substage the A/B tiles. The scalar tiled kernel (linear_fp32_tiled.wgsl) reads the transposed[N,K]weight viaread_batt_weight[col*K + krow]; the vec4 kernel (linear_fp32_vec4.wgsl) uses[32][8]vec4 tiles (TILE4 = 8) with a flat cooperative tile load (256 vec4 elements spread across the 64 threads) and adot(av, b_sub[..])inner product. Both apply the same bias epiloguev = v + t_bias[c]gated onparams.has_bias. Build-time path routing:LinearFp32.cppselectslinear_fp32_vec4_wgslwhenK % 4 == 0, elselinear_fp32_tiled_wgsl(LinearFp32.cpp:77,100). Dispatch is a genuine 2D gridceil(N/32) x ceil(M/32), throwing before any allocation if either dimension exceeds 65535 (no 1D-flat stride recovery needed). Uses the sharedutils::make_compute_pipeline(shader/layout/pipeline/bind-group builder),utils::make_uniform(16-byteLinearParams {M,N,K,has_bias}), andutils::make_optional_binding(a 16-byte zero-filled dummy storage buffer for the None-bias binding that the shader gates off and never reads). Mirrors Vulkanbackends/vulkan/runtime/graph/ops/impl/Linear.cpp(linear_packed_weight: tiled-vs-vec shader selection on width alignment, transposed prepacked weight, bias epilogue).Constraints — fp32 only (validated by an output byte-size check);
weightis the prepacked[N,K]constant copied byet_vk.prepack;biasmay be None; the vec4 path requiresK % 4 == 0; 2D dispatch is capped at 65535 workgroups per dimension; fixed@workgroup_size(8, 8, 1)(no override constant).Co-authored-with: Claude Code.
@exported-using-ghexport
Differential Revision: D110836675
Differential Revision: D110836675